Diffstat (limited to 'dts/Bindings/spi/fsl-imx-cspi.txt')
1 files changed, 12 insertions, 6 deletions
diff --git a/dts/Bindings/spi/fsl-imx-cspi.txt b/dts/Bindings/spi/fsl-imx-cspi.txt
index 5bf13960f..e3c48b20b 100644
@@ -12,24 +12,30 @@ Required properties:
- "fsl,imx53-ecspi" for SPI compatible with the one integrated on i.MX53 and later Soc
- reg : Offset and length of the register set for the device
- interrupts : Should contain CSPI/eCSPI interrupt
-- cs-gpios : Specifies the gpio pins to be used for chipselects.
- clocks : Clock specifiers for both ipg and per clocks.
- clock-names : Clock names should include both "ipg" and "per"
See the clock consumer binding,
-- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
-- dma-names: DMA request names should include "tx" and "rx" if present.
-- fsl,spi-num-chipselects : Contains the number of the chipselect
+- cs-gpios : GPIOs to use as chip selects, see spi-bus.txt. While the native chip
+select lines can be used, they appear to always generate a pulse between each
+word of a transfer. Most use cases will require GPIO based chip selects to
+generate a valid transaction.
+- num-cs : Number of total chip selects, see spi-bus.txt.
+- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
+- dma-names: DMA request names, if present, should include "tx" and "rx".
- fsl,spi-rdy-drctl: Integer, representing the value of DRCTL, the register
controlling the SPI_READY handling. Note that to enable the DRCTL consideration,
the SPI_READY mode-flag needs to be set too.
Valid values are: 0 (disabled), 1 (edge-triggered burst) and 2 (level-triggered burst).
+- fsl,spi-num-chipselects : Contains the number of the chipselect