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-rw-r--r--dts/Bindings/thermal/ti,j72xx-thermal.yaml37
1 files changed, 35 insertions, 2 deletions
diff --git a/dts/Bindings/thermal/ti,j72xx-thermal.yaml b/dts/Bindings/thermal/ti,j72xx-thermal.yaml
index c74f124ebf..171b3622ed 100644
--- a/dts/Bindings/thermal/ti,j72xx-thermal.yaml
+++ b/dts/Bindings/thermal/ti,j72xx-thermal.yaml
@@ -4,11 +4,24 @@
$id: http://devicetree.org/schemas/thermal/ti,j72xx-thermal.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Texas Instruments J72XX VTM (DTS) binding
+title: Texas Instruments J72XX VTM (DTS)
maintainers:
- Keerthy <j-keerthy@ti.com>
+description: |
+ The TI K3 family of SoCs typically have a Voltage & Thermal
+ Management (VTM) device to control up to 8 temperature diode
+ sensors to measure silicon junction temperatures from different
+ hotspots of the chip as well as provide temperature, interrupt
+ and alerting information.
+
+ The following polynomial equation can then be used to convert
+ value returned by this device into a temperature in Celsius
+
+ Temp(C) = (-9.2627e-12) * x^4 + (6.0373e-08) * x^3 + \
+ (-1.7058e-04) * x^2 + (3.2512e-01) * x + (-4.9003e+01)
+
properties:
compatible:
enum:
@@ -19,7 +32,12 @@ properties:
items:
- description: VTM cfg1 register space
- description: VTM cfg2 register space
- - description: VTM efuse register space
+ - description: |
+ A software trimming method must be applied to some Jacinto
+ devices to function properly. This eFuse region provides
+ the information needed for these SoCs to report
+ temperatures accurately.
+ minItems: 2
power-domains:
maxItems: 1
@@ -27,6 +45,21 @@ properties:
"#thermal-sensor-cells":
const: 1
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: ti,j721e-vtm
+ then:
+ properties:
+ reg:
+ minItems: 3
+ else:
+ properties:
+ reg:
+ maxItems: 2
+
required:
- compatible
- reg