diff options
Diffstat (limited to 'dts/Bindings/usb')
23 files changed, 542 insertions, 77 deletions
diff --git a/dts/Bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml b/dts/Bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml index 267fce1659..b0e5e0fe93 100644 --- a/dts/Bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml +++ b/dts/Bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml @@ -22,10 +22,14 @@ description: | The DWC3 Glue controls the PHY routing and power, an interrupt line is connected to the Glue to serve as OTG ID change detection. + The Amlogic A1 embeds a DWC3 USB IP Core configured for USB2 in + host-only mode. + properties: compatible: enum: - amlogic,meson-g12a-usb-ctrl + - amlogic,meson-a1-usb-ctrl ranges: true @@ -84,6 +88,25 @@ required: - phys - dr_mode +allOf: + - if: + properties: + compatible: + enum: + - amlogic,meson-a1-usb-ctrl + + then: + properties: + clocks: + minItems: 3 + clock-names: + items: + - const: usb_ctrl + - const: usb_bus + - const: xtal_usb_ctrl + required: + - clock-names + examples: - | usb: usb@ffe09000 { diff --git a/dts/Bindings/usb/aspeed,usb-vhub.yaml b/dts/Bindings/usb/aspeed,usb-vhub.yaml new file mode 100644 index 0000000000..06399ba0d9 --- /dev/null +++ b/dts/Bindings/usb/aspeed,usb-vhub.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (c) 2020 Facebook Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/aspeed,usb-vhub.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ASPEED USB 2.0 Virtual Hub Controller + +maintainers: + - Benjamin Herrenschmidt <benh@kernel.crashing.org> + +description: |+ + The ASPEED USB 2.0 Virtual Hub Controller implements 1 set of USB Hub + register and several sets of Device and Endpoint registers to support + the Virtual Hub's downstream USB devices. + + Supported number of devices and endpoints vary depending on hardware + revisions. AST2400 and AST2500 Virtual Hub supports 5 downstream devices + and 15 generic endpoints, while AST2600 Virtual Hub supports 7 downstream + devices and 21 generic endpoints. + +properties: + compatible: + enum: + - aspeed,ast2400-usb-vhub + - aspeed,ast2500-usb-vhub + - aspeed,ast2600-usb-vhub + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + + aspeed,vhub-downstream-ports: + description: Number of downstream ports supported by the Virtual Hub + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - default: 5 + minimum: 1 + maximum: 7 + + aspeed,vhub-generic-endpoints: + description: Number of generic endpoints supported by the Virtual Hub + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - default: 15 + minimum: 1 + maximum: 21 + +required: + - compatible + - reg + - clocks + - interrupts + - aspeed,vhub-downstream-ports + - aspeed,vhub-generic-endpoints + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/aspeed-clock.h> + vhub: usb-vhub@1e6a0000 { + compatible = "aspeed,ast2500-usb-vhub"; + reg = <0x1e6a0000 0x300>; + interrupts = <5>; + clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; + aspeed,vhub-downstream-ports = <5>; + aspeed,vhub-generic-endpoints = <15>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb2ad_default>; + }; diff --git a/dts/Bindings/usb/dwc2.yaml b/dts/Bindings/usb/dwc2.yaml index 71cf7ba322..0d6d850a7f 100644 --- a/dts/Bindings/usb/dwc2.yaml +++ b/dts/Bindings/usb/dwc2.yaml @@ -18,46 +18,33 @@ properties: - const: rockchip,rk3066-usb - const: snps,dwc2 - items: - - const: rockchip,px30-usb - - const: rockchip,rk3066-usb - - const: snps,dwc2 - - items: - - const: rockchip,rk3036-usb - - const: rockchip,rk3066-usb - - const: snps,dwc2 - - items: - - const: rockchip,rv1108-usb - - const: rockchip,rk3066-usb - - const: snps,dwc2 - - items: - - const: rockchip,rk3188-usb - - const: rockchip,rk3066-usb - - const: snps,dwc2 - - items: - - const: rockchip,rk3228-usb - - const: rockchip,rk3066-usb - - const: snps,dwc2 - - items: - - const: rockchip,rk3288-usb + - enum: + - rockchip,px30-usb + - rockchip,rk3036-usb + - rockchip,rk3188-usb + - rockchip,rk3228-usb + - rockchip,rk3288-usb + - rockchip,rk3328-usb + - rockchip,rk3368-usb + - rockchip,rv1108-usb - const: rockchip,rk3066-usb - const: snps,dwc2 - const: lantiq,arx100-usb - const: lantiq,xrx200-usb - items: - - const: amlogic,meson8-usb - - const: snps,dwc2 - - items: - - const: amlogic,meson8b-usb - - const: snps,dwc2 - - const: amlogic,meson-gxbb-usb - - items: - - const: amlogic,meson-g12a-usb + - enum: + - amlogic,meson8-usb + - amlogic,meson8b-usb + - amlogic,meson-gxbb-usb + - amlogic,meson-g12a-usb - const: snps,dwc2 - const: amcc,dwc-otg - const: snps,dwc2 - const: st,stm32f4x9-fsotg - const: st,stm32f4x9-hsotg - const: st,stm32f7-hsotg + - const: st,stm32mp15-fsotg + - const: st,stm32mp15-hsotg - const: samsung,s3c6400-hsotg reg: @@ -103,6 +90,10 @@ properties: vusb_a-supply: description: phandle to voltage regulator of analog section. + vusb33d-supply: + description: reference to the VBUS and ID sensing comparators supply, in + order to perform OTG operation, used on STM32MP15 SoCs. + dr_mode: enum: [host, peripheral, otg] diff --git a/dts/Bindings/usb/dwc3.txt b/dts/Bindings/usb/dwc3.txt index 66780a47ad..9946ff9ba7 100644 --- a/dts/Bindings/usb/dwc3.txt +++ b/dts/Bindings/usb/dwc3.txt @@ -7,7 +7,8 @@ Required properties: - compatible: must be "snps,dwc3" - reg : Address and length of the register set for the device - interrupts: Interrupts used by the dwc3 controller. - - clock-names: should contain "ref", "bus_early", "suspend" + - clock-names: list of clock names. Ideally should be "ref", + "bus_early", "suspend" but may be less or more. - clocks: list of phandle and clock specifier pairs corresponding to entries in the clock-names property. @@ -36,7 +37,7 @@ Optional properties: - phys: from the *Generic PHY* bindings - phy-names: from the *Generic PHY* bindings; supported names are "usb2-phy" or "usb3-phy". - - resets: a single pair of phandle and reset specifier + - resets: set of phandle and reset specifier pairs - snps,usb2-lpm-disable: indicate if we don't want to enable USB2 HW LPM - snps,usb3_lpm_capable: determines if platform is USB3 LPM capable - snps,dis-start-transfer-quirk: when set, disable isoc START TRANSFER command @@ -75,6 +76,8 @@ Optional properties: from P0 to P1/P2/P3 without delay. - snps,dis-tx-ipgap-linecheck-quirk: when set, disable u2mac linestate check during HS transmit. + - snps,parkmode-disable-ss-quirk: when set, all SuperSpeed bus instances in + park mode are disabled. - snps,dis_metastability_quirk: when set, disable metastability workaround. CAUTION: use only if you are absolutely sure of it. - snps,is-utmi-l1-suspend: true when DWC3 asserts output signal diff --git a/dts/Bindings/usb/exynos-usb.txt b/dts/Bindings/usb/exynos-usb.txt index 66c394f9e1..6aae1544f2 100644 --- a/dts/Bindings/usb/exynos-usb.txt +++ b/dts/Bindings/usb/exynos-usb.txt @@ -78,7 +78,14 @@ Required properties: - ranges: allows valid 1:1 translation between child's address space and parent's address space - clocks: Clock IDs array as required by the controller. - - clock-names: names of clocks correseponding to IDs in the clock property + - clock-names: Names of clocks corresponding to IDs in the clock property. + Following clock names shall be provided for different + compatibles: + - samsung,exynos5250-dwusb3: "usbdrd30", + - samsung,exynos5433-dwusb3: "aclk", "susp_clk", "pipe_pclk", + "phyclk", + - samsung,exynos7-dwusb3: "usbdrd30", "usbdrd30_susp_clk", + "usbdrd30_axius_clk" - vdd10-supply: 1.0V powr supply - vdd33-supply: 3.0V/3.3V power supply diff --git a/dts/Bindings/usb/fcs,fusb302.txt b/dts/Bindings/usb/fcs,fusb302.txt index ba2e32d500..60e4654297 100644 --- a/dts/Bindings/usb/fcs,fusb302.txt +++ b/dts/Bindings/usb/fcs,fusb302.txt @@ -9,7 +9,7 @@ Required sub-node: - connector : The "usb-c-connector" attached to the FUSB302 IC. The bindings of the connector node are specified in: - Documentation/devicetree/bindings/connector/usb-connector.txt + Documentation/devicetree/bindings/connector/usb-connector.yaml Example: diff --git a/dts/Bindings/usb/generic.txt b/dts/Bindings/usb/generic.txt index e6790d2a4d..ba472e7aef 100644 --- a/dts/Bindings/usb/generic.txt +++ b/dts/Bindings/usb/generic.txt @@ -34,7 +34,13 @@ Optional properties: - usb-role-switch: boolean, indicates that the device is capable of assigning the USB data role (USB host or USB device) for a given USB connector, such as Type-C, Type-B(micro). - see connector/usb-connector.txt. + see connector/usb-connector.yaml. + - role-switch-default-mode: indicating if usb-role-switch is enabled, the + device default operation mode of controller while usb + role is USB_ROLE_NONE. Valid arguments are "host" and + "peripheral". Defaults to "peripheral" if not + specified. + This is an attribute to a USB controller such as: diff --git a/dts/Bindings/usb/ingenic,jz4740-musb.txt b/dts/Bindings/usb/ingenic,jz4740-musb.txt deleted file mode 100644 index 16808721f3..0000000000 --- a/dts/Bindings/usb/ingenic,jz4740-musb.txt +++ /dev/null @@ -1,32 +0,0 @@ -Ingenic JZ4740 MUSB driver - -Required properties: - -- compatible: Must be "ingenic,jz4740-musb" -- reg: Address range of the UDC register set -- interrupts: IRQ number related to the UDC hardware -- interrupt-names: must be "mc" -- clocks: phandle to the "udc" clock -- clock-names: must be "udc" -- phys: phandle to the USB PHY - -Example: - -usb_phy: usb-phy@0 { - compatible = "usb-nop-xceiv"; - #phy-cells = <0>; -}; - -udc: usb@13040000 { - compatible = "ingenic,jz4740-musb"; - reg = <0x13040000 0x10000>; - - interrupt-parent = <&intc>; - interrupts = <24>; - interrupt-names = "mc"; - - clocks = <&cgu JZ4740_CLK_UDC>; - clock-names = "udc"; - - phys = <&usb_phy>; -}; diff --git a/dts/Bindings/usb/ingenic,jz4770-phy.yaml b/dts/Bindings/usb/ingenic,jz4770-phy.yaml new file mode 100644 index 0000000000..a81b0b1a22 --- /dev/null +++ b/dts/Bindings/usb/ingenic,jz4770-phy.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/ingenic,jz4770-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ingenic JZ4770 USB PHY devicetree bindings + +maintainers: + - Paul Cercueil <paul@crapouillou.net> + +properties: + $nodename: + pattern: '^usb-phy@.*' + + compatible: + enum: + - ingenic,jz4770-phy + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + vcc-supply: + description: VCC power supply + + '#phy-cells': + const: 0 + +required: + - compatible + - reg + - clocks + - vcc-supply + - '#phy-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/jz4770-cgu.h> + otg_phy: usb-phy@3c { + compatible = "ingenic,jz4770-phy"; + reg = <0x3c 0x10>; + + vcc-supply = <&vcc>; + clocks = <&cgu JZ4770_CLK_OTG_PHY>; + + #phy-cells = <0>; + }; diff --git a/dts/Bindings/usb/ingenic,musb.yaml b/dts/Bindings/usb/ingenic,musb.yaml new file mode 100644 index 0000000000..c2d2ee43ba --- /dev/null +++ b/dts/Bindings/usb/ingenic,musb.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/ingenic,musb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ingenic JZ47xx USB IP DT bindings + +maintainers: + - Paul Cercueil <paul@crapouillou.net> + +properties: + $nodename: + pattern: '^usb@.*' + + compatible: + oneOf: + - enum: + - ingenic,jz4770-musb + - ingenic,jz4740-musb + - items: + - const: ingenic,jz4725b-musb + - const: ingenic,jz4740-musb + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: udc + + interrupts: + maxItems: 1 + + interrupt-names: + items: + - const: mc + + phys: + description: PHY specifier for the USB PHY + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - interrupt-names + - phys + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/jz4740-cgu.h> + usb_phy: usb-phy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + }; + + udc: usb@13040000 { + compatible = "ingenic,jz4740-musb"; + reg = <0x13040000 0x10000>; + + interrupt-parent = <&intc>; + interrupts = <24>; + interrupt-names = "mc"; + + clocks = <&cgu JZ4740_CLK_UDC>; + clock-names = "udc"; + + phys = <&usb_phy>; + }; diff --git a/dts/Bindings/usb/maxim,max3420-udc.yaml b/dts/Bindings/usb/maxim,max3420-udc.yaml new file mode 100644 index 0000000000..4241d38d58 --- /dev/null +++ b/dts/Bindings/usb/maxim,max3420-udc.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/maxim,max3420-udc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MAXIM MAX3420/1 USB Peripheral Controller + +maintainers: + - Jassi Brar <jaswinder.singh@linaro.org> + +description: | + The controller provices USB2.0 compliant FullSpeed peripheral + implementation over the SPI interface. + + Specifications about the part can be found at: + http://datasheets.maximintegrated.com/en/ds/MAX3420E.pdf + +properties: + compatible: + enum: + - maxim,max3420-udc + - maxim,max3421-udc + + reg: + maxItems: 1 + + interrupts: + items: + - description: usb irq from max3420 + - description: vbus detection irq + minItems: 1 + maxItems: 2 + + interrupt-names: + items: + - const: udc + - const: vbus + minItems: 1 + maxItems: 2 + + spi-max-frequency: + maximum: 26000000 + +required: + - compatible + - reg + - interrupts + - interrupt-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + spi0 { + #address-cells = <1>; + #size-cells = <0>; + + udc@0 { + compatible = "maxim,max3420-udc"; + reg = <0>; + interrupt-parent = <&gpio>; + interrupts = <0 IRQ_TYPE_EDGE_FALLING>, <10 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "udc", "vbus"; + spi-max-frequency = <12500000>; + }; + }; diff --git a/dts/Bindings/usb/mediatek,mtu3.txt b/dts/Bindings/usb/mediatek,mtu3.txt index e0ae6096f7..a82ca438ae 100644 --- a/dts/Bindings/usb/mediatek,mtu3.txt +++ b/dts/Bindings/usb/mediatek,mtu3.txt @@ -34,7 +34,7 @@ Optional properties: dual-role mode. it's considered valid for compatibility reasons, not allowed for new bindings, and put into a usb-connector node. - see connector/usb-connector.txt. + see connector/usb-connector.yaml. - pinctrl-names : a pinctrl state named "default" is optional, and need be defined if auto drd switch is enabled, that means the property dr_mode is set as "otg", and meanwhile the property "mediatek,enable-manual-drd" diff --git a/dts/Bindings/usb/mediatek,musb.txt b/dts/Bindings/usb/mediatek,musb.txt index 2b8a87c90d..5eedb02965 100644 --- a/dts/Bindings/usb/mediatek,musb.txt +++ b/dts/Bindings/usb/mediatek,musb.txt @@ -23,7 +23,7 @@ Optional properties: MTCMOS Required child nodes: - usb connector node as defined in bindings/connector/usb-connector.txt + usb connector node as defined in bindings/connector/usb-connector.yaml Optional properties: - id-gpios : input GPIO for USB ID pin. - vbus-gpios : input GPIO for USB VBUS pin. diff --git a/dts/Bindings/usb/nvidia,tegra-xudc.yaml b/dts/Bindings/usb/nvidia,tegra-xudc.yaml new file mode 100644 index 0000000000..b84ed8ee8c --- /dev/null +++ b/dts/Bindings/usb/nvidia,tegra-xudc.yaml @@ -0,0 +1,190 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/usb/nvidia,tegra-xudc.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Device tree binding for NVIDIA Tegra XUSB device mode controller (XUDC) + +description: + The Tegra XUDC controller supports both USB 2.0 HighSpeed/FullSpeed and + USB 3.0 SuperSpeed protocols. + +maintainers: + - Nagarjuna Kristam <nkristam@nvidia.com> + - JC Kuo <jckuo@nvidia.com> + - Thierry Reding <treding@nvidia.com> + +properties: + compatible: + items: + - enum: + - nvidia,tegra210-xudc # For Tegra210 + - nvidia,tegra186-xudc # For Tegra186 + + reg: + minItems: 2 + maxItems: 3 + items: + - description: XUSB device controller registers + - description: XUSB device PCI Config registers + - description: XUSB device registers. + + reg-names: + minItems: 2 + maxItems: 3 + items: + - const: base + - const: fpci + - const: ipfs + + interrupts: + maxItems: 1 + description: Must contain the XUSB device interrupt. + + clocks: + minItems: 4 + maxItems: 5 + items: + - description: Clock to enable core XUSB dev clock. + - description: Clock to enable XUSB super speed clock. + - description: Clock to enable XUSB super speed dev clock. + - description: Clock to enable XUSB high speed dev clock. + - description: Clock to enable XUSB full speed dev clock. + + clock-names: + minItems: 4 + maxItems: 5 + items: + - const: dev + - const: ss + - const: ss_src + - const: fs_src + - const: hs_src + + power-domains: + maxItems: 2 + items: + - description: XUSBB(device) power-domain + - description: XUSBA(superspeed) power-domain + + power-domain-names: + maxItems: 2 + items: + - const: dev + - const: ss + + nvidia,xusb-padctl: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + phandle to the XUSB pad controller that is used to configure the USB pads + used by the XUDC controller. + + phys: + minItems: 1 + description: + Must contain an entry for each entry in phy-names. + See ../phy/phy-bindings.txt for details. + + phy-names: + minItems: 1 + items: + - const: usb2-0 + - const: usb2-1 + - const: usb2-2 + - const: usb2-3 + - const: usb3-0 + - const: usb3-1 + - const: usb3-2 + - const: usb3-3 + + avddio-usb-supply: + description: PCIe/USB3 analog logic power supply. Must supply 1.05 V. + + hvdd-usb-supply: + description: USB controller power supply. Must supply 3.3 V. + +required: + - compatible + - reg + - reg-names + - interrupts + - clocks + - clock-names + - power-domains + - power-domain-names + - nvidia,xusb-padctl + - phys + - phy-names + +allOf: + - if: + properties: + compatible: + contains: + enum: + - nvidia,tegra210-xudc + then: + properties: + reg: + minItems: 3 + reg-names: + minItems: 3 + clocks: + minItems: 5 + clock-names: + minItems: 5 + required: + - avddio-usb-supply + - hvdd-usb-supply + + - if: + properties: + compatible: + contains: + enum: + - nvidia,tegra186-xudc + then: + properties: + reg: + maxItems: 2 + reg-names: + maxItems: 2 + clocks: + maxItems: 4 + clock-names: + maxItems: 4 + +examples: + - | + #include <dt-bindings/clock/tegra210-car.h> + #include <dt-bindings/gpio/tegra-gpio.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + usb@700d0000 { + compatible = "nvidia,tegra210-xudc"; + reg = <0x0 0x700d0000 0x0 0x8000>, + <0x0 0x700d8000 0x0 0x1000>, + <0x0 0x700d9000 0x0 0x1000>; + reg-names = "base", "fpci", "ipfs"; + + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>, + <&tegra_car TEGRA210_CLK_XUSB_SS>, + <&tegra_car TEGRA210_CLK_XUSB_SSP_SRC>, + <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>, + <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>; + clock-names = "dev", "ss", "ss_src", "fs_src", "hs_src"; + + power-domains = <&pd_xusbdev>, <&pd_xusbss>; + power-domain-names = "dev", "ss"; + + nvidia,xusb-padctl = <&padctl>; + + phys = <µ_b>; + phy-names = "usb2-0"; + + avddio-usb-supply = <&vdd_pex_1v05>; + hvdd-usb-supply = <&vdd_3v3_sys>; + }; diff --git a/dts/Bindings/usb/qcom,dwc3.txt b/dts/Bindings/usb/qcom,dwc3.txt index cb695aa3fb..fbdd017567 100644 --- a/dts/Bindings/usb/qcom,dwc3.txt +++ b/dts/Bindings/usb/qcom,dwc3.txt @@ -52,8 +52,8 @@ A child node must exist to represent the core DWC3 IP block. The name of the node is not important. The content of the node is defined in dwc3.txt. Phy documentation is provided in the following places: -Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt - USB3 QMP PHY -Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt - USB2 QUSB2 PHY +Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt - USB3 QMP PHY +Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml - USB2 QUSB2 PHY Example device nodes: diff --git a/dts/Bindings/usb/renesas,usb3-peri.yaml b/dts/Bindings/usb/renesas,usb3-peri.yaml index 92d8631b9a..031452aa25 100644 --- a/dts/Bindings/usb/renesas,usb3-peri.yaml +++ b/dts/Bindings/usb/renesas,usb3-peri.yaml @@ -18,6 +18,7 @@ properties: - renesas,r8a774c0-usb3-peri # RZ/G2E - renesas,r8a7795-usb3-peri # R-Car H3 - renesas,r8a7796-usb3-peri # R-Car M3-W + - renesas,r8a77961-usb3-peri # R-Car M3-W+ - renesas,r8a77965-usb3-peri # R-Car M3-N - renesas,r8a77990-usb3-peri # R-Car E3 - const: renesas,rcar-gen3-usb3-peri diff --git a/dts/Bindings/usb/renesas,usbhs.yaml b/dts/Bindings/usb/renesas,usbhs.yaml index 469affa872..a7ae95598c 100644 --- a/dts/Bindings/usb/renesas,usbhs.yaml +++ b/dts/Bindings/usb/renesas,usbhs.yaml @@ -40,6 +40,7 @@ properties: - renesas,usbhs-r8a774c0 # RZ/G2E - renesas,usbhs-r8a7795 # R-Car H3 - renesas,usbhs-r8a7796 # R-Car M3-W + - renesas,usbhs-r8a77961 # R-Car M3-W+ - renesas,usbhs-r8a77965 # R-Car M3-N - renesas,usbhs-r8a77990 # R-Car E3 - renesas,usbhs-r8a77995 # R-Car D3 diff --git a/dts/Bindings/usb/richtek,rt1711h.txt b/dts/Bindings/usb/richtek,rt1711h.txt index e3fc57e605..6f8115db2e 100644 --- a/dts/Bindings/usb/richtek,rt1711h.txt +++ b/dts/Bindings/usb/richtek,rt1711h.txt @@ -9,7 +9,7 @@ Required properties: Required sub-node: - connector: The "usb-c-connector" attached to the tcpci chip, the bindings of connector node are specified in - Documentation/devicetree/bindings/connector/usb-connector.txt + Documentation/devicetree/bindings/connector/usb-connector.yaml Example : rt1711h@4e { diff --git a/dts/Bindings/usb/rockchip,dwc3.txt b/dts/Bindings/usb/rockchip,dwc3.txt index c8c4b00ecb..9452049323 100644 --- a/dts/Bindings/usb/rockchip,dwc3.txt +++ b/dts/Bindings/usb/rockchip,dwc3.txt @@ -16,7 +16,7 @@ A child node must exist to represent the core DWC3 IP block. The name of the node is not important. The content of the node is defined in dwc3.txt. Phy documentation is provided in the following places: -Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt - USB2.0 PHY +Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml - USB2.0 PHY Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt - Type-C PHY Example device nodes: diff --git a/dts/Bindings/usb/ti,hd3ss3220.txt b/dts/Bindings/usb/ti,hd3ss3220.txt index 25780e945b..2bd21b22ce 100644 --- a/dts/Bindings/usb/ti,hd3ss3220.txt +++ b/dts/Bindings/usb/ti,hd3ss3220.txt @@ -9,7 +9,7 @@ Required sub-node: - connector: The "usb-c-connector" attached to the hd3ss3220 chip. The bindings of the connector node are specified in: - Documentation/devicetree/bindings/connector/usb-connector.txt + Documentation/devicetree/bindings/connector/usb-connector.yaml Example: hd3ss3220@47 { diff --git a/dts/Bindings/usb/typec-tcpci.txt b/dts/Bindings/usb/typec-tcpci.txt index 0dd1469e73..2082522b1c 100644 --- a/dts/Bindings/usb/typec-tcpci.txt +++ b/dts/Bindings/usb/typec-tcpci.txt @@ -13,7 +13,7 @@ Required properties: Required sub-node: - connector: The "usb-c-connector" attached to the tcpci chip, the bindings of connector node are specified in - Documentation/devicetree/bindings/connector/usb-connector.txt + Documentation/devicetree/bindings/connector/usb-connector.yaml Example: diff --git a/dts/Bindings/usb/usb-conn-gpio.txt b/dts/Bindings/usb/usb-conn-gpio.txt index 3d05ae56cb..ec80641208 100644 --- a/dts/Bindings/usb/usb-conn-gpio.txt +++ b/dts/Bindings/usb/usb-conn-gpio.txt @@ -8,11 +8,11 @@ Required properties: - compatible : should include "gpio-usb-b-connector" and "usb-b-connector". - id-gpios, vbus-gpios : input gpios, either one of them must be present, and both can be present as well. - see connector/usb-connector.txt + see connector/usb-connector.yaml Optional properties: - vbus-supply : can be present if needed when supports dual role mode. - see connector/usb-connector.txt + see connector/usb-connector.yaml - Sub-nodes: - port : can be present. diff --git a/dts/Bindings/usb/usb-xhci.txt b/dts/Bindings/usb/usb-xhci.txt index 3f378951d6..dc025f126d 100644 --- a/dts/Bindings/usb/usb-xhci.txt +++ b/dts/Bindings/usb/usb-xhci.txt @@ -16,7 +16,8 @@ Required properties: - "renesas,xhci-r8a7791" for r8a7791 SoC - "renesas,xhci-r8a7793" for r8a7793 SoC - "renesas,xhci-r8a7795" for r8a7795 SoC - - "renesas,xhci-r8a7796" for r8a7796 SoC + - "renesas,xhci-r8a7796" for r8a77960 SoC + - "renesas,xhci-r8a77961" for r8a77961 SoC - "renesas,xhci-r8a77965" for r8a77965 SoC - "renesas,xhci-r8a77990" for r8a77990 SoC - "renesas,rcar-gen2-xhci" for a generic R-Car Gen2 or RZ/G1 compatible |