diff options
Diffstat (limited to 'dts/include/dt-bindings/reset')
7 files changed, 138 insertions, 117 deletions
diff --git a/dts/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h b/dts/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h new file mode 100644 index 0000000000..14b78dabed --- /dev/null +++ b/dts/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2019 BayLibre, SAS. + * Author: Jerome Brunet <jbrunet@baylibre.com> + * + */ + +#ifndef _DT_BINDINGS_AMLOGIC_MESON_G12A_AUDIO_RESET_H +#define _DT_BINDINGS_AMLOGIC_MESON_G12A_AUDIO_RESET_H + +#define AUD_RESET_PDM 0 +#define AUD_RESET_TDMIN_A 1 +#define AUD_RESET_TDMIN_B 2 +#define AUD_RESET_TDMIN_C 3 +#define AUD_RESET_TDMIN_LB 4 +#define AUD_RESET_LOOPBACK 5 +#define AUD_RESET_TODDR_A 6 +#define AUD_RESET_TODDR_B 7 +#define AUD_RESET_TODDR_C 8 +#define AUD_RESET_FRDDR_A 9 +#define AUD_RESET_FRDDR_B 10 +#define AUD_RESET_FRDDR_C 11 +#define AUD_RESET_TDMOUT_A 12 +#define AUD_RESET_TDMOUT_B 13 +#define AUD_RESET_TDMOUT_C 14 +#define AUD_RESET_SPDIFOUT 15 +#define AUD_RESET_SPDIFOUT_B 16 +#define AUD_RESET_SPDIFIN 17 +#define AUD_RESET_EQDRC 18 +#define AUD_RESET_RESAMPLE 19 +#define AUD_RESET_DDRARB 20 +#define AUD_RESET_POWDET 21 +#define AUD_RESET_TORAM 22 +#define AUD_RESET_TOACODEC 23 +#define AUD_RESET_TOHDMITX 24 +#define AUD_RESET_CLKTREE 25 + +#endif diff --git a/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h b/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h index 524d6077ac..ea50586188 100644 --- a/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h +++ b/dts/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h @@ -1,56 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ /* - * This file is provided under a dual BSD/GPLv2 license. When using or - * redistributing this file, you may do so under either license. - * - * GPL LICENSE SUMMARY - * * Copyright (c) 2016 BayLibre, SAS. * Author: Neil Armstrong <narmstrong@baylibre.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see <http://www.gnu.org/licenses/>. - * The full GNU General Public License is included in this distribution - * in the file called COPYING. - * - * BSD LICENSE - * - * Copyright (c) 2016 BayLibre, SAS. - * Author: Neil Armstrong <narmstrong@baylibre.com> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H #define _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H diff --git a/dts/include/dt-bindings/reset/amlogic,meson8b-reset.h b/dts/include/dt-bindings/reset/amlogic,meson8b-reset.h index 614aff2c7a..c614438bcb 100644 --- a/dts/include/dt-bindings/reset/amlogic,meson8b-reset.h +++ b/dts/include/dt-bindings/reset/amlogic,meson8b-reset.h @@ -1,56 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ /* - * This file is provided under a dual BSD/GPLv2 license. When using or - * redistributing this file, you may do so under either license. - * - * GPL LICENSE SUMMARY - * * Copyright (c) 2016 BayLibre, SAS. * Author: Neil Armstrong <narmstrong@baylibre.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see <http://www.gnu.org/licenses/>. - * The full GNU General Public License is included in this distribution - * in the file called COPYING. - * - * BSD LICENSE - * - * Copyright (c) 2016 BayLibre, SAS. - * Author: Neil Armstrong <narmstrong@baylibre.com> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef _DT_BINDINGS_AMLOGIC_MESON8B_RESET_H #define _DT_BINDINGS_AMLOGIC_MESON8B_RESET_H diff --git a/dts/include/dt-bindings/reset/hisi,hi6220-resets.h b/dts/include/dt-bindings/reset/hisi,hi6220-resets.h index e7c362a81a..63aff7d8aa 100644 --- a/dts/include/dt-bindings/reset/hisi,hi6220-resets.h +++ b/dts/include/dt-bindings/reset/hisi,hi6220-resets.h @@ -73,4 +73,11 @@ #define MEDIA_MMU 6 #define MEDIA_XG2RAM1 7 +#define AO_G3D 1 +#define AO_CODECISP 2 +#define AO_MCPU 4 +#define AO_BBPHARQMEM 5 +#define AO_HIFI 8 +#define AO_ACPUSCUL2C 12 + #endif /*_DT_BINDINGS_RESET_CONTROLLER_HI6220*/ diff --git a/dts/include/dt-bindings/reset/imx8mq-reset.h b/dts/include/dt-bindings/reset/imx8mq-reset.h index 57c592498a..9a301082d3 100644 --- a/dts/include/dt-bindings/reset/imx8mq-reset.h +++ b/dts/include/dt-bindings/reset/imx8mq-reset.h @@ -31,33 +31,33 @@ #define IMX8MQ_RESET_OTG2_PHY_RESET 20 #define IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N 21 #define IMX8MQ_RESET_MIPI_DSI_RESET_N 22 -#define IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N 23 -#define IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N 24 -#define IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N 25 +#define IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N 23 +#define IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N 24 +#define IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N 25 #define IMX8MQ_RESET_PCIEPHY 26 #define IMX8MQ_RESET_PCIEPHY_PERST 27 #define IMX8MQ_RESET_PCIE_CTRL_APPS_EN 28 #define IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF 29 -#define IMX8MQ_RESET_HDMI_PHY_APB_RESET 30 +#define IMX8MQ_RESET_HDMI_PHY_APB_RESET 30 /* i.MX8MM does NOT support */ #define IMX8MQ_RESET_DISP_RESET 31 #define IMX8MQ_RESET_GPU_RESET 32 #define IMX8MQ_RESET_VPU_RESET 33 -#define IMX8MQ_RESET_PCIEPHY2 34 -#define IMX8MQ_RESET_PCIEPHY2_PERST 35 -#define IMX8MQ_RESET_PCIE2_CTRL_APPS_EN 36 -#define IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF 37 -#define IMX8MQ_RESET_MIPI_CSI1_CORE_RESET 38 -#define IMX8MQ_RESET_MIPI_CSI1_PHY_REF_RESET 39 -#define IMX8MQ_RESET_MIPI_CSI1_ESC_RESET 40 -#define IMX8MQ_RESET_MIPI_CSI2_CORE_RESET 41 -#define IMX8MQ_RESET_MIPI_CSI2_PHY_REF_RESET 42 -#define IMX8MQ_RESET_MIPI_CSI2_ESC_RESET 43 +#define IMX8MQ_RESET_PCIEPHY2 34 /* i.MX8MM does NOT support */ +#define IMX8MQ_RESET_PCIEPHY2_PERST 35 /* i.MX8MM does NOT support */ +#define IMX8MQ_RESET_PCIE2_CTRL_APPS_EN 36 /* i.MX8MM does NOT support */ +#define IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF 37 /* i.MX8MM does NOT support */ +#define IMX8MQ_RESET_MIPI_CSI1_CORE_RESET 38 /* i.MX8MM does NOT support */ +#define IMX8MQ_RESET_MIPI_CSI1_PHY_REF_RESET 39 /* i.MX8MM does NOT support */ +#define IMX8MQ_RESET_MIPI_CSI1_ESC_RESET 40 /* i.MX8MM does NOT support */ +#define IMX8MQ_RESET_MIPI_CSI2_CORE_RESET 41 /* i.MX8MM does NOT support */ +#define IMX8MQ_RESET_MIPI_CSI2_PHY_REF_RESET 42 /* i.MX8MM does NOT support */ +#define IMX8MQ_RESET_MIPI_CSI2_ESC_RESET 43 /* i.MX8MM does NOT support */ #define IMX8MQ_RESET_DDRC1_PRST 44 #define IMX8MQ_RESET_DDRC1_CORE_RESET 45 #define IMX8MQ_RESET_DDRC1_PHY_RESET 46 -#define IMX8MQ_RESET_DDRC2_PRST 47 -#define IMX8MQ_RESET_DDRC2_CORE_RESET 48 -#define IMX8MQ_RESET_DDRC2_PHY_RESET 49 +#define IMX8MQ_RESET_DDRC2_PRST 47 /* i.MX8MM does NOT support */ +#define IMX8MQ_RESET_DDRC2_CORE_RESET 48 /* i.MX8MM does NOT support */ +#define IMX8MQ_RESET_DDRC2_PHY_RESET 49 /* i.MX8MM does NOT support */ #define IMX8MQ_RESET_NUM 50 diff --git a/dts/include/dt-bindings/reset/mt7629-resets.h b/dts/include/dt-bindings/reset/mt7629-resets.h new file mode 100644 index 0000000000..6bb85734f6 --- /dev/null +++ b/dts/include/dt-bindings/reset/mt7629-resets.h @@ -0,0 +1,71 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2019 MediaTek Inc. + */ + +#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT7629 +#define _DT_BINDINGS_RESET_CONTROLLER_MT7629 + +/* INFRACFG resets */ +#define MT7629_INFRA_EMI_MPU_RST 0 +#define MT7629_INFRA_UART5_RST 2 +#define MT7629_INFRA_CIRQ_EINT_RST 3 +#define MT7629_INFRA_APXGPT_RST 4 +#define MT7629_INFRA_SCPSYS_RST 5 +#define MT7629_INFRA_KP_RST 6 +#define MT7629_INFRA_SPI1_RST 7 +#define MT7629_INFRA_SPI4_RST 8 +#define MT7629_INFRA_SYSTIMER_RST 9 +#define MT7629_INFRA_IRRX_RST 10 +#define MT7629_INFRA_AO_BUS_RST 16 +#define MT7629_INFRA_EMI_RST 32 +#define MT7629_INFRA_APMIXED_RST 35 +#define MT7629_INFRA_MIPI_RST 36 +#define MT7629_INFRA_TRNG_RST 37 +#define MT7629_INFRA_SYSCIRQ_RST 38 +#define MT7629_INFRA_MIPI_CSI_RST 39 +#define MT7629_INFRA_GCE_FAXI_RST 40 +#define MT7629_INFRA_I2C_SRAM_RST 41 +#define MT7629_INFRA_IOMMU_RST 47 + +/* PERICFG resets */ +#define MT7629_PERI_UART0_SW_RST 0 +#define MT7629_PERI_UART1_SW_RST 1 +#define MT7629_PERI_UART2_SW_RST 2 +#define MT7629_PERI_BTIF_SW_RST 6 +#define MT7629_PERI_PWN_SW_RST 8 +#define MT7629_PERI_DMA_SW_RST 11 +#define MT7629_PERI_NFI_SW_RST 14 +#define MT7629_PERI_I2C0_SW_RST 22 +#define MT7629_PERI_SPI0_SW_RST 33 +#define MT7629_PERI_SPI1_SW_RST 34 +#define MT7629_PERI_FLASHIF_SW_RST 36 + +/* PCIe Subsystem resets */ +#define MT7629_PCIE1_CORE_RST 19 +#define MT7629_PCIE1_MMIO_RST 20 +#define MT7629_PCIE1_HRST 21 +#define MT7629_PCIE1_USER_RST 22 +#define MT7629_PCIE1_PIPE_RST 23 +#define MT7629_PCIE0_CORE_RST 27 +#define MT7629_PCIE0_MMIO_RST 28 +#define MT7629_PCIE0_HRST 29 +#define MT7629_PCIE0_USER_RST 30 +#define MT7629_PCIE0_PIPE_RST 31 + +/* SSUSB Subsystem resets */ +#define MT7629_SSUSB_PHY_PWR_RST 3 +#define MT7629_SSUSB_MAC_PWR_RST 4 + +/* ETH Subsystem resets */ +#define MT7629_ETHSYS_SYS_RST 0 +#define MT7629_ETHSYS_MCM_RST 2 +#define MT7629_ETHSYS_HSDMA_RST 5 +#define MT7629_ETHSYS_FE_RST 6 +#define MT7629_ETHSYS_ESW_RST 16 +#define MT7629_ETHSYS_GMAC_RST 23 +#define MT7629_ETHSYS_EPHY_RST 24 +#define MT7629_ETHSYS_CRYPTO_RST 29 +#define MT7629_ETHSYS_PPE_RST 31 + +#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT7629 */ diff --git a/dts/include/dt-bindings/reset/sun8i-v3s-ccu.h b/dts/include/dt-bindings/reset/sun8i-v3s-ccu.h index b58ef21a2e..b6790173af 100644 --- a/dts/include/dt-bindings/reset/sun8i-v3s-ccu.h +++ b/dts/include/dt-bindings/reset/sun8i-v3s-ccu.h @@ -75,4 +75,7 @@ #define RST_BUS_UART1 50 #define RST_BUS_UART2 51 +/* Reset lines not available on V3s */ +#define RST_BUS_I2S0 52 + #endif /* _DT_BINDINGS_RST_SUN8I_H3_H_ */ |