1 files changed, 0 insertions, 141 deletions
diff --git a/dts/src/arm/mt6589.dtsi b/dts/src/arm/mt6589.dtsi
deleted file mode 100644
index 70df00a7bb..0000000000
--- a/dts/src/arm/mt6589.dtsi
+++ /dev/null
@@ -1,141 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (c) 2014 MundoReader S.L.
- * Author: Matthias Brugger <matthias.bgg@gmail.com>
- *
-*/
-
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-
-/ {
-	#address-cells = <1>;
-	#size-cells = <1>;
-	compatible = "mediatek,mt6589";
-	interrupt-parent = <&sysirq>;
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		enable-method = "mediatek,mt6589-smp";
-
-		cpu@0 {
-			device_type = "cpu";
-			compatible = "arm,cortex-a7";
-			reg = <0x0>;
-		};
-		cpu@1 {
-			device_type = "cpu";
-			compatible = "arm,cortex-a7";
-			reg = <0x1>;
-		};
-		cpu@2 {
-			device_type = "cpu";
-			compatible = "arm,cortex-a7";
-			reg = <0x2>;
-		};
-		cpu@3 {
-			device_type = "cpu";
-			compatible = "arm,cortex-a7";
-			reg = <0x3>;
-		};
-
-	};
-
-	clocks {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "simple-bus";
-		ranges;
-
-		system_clk: dummy13m {
-			compatible = "fixed-clock";
-			clock-frequency = <13000000>;
-			#clock-cells = <0>;
-		};
-
-		rtc_clk: dummy32k {
-			compatible = "fixed-clock";
-			clock-frequency = <32000>;
-			#clock-cells = <0>;
-		};
-
-		uart_clk: dummy26m {
-			compatible = "fixed-clock";
-			clock-frequency = <26000000>;
-			#clock-cells = <0>;
-		};
-	};
-
-	soc {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "simple-bus";
-		ranges;
-
-		timer: timer@10008000 {
-			compatible = "mediatek,mt6577-timer";
-			reg = <0x10008000 0x80>;
-			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>;
-			clocks = <&system_clk>, <&rtc_clk>;
-			clock-names = "system-clk", "rtc-clk";
-		};
-
-		sysirq: interrupt-controller@10200100 {
-			compatible = "mediatek,mt6589-sysirq",
-				     "mediatek,mt6577-sysirq";
-			interrupt-controller;
-			#interrupt-cells = <3>;
-			interrupt-parent = <&gic>;
-			reg = <0x10200100 0x1c>;
-		};
-
-		gic: interrupt-controller@10211000 {
-			compatible = "arm,cortex-a7-gic";
-			interrupt-controller;
-			#interrupt-cells = <3>;
-			interrupt-parent = <&gic>;
-			reg = <0x10211000 0x1000>,
-			      <0x10212000 0x2000>,
-			      <0x10214000 0x2000>,
-			      <0x10216000 0x2000>;
-		};
-
-		uart0: serial@11006000 {
-			compatible = "mediatek,mt6577-uart";
-			reg = <0x11006000 0x400>;
-			interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
-			clocks = <&uart_clk>;
-			status = "disabled";
-		};
-
-		uart1: serial@11007000 {
-			compatible = "mediatek,mt6577-uart";
-			reg = <0x11007000 0x400>;
-			interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
-			clocks = <&uart_clk>;
-			status = "disabled";
-		};
-
-		uart2: serial@11008000 {
-			compatible = "mediatek,mt6577-uart";
-			reg = <0x11008000 0x400>;
-			interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
-			clocks = <&uart_clk>;
-			status = "disabled";
-		};
-
-		uart3: serial@11009000 {
-			compatible = "mediatek,mt6577-uart";
-			reg = <0x11009000 0x400>;
-			interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
-			clocks = <&uart_clk>;
-			status = "disabled";
-		};
-
-		wdt: watchdog@10000000 {
-			compatible = "mediatek,mt6589-wdt";
-			reg = <0x10000000 0x44>;
-		};
-	};
-};