diff options
Diffstat (limited to 'dts/src/arm64/broadcom/bcmbca/bcm63158.dtsi')
-rw-r--r-- | dts/src/arm64/broadcom/bcmbca/bcm63158.dtsi | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/dts/src/arm64/broadcom/bcmbca/bcm63158.dtsi b/dts/src/arm64/broadcom/bcmbca/bcm63158.dtsi index 13629702f7..48d618e758 100644 --- a/dts/src/arm64/broadcom/bcmbca/bcm63158.dtsi +++ b/dts/src/arm64/broadcom/bcmbca/bcm63158.dtsi @@ -51,6 +51,8 @@ L2_0: l2-cache0 { compatible = "cache"; + cache-level = <2>; + cache-unified; }; }; @@ -78,6 +80,7 @@ #clock-cells = <0>; clock-frequency = <200000000>; }; + uart_clk: uart-clk { compatible = "fixed-factor-clock"; #clock-cells = <0>; @@ -85,6 +88,12 @@ clock-div = <4>; clock-mult = <1>; }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <400000000>; + }; }; psci { @@ -116,6 +125,32 @@ #size-cells = <1>; ranges = <0x0 0x0 0xff800000 0x800000>; + hsspi: spi@1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,bcm63158-hsspi", "brcm,bcmbca-hsspi-v1.0"; + reg = <0x1000 0x600>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&hsspi_pll &hsspi_pll>; + clock-names = "hsspi", "pll"; + num-cs = <8>; + status = "disabled"; + }; + + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; |