diff options
Diffstat (limited to 'dts/src/arm64/broadcom')
38 files changed, 1424 insertions, 85 deletions
diff --git a/dts/src/arm64/broadcom/bcm2711-rpi-4-b.dts b/dts/src/arm64/broadcom/bcm2711-rpi-4-b.dts index d24c53682e..c7280bdefa 100644 --- a/dts/src/arm64/broadcom/bcm2711-rpi-4-b.dts +++ b/dts/src/arm64/broadcom/bcm2711-rpi-4-b.dts @@ -1,2 +1,2 @@ // SPDX-License-Identifier: GPL-2.0 -#include "arm/bcm2711-rpi-4-b.dts" +#include "arm/broadcom/bcm2711-rpi-4-b.dts" diff --git a/dts/src/arm64/broadcom/bcm2711-rpi-400.dts b/dts/src/arm64/broadcom/bcm2711-rpi-400.dts index b9000f58be..d9d2852b79 100644 --- a/dts/src/arm64/broadcom/bcm2711-rpi-400.dts +++ b/dts/src/arm64/broadcom/bcm2711-rpi-400.dts @@ -1,2 +1,2 @@ // SPDX-License-Identifier: GPL-2.0 -#include "arm/bcm2711-rpi-400.dts" +#include "arm/broadcom/bcm2711-rpi-400.dts" diff --git a/dts/src/arm64/broadcom/bcm2711-rpi-cm4-io.dts b/dts/src/arm64/broadcom/bcm2711-rpi-cm4-io.dts index e36d395e39..8810322aa6 100644 --- a/dts/src/arm64/broadcom/bcm2711-rpi-cm4-io.dts +++ b/dts/src/arm64/broadcom/bcm2711-rpi-cm4-io.dts @@ -1,2 +1,2 @@ // SPDX-License-Identifier: GPL-2.0 -#include "arm/bcm2711-rpi-cm4-io.dts" +#include "arm/broadcom/bcm2711-rpi-cm4-io.dts" diff --git a/dts/src/arm64/broadcom/bcm2837-rpi-3-a-plus.dts b/dts/src/arm64/broadcom/bcm2837-rpi-3-a-plus.dts index f0ec56a1c4..17d778a7e0 100644 --- a/dts/src/arm64/broadcom/bcm2837-rpi-3-a-plus.dts +++ b/dts/src/arm64/broadcom/bcm2837-rpi-3-a-plus.dts @@ -1,2 +1,2 @@ // SPDX-License-Identifier: GPL-2.0 -#include "arm/bcm2837-rpi-3-a-plus.dts" +#include "arm/broadcom/bcm2837-rpi-3-a-plus.dts" diff --git a/dts/src/arm64/broadcom/bcm2837-rpi-3-b-plus.dts b/dts/src/arm64/broadcom/bcm2837-rpi-3-b-plus.dts index 46ad2023cc..0cf6240b6b 100644 --- a/dts/src/arm64/broadcom/bcm2837-rpi-3-b-plus.dts +++ b/dts/src/arm64/broadcom/bcm2837-rpi-3-b-plus.dts @@ -1,2 +1,2 @@ // SPDX-License-Identifier: GPL-2.0 -#include "arm/bcm2837-rpi-3-b-plus.dts" +#include "arm/broadcom/bcm2837-rpi-3-b-plus.dts" diff --git a/dts/src/arm64/broadcom/bcm2837-rpi-3-b.dts b/dts/src/arm64/broadcom/bcm2837-rpi-3-b.dts index 89b78d6c19..f429468fd8 100644 --- a/dts/src/arm64/broadcom/bcm2837-rpi-3-b.dts +++ b/dts/src/arm64/broadcom/bcm2837-rpi-3-b.dts @@ -1,2 +1,2 @@ // SPDX-License-Identifier: GPL-2.0 -#include "arm/bcm2837-rpi-3-b.dts" +#include "arm/broadcom/bcm2837-rpi-3-b.dts" diff --git a/dts/src/arm64/broadcom/bcm2837-rpi-cm3-io3.dts b/dts/src/arm64/broadcom/bcm2837-rpi-cm3-io3.dts index b1c4ab212c..3fa21bd16b 100644 --- a/dts/src/arm64/broadcom/bcm2837-rpi-cm3-io3.dts +++ b/dts/src/arm64/broadcom/bcm2837-rpi-cm3-io3.dts @@ -1,2 +1,2 @@ // SPDX-License-Identifier: GPL-2.0 -#include "arm/bcm2837-rpi-cm3-io3.dts" +#include "arm/broadcom/bcm2837-rpi-cm3-io3.dts" diff --git a/dts/src/arm64/broadcom/bcm2837-rpi-zero-2-w.dts b/dts/src/arm64/broadcom/bcm2837-rpi-zero-2-w.dts index 307ae693e4..363381a0cf 100644 --- a/dts/src/arm64/broadcom/bcm2837-rpi-zero-2-w.dts +++ b/dts/src/arm64/broadcom/bcm2837-rpi-zero-2-w.dts @@ -1,2 +1,2 @@ // SPDX-License-Identifier: GPL-2.0 -#include "arm/bcm2837-rpi-zero-2-w.dts" +#include "arm/broadcom/bcm2837-rpi-zero-2-w.dts" diff --git a/dts/src/arm64/broadcom/bcm4908/bcm4906.dtsi b/dts/src/arm64/broadcom/bcm4908/bcm4906.dtsi deleted file mode 100644 index 66023d5535..0000000000 --- a/dts/src/arm64/broadcom/bcm4908/bcm4906.dtsi +++ /dev/null @@ -1,18 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT - -#include "bcm4908.dtsi" - -/ { - cpus { - /delete-node/ cpu@2; - - /delete-node/ cpu@3; - }; - - pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&cpu0>, <&cpu1>; - }; -}; diff --git a/dts/src/arm64/broadcom/bcm4908/bcm4906-netgear-r8000p.dts b/dts/src/arm64/broadcom/bcmbca/bcm4906-netgear-r8000p.dts index 2dd028438c..78204d71ec 100644 --- a/dts/src/arm64/broadcom/bcm4908/bcm4906-netgear-r8000p.dts +++ b/dts/src/arm64/broadcom/bcmbca/bcm4906-netgear-r8000p.dts @@ -7,7 +7,7 @@ #include "bcm4906.dtsi" / { - compatible = "netgear,r8000p", "brcm,bcm4906", "brcm,bcm4908"; + compatible = "netgear,r8000p", "brcm,bcm4906", "brcm,bcm4908", "brcm,bcmbca"; model = "Netgear R8000P"; memory@0 { @@ -58,12 +58,16 @@ function = "usb2"; color = <LED_COLOR_ID_WHITE>; gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; + trigger-sources = <&ohci_port1>, <&ehci_port1>; + linux,default-trigger = "usbport"; }; led-usb3 { function = "usb3"; color = <LED_COLOR_ID_WHITE>; gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; + trigger-sources = <&ohci_port2>, <&ehci_port2>, <&xhci_port2>; + linux,default-trigger = "usbport"; }; led-wifi { diff --git a/dts/src/arm64/broadcom/bcm4908/bcm4906-tplink-archer-c2300-v1.dts b/dts/src/arm64/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts index b63eefab48..fcf092c81b 100644 --- a/dts/src/arm64/broadcom/bcm4908/bcm4906-tplink-archer-c2300-v1.dts +++ b/dts/src/arm64/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts @@ -7,7 +7,7 @@ #include "bcm4906.dtsi" / { - compatible = "tplink,archer-c2300-v1", "brcm,bcm4906", "brcm,bcm4908"; + compatible = "tplink,archer-c2300-v1", "brcm,bcm4906", "brcm,bcm4908", "brcm,bcmbca"; model = "TP-Link Archer C2300 V1"; memory@0 { @@ -64,12 +64,16 @@ function = "usb2"; color = <LED_COLOR_ID_BLUE>; gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; + trigger-sources = <&ohci_port1>, <&ehci_port1>; + linux,default-trigger = "usbport"; }; led-usb3 { - function = "usbd3"; + function = "usb3"; color = <LED_COLOR_ID_BLUE>; gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; + trigger-sources = <&ohci_port2>, <&ehci_port2>, <&xhci_port2>; + linux,default-trigger = "usbport"; }; led-brightness { @@ -83,25 +87,25 @@ compatible = "gpio-keys-polled"; poll-interval = <100>; - brightness { + key-brightness { label = "LEDs"; linux,code = <KEY_BRIGHTNESS_ZERO>; gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; }; - wps { + key-wps { label = "WPS"; linux,code = <KEY_WPS_BUTTON>; gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; }; - wifi { + key-wifi { label = "WiFi"; linux,code = <KEY_RFKILL>; gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; }; - restart { + key-restart { label = "Reset"; linux,code = <KEY_RESTART>; gpios = <&gpio0 23 GPIO_ACTIVE_LOW>; diff --git a/dts/src/arm64/broadcom/bcmbca/bcm4906.dtsi b/dts/src/arm64/broadcom/bcmbca/bcm4906.dtsi new file mode 100644 index 0000000000..d084c33d5c --- /dev/null +++ b/dts/src/arm64/broadcom/bcmbca/bcm4906.dtsi @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "bcm4908.dtsi" + +/ { + cpus { + /delete-node/ cpu@2; + + /delete-node/ cpu@3; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + }; + + pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&cpu0>, <&cpu1>; + }; +}; diff --git a/dts/src/arm64/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts b/dts/src/arm64/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts index 169fbb7cfd..d94a53d683 100644 --- a/dts/src/arm64/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts +++ b/dts/src/arm64/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts @@ -2,11 +2,12 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> +#include <dt-bindings/leds/common.h> #include "bcm4908.dtsi" / { - compatible = "asus,gt-ac5300", "brcm,bcm4908"; + compatible = "asus,gt-ac5300", "brcm,bcm4908", "brcm,bcmbca"; model = "Asus GT-AC5300"; memory@0 { @@ -18,25 +19,25 @@ compatible = "gpio-keys-polled"; poll-interval = <100>; - wifi { + key-wifi { label = "WiFi"; linux,code = <KEY_RFKILL>; gpios = <&gpio0 28 GPIO_ACTIVE_LOW>; }; - wps { + key-wps { label = "WPS"; linux,code = <KEY_WPS_BUTTON>; gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; }; - restart { + key-restart { label = "Reset"; linux,code = <KEY_RESTART>; gpios = <&gpio0 30 GPIO_ACTIVE_LOW>; }; - brightness { + key-brightness { label = "LEDs"; linux,code = <KEY_BRIGHTNESS_ZERO>; gpios = <&gpio0 31 GPIO_ACTIVE_LOW>; @@ -118,6 +119,53 @@ }; }; +&leds { + led@11 { + reg = <0x11>; + function = LED_FUNCTION_POWER; + color = <LED_COLOR_ID_WHITE>; + default-state = "on"; + active-low; + pinctrl-names = "default"; + pinctrl-0 = <&pins_led_17_a>; + }; + + led@12 { + reg = <0x12>; + function = LED_FUNCTION_WAN; + color = <LED_COLOR_ID_RED>; + active-low; + pinctrl-names = "default"; + pinctrl-0 = <&pins_led_18_a>; + }; + + led@14 { + reg = <0x14>; + function = LED_FUNCTION_WPS; + color = <LED_COLOR_ID_WHITE>; + active-low; + pinctrl-names = "default"; + pinctrl-0 = <&pins_led_20_a>; + }; + + led@15 { + reg = <0x15>; + function = LED_FUNCTION_WAN; + color = <LED_COLOR_ID_WHITE>; + active-low; + pinctrl-names = "default"; + pinctrl-0 = <&pins_led_21_a>; + }; + + led@19 { + reg = <0x19>; + function = LED_FUNCTION_LAN; + color = <LED_COLOR_ID_WHITE>; + pinctrl-names = "default"; + pinctrl-0 = <&pins_led_25_a>; + }; +}; + &nandcs { nand-ecc-strength = <4>; nand-ecc-step-size = <512>; diff --git a/dts/src/arm64/broadcom/bcm4908/bcm4908-netgear-raxe500.dts b/dts/src/arm64/broadcom/bcmbca/bcm4908-netgear-raxe500.dts index 3c2cf2d238..23b96c6632 100644 --- a/dts/src/arm64/broadcom/bcm4908/bcm4908-netgear-raxe500.dts +++ b/dts/src/arm64/broadcom/bcmbca/bcm4908-netgear-raxe500.dts @@ -3,7 +3,7 @@ #include "bcm4908.dtsi" / { - compatible = "netgear,raxe500", "brcm,bcm4908"; + compatible = "netgear,raxe500", "brcm,bcm4908", "brcm,bcmbca"; model = "Netgear RAXE500"; memory@0 { diff --git a/dts/src/arm64/broadcom/bcm4908/bcm4908.dtsi b/dts/src/arm64/broadcom/bcmbca/bcm4908.dtsi index a4be040a00..2f124b027b 100644 --- a/dts/src/arm64/broadcom/bcm4908/bcm4908.dtsi +++ b/dts/src/arm64/broadcom/bcmbca/bcm4908.dtsi @@ -29,6 +29,8 @@ device_type = "cpu"; compatible = "brcm,brahma-b53"; reg = <0x0>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0xfff8>; next-level-cache = <&l2>; }; @@ -61,6 +63,8 @@ l2: l2-cache0 { compatible = "cache"; + cache-level = <2>; + cache-unified; }; }; @@ -104,6 +108,12 @@ clock-frequency = <50000000>; clock-output-names = "periph"; }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <400000000>; + }; }; soc { @@ -139,6 +149,19 @@ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; phys = <&usb_phy PHY_TYPE_USB2>; status = "disabled"; + + #address-cells = <1>; + #size-cells = <0>; + + ehci_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + + ehci_port2: port@2 { + reg = <2>; + #trigger-source-cells = <0>; + }; }; ohci: usb@c400 { @@ -147,6 +170,19 @@ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; phys = <&usb_phy PHY_TYPE_USB2>; status = "disabled"; + + #address-cells = <1>; + #size-cells = <0>; + + ohci_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + + ohci_port2: port@2 { + reg = <2>; + #trigger-source-cells = <0>; + }; }; xhci: usb@d000 { @@ -155,6 +191,19 @@ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; phys = <&usb_phy PHY_TYPE_USB3>; status = "disabled"; + + #address-cells = <1>; + #size-cells = <0>; + + xhci_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + + xhci_port2: port@2 { + reg = <2>; + #trigger-source-cells = <0>; + }; }; bus@80000 { @@ -251,7 +300,7 @@ }; }; - procmon: syscon@280000 { + procmon: bus@280000 { compatible = "simple-bus"; reg = <0x280000 0x1000>; ranges; @@ -281,6 +330,11 @@ #address-cells = <1>; #size-cells = <1>; + timer@0 { + compatible = "brcm,bcm63138-timer"; + reg = <0x0 0x28>; + }; + watchdog@28 { compatible = "brcm,bcm6345-wdt"; reg = <0x28 0x8>; @@ -350,6 +404,61 @@ groups = "led_9_grp_a"; }; + pins_led_10_a: led_10-a-pins { + function = "led_10"; + groups = "led_10_grp_a"; + }; + + pins_led_11_a: led_11-a-pins { + function = "led_11"; + groups = "led_11_grp_a"; + }; + + pins_led_12_a: led_12-a-pins { + function = "led_12"; + groups = "led_12_grp_a"; + }; + + pins_led_13_a: led_13-a-pins { + function = "led_13"; + groups = "led_13_grp_a"; + }; + + pins_led_14_a: led_14-a-pins { + function = "led_14"; + groups = "led_14_grp_a"; + }; + + pins_led_15_a: led_15-a-pins { + function = "led_15"; + groups = "led_15_grp_a"; + }; + + pins_led_16_a: led_16-a-pins { + function = "led_16"; + groups = "led_16_grp_a"; + }; + + pins_led_17_a: led_17-a-pins { + function = "led_17"; + groups = "led_17_grp_a"; + }; + + pins_led_18_a: led_18-a-pins { + function = "led_18"; + groups = "led_18_grp_a"; + }; + + pins_led_19_a: led_19-a-pins { + function = "led_19"; + groups = "led_19_grp_a"; + }; + + pins_led_20_a: led_20-a-pins { + function = "led_20"; + groups = "led_20_grp_a"; + }; + pins_led_21_a: led_21-a-pins { function = "led_21"; groups = "led_21_grp_a"; @@ -360,6 +469,21 @@ groups = "led_22_grp_a"; }; + pins_led_23_a: led_23-a-pins { + function = "led_23"; + groups = "led_23_grp_a"; + }; + + pins_led_24_a: led_24-a-pins { + function = "led_24"; + groups = "led_24_grp_a"; + }; + + pins_led_25_a: led_25-a-pins { + function = "led_25"; + groups = "led_25_grp_a"; + }; + pins_led_26_a: led_26-a-pins { function = "led_26"; groups = "led_26_grp_a"; @@ -385,6 +509,11 @@ groups = "led_30_grp_a"; }; + pins_led_31_a: led_31-a-pins { + function = "led_31"; + groups = "led_31_grp_a"; + }; + pins_hs_uart: hs_uart-pins { function = "hs_uart"; groups = "hs_uart_grp"; @@ -440,6 +569,26 @@ status = "okay"; }; + leds: leds@800 { + compatible = "brcm,bcm4908-leds", "brcm,bcm63138-leds"; + reg = <0x800 0xdc>; + + #address-cells = <1>; + #size-cells = <0>; + }; + + hsspi: spi@1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,bcm4908-hsspi", "brcm,bcmbca-hsspi-v1.0"; + reg = <0x1000 0x600>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&hsspi_pll &hsspi_pll>; + clock-names = "hsspi", "pll"; + num-cs = <8>; + status = "disabled"; + }; + nand-controller@1800 { #address-cells = <1>; #size-cells = <0>; @@ -447,7 +596,7 @@ reg = <0x1800 0x600>, <0x2000 0x10>; reg-names = "nand", "nand-int-base"; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "nand"; + interrupt-names = "nand_ctlrdy"; status = "okay"; nandcs: nand@0 { diff --git a/dts/src/arm64/broadcom/bcmbca/bcm4912-asus-gt-ax6000.dts b/dts/src/arm64/broadcom/bcmbca/bcm4912-asus-gt-ax6000.dts new file mode 100644 index 0000000000..ed554666e9 --- /dev/null +++ b/dts/src/arm64/broadcom/bcmbca/bcm4912-asus-gt-ax6000.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; + +#include "bcm4912.dtsi" + +/ { + compatible = "asus,gt-ax6000", "brcm,bcm4912", "brcm,bcmbca"; + model = "Asus GT-AX6000"; + + memory@0 { + device_type = "memory"; + reg = <0x00 0x00 0x00 0x40000000>; + }; +}; + +&uart0 { + status = "okay"; +}; diff --git a/dts/src/arm64/broadcom/bcmbca/bcm4912.dtsi b/dts/src/arm64/broadcom/bcmbca/bcm4912.dtsi new file mode 100644 index 0000000000..d658c81f72 --- /dev/null +++ b/dts/src/arm64/broadcom/bcmbca/bcm4912.dtsi @@ -0,0 +1,150 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + compatible = "brcm,bcm4912", "brcm,bcmbca"; + #address-cells = <2>; + #size-cells = <2>; + + interrupt-parent = <&gic>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + B53_0: cpu@0 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x0>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + B53_1: cpu@1 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x1>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + B53_2: cpu@2 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x2>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + B53_3: cpu@3 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x3>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + L2_0: l2-cache0 { + compatible = "cache"; + cache-level = <2>; + cache-unified; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + }; + + pmu: pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&B53_0>, <&B53_1>, + <&B53_2>, <&B53_3>; + }; + + clocks: clocks { + periph_clk: periph-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + + uart_clk: uart-clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clocks = <&periph_clk>; + clock-div = <4>; + clock-mult = <1>; + }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + axi@81000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x81000000 0x8000>; + + gic: interrupt-controller@1000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + interrupt-controller; + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + reg = <0x1000 0x1000>, + <0x2000 0x2000>, + <0x4000 0x2000>, + <0x6000 0x2000>; + }; + }; + + bus@ff800000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0xff800000 0x800000>; + + hsspi: spi@1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,bcm4912-hsspi", "brcm,bcmbca-hsspi-v1.1"; + reg = <0x1000 0x600>, <0x2610 0x4>; + reg-names = "hsspi", "spim-ctrl"; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&hsspi_pll &hsspi_pll>; + clock-names = "hsspi", "pll"; + num-cs = <8>; + status = "disabled"; + }; + + uart0: serial@12000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x12000 0x1000>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&uart_clk>, <&uart_clk>; + clock-names = "uartclk", "apb_pclk"; + status = "disabled"; + }; + }; +}; diff --git a/dts/src/arm64/broadcom/bcmbca/bcm63146.dtsi b/dts/src/arm64/broadcom/bcmbca/bcm63146.dtsi new file mode 100644 index 0000000000..4f474d4702 --- /dev/null +++ b/dts/src/arm64/broadcom/bcmbca/bcm63146.dtsi @@ -0,0 +1,131 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + compatible = "brcm,bcm63146", "brcm,bcmbca"; + #address-cells = <2>; + #size-cells = <2>; + + interrupt-parent = <&gic>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + B53_0: cpu@0 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x0>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + B53_1: cpu@1 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x1>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + L2_0: l2-cache0 { + compatible = "cache"; + cache-level = <2>; + cache-unified; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + }; + + pmu: pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&B53_0>, <&B53_1>; + }; + + clocks: clocks { + periph_clk: periph-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + + uart_clk: uart-clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clocks = <&periph_clk>; + clock-div = <4>; + clock-mult = <1>; + }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + axi@81000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x81000000 0x8000>; + + gic: interrupt-controller@1000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x1000 0x1000>, + <0x2000 0x2000>, + <0x4000 0x2000>, + <0x6000 0x2000>; + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | + IRQ_TYPE_LEVEL_HIGH)>; + }; + }; + + bus@ff800000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0xff800000 0x800000>; + + hsspi: spi@1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,bcm63146-hsspi", "brcm,bcmbca-hsspi-v1.0"; + reg = <0x1000 0x600>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&hsspi_pll &hsspi_pll>; + clock-names = "hsspi", "pll"; + num-cs = <8>; + status = "disabled"; + }; + + uart0: serial@12000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x12000 0x1000>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&uart_clk>, <&uart_clk>; + clock-names = "uartclk", "apb_pclk"; + status = "disabled"; + }; + }; +}; diff --git a/dts/src/arm64/broadcom/bcmbca/bcm63158.dtsi b/dts/src/arm64/broadcom/bcmbca/bcm63158.dtsi new file mode 100644 index 0000000000..909f254dc4 --- /dev/null +++ b/dts/src/arm64/broadcom/bcmbca/bcm63158.dtsi @@ -0,0 +1,149 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + compatible = "brcm,bcm63158", "brcm,bcmbca"; + #address-cells = <2>; + #size-cells = <2>; + + interrupt-parent = <&gic>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + B53_0: cpu@0 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x0>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + B53_1: cpu@1 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x1>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + B53_2: cpu@2 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x2>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + B53_3: cpu@3 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x3>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + L2_0: l2-cache0 { + compatible = "cache"; + cache-level = <2>; + cache-unified; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + }; + + pmu: pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&B53_0>, <&B53_1>, + <&B53_2>, <&B53_3>; + }; + + clocks: clocks { + periph_clk: periph-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + + uart_clk: uart-clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clocks = <&periph_clk>; + clock-div = <4>; + clock-mult = <1>; + }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <400000000>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + axi@81000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x81000000 0x8000>; + + gic: interrupt-controller@1000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + interrupt-controller; + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + reg = <0x1000 0x1000>, + <0x2000 0x2000>, + <0x4000 0x2000>, + <0x6000 0x2000>; + }; + }; + + bus@ff800000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0xff800000 0x800000>; + + hsspi: spi@1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,bcm63158-hsspi", "brcm,bcmbca-hsspi-v1.0"; + reg = <0x1000 0x600>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&hsspi_pll &hsspi_pll>; + clock-names = "hsspi", "pll"; + num-cs = <8>; + status = "disabled"; + }; + + uart0: serial@12000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x12000 0x1000>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&uart_clk>, <&uart_clk>; + clock-names = "uartclk", "apb_pclk"; + status = "disabled"; + }; + }; +}; diff --git a/dts/src/arm64/broadcom/bcmbca/bcm6813.dtsi b/dts/src/arm64/broadcom/bcmbca/bcm6813.dtsi new file mode 100644 index 0000000000..685ae32951 --- /dev/null +++ b/dts/src/arm64/broadcom/bcmbca/bcm6813.dtsi @@ -0,0 +1,150 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + compatible = "brcm,bcm6813", "brcm,bcmbca"; + #address-cells = <2>; + #size-cells = <2>; + + interrupt-parent = <&gic>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + B53_0: cpu@0 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x0>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + B53_1: cpu@1 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x1>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + B53_2: cpu@2 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x2>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + B53_3: cpu@3 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x3>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + L2_0: l2-cache0 { + compatible = "cache"; + cache-level = <2>; + cache-unified; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + }; + + pmu: pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&B53_0>, <&B53_1>, + <&B53_2>, <&B53_3>; + }; + + clocks: clocks { + periph_clk: periph-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + + uart_clk: uart-clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clocks = <&periph_clk>; + clock-div = <4>; + clock-mult = <1>; + }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + axi@81000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x81000000 0x8000>; + + gic: interrupt-controller@1000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + interrupt-controller; + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + reg = <0x1000 0x1000>, + <0x2000 0x2000>, + <0x4000 0x2000>, + <0x6000 0x2000>; + }; + }; + + bus@ff800000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0xff800000 0x800000>; + + hsspi: spi@1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,bcm6813-hsspi", "brcm,bcmbca-hsspi-v1.1"; + reg = <0x1000 0x600>, <0x2610 0x4>; + reg-names = "hsspi", "spim-ctrl"; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&hsspi_pll &hsspi_pll>; + clock-names = "hsspi", "pll"; + num-cs = <8>; + status = "disabled"; + }; + + uart0: serial@12000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x12000 0x1000>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&uart_clk>, <&uart_clk>; + clock-names = "uartclk", "apb_pclk"; + status = "disabled"; + }; + }; +}; diff --git a/dts/src/arm64/broadcom/bcmbca/bcm6856.dtsi b/dts/src/arm64/broadcom/bcmbca/bcm6856.dtsi new file mode 100644 index 0000000000..820553ce54 --- /dev/null +++ b/dts/src/arm64/broadcom/bcmbca/bcm6856.dtsi @@ -0,0 +1,123 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + compatible = "brcm,bcm6856", "brcm,bcmbca"; + #address-cells = <2>; + #size-cells = <2>; + + interrupt-parent = <&gic>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + B53_0: cpu@0 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x0>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + B53_1: cpu@1 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x1>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + L2_0: l2-cache0 { + compatible = "cache"; + cache-level = <2>; + cache-unified; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + }; + + pmu: pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&B53_0>, <&B53_1>; + }; + + clocks: clocks { + periph_clk:periph-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <400000000>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + axi@81000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x81000000 0x8000>; + + gic: interrupt-controller@1000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x1000 0x1000>, /* GICD */ + <0x2000 0x2000>, /* GICC */ + <0x4000 0x2000>, /* GICH */ + <0x6000 0x2000>; /* GICV */ + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | + IRQ_TYPE_LEVEL_HIGH)>; + }; + }; + + bus@ff800000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0xff800000 0x800000>; + + uart0: serial@640 { + compatible = "brcm,bcm6345-uart"; + reg = <0x640 0x18>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&periph_clk>; + clock-names = "refclk"; + status = "disabled"; + }; + + hsspi: spi@1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,bcm6856-hsspi", "brcm,bcmbca-hsspi-v1.0"; + reg = <0x1000 0x600>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&hsspi_pll &hsspi_pll>; + clock-names = "hsspi", "pll"; + num-cs = <8>; + status = "disabled"; + }; + }; +}; diff --git a/dts/src/arm64/broadcom/bcmbca/bcm6858.dtsi b/dts/src/arm64/broadcom/bcmbca/bcm6858.dtsi new file mode 100644 index 0000000000..0eb93c2982 --- /dev/null +++ b/dts/src/arm64/broadcom/bcmbca/bcm6858.dtsi @@ -0,0 +1,160 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + compatible = "brcm,bcm6858", "brcm,bcmbca"; + #address-cells = <2>; + #size-cells = <2>; + + interrupt-parent = <&gic>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + B53_0: cpu@0 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x0>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + B53_1: cpu@1 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x1>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + B53_2: cpu@2 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x2>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + B53_3: cpu@3 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x3>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + L2_0: l2-cache0 { + compatible = "cache"; + cache-level = <2>; + cache-unified; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + }; + + pmu: pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&B53_0>, <&B53_1>, + <&B53_2>, <&B53_3>; + }; + + clocks: clocks { + periph_clk:periph-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <400000000>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + axi@81000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x81000000 0x8000>; + + gic: interrupt-controller@1000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x1000 0x1000>, /* GICD */ + <0x2000 0x2000>, /* GICC */ + <0x4000 0x2000>, /* GICH */ + <0x6000 0x2000>; /* GICV */ + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | + IRQ_TYPE_LEVEL_HIGH)>; + }; + }; + + bus@ff800000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0xff800000 0x62000>; + + twd: timer-mfd@400 { + compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon"; + reg = <0x400 0x4c>; + ranges = <0x0 0x400 0x4c>; + + #address-cells = <1>; + #size-cells = <1>; + + timer@0 { + compatible = "brcm,bcm63138-timer"; + reg = <0x0 0x28>; + }; + + watchdog@28 { + compatible = "brcm,bcm6345-wdt"; + reg = <0x28 0x8>; + }; + }; + + uart0: serial@640 { + compatible = "brcm,bcm6345-uart"; + reg = <0x640 0x18>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&periph_clk>; + clock-names = "refclk"; + status = "disabled"; + }; + + hsspi: spi@1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,bcm6858-hsspi", "brcm,bcmbca-hsspi-v1.0"; + reg = <0x1000 0x600>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&hsspi_pll &hsspi_pll>; + clock-names = "hsspi", "pll"; + num-cs = <8>; + status = "disabled"; + }; + }; +}; diff --git a/dts/src/arm64/broadcom/bcmbca/bcm94908.dts b/dts/src/arm64/broadcom/bcmbca/bcm94908.dts new file mode 100644 index 0000000000..c4e6e71f63 --- /dev/null +++ b/dts/src/arm64/broadcom/bcmbca/bcm94908.dts @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +/dts-v1/; + +#include "bcm4908.dtsi" + +/ { + model = "Broadcom BCM94908 Reference Board"; + compatible = "brcm,bcm94908", "brcm,bcm4908", "brcm,bcmbca"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x08000000>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&hsspi { + status = "okay"; +}; diff --git a/dts/src/arm64/broadcom/bcmbca/bcm94912.dts b/dts/src/arm64/broadcom/bcmbca/bcm94912.dts new file mode 100644 index 0000000000..e69cd68321 --- /dev/null +++ b/dts/src/arm64/broadcom/bcmbca/bcm94912.dts @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +/dts-v1/; + +#include "bcm4912.dtsi" + +/ { + model = "Broadcom BCM94912 Reference Board"; + compatible = "brcm,bcm94912", "brcm,bcm4912", "brcm,bcmbca"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x08000000>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&hsspi { + status = "okay"; +}; diff --git a/dts/src/arm64/broadcom/bcmbca/bcm963146.dts b/dts/src/arm64/broadcom/bcmbca/bcm963146.dts new file mode 100644 index 0000000000..db2c82d6df --- /dev/null +++ b/dts/src/arm64/broadcom/bcmbca/bcm963146.dts @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +/dts-v1/; + +#include "bcm63146.dtsi" + +/ { + model = "Broadcom BCM963146 Reference Board"; + compatible = "brcm,bcm963146", "brcm,bcm63146", "brcm,bcmbca"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x08000000>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&hsspi { + status = "okay"; +}; diff --git a/dts/src/arm64/broadcom/bcmbca/bcm963158.dts b/dts/src/arm64/broadcom/bcmbca/bcm963158.dts new file mode 100644 index 0000000000..25c12bc635 --- /dev/null +++ b/dts/src/arm64/broadcom/bcmbca/bcm963158.dts @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +/dts-v1/; + +#include "bcm63158.dtsi" + +/ { + model = "Broadcom BCM963158 Reference Board"; + compatible = "brcm,bcm963158", "brcm,bcm63158", "brcm,bcmbca"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x08000000>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&hsspi { + status = "okay"; +}; diff --git a/dts/src/arm64/broadcom/bcmbca/bcm96813.dts b/dts/src/arm64/broadcom/bcmbca/bcm96813.dts new file mode 100644 index 0000000000..faba21f031 --- /dev/null +++ b/dts/src/arm64/broadcom/bcmbca/bcm96813.dts @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +/dts-v1/; + +#include "bcm6813.dtsi" + +/ { + model = "Broadcom BCM96813 Reference Board"; + compatible = "brcm,bcm96813", "brcm,bcm6813", "brcm,bcmbca"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x08000000>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&hsspi { + status = "okay"; +}; diff --git a/dts/src/arm64/broadcom/bcmbca/bcm96856.dts b/dts/src/arm64/broadcom/bcmbca/bcm96856.dts new file mode 100644 index 0000000000..9808331eed --- /dev/null +++ b/dts/src/arm64/broadcom/bcmbca/bcm96856.dts @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +/dts-v1/; + +#include "bcm6856.dtsi" + +/ { + model = "Broadcom BCM96856 Reference Board"; + compatible = "brcm,bcm96856", "brcm,bcm6856", "brcm,bcmbca"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x08000000>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&hsspi { + status = "okay"; +}; diff --git a/dts/src/arm64/broadcom/bcmbca/bcm96858.dts b/dts/src/arm64/broadcom/bcmbca/bcm96858.dts new file mode 100644 index 0000000000..1f561c8e13 --- /dev/null +++ b/dts/src/arm64/broadcom/bcmbca/bcm96858.dts @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +/dts-v1/; + +#include "bcm6858.dtsi" + +/ { + model = "Broadcom BCM96858 Reference Board"; + compatible = "brcm,bcm96858", "brcm,bcm6858", "brcm,bcmbca"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x08000000>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&hsspi { + status = "okay"; +}; diff --git a/dts/src/arm64/broadcom/northstar2/ns2-svk.dts b/dts/src/arm64/broadcom/northstar2/ns2-svk.dts index e34172e311..dec5a110f1 100644 --- a/dts/src/arm64/broadcom/northstar2/ns2-svk.dts +++ b/dts/src/arm64/broadcom/northstar2/ns2-svk.dts @@ -52,7 +52,7 @@ memory { device_type = "memory"; - reg = <0x000000000 0x80000000 0x00000000 0x40000000>; + reg = <0x00000000 0x80000000 0x00000000 0x40000000>; }; }; @@ -113,7 +113,6 @@ spi-max-frequency = <5000000>; spi-cpha; spi-cpol; - pl022,hierarchy = <0>; pl022,interface = <0>; pl022,slave-tx-disable = <0>; pl022,com-mode = <0>; @@ -137,7 +136,6 @@ at25,page-size = <64>; spi-cpha; spi-cpol; - pl022,hierarchy = <0>; pl022,interface = <0>; pl022,slave-tx-disable = <0>; pl022,com-mode = <0>; diff --git a/dts/src/arm64/broadcom/northstar2/ns2-xmc.dts b/dts/src/arm64/broadcom/northstar2/ns2-xmc.dts index 7bf26f3e36..1d314f17bb 100644 --- a/dts/src/arm64/broadcom/northstar2/ns2-xmc.dts +++ b/dts/src/arm64/broadcom/northstar2/ns2-xmc.dts @@ -49,7 +49,7 @@ memory { device_type = "memory"; - reg = <0x000000000 0x80000000 0x00000001 0x00000000>; + reg = <0x00000000 0x80000000 0x00000001 0x00000000>; }; }; @@ -114,7 +114,7 @@ reg = <0x04000000 0x06400000>; /* 100MB */ }; - partition@a400000{ + partition@a400000 { label = "ncustfs"; reg = <0x0a400000 0x35c00000>; /* 860MB */ }; diff --git a/dts/src/arm64/broadcom/northstar2/ns2.dtsi b/dts/src/arm64/broadcom/northstar2/ns2.dtsi index fda97c47f4..896d1f33b5 100644 --- a/dts/src/arm64/broadcom/northstar2/ns2.dtsi +++ b/dts/src/arm64/broadcom/northstar2/ns2.dtsi @@ -79,6 +79,8 @@ CLUSTER0_L2: l2-cache@0 { compatible = "cache"; + cache-level = <2>; + cache-unified; }; }; @@ -293,7 +295,7 @@ clock-names = "apb_pclk"; }; - smmu: mmu@64000000 { + smmu: iommu@64000000 { compatible = "arm,mmu-500"; reg = <0x64000000 0x40000>; #global-interrupts = <2>; @@ -584,6 +586,7 @@ #gpio-cells = <2>; gpio-controller; interrupt-controller; + #interrupt-cells = <2>; interrupts = <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>; }; diff --git a/dts/src/arm64/broadcom/stingray/bcm958802a802x.dts b/dts/src/arm64/broadcom/stingray/bcm958802a802x.dts index a41facd7d7..66471a25e4 100644 --- a/dts/src/arm64/broadcom/stingray/bcm958802a802x.dts +++ b/dts/src/arm64/broadcom/stingray/bcm958802a802x.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0 or BSD-3-Clause) +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) /* *Copyright(c) 2018 Broadcom */ diff --git a/dts/src/arm64/broadcom/stingray/stingray-board-base.dtsi b/dts/src/arm64/broadcom/stingray/stingray-board-base.dtsi index 82a24711d0..cdd709491f 100644 --- a/dts/src/arm64/broadcom/stingray/stingray-board-base.dtsi +++ b/dts/src/arm64/broadcom/stingray/stingray-board-base.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0 or BSD-3-Clause) +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) /* * Copyright(c) 2016-2018 Broadcom */ diff --git a/dts/src/arm64/broadcom/stingray/stingray-pcie.dtsi b/dts/src/arm64/broadcom/stingray/stingray-pcie.dtsi index 33a472ab17..663e517567 100644 --- a/dts/src/arm64/broadcom/stingray/stingray-pcie.dtsi +++ b/dts/src/arm64/broadcom/stingray/stingray-pcie.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0 or BSD-3-Clause) +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) /* *Copyright(c) 2018 Broadcom */ diff --git a/dts/src/arm64/broadcom/stingray/stingray-pinctrl.dtsi b/dts/src/arm64/broadcom/stingray/stingray-pinctrl.dtsi index 56789ccf94..46a8275219 100644 --- a/dts/src/arm64/broadcom/stingray/stingray-pinctrl.dtsi +++ b/dts/src/arm64/broadcom/stingray/stingray-pinctrl.dtsi @@ -44,7 +44,7 @@ compatible = "pinctrl-single"; reg = <0x0014029c 0x26c>; #address-cells = <1>; - #size-cells = <1>; + #size-cells = <0>; pinctrl-single,register-width = <32>; pinctrl-single,function-mask = <0xf>; pinctrl-single,gpio-range = < @@ -56,14 +56,14 @@ }; /* pinctrl functions */ - tsio_pins: pinmux_gpio_14 { + tsio_pins: gpio-14-pins { pinctrl-single,pins = < 0x038 MODE_NITRO /* tsio_0 */ 0x03c MODE_NITRO /* tsio_1 */ >; }; - nor_pins: pinmux_pnor_adv_n { + nor_pins: pnor-adv-n-pins { pinctrl-single,pins = < 0x0ac MODE_PNOR /* nand_ce1_n */ 0x0b0 MODE_PNOR /* nand_ce0_n */ @@ -119,7 +119,7 @@ >; }; - nand_pins: pinmux_nand_ce1_n { + nand_pins: nand-ce1-n-pins { pinctrl-single,pins = < 0x0ac MODE_NAND /* nand_ce1_n */ 0x0b0 MODE_NAND /* nand_ce0_n */ @@ -148,59 +148,59 @@ >; }; - pwm0_pins: pinmux_pwm_0 { + pwm0_pins: pwm-0-pins { pinctrl-single,pins = < 0x10c MODE_NITRO >; }; - pwm1_pins: pinmux_pwm_1 { + pwm1_pins: pwm-1-pins { pinctrl-single,pins = < 0x110 MODE_NITRO >; }; - pwm2_pins: pinmux_pwm_2 { + pwm2_pins: pwm-2-pins { pinctrl-single,pins = < 0x114 MODE_NITRO >; }; - pwm3_pins: pinmux_pwm_3 { + pwm3_pins: pwm-3-pins { pinctrl-single,pins = < 0x118 MODE_NITRO >; }; - dbu_rxd_pins: pinmux_uart1_sin_nitro { + dbu_rxd_pins: uart1-sin-nitro-pins { pinctrl-single,pins = < 0x11c MODE_NITRO /* dbu_rxd */ 0x120 MODE_NITRO /* dbu_txd */ >; }; - uart1_pins: pinmux_uart1_sin_nand { + uart1_pins: uart1-sin-nand-pins { pinctrl-single,pins = < 0x11c MODE_NAND /* uart1_sin */ 0x120 MODE_NAND /* uart1_out */ >; }; - uart2_pins: pinmux_uart2_sin { + uart2_pins: uart2-sin-pins { pinctrl-single,pins = < 0x124 MODE_NITRO /* uart2_sin */ 0x128 MODE_NITRO /* uart2_out */ >; }; - uart3_pins: pinmux_uart3_sin { + uart3_pins: uart3-sin-pins { pinctrl-single,pins = < 0x12c MODE_NITRO /* uart3_sin */ 0x130 MODE_NITRO /* uart3_out */ >; }; - i2s_pins: pinmux_i2s_bitclk { + i2s_pins: i2s-bitclk-pins { pinctrl-single,pins = < 0x134 MODE_NITRO /* i2s_bitclk */ 0x138 MODE_NITRO /* i2s_sdout */ @@ -211,7 +211,7 @@ >; }; - qspi_pins: pinumx_qspi_hold_n { + qspi_pins: qspi-hold-n-pins { pinctrl-single,pins = < 0x14c MODE_NAND /* qspi_hold_n */ 0x150 MODE_NAND /* qspi_wp_n */ @@ -222,28 +222,28 @@ >; }; - mdio_pins: pinumx_ext_mdio { + mdio_pins: ext-mdio-pins { pinctrl-single,pins = < 0x164 MODE_NITRO /* ext_mdio */ 0x168 MODE_NITRO /* ext_mdc */ >; }; - i2c0_pins: pinmux_i2c0_sda { + i2c0_pins: i2c0-sda-pins { pinctrl-single,pins = < 0x16c MODE_NITRO /* i2c0_sda */ 0x170 MODE_NITRO /* i2c0_scl */ >; }; - i2c1_pins: pinmux_i2c1_sda { + i2c1_pins: i2c1-sda-pins { pinctrl-single,pins = < 0x174 MODE_NITRO /* i2c1_sda */ 0x178 MODE_NITRO /* i2c1_scl */ >; }; - sdio0_pins: pinmux_sdio0_cd_l { + sdio0_pins: sdio0-cd-l-pins { pinctrl-single,pins = < 0x17c MODE_NITRO /* sdio0_cd_l */ 0x180 MODE_NITRO /* sdio0_clk_sdcard */ @@ -262,7 +262,7 @@ >; }; - sdio1_pins: pinmux_sdio1_cd_l { + sdio1_pins: sdio1-cd-l-pins { pinctrl-single,pins = < 0x1b4 MODE_NITRO /* sdio1_cd_l */ 0x1b8 MODE_NITRO /* sdio1_clk_sdcard */ @@ -281,7 +281,7 @@ >; }; - spi0_pins: pinmux_spi0_sck_nand { + spi0_pins: spi0-sck-nand-pins { pinctrl-single,pins = < 0x1ec MODE_NITRO /* spi0_sck */ 0x1f0 MODE_NITRO /* spi0_rxd */ @@ -290,7 +290,7 @@ >; }; - spi1_pins: pinmux_spi1_sck_nand { + spi1_pins: spi1-sck-nand-pins { pinctrl-single,pins = < 0x1fc MODE_NITRO /* spi1_sck */ 0x200 MODE_NITRO /* spi1_rxd */ @@ -299,14 +299,14 @@ >; }; - nuart_pins: pinmux_uart0_sin_nitro { + nuart_pins: uart0-sin-nitro-pins { pinctrl-single,pins = < 0x20c MODE_NITRO /* nuart_rxd */ 0x210 MODE_NITRO /* nuart_txd */ >; }; - uart0_pins: pinumux_uart0_sin_nand { + uart0_pins: uart0-sin-nand-pins { pinctrl-single,pins = < 0x20c MODE_NAND /* uart0_sin */ 0x210 MODE_NAND /* uart0_out */ @@ -319,7 +319,7 @@ >; }; - drdu2_pins: pinmux_drdu2_overcurrent { + drdu2_pins: drdu2-overcurrent-pins { pinctrl-single,pins = < 0x22c MODE_NITRO /* drdu2_overcurrent */ 0x230 MODE_NITRO /* drdu2_vbus_ppc */ @@ -328,7 +328,7 @@ >; }; - drdu3_pins: pinmux_drdu3_overcurrent { + drdu3_pins: drdu3-overcurrent-pins { pinctrl-single,pins = < 0x23c MODE_NITRO /* drdu3_overcurrent */ 0x240 MODE_NITRO /* drdu3_vbus_ppc */ @@ -337,7 +337,7 @@ >; }; - usb3h_pins: pinmux_usb3h_overcurrent { + usb3h_pins: usb3h-overcurrent-pins { pinctrl-single,pins = < 0x24c MODE_NITRO /* usb3h_overcurrent */ 0x250 MODE_NITRO /* usb3h_vbus_ppc */ diff --git a/dts/src/arm64/broadcom/stingray/stingray-usb.dtsi b/dts/src/arm64/broadcom/stingray/stingray-usb.dtsi index 5401a646c8..ac4f7b8f92 100644 --- a/dts/src/arm64/broadcom/stingray/stingray-usb.dtsi +++ b/dts/src/arm64/broadcom/stingray/stingray-usb.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0 or BSD-3-Clause) +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) /* *Copyright(c) 2018 Broadcom */ diff --git a/dts/src/arm64/broadcom/stingray/stingray.dtsi b/dts/src/arm64/broadcom/stingray/stingray.dtsi index 09d4aa8ae1..d8516ec0da 100644 --- a/dts/src/arm64/broadcom/stingray/stingray.dtsi +++ b/dts/src/arm64/broadcom/stingray/stingray.dtsi @@ -108,18 +108,26 @@ CLUSTER0_L2: l2-cache@0 { compatible = "cache"; + cache-level = <2>; + cache-unified; }; CLUSTER1_L2: l2-cache@100 { compatible = "cache"; + cache-level = <2>; + cache-unified; }; CLUSTER2_L2: l2-cache@200 { compatible = "cache"; + cache-level = <2>; + cache-unified; }; CLUSTER3_L2: l2-cache@300 { compatible = "cache"; + cache-level = <2>; + cache-unified; }; }; @@ -174,7 +182,7 @@ <0x02e00000 0x600000>; /* GICR */ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; - gic_its: gic-its@63c20000 { + gic_its: msi-controller@63c20000 { compatible = "arm,gic-v3-its"; msi-controller; #msi-cells = <1>; @@ -182,7 +190,7 @@ }; }; - smmu: mmu@3000000 { + smmu: iommu@3000000 { compatible = "arm,mmu-500"; reg = <0x03000000 0x80000>; #global-interrupts = <1>; @@ -442,6 +450,7 @@ #gpio-cells = <2>; gpio-controller; interrupt-controller; + #interrupt-cells = <2>; interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; gpio-ranges = <&pinmux 0 0 16>, <&pinmux 16 71 2>, @@ -471,7 +480,6 @@ }; uart0: serial@100000 { - device_type = "serial"; compatible = "snps,dw-apb-uart"; reg = <0x00100000 0x1000>; reg-shift = <2>; @@ -482,7 +490,6 @@ }; uart1: serial@110000 { - device_type = "serial"; compatible = "snps,dw-apb-uart"; reg = <0x00110000 0x1000>; reg-shift = <2>; @@ -493,7 +500,6 @@ }; uart2: serial@120000 { - device_type = "serial"; compatible = "snps,dw-apb-uart"; reg = <0x00120000 0x1000>; reg-shift = <2>; @@ -504,7 +510,6 @@ }; uart3: serial@130000 { - device_type = "serial"; compatible = "snps,dw-apb-uart"; reg = <0x00130000 0x1000>; reg-shift = <2>; @@ -561,13 +566,13 @@ iommus = <&smmu 0x6000 0x0000>; }; - enet: ethernet@340000{ + enet: ethernet@340000 { compatible = "brcm,amac"; reg = <0x00340000 0x1000>; reg-names = "amac_base"; dma-coherent; interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>; - status= "disabled"; + status = "disabled"; }; nand: nand@360000 { |