diff options
Diffstat (limited to 'dts/src/arm64/freescale/imx8dxl-ss-adma.dtsi')
-rw-r--r-- | dts/src/arm64/freescale/imx8dxl-ss-adma.dtsi | 102 |
1 files changed, 102 insertions, 0 deletions
diff --git a/dts/src/arm64/freescale/imx8dxl-ss-adma.dtsi b/dts/src/arm64/freescale/imx8dxl-ss-adma.dtsi new file mode 100644 index 0000000000..0a477f6318 --- /dev/null +++ b/dts/src/arm64/freescale/imx8dxl-ss-adma.dtsi @@ -0,0 +1,102 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019~2020, 2022 NXP + */ + +&audio_ipg_clk { + clock-frequency = <160000000>; +}; + +&dma_ipg_clk { + clock-frequency = <160000000>; +}; + +&adc0 { + interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; +}; + +&edma2 { + interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>; +}; + +&edma3 { + interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>; +}; + +&i2c0 { + compatible = "fsl,imx8dxl-lpi2c", "fsl,imx7ulp-lpi2c"; + interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; +}; + +&i2c1 { + compatible = "fsl,imx8dxl-lpi2c", "fsl,imx7ulp-lpi2c"; + interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>; +}; + +&i2c2 { + compatible = "fsl,imx8dxl-lpi2c", "fsl,imx7ulp-lpi2c"; + interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; +}; + +&i2c3 { + compatible = "fsl,imx8dxl-lpi2c", "fsl,imx7ulp-lpi2c"; + interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; +}; + +&lpuart0 { + compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart"; + interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>; +}; + +&lpuart1 { + compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart"; + interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>; +}; + +&lpuart2 { + compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart"; + interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>; +}; + +&lpuart3 { + compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart"; + interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>; +}; + +&lpspi0 { + interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>; +}; + +&lpspi1 { + interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>; +}; + +&lpspi2 { + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>; +}; + +&lpspi3 { + interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; +}; |