summaryrefslogtreecommitdiffstats
path: root/dts/src/arm64/freescale/imx8mn-venice-gw7902.dts
diff options
context:
space:
mode:
Diffstat (limited to 'dts/src/arm64/freescale/imx8mn-venice-gw7902.dts')
-rw-r--r--dts/src/arm64/freescale/imx8mn-venice-gw7902.dts51
1 files changed, 50 insertions, 1 deletions
diff --git a/dts/src/arm64/freescale/imx8mn-venice-gw7902.dts b/dts/src/arm64/freescale/imx8mn-venice-gw7902.dts
index 236f425e15..3c0e63d2e8 100644
--- a/dts/src/arm64/freescale/imx8mn-venice-gw7902.dts
+++ b/dts/src/arm64/freescale/imx8mn-venice-gw7902.dts
@@ -220,6 +220,10 @@
};
};
+&disp_blk_ctrl {
+ status = "disabled";
+};
+
/* off-board header */
&ecspi2 {
pinctrl-names = "default";
@@ -251,6 +255,47 @@
};
};
+&gpio1 {
+ gpio-line-names = "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "m2_reset", "", "m2_wdis#",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "";
+};
+
+&gpio2 {
+ gpio-line-names = "", "", "", "", "", "", "", "",
+ "uart2_en#", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "";
+};
+
+&gpio3 {
+ gpio-line-names = "", "m2_gdis#", "", "", "", "", "", "m2_off#",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "";
+};
+
+&gpio4 {
+ gpio-line-names = "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "app_gpio1", "", "uart1_rs485",
+ "", "uart1_term", "uart1_half", "app_gpio2",
+ "mipi_gpio1", "", "", "";
+};
+
+&gpio5 {
+ gpio-line-names = "", "", "", "mipi_gpio4",
+ "mipi_gpio3", "mipi_gpio2", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "";
+};
+
+&gpu {
+ status = "disabled";
+};
+
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
@@ -546,6 +591,10 @@
status = "okay";
};
+&pgc_gpumix {
+ status = "disabled";
+};
+
/* off-board header */
&sai3 {
pinctrl-names = "default";
@@ -633,7 +682,7 @@
pinctrl_hog: hoggrp {
fsl,pins = <
MX8MN_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x40000159 /* M2_GDIS# */
- MX8MN_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x40000041 /* M2_RST# */
+ MX8MN_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x40000041 /* M2_RESET */
MX8MN_IOMUXC_NAND_DATA01_GPIO3_IO7 0x40000119 /* M2_OFF# */
MX8MN_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x40000159 /* M2_WDIS# */
MX8MN_IOMUXC_SAI2_RXFS_GPIO4_IO21 0x40000041 /* APP GPIO1 */