diff options
Diffstat (limited to 'dts/src/arm64/freescale/imx8ulp.dtsi')
| -rw-r--r-- | dts/src/arm64/freescale/imx8ulp.dtsi | 65 |
1 files changed, 52 insertions, 13 deletions
diff --git a/dts/src/arm64/freescale/imx8ulp.dtsi b/dts/src/arm64/freescale/imx8ulp.dtsi index bb56390b8f..06ce5f19aa 100644 --- a/dts/src/arm64/freescale/imx8ulp.dtsi +++ b/dts/src/arm64/freescale/imx8ulp.dtsi @@ -16,6 +16,7 @@ #size-cells = <2>; aliases { + ethernet0 = &fec; gpio0 = &gpiod; gpio1 = &gpioe; gpio2 = &gpiof; @@ -62,6 +63,14 @@ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; }; + pmu { + compatible = "arm,cortex-a35-pmu"; + interrupt-parent = <&gic>; + interrupts = <GIC_PPI 7 + (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; + interrupt-affinity = <&A35_0>, <&A35_1>; + }; + psci { compatible = "arm,psci-1.0"; method = "smc"; @@ -111,7 +120,7 @@ #size-cells = <1>; ranges = <0 0x0 0x2201f000 0x1000>; - scmi_buf: scmi-buf@0 { + scmi_buf: scmi-sram-section@0 { compatible = "arm,scmi-shmem"; reg = <0x0 0x400>; }; @@ -143,6 +152,13 @@ #size-cells = <1>; ranges = <0x0 0x0 0x0 0x40000000>; + s4muap: mailbox@27020000 { + compatible = "fsl,imx8ulp-mu-s4"; + reg = <0x27020000 0x10000>; + interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; + #mbox-cells = <2>; + }; + per_bridge3: bus@29000000 { compatible = "simple-bus"; reg = <0x29000000 0x800000>; @@ -150,6 +166,23 @@ #size-cells = <1>; ranges; + mu: mailbox@29220000 { + compatible = "fsl,imx8ulp-mu"; + reg = <0x29220000 0x10000>; + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; + #mbox-cells = <2>; + status = "disabled"; + }; + + mu3: mailbox@29230000 { + compatible = "fsl,imx8ulp-mu"; + reg = <0x29230000 0x10000>; + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pcc3 IMX8ULP_CLK_MU3_A>; + #mbox-cells = <2>; + status = "disabled"; + }; + wdog3: watchdog@292a0000 { compatible = "fsl,imx8ulp-wdt", "fsl,imx7ulp-wdt"; reg = <0x292a0000 0x10000>; @@ -163,8 +196,6 @@ cgc1: clock-controller@292c0000 { compatible = "fsl,imx8ulp-cgc1"; reg = <0x292c0000 0x10000>; - clocks = <&rosc>, <&sosc>, <&frosc>, <&lposc>; - clock-names = "rosc", "sosc", "frosc", "lposc"; #clock-cells = <1>; }; @@ -193,7 +224,7 @@ <&pcc3 IMX8ULP_CLK_LPI2C4>; clock-names = "per", "ipg"; assigned-clocks = <&pcc3 IMX8ULP_CLK_LPI2C4>; - assigned-clock-parents = <&cgc1 IMX8ULP_CLK_XBAR_DIVBUS>; + assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>; assigned-clock-rates = <48000000>; status = "disabled"; }; @@ -206,7 +237,7 @@ <&pcc3 IMX8ULP_CLK_LPI2C5>; clock-names = "per", "ipg"; assigned-clocks = <&pcc3 IMX8ULP_CLK_LPI2C5>; - assigned-clock-parents = <&cgc1 IMX8ULP_CLK_XBAR_DIVBUS>; + assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>; assigned-clock-rates = <48000000>; status = "disabled"; }; @@ -239,8 +270,8 @@ <&pcc3 IMX8ULP_CLK_LPSPI4>; clock-names = "per", "ipg"; assigned-clocks = <&pcc3 IMX8ULP_CLK_LPSPI4>; - assigned-clock-parents = <&cgc1 IMX8ULP_CLK_XBAR_DIVBUS>; - assigned-clock-rates = <16000000>; + assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>; + assigned-clock-rates = <48000000>; status = "disabled"; }; @@ -254,8 +285,8 @@ <&pcc3 IMX8ULP_CLK_LPSPI5>; clock-names = "per", "ipg"; assigned-clocks = <&pcc3 IMX8ULP_CLK_LPSPI5>; - assigned-clock-parents = <&cgc1 IMX8ULP_CLK_XBAR_DIVBUS>; - assigned-clock-rates = <16000000>; + assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>; + assigned-clock-rates = <48000000>; status = "disabled"; }; }; @@ -282,7 +313,7 @@ <&pcc4 IMX8ULP_CLK_LPI2C6>; clock-names = "per", "ipg"; assigned-clocks = <&pcc4 IMX8ULP_CLK_LPI2C6>; - assigned-clock-parents = <&cgc1 IMX8ULP_CLK_XBAR_DIVBUS>; + assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>; assigned-clock-rates = <48000000>; status = "disabled"; }; @@ -295,7 +326,7 @@ <&pcc4 IMX8ULP_CLK_LPI2C7>; clock-names = "per", "ipg"; assigned-clocks = <&pcc4 IMX8ULP_CLK_LPI2C7>; - assigned-clock-parents = <&cgc1 IMX8ULP_CLK_XBAR_DIVBUS>; + assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>; assigned-clock-rates = <48000000>; status = "disabled"; }; @@ -367,6 +398,16 @@ bus-width = <4>; status = "disabled"; }; + + fec: ethernet@29950000 { + compatible = "fsl,imx8ulp-fec", "fsl,imx6ul-fec", "fsl,imx6q-fec"; + reg = <0x29950000 0x10000>; + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0"; + fsl,num-tx-queues = <1>; + fsl,num-rx-queues = <1>; + status = "disabled"; + }; }; gpioe: gpio@2d000080 { @@ -407,8 +448,6 @@ cgc2: clock-controller@2da60000 { compatible = "fsl,imx8ulp-cgc2"; reg = <0x2da60000 0x10000>; - clocks = <&sosc>, <&frosc>; - clock-names = "sosc", "frosc"; #clock-cells = <1>; }; |