diff options
Diffstat (limited to 'dts/src/arm64/mediatek/mt8183-evb.dts')
-rw-r--r-- | dts/src/arm64/mediatek/mt8183-evb.dts | 118 |
1 files changed, 91 insertions, 27 deletions
diff --git a/dts/src/arm64/mediatek/mt8183-evb.dts b/dts/src/arm64/mediatek/mt8183-evb.dts index 7bc0a6a7fa..681deddffc 100644 --- a/dts/src/arm64/mediatek/mt8183-evb.dts +++ b/dts/src/arm64/mediatek/mt8183-evb.dts @@ -11,6 +11,7 @@ / { model = "MediaTek MT8183 evaluation board"; + chassis-type = "embedded"; compatible = "mediatek,mt8183-evb", "mediatek,mt8183"; aliases { @@ -30,12 +31,20 @@ #address-cells = <2>; #size-cells = <2>; ranges; - scp_mem_reserved: scp_mem_region { + scp_mem_reserved: memory@50000000 { compatible = "shared-dma-pool"; reg = <0 0x50000000 0 0x2900000>; no-map; }; }; + + thermal-sensor { + compatible = "murata,ncp03wf104"; + pullup-uv = <1800000>; + pullup-ohm = <390000>; + pulldown-ohm = <0>; + io-channels = <&auxadc 0>; + }; }; &auxadc { @@ -44,7 +53,6 @@ &gpu { mali-supply = <&mt6358_vgpu_reg>; - sram-supply = <&mt6358_vsram_gpu_reg>; }; &i2c0 { @@ -126,13 +134,29 @@ vmmc-supply = <&mt6358_vmch_reg>; vqmmc-supply = <&mt6358_vmc_reg>; keep-power-in-suspend; - enable-sdio-wakeup; + wakeup-source; non-removable; }; +&mt6358_vgpu_reg { + regulator-min-microvolt = <625000>; + regulator-max-microvolt = <900000>; + + regulator-coupled-with = <&mt6358_vsram_gpu_reg>; + regulator-coupled-max-spread = <100000>; +}; + +&mt6358_vsram_gpu_reg { + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1000000>; + + regulator-coupled-with = <&mt6358_vgpu_reg>; + regulator-coupled-max-spread = <100000>; +}; + &pio { - i2c_pins_0: i2c0{ - pins_i2c{ + i2c_pins_0: i2c0 { + pins_i2c { pinmux = <PINMUX_GPIO82__FUNC_SDA0>, <PINMUX_GPIO83__FUNC_SCL0>; mediatek,pull-up-adv = <3>; @@ -140,8 +164,8 @@ }; }; - i2c_pins_1: i2c1{ - pins_i2c{ + i2c_pins_1: i2c1 { + pins_i2c { pinmux = <PINMUX_GPIO81__FUNC_SDA1>, <PINMUX_GPIO84__FUNC_SCL1>; mediatek,pull-up-adv = <3>; @@ -149,8 +173,8 @@ }; }; - i2c_pins_2: i2c2{ - pins_i2c{ + i2c_pins_2: i2c2 { + pins_i2c { pinmux = <PINMUX_GPIO103__FUNC_SCL2>, <PINMUX_GPIO104__FUNC_SDA2>; mediatek,pull-up-adv = <3>; @@ -158,8 +182,8 @@ }; }; - i2c_pins_3: i2c3{ - pins_i2c{ + i2c_pins_3: i2c3 { + pins_i2c { pinmux = <PINMUX_GPIO50__FUNC_SCL3>, <PINMUX_GPIO51__FUNC_SDA3>; mediatek,pull-up-adv = <3>; @@ -167,8 +191,8 @@ }; }; - i2c_pins_4: i2c4{ - pins_i2c{ + i2c_pins_4: i2c4 { + pins_i2c { pinmux = <PINMUX_GPIO105__FUNC_SCL4>, <PINMUX_GPIO106__FUNC_SDA4>; mediatek,pull-up-adv = <3>; @@ -176,8 +200,8 @@ }; }; - i2c_pins_5: i2c5{ - pins_i2c{ + i2c_pins_5: i2c5 { + pins_i2c { pinmux = <PINMUX_GPIO48__FUNC_SCL5>, <PINMUX_GPIO49__FUNC_SDA5>; mediatek,pull-up-adv = <3>; @@ -185,8 +209,8 @@ }; }; - spi_pins_0: spi0{ - pins_spi{ + spi_pins_0: spi0 { + pins_spi { pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>, <PINMUX_GPIO86__FUNC_SPI0_CSB>, <PINMUX_GPIO87__FUNC_SPI0_MO>, @@ -300,8 +324,8 @@ }; }; - spi_pins_1: spi1{ - pins_spi{ + spi_pins_1: spi1 { + pins_spi { pinmux = <PINMUX_GPIO161__FUNC_SPI1_A_MI>, <PINMUX_GPIO162__FUNC_SPI1_A_CSB>, <PINMUX_GPIO163__FUNC_SPI1_A_MO>, @@ -310,8 +334,8 @@ }; }; - spi_pins_2: spi2{ - pins_spi{ + spi_pins_2: spi2 { + pins_spi { pinmux = <PINMUX_GPIO0__FUNC_SPI2_CSB>, <PINMUX_GPIO1__FUNC_SPI2_MO>, <PINMUX_GPIO2__FUNC_SPI2_CLK>, @@ -320,8 +344,8 @@ }; }; - spi_pins_3: spi3{ - pins_spi{ + spi_pins_3: spi3 { + pins_spi { pinmux = <PINMUX_GPIO21__FUNC_SPI3_MI>, <PINMUX_GPIO22__FUNC_SPI3_CSB>, <PINMUX_GPIO23__FUNC_SPI3_MO>, @@ -330,8 +354,8 @@ }; }; - spi_pins_4: spi4{ - pins_spi{ + spi_pins_4: spi4 { + pins_spi { pinmux = <PINMUX_GPIO17__FUNC_SPI4_MI>, <PINMUX_GPIO18__FUNC_SPI4_CSB>, <PINMUX_GPIO19__FUNC_SPI4_MO>, @@ -340,8 +364,8 @@ }; }; - spi_pins_5: spi5{ - pins_spi{ + spi_pins_5: spi5 { + pins_spi { pinmux = <PINMUX_GPIO13__FUNC_SPI5_MI>, <PINMUX_GPIO14__FUNC_SPI5_CSB>, <PINMUX_GPIO15__FUNC_SPI5_MO>, @@ -357,6 +381,10 @@ }; }; +&pmic { + interrupts-extended = <&pio 182 IRQ_TYPE_LEVEL_HIGH>; +}; + &mfg { domain-supply = <&mt6358_vgpu_reg>; }; @@ -404,6 +432,42 @@ }; +&cci { + proc-supply = <&mt6358_vproc12_reg>; +}; + +&cpu0 { + proc-supply = <&mt6358_vproc12_reg>; +}; + +&cpu1 { + proc-supply = <&mt6358_vproc12_reg>; +}; + +&cpu2 { + proc-supply = <&mt6358_vproc12_reg>; +}; + +&cpu3 { + proc-supply = <&mt6358_vproc12_reg>; +}; + +&cpu4 { + proc-supply = <&mt6358_vproc11_reg>; +}; + +&cpu5 { + proc-supply = <&mt6358_vproc11_reg>; +}; + +&cpu6 { + proc-supply = <&mt6358_vproc11_reg>; +}; + +&cpu7 { + proc-supply = <&mt6358_vproc11_reg>; +}; + &uart0 { status = "okay"; }; |