diff options
Diffstat (limited to 'dts/src/arm64/qcom/sdm660.dtsi')
| -rw-r--r-- | dts/src/arm64/qcom/sdm660.dtsi | 49 |
1 files changed, 27 insertions, 22 deletions
diff --git a/dts/src/arm64/qcom/sdm660.dtsi b/dts/src/arm64/qcom/sdm660.dtsi index 1d748c5305..f89b27c99f 100644 --- a/dts/src/arm64/qcom/sdm660.dtsi +++ b/dts/src/arm64/qcom/sdm660.dtsi @@ -14,7 +14,7 @@ operating-points-v2 = <&gpu_sdm660_opp_table>; gpu_sdm660_opp_table: opp-table { - compatible = "operating-points-v2"; + compatible = "operating-points-v2"; /* * 775MHz is only available on the highest speed bin @@ -37,35 +37,35 @@ opp-hz = /bits/ 64 <700000000>; opp-level = <RPM_SMD_LEVEL_TURBO>; opp-peak-kBps = <5184000>; - opp-supported-hw = <0xFF>; + opp-supported-hw = <0xff>; }; opp-647000000 { opp-hz = /bits/ 64 <647000000>; opp-level = <RPM_SMD_LEVEL_NOM_PLUS>; opp-peak-kBps = <4068000>; - opp-supported-hw = <0xFF>; + opp-supported-hw = <0xff>; }; opp-588000000 { opp-hz = /bits/ 64 <588000000>; opp-level = <RPM_SMD_LEVEL_NOM>; opp-peak-kBps = <3072000>; - opp-supported-hw = <0xFF>; + opp-supported-hw = <0xff>; }; opp-465000000 { opp-hz = /bits/ 64 <465000000>; opp-level = <RPM_SMD_LEVEL_SVS_PLUS>; opp-peak-kBps = <2724000>; - opp-supported-hw = <0xFF>; + opp-supported-hw = <0xff>; }; opp-370000000 { opp-hz = /bits/ 64 <370000000>; opp-level = <RPM_SMD_LEVEL_SVS>; opp-peak-kBps = <2188000>; - opp-supported-hw = <0xFF>; + opp-supported-hw = <0xff>; }; */ @@ -73,14 +73,14 @@ opp-hz = /bits/ 64 <266000000>; opp-level = <RPM_SMD_LEVEL_LOW_SVS>; opp-peak-kBps = <1648000>; - opp-supported-hw = <0xFF>; + opp-supported-hw = <0xff>; }; opp-160000000 { opp-hz = /bits/ 64 <160000000>; opp-level = <RPM_SMD_LEVEL_MIN_SVS>; opp-peak-kBps = <1200000>; - opp-supported-hw = <0xFF>; + opp-supported-hw = <0xff>; }; }; }; @@ -142,19 +142,22 @@ }; &mdp { + compatible = "qcom,sdm660-mdp5", "qcom,mdp5"; + ports { port@1 { reg = <1>; mdp5_intf2_out: endpoint { - remote-endpoint = <&dsi1_in>; + remote-endpoint = <&mdss_dsi1_in>; }; }; }; }; &mdss { - dsi1: dsi@c996000 { - compatible = "qcom,mdss-dsi-ctrl"; + mdss_dsi1: dsi@c996000 { + compatible = "qcom,sdm660-dsi-ctrl", + "qcom,mdss-dsi-ctrl"; reg = <0x0c996000 0x400>; reg-names = "dsi_ctrl"; @@ -167,8 +170,8 @@ assigned-clocks = <&mmcc BYTE1_CLK_SRC>, <&mmcc PCLK1_CLK_SRC>; - assigned-clock-parents = <&dsi1_phy 0>, - <&dsi1_phy 1>; + assigned-clock-parents = <&mdss_dsi1_phy 0>, + <&mdss_dsi1_phy 1>; clocks = <&mmcc MDSS_MDP_CLK>, <&mmcc MDSS_BYTE1_CLK>, @@ -189,8 +192,9 @@ "pixel", "core"; - phys = <&dsi1_phy>; - phy-names = "dsi"; + phys = <&mdss_dsi1_phy>; + + status = "disabled"; ports { #address-cells = <1>; @@ -198,20 +202,20 @@ port@0 { reg = <0>; - dsi1_in: endpoint { + mdss_dsi1_in: endpoint { remote-endpoint = <&mdp5_intf2_out>; }; }; port@1 { reg = <1>; - dsi1_out: endpoint { + mdss_dsi1_out: endpoint { }; }; }; }; - dsi1_phy: dsi-phy@c996400 { + mdss_dsi1_phy: phy@c996400 { compatible = "qcom,dsi-phy-14nm-660"; reg = <0x0c996400 0x100>, <0x0c996500 0x300>, @@ -225,6 +229,7 @@ clocks = <&mmcc MDSS_AHB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>; clock-names = "iface", "ref"; + status = "disabled"; }; }; @@ -234,10 +239,10 @@ <&sleep_clk>, <&gcc GCC_MMSS_GPLL0_CLK>, <&gcc GCC_MMSS_GPLL0_DIV_CLK>, - <&dsi0_phy 1>, - <&dsi0_phy 0>, - <&dsi1_phy 1>, - <&dsi1_phy 0>, + <&mdss_dsi0_phy 1>, + <&mdss_dsi0_phy 0>, + <&mdss_dsi1_phy 1>, + <&mdss_dsi1_phy 0>, <0>, <0>; }; |