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Diffstat (limited to 'dts/src/arm64/qcom/sdm845-db845c.dts')
-rw-r--r--dts/src/arm64/qcom/sdm845-db845c.dts16
1 files changed, 4 insertions, 12 deletions
diff --git a/dts/src/arm64/qcom/sdm845-db845c.dts b/dts/src/arm64/qcom/sdm845-db845c.dts
index c6e2c571b4..132417e2d1 100644
--- a/dts/src/arm64/qcom/sdm845-db845c.dts
+++ b/dts/src/arm64/qcom/sdm845-db845c.dts
@@ -522,7 +522,7 @@
&pcie0 {
status = "okay";
- perst-gpio = <&tlmm 35 GPIO_ACTIVE_LOW>;
+ perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>;
vddpe-3v3-supply = <&pcie0_3p3v_dual>;
@@ -540,7 +540,7 @@
&pcie1 {
status = "okay";
- perst-gpio = <&tlmm 102 GPIO_ACTIVE_LOW>;
+ perst-gpios = <&tlmm 102 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pcie1_default_state>;
@@ -1081,7 +1081,7 @@
pinctrl-names = "default";
clock-names = "extclk";
clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
- reset-gpios = <&tlmm 64 0>;
+ reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
vdd-buck-supply = <&vreg_s4a_1p8>;
vdd-buck-sido-supply = <&vreg_s4a_1p8>;
vdd-tx-supply = <&vreg_s4a_1p8>;
@@ -1214,8 +1214,6 @@
reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&cam0_default>;
- gpios = <&tlmm 13 0>,
- <&tlmm 9 GPIO_ACTIVE_LOW>;
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "xvclk";
@@ -1228,8 +1226,6 @@
* both have to be enabled through the power management
* gpios.
*/
- power-domains = <&clock_camcc TITAN_TOP_GDSC>;
-
dovdd-supply = <&vreg_lvs1a_1p8>;
avdd-supply = <&cam0_avdd_2v8>;
dvdd-supply = <&cam0_dvdd_1v2>;
@@ -1255,11 +1251,9 @@
reg = <0x60>;
// CAM3_RST_N
- enable-gpios = <&tlmm 21 0>;
+ enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&cam3_default>;
- gpios = <&tlmm 16 0>,
- <&tlmm 21 0>;
clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
clock-names = "xclk";
@@ -1273,8 +1267,6 @@
*
* No 1.2V vddd-supply regulator is used.
*/
- power-domains = <&clock_camcc TITAN_TOP_GDSC>;
-
vdddo-supply = <&vreg_lvs1a_1p8>;
vdda-supply = <&cam3_avdd_2v8>;