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-rw-r--r--dts/src/arm64/renesas/salvator-common.dtsi133
1 files changed, 94 insertions, 39 deletions
diff --git a/dts/src/arm64/renesas/salvator-common.dtsi b/dts/src/arm64/renesas/salvator-common.dtsi
index eb1f3b8230..1eb4883b32 100644
--- a/dts/src/arm64/renesas/salvator-common.dtsi
+++ b/dts/src/arm64/renesas/salvator-common.dtsi
@@ -33,6 +33,14 @@
/ {
aliases {
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ i2c4 = &i2c4;
+ i2c5 = &i2c5;
+ i2c6 = &i2c6;
+ i2c7 = &i2c_dvfs;
serial0 = &scif2;
serial1 = &hscif1;
ethernet0 = &avb;
@@ -97,6 +105,7 @@
port {
hdmi0_con: endpoint {
+ remote-endpoint = <&rcar_dw_hdmi0_out>;
};
};
};
@@ -169,7 +178,7 @@
};
};
- reg_1p8v: regulator0 {
+ reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
@@ -178,7 +187,7 @@
regulator-always-on;
};
- reg_3p3v: regulator1 {
+ reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
@@ -187,7 +196,7 @@
regulator-always-on;
};
- reg_12v: regulator2 {
+ reg_12v: regulator-12v {
compatible = "regulator-fixed";
regulator-name = "fixed-12V";
regulator-min-microvolt = <12000000>;
@@ -340,6 +349,8 @@
status = "okay";
phy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-id0022.1622",
+ "ethernet-phy-ieee802.3-c22";
rxc-skew-ps = <1500>;
reg = <0>;
interrupt-parent = <&gpio2>;
@@ -383,7 +394,7 @@
ports {
port@0 {
- endpoint {
+ du_out_rgb: endpoint {
remote-endpoint = <&adv7123_in>;
};
};
@@ -422,10 +433,6 @@
};
};
-&hdmi0_con {
- remote-endpoint = <&rcar_dw_hdmi0_out>;
-};
-
#ifdef SOC_HAS_HDMI1
&hdmi1 {
status = "okay";
@@ -524,47 +531,49 @@
reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater",
"infoframe", "cbus", "cec", "sdp", "txa", "txb" ;
- #address-cells = <1>;
- #size-cells = <0>;
-
interrupt-parent = <&gpio6>;
interrupt-names = "intrq1", "intrq2";
interrupts = <30 IRQ_TYPE_LEVEL_LOW>,
<31 IRQ_TYPE_LEVEL_LOW>;
- port@7 {
- reg = <7>;
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
- adv7482_ain7: endpoint {
- remote-endpoint = <&cvbs_con>;
+ port@7 {
+ reg = <7>;
+
+ adv7482_ain7: endpoint {
+ remote-endpoint = <&cvbs_con>;
+ };
};
- };
- port@8 {
- reg = <8>;
+ port@8 {
+ reg = <8>;
- adv7482_hdmi: endpoint {
- remote-endpoint = <&hdmi_in_con>;
+ adv7482_hdmi: endpoint {
+ remote-endpoint = <&hdmi_in_con>;
+ };
};
- };
- port@a {
- reg = <10>;
+ port@a {
+ reg = <10>;
- adv7482_txa: endpoint {
- clock-lanes = <0>;
- data-lanes = <1 2 3 4>;
- remote-endpoint = <&csi40_in>;
+ adv7482_txa: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ remote-endpoint = <&csi40_in>;
+ };
};
- };
- port@b {
- reg = <11>;
+ port@b {
+ reg = <11>;
- adv7482_txb: endpoint {
- clock-lanes = <0>;
- data-lanes = <1>;
- remote-endpoint = <&csi20_in>;
+ adv7482_txb: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1>;
+ remote-endpoint = <&csi20_in>;
+ };
};
};
};
@@ -790,9 +799,6 @@
pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
pinctrl-names = "default";
- /* Single DAI */
- #sound-dai-cells = <0>;
-
/* audio_clkout0/1/2/3 */
#clock-cells = <1>;
clock-frequency = <12288000 11289600>;
@@ -816,7 +822,7 @@
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
<&audio_clk_a>, <&cs2000>,
<&audio_clk_c>,
- <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
+ <&cpg CPG_MOD 922>;
ports {
#address-cells = <1>;
@@ -831,7 +837,7 @@
frame-master = <&rsnd_endpoint0>;
playback = <&ssi0>, <&src0>, <&dvc0>;
- capture = <&ssi1>, <&src1>, <&dvc1>;
+ capture = <&ssi1>, <&src1>, <&dvc1>;
};
};
@@ -865,6 +871,55 @@
};
};
+&rpc {
+ /* Left disabled. To be enabled by firmware when unlocked. */
+
+ flash@0 {
+ compatible = "cypress,hyperflash", "cfi-flash";
+ reg = <0>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ bootparam@0 {
+ reg = <0x00000000 0x040000>;
+ read-only;
+ };
+ bl2@40000 {
+ reg = <0x00040000 0x140000>;
+ read-only;
+ };
+ cert_header_sa6@180000 {
+ reg = <0x00180000 0x040000>;
+ read-only;
+ };
+ bl31@1c0000 {
+ reg = <0x001c0000 0x040000>;
+ read-only;
+ };
+ tee@200000 {
+ reg = <0x00200000 0x440000>;
+ read-only;
+ };
+ uboot@640000 {
+ reg = <0x00640000 0x100000>;
+ read-only;
+ };
+ dtb@740000 {
+ reg = <0x00740000 0x080000>;
+ };
+ kernel@7c0000 {
+ reg = <0x007c0000 0x1400000>;
+ };
+ user@1bc0000 {
+ reg = <0x01bc0000 0x2440000>;
+ };
+ };
+ };
+};
+
&rwdt {
timeout-sec = <60>;
status = "okay";