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Diffstat (limited to 'dts/src/arm64/rockchip/rk3328.dtsi')
-rw-r--r--dts/src/arm64/rockchip/rk3328.dtsi28
1 files changed, 22 insertions, 6 deletions
diff --git a/dts/src/arm64/rockchip/rk3328.dtsi b/dts/src/arm64/rockchip/rk3328.dtsi
index 063ed0adbe..3ed69ecbcf 100644
--- a/dts/src/arm64/rockchip/rk3328.dtsi
+++ b/dts/src/arm64/rockchip/rk3328.dtsi
@@ -27,9 +27,6 @@
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
- mmc0 = &sdmmc;
- mmc1 = &sdio;
- mmc2 = &emmc;
ethernet0 = &gmac2io;
ethernet1 = &gmac2phy;
};
@@ -438,7 +435,7 @@
};
wdt: watchdog@ff1a0000 {
- compatible = "snps,dw-wdt";
+ compatible = "rockchip,rk3328-wdt", "snps,dw-wdt";
reg = <0x0 0xff1a0000 0x0 0x100>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_WDT>;
@@ -919,8 +916,8 @@
"mac_clk_tx", "clk_mac_ref",
"aclk_mac", "pclk_mac",
"clk_macphy";
- resets = <&cru SRST_GMAC2PHY_A>, <&cru SRST_MACPHY>;
- reset-names = "stmmaceth", "mac-phy";
+ resets = <&cru SRST_GMAC2PHY_A>;
+ reset-names = "stmmaceth";
phy-mode = "rmii";
phy-handle = <&phy>;
snps,txpbl = <0x4>;
@@ -980,6 +977,25 @@
status = "disabled";
};
+ usbdrd3: usb@ff600000 {
+ compatible = "rockchip,rk3328-dwc3", "snps,dwc3";
+ reg = <0x0 0xff600000 0x0 0x100000>;
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>,
+ <&cru ACLK_USB3OTG>;
+ clock-names = "ref_clk", "suspend_clk",
+ "bus_clk";
+ dr_mode = "otg";
+ phy_type = "utmi_wide";
+ snps,dis-del-phy-power-chg-quirk;
+ snps,dis_enblslpm_quirk;
+ snps,dis-tx-ipgap-linecheck-quirk;
+ snps,dis-u2-freeclk-exists-quirk;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+ status = "disabled";
+ };
+
gic: interrupt-controller@ff811000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;