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Diffstat (limited to 'dts/src/arm64/xilinx/zynqmp-zc1232-revA.dts')
-rw-r--r--dts/src/arm64/xilinx/zynqmp-zc1232-revA.dts4
1 files changed, 2 insertions, 2 deletions
diff --git a/dts/src/arm64/xilinx/zynqmp-zc1232-revA.dts b/dts/src/arm64/xilinx/zynqmp-zc1232-revA.dts
index f1598527e5..04079d1704 100644
--- a/dts/src/arm64/xilinx/zynqmp-zc1232-revA.dts
+++ b/dts/src/arm64/xilinx/zynqmp-zc1232-revA.dts
@@ -4,7 +4,7 @@
*
* (C) Copyright 2017 - 2021, Xilinx, Inc.
*
- * Michal Simek <michal.simek@xilinx.com>
+ * Michal Simek <michal.simek@amd.com>
*/
/dts-v1/;
@@ -44,7 +44,7 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
- spi-tx-bus-width = <1>;
+ spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-max-frequency = <108000000>; /* Based on DC1 spec */
};