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-rw-r--r--dts/src/mips/mscc/jaguar2_pcb110.dts10
-rw-r--r--dts/src/mips/mscc/jaguar2_pcb111.dts10
-rw-r--r--dts/src/mips/mscc/jaguar2_pcb118.dts6
-rw-r--r--dts/src/mips/mscc/ocelot.dtsi4
-rw-r--r--dts/src/mips/mscc/ocelot_pcb120.dts6
-rw-r--r--dts/src/mips/mscc/serval_common.dtsi14
6 files changed, 25 insertions, 25 deletions
diff --git a/dts/src/mips/mscc/jaguar2_pcb110.dts b/dts/src/mips/mscc/jaguar2_pcb110.dts
index d80cd6842b..0ea7bc5b57 100644
--- a/dts/src/mips/mscc/jaguar2_pcb110.dts
+++ b/dts/src/mips/mscc/jaguar2_pcb110.dts
@@ -180,27 +180,27 @@
pins = "GPIO_49";
function = "si";
};
- i2cmux_pins_i: i2cmux-pins-i {
+ i2cmux_pins_i: i2cmux-pins {
pins = "GPIO_17", "GPIO_18", "GPIO_20", "GPIO_21";
function = "twi_scl_m";
output-low;
};
- i2cmux_0: i2cmux-0 {
+ i2cmux_0: i2cmux-0-pins {
pins = "GPIO_17";
function = "twi_scl_m";
output-high;
};
- i2cmux_1: i2cmux-1 {
+ i2cmux_1: i2cmux-1-pins {
pins = "GPIO_18";
function = "twi_scl_m";
output-high;
};
- i2cmux_2: i2cmux-2 {
+ i2cmux_2: i2cmux-2-pins {
pins = "GPIO_20";
function = "twi_scl_m";
output-high;
};
- i2cmux_3: i2cmux-3 {
+ i2cmux_3: i2cmux-3-pins {
pins = "GPIO_21";
function = "twi_scl_m";
output-high;
diff --git a/dts/src/mips/mscc/jaguar2_pcb111.dts b/dts/src/mips/mscc/jaguar2_pcb111.dts
index 813c5e1601..05d8c6a96d 100644
--- a/dts/src/mips/mscc/jaguar2_pcb111.dts
+++ b/dts/src/mips/mscc/jaguar2_pcb111.dts
@@ -79,27 +79,27 @@
};
&gpio {
- i2cmux_pins_i: i2cmux-pins-i {
+ i2cmux_pins_i: i2cmux-pins {
pins = "GPIO_17", "GPIO_18";
function = "twi_scl_m";
output-low;
};
- i2cmux_0: i2cmux-0 {
+ i2cmux_0: i2cmux-0-pins {
pins = "GPIO_17";
function = "twi_scl_m";
output-high;
};
- i2cmux_1: i2cmux-1 {
+ i2cmux_1: i2cmux-1-pins {
pins = "GPIO_18";
function = "twi_scl_m";
output-high;
};
- i2cmux_2: i2cmux-2 {
+ i2cmux_2: i2cmux-2-pins {
pins = "GPIO_20";
function = "twi_scl_m";
output-high;
};
- i2cmux_3: i2cmux-3 {
+ i2cmux_3: i2cmux-3-pins {
pins = "GPIO_21";
function = "twi_scl_m";
output-high;
diff --git a/dts/src/mips/mscc/jaguar2_pcb118.dts b/dts/src/mips/mscc/jaguar2_pcb118.dts
index 27c644f2d1..cf2cf591a2 100644
--- a/dts/src/mips/mscc/jaguar2_pcb118.dts
+++ b/dts/src/mips/mscc/jaguar2_pcb118.dts
@@ -39,17 +39,17 @@
};
&gpio {
- i2cmux_pins_i: i2cmux-pins-i {
+ i2cmux_pins_i: i2cmux-pins {
pins = "GPIO_17", "GPIO_16";
function = "twi_scl_m";
output-low;
};
- i2cmux_0: i2cmux-0 {
+ i2cmux_0: i2cmux-0-pins {
pins = "GPIO_17";
function = "twi_scl_m";
output-high;
};
- i2cmux_1: i2cmux-1 {
+ i2cmux_1: i2cmux-1-pins {
pins = "GPIO_16";
function = "twi_scl_m";
output-high;
diff --git a/dts/src/mips/mscc/ocelot.dtsi b/dts/src/mips/mscc/ocelot.dtsi
index e51db651af..cfc219a72b 100644
--- a/dts/src/mips/mscc/ocelot.dtsi
+++ b/dts/src/mips/mscc/ocelot.dtsi
@@ -225,7 +225,7 @@
function = "uart2";
};
- miim1: miim1 {
+ miim1_pins: miim1-pins {
pins = "GPIO_14", "GPIO_15";
function = "miim";
};
@@ -261,7 +261,7 @@
reg = <0x10700c0 0x24>;
interrupts = <15>;
pinctrl-names = "default";
- pinctrl-0 = <&miim1>;
+ pinctrl-0 = <&miim1_pins>;
status = "disabled";
};
diff --git a/dts/src/mips/mscc/ocelot_pcb120.dts b/dts/src/mips/mscc/ocelot_pcb120.dts
index bd240690cb..d348742c23 100644
--- a/dts/src/mips/mscc/ocelot_pcb120.dts
+++ b/dts/src/mips/mscc/ocelot_pcb120.dts
@@ -22,12 +22,12 @@
};
&gpio {
- phy_int_pins: phy_int_pins {
+ phy_int_pins: phy-int-pins {
pins = "GPIO_4";
function = "gpio";
};
- phy_load_save_pins: phy_load_save_pins {
+ phy_load_save_pins: phy-load-save-pins {
pins = "GPIO_10";
function = "ptp2";
};
@@ -40,7 +40,7 @@
&mdio1 {
status = "okay";
pinctrl-names = "default";
- pinctrl-0 = <&miim1>, <&phy_int_pins>, <&phy_load_save_pins>;
+ pinctrl-0 = <&miim1_pins>, <&phy_int_pins>, <&phy_load_save_pins>;
phy7: ethernet-phy@0 {
reg = <0>;
diff --git a/dts/src/mips/mscc/serval_common.dtsi b/dts/src/mips/mscc/serval_common.dtsi
index 5b404836db..0893de420e 100644
--- a/dts/src/mips/mscc/serval_common.dtsi
+++ b/dts/src/mips/mscc/serval_common.dtsi
@@ -82,38 +82,38 @@
pins = "GPIO_7"; /* No "default" scl for i2c0 */
function = "twi";
};
- i2cmux_pins_i: i2cmux-pins-i {
+ i2cmux_pins_i: i2cmux-pins {
pins = "GPIO_11", "GPIO_12", "GPIO_18", "GPIO_19",
"GPIO_20", "GPIO_21";
function = "twi_scl_m";
output-low;
};
- i2cmux_0: i2cmux-0 {
+ i2cmux_0: i2cmux-0-pins {
pins = "GPIO_11";
function = "twi_scl_m";
output-high;
};
- i2cmux_1: i2cmux-1 {
+ i2cmux_1: i2cmux-1-pins {
pins = "GPIO_12";
function = "twi_scl_m";
output-high;
};
- i2cmux_2: i2cmux-2 {
+ i2cmux_2: i2cmux-2-pins {
pins = "GPIO_18";
function = "twi_scl_m";
output-high;
};
- i2cmux_3: i2cmux-3 {
+ i2cmux_3: i2cmux-3-pins {
pins = "GPIO_19";
function = "twi_scl_m";
output-high;
};
- i2cmux_4: i2cmux-4 {
+ i2cmux_4: i2cmux-4-pins {
pins = "GPIO_20";
function = "twi_scl_m";
output-high;
};
- i2cmux_5: i2cmux-5 {
+ i2cmux_5: i2cmux-5-pins {
pins = "GPIO_21";
function = "twi_scl_m";
output-high;