summaryrefslogtreecommitdiffstats
path: root/arch/arm/boards/reflex-achilles
Commit message (Collapse)AuthorAgeFilesLines
* Merge branch 'for-next/socfpga'Sascha Hauer2019-09-121-0/+26
|\
| * ARM: achilles: add bbu handlerSteffen Trumtrar2019-08-191-0/+26
| | | | | | | | | | Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: Cleanup stack offset cargo cultSascha Hauer2019-09-091-2/+2
|/ | | | | | | | | Most callers of arm_setup_stack substract a fixed offset of 8, 12 or 16 bytes from the stack top. This is unnecessary as on ARM we have a stack that decrements before storing values. Substracting this offset probably goes back to the U-Boot version we forked from. Stop this now. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: images: use piggydataSascha Hauer2018-12-031-8/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | The way we assemble the multi images on ARM is rather complicated and error prone. We currently cat the compressed barebox image behind the PBL executable and need some magic to obtain the size of the payload and also have to do tricks to reliably get a pointer to the compressed image. This patch switches over to compile the compressed payload into the PBL image itself which has proven to work for the single PBL case and for the ARM Linux Kernel aswell. The goal is to unify the single PBL and the multi PBL cases together in the future to get an easier startup path for ARM. This patch has been tested on the i.MX53 QSB, i.MX53 Vincell, Beaglebone black (both MLO and 2nd stage) and a Phytec phyFLEX i.MX6 board. SoCFPGA Arria10 has also be changed slightly with this patch. We used to generate a single image (barebox-socfpga-achilles.img) which was used as xload image and full image. We now instead generate two images: barebox-socfpga-achilles-xload.img and barebox-socfpga-achilles.img, the former loaded by the ROM and the latter loaded by the xload image. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: socfpga: achilles: bitstream will not exceed 32MEnrico Jorns2018-10-021-1/+1
| | | | | | | Thus we decrease offsets to save space Signed-off-by: Enrico Jorns <ejo@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: socfpga: achilles: convert to PBL bareboxSteffen Trumtrar2018-08-083-8/+101
| | | | | | | | | | | | Previously the FPGA was configured externally on the Achilles. On newer versions this is changed and barebox has to configure the FPGA before the SDRAM can be used. If the FPGA is configured via JTAG or from an external memory, the *-bringup version can be used. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: socfpga: achilles: update handoff filesSteffen Trumtrar2018-08-082-9/+9
| | | | | Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: socfpga: arria10-init: split pinsetupSteffen Trumtrar2018-08-081-0/+1
| | | | | | | | | Move the setup of the shared- and fpgapins to its own function. These pins can only be configured and let out of reset after the FPGA has been programmed. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: socfpga: arria10: move debug_ll to common codeSteffen Trumtrar2018-08-081-4/+0
| | | | | | | | Instead of copy+pasting the debug_ll messages to every new board, move them to the respective functions. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: return positive offset in get_runtime_offset()Sascha Hauer2018-03-211-1/+1
| | | | | | | | | | | When we are linked at 0x0 and running at 0x01000000 then get_runtime_offset() should return 0x01000000 and not 0xff000000. This makes get_runtime_offset() more consistent and better understandable. This was tested on a Freescale i.MX53 Quickstart board. Additionally relocate_to_adr() was tested since that is normally not called. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: socfpga: add support for reflex achilles boardSteffen Trumtrar2017-05-044-0/+206
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>