| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | ARM: install HYP vectors at PBL and Barebox entry | Lucas Stach | 2018-11-05 | 1 | -0/+5 |
| * | ARM: safely switch from HYP to SVC mode if required | Lucas Stach | 2018-11-02 | 1 | -3/+15 |
| * | ARM: i.MX6ul: Add SoC specific lowlevel_init function | Sascha Hauer | 2017-10-17 | 1 | -0/+7 |
| * | arm/cpu/lowlevel: fix: possible processor mode change | Alexander Kurz | 2016-03-04 | 1 | -1/+3 |
| * | arm/cpu/lowlevel: Don't save the return address in another register | Uwe Kleine-König | 2014-12-15 | 1 | -2/+1 |
| * | arm/cpu/lowlevel: add and fix comments for CPSR and SCTLR accesses | Uwe Kleine-König | 2014-12-15 | 1 | -5/+7 |
| * | arm/cpu/lowlevel: invalidate i-cache before enabling | Uwe Kleine-König | 2014-12-15 | 1 | -3/+20 |
| * | bugfix: don't rely on lr in arm_cpu_lowlevel_init | 张忠山 | 2014-02-27 | 1 | -1/+2 |
| * | ARM: Create an assembly arm_cpu_lowlevel_init function | Sascha Hauer | 2013-08-07 | 1 | -0/+39 |
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