summaryrefslogtreecommitdiffstats
path: root/arch/arm/include
Commit message (Collapse)AuthorAgeFilesLines
...
* Merge branch 'for-next/ubifs'Sascha Hauer2016-04-082-0/+335
|\
| * ARM: Add atomic.h from u-boot v2016.03Alexander Stein2016-04-082-0/+335
| | | | | | | | | | | | | | | | atomic-long.h: * Replace __UBOOT__ with __BAREBOX__ Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/imx'Sascha Hauer2016-04-082-0/+17
|\ \
| * | L2x0: i.MX6: Replace magic numbers with constantsAndrey Smirnov2016-03-171-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | Use constants instead of magic numbers for PL301 registers bits in imx6_mmu_init() Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: Add errata 845369 workaroundAndrey Smirnov2016-03-171-0/+9
| |/ | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* / ARM: Do not use last 64KiB of address space for bareboxSascha Hauer2016-04-011-1/+1
|/ | | | | | | | The last 64KiB of address space may be used for the vector table at 0xffff0000, so we cannot use it for barebox. The easiest way to archieve this is to never use the last 64KiB of memory. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/pstore'Sascha Hauer2016-01-111-18/+49
|\
| * arm: Add RAMOOPS memory areaMarkus Pargmann2015-12-101-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | RAMOOPS is a driver that uses a reserved static memory region to store the data from the last panic or boot. This helps to debug crashes at the next boot while preserving the boot messages. To guarantee a memory area that is not altered by barebox or the kernel, this area is located at the end of the RAM right after barebox and before the STACK. This ensures that changing barebox sizes do not interfere with RAMOOPS. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * arm: Clarify memory layout calculationMarkus Pargmann2015-12-101-18/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The memory calculations used are all hardcoded into three different files, start-pbl.c, uncompress.c and start.c. To make this more readable and reliable, this patch gathers these information in barebox-arm.h with static inline functions for the calculation of the memory offsets. This patch also adds proper handling of different barebox/board data sizes. Currently only 1MB+Alignment of RAM is reserved for Barebox and board data. This could be too small for bigger devicetrees and barebox. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: asm: Add convenience fucntions to access VBARAndrey Smirnov2016-01-111-0/+20
|/ | | | | | | Add two functions to get/set VBAR register. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/memtest'Sascha Hauer2015-11-061-19/+4
|\
| * rework remap_rangeSascha Hauer2015-11-031-19/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | remap_range is for remapping regions with different cache attributes. It is implemented for ARM and PowerPC only, the other architectures only provide stubs. Currently the new cache attributes are passed in an architecture specific way and the attributes have to be retrieved by calls to mmu_get_pte_cached_flags() and mmu_get_pte_uncached_flags(). Make this simpler by providing architecture independent flags which can be directly passed to remap_range() Also provide a MAP_ARCH_DEFAULT flag and a arch_can_remap() function. The MAP_ARCH_DEFAULT defaults to whatever caching type the architecture has as default. the arch_can_remap() function returns true if the architecture can change the cache attributes, false otherwise. This allows the memtest code to better find out what it has to do. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/imx'Sascha Hauer2015-11-061-0/+9
|\ \
| * | ARM: Allow compressed dtb binariesSascha Hauer2015-10-271-0/+9
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the current multi image build process the DTBs end up uncompressed in the PBL. This can be annoying because the PBL is often very size constrained. This patch allows to put the DTBs in as lzo compressed binary into the PBL. Since lzo offers quite good compression ratios for DTBs no other compression algorithm has been implemented for now. Boards which want to use the compressed DTBs only have to change the __dtb_ prefix in the DTB name to __dtb_z_. Also they should select ARM_USE_COMPRESSED_DTB to make sure barebox supports uncompressing the DTB. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* / ARM: Add support for semihostingAndrey Smirnov2015-10-301-0/+19
|/ | | | | | | | | | Add semihosting API implementation and implement a filesystem driver to access debugging host filesystem using it. Tested on Freescale SabreSD board (i.MX6Q) using OpenOCD Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: add implementation for dma_alloc_writecombine for !CONFIG_MMULucas Stach2015-09-141-0/+5
| | | | | | | | This fixes build failures in builds without MMU support by providing a fallback implementation. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/gpio'Sascha Hauer2015-09-011-10/+0
|\
| * gpio: Drop asm-generic/gpio.hSascha Hauer2015-08-201-10/+0
| | | | | | | | | | | | | | | | | | | | Since we no longer have custom gpio function prototypes we can drop the prototypes from asm-generic/gpio.h can add them to include/gpio.h instead. While at it add static inline dummy wrappers for !CONFIG_GENERIC_GPIO so that code using gpios can compile without gpio support. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: l2x0: Flush cache before disabling itSascha Hauer2015-08-081-0/+1
|/ | | | | | Otherwise entries may still be in the cache and never reach memory. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* exitcall: move arch_shutdown to exitcall infrastructureHerve Codina2015-07-131-2/+0
| | | | | Signed-off-by: Herve Codina <Herve.CODINA@celad.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: add a machine number mechanism for boarddataSascha Hauer2015-07-021-1/+26
| | | | | | | | | | | | | | | Multi machine barebox builds have to pass information on which board we are running on via boarddata. Usually this will be a pointer to a device tree. Some boards might not have a device tree available though because they are either not ported over to device tree yet, or are running in some limited first state environment which does not offer enough space for a device tree. For these cases this patch adds a mechanism to embed a machine number into a struct type along with a magic number. This makes it possible to check for a specific machine later during regular runtime. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: use generic posix_types.hSascha Hauer2015-06-031-78/+1
| | | | | | | Use generic asm-generic/posix_types.h instead of repeating the typedefs. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* introduce bitsperlong.h for remaining architecturesSascha Hauer2015-06-032-1/+2
| | | | | | | | This introduces the bitsperlong.h file for the remaining architectures. It's purpose is to define BITS_PER_LONG which in the next step can be used by a generic posix_types.h file. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* dma: Use generic place for dma_addr_t typedefSascha Hauer2015-05-221-5/+0
| | | | | | | | | Instead of letting all architectures define their own dma_addr_t use a common place in include/linux/types.h and use a Kconfig symbol that architectures can select to define the width of dma_addr_t. The same is done in the Kernel. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/streaming-dma'Sascha Hauer2015-03-093-46/+49
|\ | | | | | | | | Conflicts: drivers/mci/dw_mmc.c
| * ARM: MMU: unexport cache maintenance functionsLucas Stach2015-03-061-14/+0
| | | | | | | | | | | | | | | | Those should only be used internally. All users should rather use the streaming DMA API, which does proper cache maintenance. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: implement streaming DMA opsLucas Stach2015-03-061-0/+10
| | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: move DMA alloc functions to dma.hLucas Stach2015-03-062-27/+24
| | | | | | | | | | | | | | | | | | | | This better separates the DMA from the MMU functionality. Also move all drivers that only depends on asm/mmu.h for the alloc functions over to the common header. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: move virt<->phys translation to io.hLucas Stach2015-03-062-12/+15
| | | | | | | | | | | | | | | | | | | | | | That's the place where Linux has them and other architectures would implement this. This will help in phasing out the direct usage of the ARM asm/mmu.h header. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: change dma_alloc/free_coherent to match other architecturesLucas Stach2015-03-061-5/+12
| | | | | | | | | | | | | | | | | | As a lot drivers currently rely on the 1:1 virt->phys mapping on ARM we define DMA_ADDRESS_BROKEN to mark them. In order to use them on other architectures with a different mapping they need proper fixing. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/misc'Sascha Hauer2015-03-091-0/+4
|\ \ | |/ |/|
| * ARM: Allow to mask data abortsSascha Hauer2015-02-271-0/+4
| | | | | | | | | | | | | | | | | | | | Sometimes it's useful to test if a memory operation works or aborts. This adds data_abort_mask() to ignore data aborts and data_abort_unmask() to enable them again. This is used in the next step for the 'md' command so that illegal addresses just show 'xxxxxxxx' instead of crashing the system. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | arm: virt_to_phys should take a volatile ptrLucas Stach2015-02-251-2/+2
|/ | | | | | | | So users can pass in device memory pointers without provoking warnings. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: include some headers from barebox-arm.hMasahiro Yamada2015-01-141-0/+2
| | | | | | | | | | | | ENTRY_FUNCTION() references __barebox_arm_head(), so <asm/barebox-arm-head.h> should be included from barebox-arm.h to avoid implicit declaration warning/error. ENTRY_FUNCTION() uses __naked, so <linux/compiler.h> should also be included. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/mxs'Sascha Hauer2015-01-092-0/+83
|\
| * ARM: Add get_sp() and get_lr() functionsSascha Hauer2015-01-051-0/+26
| | | | | | | | | | | | In case it's needed for some early code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: Add U-Boot specific io functionsSascha Hauer2015-01-051-0/+57
| | | | | | | | | | | | To make it easier to adopt code from U-Boot. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/misc'Sascha Hauer2015-01-091-1/+3
|\ \
| * | sizes.h: move include/sizes.h to include/linux/sizes.hMasahiro Yamada2015-01-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This file originates in Linux. Linux has it under include/linux/ directory since commit dccd2304cc90. Let's move it to the same place as well in barebox. This commit was generated by the following commands: find -name '*.[chS]' | xargs sed -i -e 's:<sizes.h>:<linux/sizes.h>:' git mv include/sizes.h include/linux/ Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | arm: include relevant headers in barebox-armLucas Stach2014-12-171-0/+2
| |/ | | | | | | | | | | | | Provide the necessary types and defines used in this header. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | arm: system_info fix CPU_IS_ARM1176Jean-Christophe PLAGNIOL-VILLARD2015-01-061-1/+1
| | | | | | | | | | | | | | we need to apply the mask Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: introduce debug_ll_pl011.hAntony Pavlov2015-01-051-0/+25
|/ | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: implement recommended WAR for errata 709718Lucas Stach2014-11-071-0/+12
| | | | | | | | | | | | | ARM Cortex A8 errata 709718: "Load and store operations to shared device memory regions may not complete in program order" We implement the recommended workaround in the bootloader as it must be applied before enabling the MMU for the first time. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arm: add errata workaroundsLucas Stach2014-06-261-0/+67
| | | | | | | | Header only implementation, so they can be pulled into the individual SoC cpu init functions. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: change signature of barebox_arm_entryLucas Stach2014-05-051-2/+2
| | | | | | | | | | | Mostly to make it clear that boarddata needs to be something we can dereference. As this is a pretty invasive change, use the opportunity to make the signature 64bit safe. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* common: Allow for I/O mapped I/OMichel Stam2014-04-081-0/+2
| | | | | | | | Rework the current framework so that I/O mapped I/O resources are also possible. Signed-off-by: Michel Stam <michel@reverze.net> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* import _AC and UL macros from linux kernelAntony Pavlov2014-03-181-0/+7
| | | | | | | | This macros are used in exported from linux TI DaVinci code. Also this macros are used in MIPS cache support code. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: Make ENTRY_FUNCTION more robustSascha Hauer2013-12-101-3/+13
| | | | | | | | | | An entry function should begin with a exception header. For this to work properly the entry function should not contain any code which gcc might put before the header. To make this sure change the ENTRY_FUNCTION macro so that it generates one function which only contains the exception header and a second function which contains the original body of the entry function. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: remove asm/hardware.hSascha Hauer2013-11-081-18/+0
| | | | | | | asm/hardware.h does not have any content except including mach/hardware.h. include mach/hardware.h directly where needed and get rid of asm/hardware.h Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: invalidate caches thoroughlySascha Hauer2013-09-211-10/+0
| | | | | | | | | | | | The data caches should be invalided once during startup. This should also be done when we do not have the MMU enabled in barebox because the Kernel does not invalidate the caches during start. To make this sure this patch enables the arm_early_mmu_cache_invalidate function even if MMU support is disabled. Additionally this patch adds calls to arm_early_mmu_cache_invalidate in start.c and uncompress.c. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-10 21:13:23 +0000