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* Merge branch 'for-next/misc'Sascha Hauer2022-03-141-0/+12
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| * arch: arm: mach-imx: document field return in CSF templateBastian Krause2022-02-281-0/+12
| | | | | | | | | | | | | | | | | | | | Activating the field return configuration returns a locked-down board (nearly) to its open state. In order to burn the FIELD_RETURN fuse, the CSF must contain a specific unlock command with the device's UID. Signed-off-by: Bastian Krause <bst@pengutronix.de> Link: https://lore.barebox.org/20220225100344.4166248-1-bst@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: i.MX6: configure AIPS3 for i.MX6ULL/i.MX6SXAhmad Fatoum2022-03-041-0/+10
|/ | | | | | | | | UltraLiteLite and SoloX both have an AIPS3, which has e.g. RNGB on it. COnfigure that likewise to AIPS1 and AIPS2. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220303144246.3603311-2-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arch: add SPDX-License-Identifier to all headersAhmad Fatoum2022-01-0565-2/+120
| | | | | | | | | Record GPL-2.0-only as license for all files lacking an explicit license statement. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220103120539.1730644-9-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: add SPDX-License-Identifier for DCDAhmad Fatoum2022-01-052-1/+5
| | | | | | | | | | | In absence of a license statement, the default is GPL-2.0-only. Add that to the DCD files. All of // /* */ # are acceptable comment characters in the DSL. If there are nearby comments in the file, the same character is used, otherwise #. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220103120539.1730644-8-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX8MN: adapt early clock supportAhmad Fatoum2021-10-051-0/+1
| | | | | | | | | | | | PBL runs fine when doing the same early clock setup as for the i.MX8MM: i2c communication works, copying to DRAM works, but boot hangs in barebox proper. Vendor patches for U-Boot configure SYS_PLL3 as 600MHz for i.MX8MP and i.MX8MN. barebox i.MX8MP port evidently can do without, but for i.MX8MN, reducing PLL frequency to 600MHz was required to boot. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20211001100949.6891-4-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: add i.MX8MN (Nano) SoC support boilerplateAhmad Fatoum2021-10-058-1/+841
| | | | | | | | | The Nano is basically a downsized mini. Add the necessary bits, so driver and board support can be added. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20211001100949.6891-2-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* imx53: remove unused imx53_add_nandMarco Felsch2021-06-251-27/+0
| | | | | | | | | | | | | The TX53 board was the last user of this function. This board was converted to device tree based boot by commit 971366078893 ("i.MX53/TX53: rework to dts based boot") so we can remove this legacy helper. Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.pengutronix.de/20201021115813.31645-2-m.felsch@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210625072540.32717-2-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: Add missing __iomem annotationSascha Hauer2021-04-131-4/+4
| | | | | | | The lowlevel gpio functions all take a iomem pointer as argument, so add missing __iomem annotation. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: convert early gpio value accessors to static inline functionsSascha Hauer2021-04-131-3/+10
| | | | | | | | imx1_gpio_val() and imx31_gpio_val() lack various braces. Instead of adding all these convert them to static inline functions. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
* ARM: i.MX: implement GPMI NAND xloadSascha Hauer2021-02-011-0/+1
| | | | | | | | | | | | | | | | | | Commit is based on initial Sascha Hauer's work. It implements PBL xload mechanism to load image from GPMI NAND flash. Additional work was done, so that the NAND's size, page size and OOB's size are autodetected and not hardcoded. Detection method follows the same methods as used in NAND driver, meaning NAND ONFI support is probed and if NAND supports ONFI, NAND memory organization is read from ONFI parameter page otherwise "READ ID" is used. Currently only implemented for i.MX6 familly of SoCs. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Primoz Fiser <primoz.fiser@norik.com> Signed-off-by: Andrej Picej <andrej.picej@norik.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* i.MX7: Add CCM definitions for UART3Steffen Trumtrar2021-01-061-0/+4
| | | | | Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.mx8mq: add PAD CTL definesLucas Stach2021-01-061-0/+17
| | | | | | | Allows a more readable pad setup. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX8M: bbu: rename imx8mq_bbu_* functions to imx8m_bbu_*Ahmad Fatoum2020-12-071-9/+9
| | | | | | | | | | | imx_bbu_internal_mmcboot_register_handler already supports the i.MX8MQ, i.MX8MP and i.MX8MM, but the latter two do not have helpers with their SoC as prefix. As it seems like that it will be possible to extend imx_bbu_internal_mmcboot_register_handler for upcoming SoCs in the i.MX8M family as well, rename the function to start with imx8m_. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: add low level gpio helpers for i.MX8MAhmad Fatoum2020-12-071-0/+3
| | | | | | | | | Like many GPIO controllers of times past, the i.MX8M is also compatible with the i.MX31 GPIO controller. Add GPIO helpers for low-level code to use. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: OCOTP: read serial number with correct endiannessRobert Karszniewicz2020-12-071-4/+4
| | | | | | | | | | | | The serial number is stored with the low bytes first, as can be seen in Linux commit 8267ff89b713 ("ARM: imx: Add serial number support for i.MX6/7 SoCs"). The same goes for i.MX8M. Also renamed the macro to the more descriptive name from Linux. Fixes: c4d9463d969b ("i.MX: Introduce imx_ocotp_read_uid()") Signed-off-by: Robert Karszniewicz <r.karszniewicz@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arm: imx: Convert mach headers to SPDXUwe Kleine-König2020-11-0219-272/+51
| | | | | | | | Replace license and copyright boilerplate by SPDX identfiers for files identified as GPL-2.0-only or GPL-2.0-or-later by licensecheck. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* imx: Fix copyright claimUwe Kleine-König2020-11-021-12/+2
| | | | | | | | | | | The file was created by me in commit c0fcf4dde3c9 ("ARM: i.MX7: provide DDR register definitions") and obviously I failed to adapt our copyright template. While at it, convert to SPDX. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: imx: Add Support for Webasto ccbv2Rouven Czerwinski2020-10-142-1/+2
| | | | | | | | | Add support for the Webasto Common Communication Board Version 2. The device tree included with barebox can eventually be replaced with the required barebox changes when the ccbv2 device tree is upstream. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX6UL: add iomux header for i.MX6ULRouven Czerwinski2020-10-091-0/+1064
| | | | | | | Add the iomux definitions for the i.MX6UL, taken from U-Boot v2020.10-rc3. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/imx' into masterSascha Hauer2020-09-253-56/+71
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| * arch: arm: mach-imx: Add habv4 config file for i.MX6ULLMaik Otto2020-09-233-56/+71
| | | | | | | | | | | | | | | | | | The i.MX6ULL has no CAAM engine for Secure Boot on HABv4 (NXP AN4581). For i.MX6ULL the engine Software (SW) must used for the image validation. Signed-off-by: Maik Otto <m.otto@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: imx8m: Make uart setup function name more genericSascha Hauer2020-08-211-1/+1
|/ | | | | | | | So far all i.MX8M variants have the same UART base addresses, so let's be optimistic that it stays like that and rename imx8mq_uart_setup() to imx8m_uart_setup(). Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: imx8m: make debug UART selection available on i.MX8MM/MPLucas Stach2020-08-174-18/+3
| | | | | | | | | i.MX8MM/MN/MP has UARTs in the same place in the MMIO address space as the i.MX8MQ, so make the lowlevel debug a bit more generic across the i.MX8M family. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mci: imx-esdhc-pbl: Add support for IMX7Anees Rehman2020-08-101-0/+1
| | | | | Signed-off-by: Anees Rehman <anees.r3hman@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arm: boards: add initial imx8mp-evk supportOleksij Rempel2020-07-141-0/+3
| | | | | | | | | | This adds support for the NXP i.MX8MP-EVK board. The SDRAM timings are taken from U-Boot-2020.07-rc4, other information how to initialize the board are form U-Boot as well. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mci: imx-esdhc-pbl: Add imx8mp_esdhc_load_image() for i.MX8MPSascha Hauer2020-07-141-0/+1
| | | | | | | | | | | | | | | | | | | The image format of the i.MX8MP is different from i.MX8M, so add its own image loading function for it. Older i.MX SoCs had a IVT Offset (the offset from the start of the image to the actual data) of 1KiB. This was done to leave space for the partition table at the beginning of the device. To support GPT SoCs starting with i.MX8M an additional gap of 32KiB was added, so that the actual image started at offset 33KiB. Now starting with i.MX8MP the now superfluous 1KiB offset was removed do that the actual image now starts at 32KiB. Unfortunately the 1KiB offset is woven into the offsets of the IVT whereas the 32KiB are not, which means that we really have to handle both offsets individually instead of just handling the sum of the offsets. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arm: imx: add initial imx8mp supportOleksij Rempel2020-07-148-3/+1183
| | | | | | | | | | | | This adds base support for the i.MX8MP SoC. Not much to do here as this SoC is quite similar to the i.MX8M. This adds: - Kconfig symbols - bootsource detection - register base address defines - iomux defines Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
* scripts: imx-image: rename image_dcd_offset to image_ivt_offsetSascha Hauer2020-07-141-1/+1
| | | | | | | | | image_dcd_offset is a misnomer, it should really be image_ivt_offset. The DCD (Device Configuration Data) is only one part of the data linked into the IVT (Image Vector Table), but the meaning of the variable is really the latter, not the former. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: enable Master Identifier UnlockRouven Czerwinski2020-06-022-2/+2
| | | | | | | | | | | | | | By default the HAB locks the Master Identifier (MID) to preconfigured values. This is not a problem if Linux is running in the secure world, however when running a secure world operating system such as OP-TEE, the MID configuration should be done by the secure world operating system. This causes no regressions for systems using no secure world operating systems, since no MID value indicates that all normal/secure world entities can access the peripherals supporting the MID. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: boot: interpret reserved boot as forced serialAhmad Fatoum2020-05-121-0/+4
| | | | | | | | | | | | | | | `mw 0x20d8040 0x00000010; mw 0x20d8044 0x10000000; reset` issued on an i.MX6Q forces serial download mode, but there is no indication of that in the sbmr2 register, so barebox reports $bootsource=unknown. Similarly, `mw 0x20d8040 0x00000020; mw 0x20d8044 0x10000000; reset` forces an i.MX6UL into recovery mode after reset. Do as U-Boot does and interpret the (reserved) value in BOOT_CFG1(7, 4) for each SoC as serial download. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: configurable Super Root Key indexRouven Czerwinski2020-05-082-2/+2
| | | | | | | | Allow the configuration of the Super Root Key Index, to let the user select another key if a previous key has been revoked. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* treewide: remove references to CREDITSUwe Kleine-König2020-04-274-12/+0
| | | | | | | | The CREDITS file was removed from barebox in 2015 by commit 6570288f2d97 ("Remove the CREDITS file"). Remove references to it from several files. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/imx'Sascha Hauer2020-03-1818-117/+959
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| * ARM: i.MX8M: Add i.MX8MM supportSascha Hauer2020-02-195-1/+33
| | | | | | | | | | | | This adds support for the i.MX8MM. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX8M: Add TF-A loading support for i.MX8MMSascha Hauer2020-02-191-2/+7
| | | | | | | | | | | | | | Basically the same as for i.MX8MQ, just some function split up needed to account for different base addresses for the TF-A on both SoCs. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX8M: Add DDR controller supportSascha Hauer2020-02-191-66/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the DDR driver for the i.MX8MQ/i.MX8MM. It's taken from U-Boot v2020.04-rc1 with slight modifications for barebox The i.MX8MQ boards in the tree currently use the output of an earlier version of the NXP i.MX8M DDR Tool which doesn't use a controller driver but instead does most stuff in board code. It seems this can coexist with the new driver, only a few helper functions that previously lived in arch/arm/mach-imx/imx8-ddrc.c are now provided by the new driver. Tested on an i.MX8MM EVK Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX8M: Add and use function for early UART clock setupSascha Hauer2020-02-191-0/+1
| | | | | | | | | | | | | | | | The i.MX8M boards all have the same code for setting up the UART clock. Add a common helper for it. In the helper just setup the clocks for all UARTs as it's not worth it to have separate functions for each UART. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX7: Add and use function for early UART clock setupSascha Hauer2020-02-191-0/+12
| | | | | | | | | | | | | | The i.MX7 boards have the same code for setting up the UART clock. Add a common helper function for it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX8M: Add some lowlevel clock functionsSascha Hauer2020-02-191-0/+4
| | | | | | | | | | | | | | | | U-Boot has some lowlevel clock functions which take a clock slice index as argument. Add them for barebox as well to make the code better comparable to U-Boot. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX8M: rename imx8-ccm-regs.h to imx8m-ccm-regs.hSascha Hauer2020-02-191-0/+0
| | | | | | | | | | | | | | i.MX8 is something different than the i.MX8M and both will not share this header file, so rename it to imx8m-ccm-regs.h Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * Add some CCM defines for i.MX8MSascha Hauer2020-02-191-2/+23
| | | | | | | | | | | | | | This adds some clock slice indices and CCGR defines needed for the lowlevel i.MX8M code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX: Add SoC namespace to imx7/8m CCM definesSascha Hauer2020-02-192-14/+44
| | | | | | | | | | | | | | | | | | The CCM defines used on i.MX7 and i.MX8M do not have any SoC namespace. Add it to make clear where they are supposed to be used. Since it looks confusing to call i.MX7 specific defines on i.MX8M and vice versa, duplicate them for both SoCs. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX8M: rename functions to be i.MX8M specificSascha Hauer2020-02-191-1/+1
| | | | | | | | | | | | | | imx8_esdhc_load_image() and friends can't be used on the big variants of the i.MX8, so rename to imx8m_esdhc_load_image() Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX8M: rename i.MX8M specific functionSascha Hauer2020-02-191-2/+2
| | | | | | | | | | | | | | The big i.MX8 variants have completely other UARTs than the i.MX8M variants, so rename imx8_uart_setup_ll() to imx8m_uart_setup_ll(). Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX8M: rename imx8_* bootsource functions to imx8mq_*Sascha Hauer2020-02-191-2/+2
| | | | | | | | | | | | | | Those will differ between i.MX8MQ and i.MX8MM, so give them the appropriate prefix before introducing i.MX8MM support. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX8M: Add imx8mm-regs.hSascha Hauer2020-02-191-0/+46
| | | | | | | | | | | | Add various base addresses for the i.MX8MM. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX8M: Add iomux header for i.MX8MMSascha Hauer2020-02-191-0/+701
| | | | | | | | | | | | | | This adds the iomux definitions for the i.MX8MM, taken from U-Boot 2020-rc1. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX: Drop iomux argument from mx7_setup_pad()Sascha Hauer2020-02-191-1/+3
| | | | | | | | | | | | | | | | | | The name mx7_setup_pad already implies the SoC where it runs on, so we do not have to pass the iomux base address but can hardcode it in the function. While at it rename it to imx7_setup_pad() which is more consistent to other i.MX specific functions. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX8M: add and use imx8mq_setup_pad()Sascha Hauer2020-02-191-0/+8
| | | | | | | | | | | | | | | | | | | | We already have a mx8_setup_pad() function for early iomux setup, but it is unused. Add a i.MX8MQ specific wrapper for the function which passes the correct base address to mx8_setup_pad(). Let the boards use this function. While at it rename mx8_setup_pad() to imx8_setup_pad() which is more consistent to other i.MX specific functions. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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