| Commit message (Collapse) | Author | Age | Files | Lines |
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Correct the environment path for sama5d4 xplained board.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The configs grew too big to support both NAND and MMC at the
same time, so split them.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This patch imports the sequencer code from uboot using the new script
scripts/socfpga_get_sequencer.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Use the new socfpga_mem_calibration function. This is a sideeffect of
the new script to import generated sequencer code. The return value of
the function is 1 if the calibration succeeds, 0 otherwise.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Altera's U-Boot tree has following commit
FogBugz #159721: Enhance Arria V MPU clock to 1050MHz
It writes to the two undocumented registers
CLKMGR_ALTERAGRP_MPUCLK
and
CLKMGR_ALTERAGRP_MAINCLK
to setup the SoC for higher clocks.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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From Altera U-Boot:
FogBugz #210587: Fixing PLL HW configuration issue
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Here is checkpatch.pl log:
WARNING: space prohibited between function name and open parenthesis '('
#134: FILE: arch/arm/mach-bcm2835/core.c:75:
+void __noreturn reset_cpu (unsigned long addr)
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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increase the mbox timeout as it take more time to retreive the mac
fix led register too
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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this will allow to handle IP power automatically and not at board level
Mainline kernel need this as they do not have the regulator driver support
as some IP such as USB are not power on at boot
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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as the name is very long, return ps1 to the next line
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add support for the Intel XScale PXA255 development system platform.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add support for the PXA25X SoC family, the oldest of the PXA serie.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add the first pxa3xx board, zylonite. Zylonite is the Marvell System
Development Platform.
Several version are available, based on either :
- PXA300
- PXA310
- PXA320
This version was only tested on a PXA310 based board, and uses :
- the ethernet controller
- the nand controller
These drivers seem to be common to all zylonite boards.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add the pxa3xx architecture, for pxa300, pxa310 and pxa320 SoCs.
This includes :
- the registers
- the cpu type
- the reset source handling
- a minimal set of clocks
- pin control definitions
In this last case, the big mfp-pxaxxx.h files were dropped, forcing
board developers to use MFP_LPM_* macros cunningly.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Move reset_source detection and poweroff to pxa2xx.c, to prepare the
incoming pxa3xx reset_source detection.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Instead of introducing new functions each time a new power supply
situation is to be added, this patch adds parameters to mx28_power_init.
Right now there are three parameters:
- has_battery - true when this board has a battery.
- use_battery_input - true when this board is supplied from the
battery input, but has a DC source instead of a real battery
- use_5v_input - true when this board can use the 5V input
The third one is introduced with this patch and allow to boot a board from 5v
(USB) source only. The main necessary change this needs is that the DC-DC
converter must always be sourced from DCDC_4P2 (DROPOUT_CTRL field of
HW_POWER_DCDC4P2)
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add the device tree compatible strings.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The ocotp device is completely SoC internal, no need to register
it from boards. Register it from SoC code instead.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This turns the MXS gpio support into a driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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When a device tree is present the SoC internal devices come from
it, so do not register them as platform devices.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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mxs_power_init_4p2_params and mxs_power_init_4p2_regulator are used
only once, so inline the code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The brownout setting can be at maximum 7*25mV below the voltage
setting of the regulator. Set it to the minimum Voltage which is
1325mV.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This switches the imx28evk to new environment and updates the
defconfig file for tons of new features.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This switches the imx28evk to multiimage support and adds the
lowlevel initialization to make the bootlets unnecessary.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The relocated_to_adr does not clear the .bss section.
It is done by the setup_c routine.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The definition of "comma" exists in scripts/Kbuild.include.
We should not double it.
Note:
This was already fixed in Linux Kernel too.
See commit 226422d08c33 of Linux Kernel.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The parameters ECC Strength, BadBlockMarkerByte and BadBlockMarkerStartBit in
the FCB structure depends on the nand chip's pagesize and oobsize. Instead of
hardcoding these values into the imx6 bbu handler calculate these values on the
fly. Therefore we export the necessary functions from the nand_mxs driver to
use them in the bbu handler.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add partitions oftree and kernel on SPI NOR and increase size of barebox and
barebox-environment partition.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The i.MX6 NAND update handler sets all bytes of OOB data to 0x00 in pages that
contain the FCB structure currently. So the first and second byte which is
used as the manufacturers bad block marker is in the 'bad block' state. A scan
for factory bad blocks will detect these blocks as bad while they are still ok.
The barebox issues a scan for factory bad blocks to rebuild the bad block table
if the NAND is brand new or the last four blocks of flash are erased.
To fix this problem set the first two bytes of OOB data to 0xFF explicitly.
There is a potential chance that the bbu handler will mark a real bad block as
factory good. That's not a problem for the ROM Loader, because the FCB is
protected by a checksum and the hamming_13_8 encoding. Additionally the current
implementation of the bbu handler does not check the bad block table or the
factory bad block marker before writing the FCB at the first page of the first
and second block.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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NAND chip used on phyFLEX-i.MX6 with 4GB NAND (MT29F32G08AFACAWP) has
512k eraseblock size.
Align NAND partitions by 512k to fix erase fails.
Also increase barebox-environment and oftree partitions to be two
eraseblocks. This will ensure safety in case of bad block.
Signed-off-by: Dmitry Lavnikevich <d.lavnikevich@sam-solutions.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add support phyFLEX-i.MX6 SOM with 1GB on one ram bank
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Andrey Panov <rockford@yandex.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add code so that when booting from different SDHCI controllers barebox
would correctly set up where to look for bootloader environment.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add code to explicitly check for success of of_device_enable_path()
when selecting which media is expected to contain barebox environment.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Separate SoM(designator PFLA02) specific and base board(designator
PBAB0x) code into two distinct functions. PHYTEC default environment
for PHYFLEX references peripherals that may or may not be used on
custom baseboards used with SoMs. Move the code appending it into a
separate function that would have effect only for boards explicitly
claiming compatibility with PHYTEC baseboards.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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