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* ARM: qemu: support for state & env via DT overlayRouven Czerwinski2021-01-186-0/+135
| | | | | | | | | | | | | | | | Add support for state and barebox environment by applying an overlay on top of the qemu generated device tree. If qemu is used with a persistent flash partition, this allows usage of environments and state across qemu reboots. Simple testing can be performed by starting with qemu-system-arm -m 256M -M virt -kernel images/barebox-dt-2nd.img -nographic Storing data, changing into the qemu console via Ctrl-A Ctrl-C, issuing 'system_reset' and Ctrl-A Ctrl-C to get back into the barebox console. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: at91: at91sam9x5: fix co-existance of erratum-aware and generic resetAhmad Fatoum2021-01-051-2/+9
| | | | | | | | | | | | | | | | | | | | We have a generic at91sam9 reset driver, but it's unaware of the erratum on the at91sam9x5, which can prevent reboot from NAND due to interference from SDRAM. The workaround is packing the powering down of the DDR and the system reset into a single cache line and executing that. This would be a bit tedious to add into the device tree probed driver, thus: - Don't activate the work around if we are device-tree enabled, but have a newer SoC - Give the workaround a slightly higher priority, so it's taken instead of the generic DT driver This fixes an issue of failing reset with the at91_multi_defconfig, because both reset drivers have the same priority of 100. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/spdx'Sascha Hauer2020-12-1118-170/+64
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| * arm/lib: Replace license and copyright boilerplate by SPDX identifiersUwe Kleine-König2020-12-0717-169/+63
| | | | | | | | | | | | | | | | | | Converts the files that licensecheck can determine to be licensed under GPL-2.0-only or GPL-2.0-or-later and also convert the copyright statements to SPDX. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: at91: sama5d2: giantboard: fix typo in SPDX-License-IdentifierAhmad Fatoum2020-11-271-1/+1
| | | | | | | | | | | | | | s/Identifer/Identifier/ Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/rpi'Sascha Hauer2020-12-1110-64/+84
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| * | ARM: rpi: add new rpi boot targetAhmad Fatoum2020-12-103-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For drop-in placement of barebox into the boot chain, it's useful to have a target to boot the kernel like the VideoCore would have booted the kernel if barebox hadn't been started instead. This commit is based on the information here: https://www.tablix.org/~avian/blog/archives/2019/03/booting_raspbian_from_barebox/ Cc: Tomaz Solc <tomaz.solc@tablix.org> Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: rpi: fix model description stringAhmad Fatoum2020-12-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | s/Model/Nodel/ as well as drop the space the other ones (e.g. Model 2B) lack. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: rpi: drop no longer needed environmentAhmad Fatoum2020-12-102-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The barebox PL011 driver automatically arranges for the kernel to be called with the appropriate console argument (placed in ${global.linux.bootargs.console}. There is thus no need to hard code a TTY. Indeed we shouldn't because some Raspberry Pis don't use the PL011, but the mini-uart, which is a ttyS. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: rpi: Add Raspberry Pi Zero W mini-uart supportAhmad Fatoum2020-12-101-1/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unlike the Raspberry Pi 1 and Raspberry Pi Zero, the Raspberry Pi Zero W has its console pins on the header connected to the mini-uart, not the PL011. The secondary PL011 UART is connected to the bluetooth module. Set the mini-uart as default console and disable the PL011. That way we can use the Raspberry Pi 1 image for the Zero W as well. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: rpi: add new init function for Raspberry Pi ZeroAhmad Fatoum2020-12-072-2/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Raspberry Pi Zero and Zero W have no power LED and lack the USB hub and ethernet port. The rpi_b_plus_init is thus the wrong init function to use. Add a new init function that just configures the activity LED and configure the new exposed USB port for OTG. While we have a dwc2 gadget driver, it doesn't yet work for the Rpi: barebox@RaspberryPi Zero W:/ usbgadget -a udc0: registering UDC driver [g_multi] multi_bind: creating ACM function g_multi usbgadget: Multifunction Composite Gadget g_multi usbgadget: g_multi ready dwc2 20980000.usb@7e980000.of: bound driver g_multi WARNING: at drivers/usb/dwc2/gadget.c:1896/dwc2_gadget_pullup()! But let's add dr_mode = otg anyway, so it can be debugged out of the box with only config changes. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: rpi: support raspberry pi 1 and zero mini-uartAhmad Fatoum2020-12-072-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't have a clock driver for the raspberry pi, so board code needs to list which used devices have clocks that are already known to be active on boot. The Mini UART is one such device. We already wave away the clock on the BCM2836, do the same for the BCM2835 as well. Cc: Roland Hieber <rhi@pengutronix.de> Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: rpi: move rpi_model_init() to postcoreAhmad Fatoum2020-12-071-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | rpi_model_init() was so far run at late initcall level, at which time most drivers have already been probed and it's too late to modify the built-in device tree and see the changes take effect. To use the same barebox image for multiple boards, it would be nice to be able to fix up the device tree a bit. Facilitate this by moving rpi_model_init() to postcore. This is ok to do because eth_register_ethaddr() can be called prior to Ethernet driver probe as well. This was tested on a Raspberry Pi 3B. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: rpi: make functions in rpi-common.c staticAhmad Fatoum2020-12-072-30/+16
| | | | | | | | | | | | | | | | | | | | | | | | They aren't (and arguably shouldn't) be used outside, so give them all internal linkage and drop the header. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: dts: rpi: drop unnecessary /chosen/stdout-path overridesAhmad Fatoum2020-12-073-18/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The upstream device trees reference the stdout-path via alias. barebox overrides them with a path to the node, but the effect is the same as both barebox and the kernel accept both for the property's value. No functional change: serial0 serial1 upstream stdout-path Rpi1 &uart0 &uart1 serial0 Rpi2 &uart0 &uart1 serial0 Rpi3 &uart0 &uart1 serial1 Tested on a Raspberry Pi 3B. Cc: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | Revert "ARM: dts: bcm2835-rpi: re-enable booting from SD card"Ahmad Fatoum2020-12-071-8/+0
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | Since d6d3d0aecece ("mci: add driver for BCM283x sdhost core"), we now have driver support for the sdhost controller in barebox as well. We can thus drop the device tree override and use the same MCI the kernel uses. This was tested on a Raspberry Pi zero W, which has the same bcm2835 SoC as the Raspberry Pi 1. This reverts commit abc0447440d68af720127fcca3c17f04ee144fcc. Cc: Roland Hieber <rhi@pengutronix.de> Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/misc'Sascha Hauer2020-12-111-0/+2
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| * | ARM: vexpress: enable virt and vexpress boardsRouven Czerwinski2020-11-241-0/+2
| |/ | | | | | | | | | | | | | | | | The recent cleanup of the vexpress arch moved to a multi board configuration, however did not adjust the defconfig to build the virt and vexpress boards. Build both in the defconfig. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/imx'Sascha Hauer2020-12-1111-64/+82
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| * | ARM: i.MX8M: bbu: rename imx8mq_bbu_* functions to imx8m_bbu_*Ahmad Fatoum2020-12-077-31/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | imx_bbu_internal_mmcboot_register_handler already supports the i.MX8MQ, i.MX8MP and i.MX8MM, but the latter two do not have helpers with their SoC as prefix. As it seems like that it will be possible to extend imx_bbu_internal_mmcboot_register_handler for upcoming SoCs in the i.MX8M family as well, rename the function to start with imx8m_. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX: add low level gpio helpers for i.MX8MAhmad Fatoum2020-12-071-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Like many GPIO controllers of times past, the i.MX8M is also compatible with the i.MX31 GPIO controller. Add GPIO helpers for low-level code to use. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM i.MX6Q: fix network configuration for Protonic PRTI6G boardOleksij Rempel2020-12-071-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | By default the iMX6UL is configured to output clock on the ENET1_TX_CLK pin. Since on the Protonic PRTI6G board the PHY is actual refclock provider, we should change the clock source to the external clock. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX: OCOTP: read serial number with correct endiannessRobert Karszniewicz2020-12-071-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The serial number is stored with the low bytes first, as can be seen in Linux commit 8267ff89b713 ("ARM: imx: Add serial number support for i.MX6/7 SoCs"). The same goes for i.MX8M. Also renamed the macro to the more descriptive name from Linux. Fixes: c4d9463d969b ("i.MX: Introduce imx_ocotp_read_uid()") Signed-off-by: Robert Karszniewicz <r.karszniewicz@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: dts: imx6qdl: pfla02: Fix NAND offsets for partitionsAlexander Shiyan2020-11-131-2/+2
| | | | | | | | | | | | | | | Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: dts: imx6qdl: pfla02: Use upstream som_flash nodeAlexander Shiyan2020-11-131-27/+25
| | | | | | | | | | | | | | | Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX: esdctl: Add missing compatibleSascha Hauer2020-11-131-0/+3
| | | | | | | | | | | | | | | | | | | | | The i.MX8mm has "fsl,imx8mm-ddrc" as compatible, add it to the list of matching nodes. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: nxp i.MX8MP evk: make locally used data staticSascha Hauer2020-11-131-9/+9
| | | | | | | | | | | | | | | | | | | | | Make locally used data static so that it doesn't conflict with other data with the same name. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/arm-qemu'Sascha Hauer2020-12-117-47/+88
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| * | | ARM: qemu: add support for qemu virt platformRouven Czerwinski2020-11-125-1/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Necessary support to boot barebox on ARM qemu virt platforms. No internal device tree, since it is passed by qemu. Therefore it employs the generic 2nd stage image as the low level code and only adds a virt specific board driver. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: vexpress: move Options to ARCH_VEXPRESSRouven Czerwinski2020-11-122-9/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation for the qemu virt image, move the KConfig options from MACH_VEXPRESS to ARCH_VEXPRESS. Also remove the choice, since we allow multiple boards to be selected with HAVE_PBL_MULTI_IMAGES. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: vexpress: convert to board driverRouven Czerwinski2020-11-121-29/+40
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: vexpress: remove unused KConfig fileRouven Czerwinski2020-11-121-8/+0
| |/ / | | | | | | | | | | | | Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | / ARM: am335x: Use xz compression for MLOSascha Hauer2020-12-111-5/+1
| |/ |/| | | | | | | | | | | the binary built with am335x_mlo_defconfig has grown too big over time. Use xz compression to fit the image into initial SRAM. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: i.MX: esdctl: Add missing compatibleSascha Hauer2020-11-131-0/+3
| | | | | | | | | | | | | | The i.MX8mm has "fsl,imx8mm-ddrc" as compatible, add it to the list of matching nodes. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: nxp i.MX8MP evk: make locally used data staticSascha Hauer2020-11-131-9/+9
|/ | | | | | | Make locally used data static so that it doesn't conflict with other data with the same name. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: layerscape: ppa: Fix use after freeSascha Hauer2020-11-111-0/+1
| | | | | | | | | | | | In of_psci_do_fixup() we want to delete the one job-ring device node which is used by the PPA secure firmware. When we have deleted the node we may not continue the for_each_compatible_node_from() loop, because that would derefence the just deleted node. We only want to delete a single node, so we do not need to continue the loop once we've found the node, so we can fix the issue by breaking out of the loop. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/mtd-nand'Sascha Hauer2020-11-1022-1/+22
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| * mtd: nand: Update to Linux-5.9Sascha Hauer2020-11-1022-1/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This updates the barebox NAND layer and parts of the mtd layer to Linux-5.9. This patch is huge, but the barebox NAND layer is so far away from the Linux NAND layer that a step by step update would have taken ages. Unlike Linux barebox has functions to mark a block as good. This feature has been preserved. Also barebox used to make NAND write support optional, this feature is lost during the update for the sake of better compatibility to the Linux NAND layer. This patch has been tested: - GPMI aka nand_mxs on i.MX6 - nand_imx on i.MX25 - nand_omap_gpmc on AM335x - atmel_nand on Atmel sama5d3 - nand_denali on SoCFPGA Currently untested: - nand_orion - nand_mrvl_nfc - nand_s3c24xx The nand_denali driver is tested with the update of that driver to Linux-5.9 following in the next patch. I could only test the drivers with the NAND chips found on my boards, so there's still enough room for regressions, especially given that the NAND drivers themselves are mostly not updated. With the NAND layer being up-to-date with Linux it should hopefully be easy to update drivers to their Linux counterpart as well if necessary. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/misc'Sascha Hauer2020-11-1022-285/+66
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| * | arm: imx: Convert mach headers to SPDXUwe Kleine-König2020-11-0219-272/+51
| | | | | | | | | | | | | | | | | | | | | | | | Replace license and copyright boilerplate by SPDX identfiers for files identified as GPL-2.0-only or GPL-2.0-or-later by licensecheck. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | imx: Fix copyright claimUwe Kleine-König2020-11-021-12/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The file was created by me in commit c0fcf4dde3c9 ("ARM: i.MX7: provide DDR register definitions") and obviously I failed to adapt our copyright template. While at it, convert to SPDX. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: mmu64: allow to disable null pointer trap on zero pageMichael Tretter2020-10-222-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Barebox uses the zero page to trap NULL pointer dereferences. However, if the SDRAM starts at address 0x0, this makes the first page of the SDRAM inaccessible and makes it impossible to load images to offset 0x0 in the SDRAM. Trapping NULL pointer dereferences on such systems is still desirable. Therefore, add a function to disable the traps if accessing the zero page is necessary and to re-enable the traps after the access is done. The zero_page_memcpy function simplifies copying to the SDRAM, because this is the most common required functionality, but memtest also accesses the zero page and does not use memcpy. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/imx'Sascha Hauer2020-11-103-12/+22
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| * | | ddr: imx8m: clean up entry pointsLucas Stach2020-11-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DDRC address in the memory map and the TF-A parameter store address is the same for all i.MX8M* SoCs. The only difference (for now) is in the power up sequence. Add a enum for the DDRC type, so we can take different code paths in imx8m_ddr_init() depending on the SoC. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: dts: imx6qdl: pfla02: Remove eeprom nodeAlexander Shiyan2020-11-021-6/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The upstream dtsi now has a eeprom node, so no need to duplicate anymore. Let's keep the "page_size" property for a while. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: dts: imx6qdl: pfla02: document motivation for dropping supplyUwe Kleine-König2020-11-021-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit 84cf5cfa9a0e ("ARM: dts: imx6qdl: pfla02: Remove fec phy-supply") the phy-supply was removed. The motivation however was only given in the commit log. Add a comment accompanying the actual statement to remove the property to make this better findable. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: CCMX51: Add new module ID variantAlexander Shiyan2020-10-281-5/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for Digi ConnectCore module variant 0x15 Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | Merge branch 'for-next/imd-checksum'Sascha Hauer2020-11-104-6/+27
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| * | | | ARM: socfpga: xload: evaluate integrity of second stage barebox imagesUlrich Ölmann2020-11-051-2/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not hand over control to a second stage barebox if its embedded CRC checksum is invalid. Signed-off-by: Ulrich Ölmann <u.oelmann@pengutronix.de>
| * | | | bootstrap_read_disk(): optionally inform the caller of the buffer sizeUlrich Ölmann2020-06-222-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The size of the buffer allocated in the function is needed if it shall be inspected more closely later. Therefore optionally return it via a new pointer argument. Signed-off-by: Ulrich Ölmann <u.oelmann@pengutronix.de>
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