| Commit message (Collapse) | Author | Age | Files | Lines |
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This fixes build failures in builds without MMU support by providing
a fallback implementation.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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SoCFPGA is completely multi-image enabled and probes the barebox
from a built-in DT, so there is no point in building a barebox
image that isn't able to probe from DT.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add the missing stdout-path properties for the socfpga boards and
enable CONFIG_CONSOLE_ACTIVATE_NONE.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Instead of using internal devicetree files, use the official ones from
/dts/src/arm.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This replaces the reset_cpu() function which every SoC or board must
provide with registered handlers. This makes it possible to have multiple
reset functions for boards which have multiple ways to reset the machine.
Also boards which have no way at all to reset the machine no longer
have to provide a dummy reset_cpu() function.
The problem this solves is that some machines have external PMICs or
similar to reset the system which have to be preferred over the
internal SoC reset, because the PMIC can reset not only the SoC but also
the external devices.
To pick the right way to reset a machine each handler has a priority. The
default priority is 100 and all currently existing restart handlers are
registered with this priority. of_get_restart_priority() allows to retrieve
the priority from the device tree which makes it possible for boards to
give certain restart handlers a higher priority in order to use this one
instead of the default one.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We can now directly point to the partitions in the barebox,environment
binding. Convert some boards over to it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Convert zylonite board to the generic environment, and make consistent
with lubbock and mainstone boards.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Also, use the barebox partition on mmc2.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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The pin SD4_DAT4 until SD4_DAT7 are used as revison control.
The pins will be internally pulled up so we read a 1111 for revison 1.
For revison two the first pin (bit) is pulled down (see schematic pfla-02
page 4 "SDIO, NAND-Flash".
On Module rev 1 the pins are connected to the NAND but we have only 8bit NAND
also the i.MX6 only can handle 8bit NAND flashs.
Revisions:
Rev 1: 0xF
Rev 2: 0xE
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Rev 15: 0x1
Rev 16: 0x0
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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i.MX6 is fully DT enabled and the already selected
COMMON_CLK_OF_PROVIDER needs OFTREE support to build properly.
Fixes:
arch/arm/mach-imx/clk-imx6.c: In function 'imx6_ccm_probe':
arch/arm/mach-imx/clk-imx6.c:500:2: error:
invalid use of undefined type 'struct clk_onecell_data'
arch/arm/mach-imx/clk-imx6.c:502:2: error:
implicit declaration of function 'of_clk_add_provider'
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Align with the mainline device tree, include it,
and remove all unchanged nodes and properties.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Align with the mainline device tree, include it,
and remove all unchanged nodes and properties.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Since we no longer have custom gpio function prototypes we can
drop the prototypes from asm-generic/gpio.h can add them to
include/gpio.h instead. While at it add static inline dummy wrappers
for !CONFIG_GENERIC_GPIO so that code using gpios can compile without
gpio support.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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For getting the gpio functions include/gpio.h is the correct
header file.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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PXA is the only architecture that uses its own prototypes for
the gpio functions because it uses static inline variants of
these functions. For the sake of streamlining with other architectures
move them to a C file and use the generic gpio prototypes.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Otherwise entries may still be in the cache and never reach memory.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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When flushing the cache L1 has to be flushed before L2, not the
other way round.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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arm_ignore_data_abort can be set to nonzero to ignore data aborts. The
default should be not to ignore data aborts. Fix this.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Make sure that the initcall only executes on the expected board.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Use the correct display pins (which are DISP2* and not DISP1*) and
use the of_graph bindings to describe the video hardware.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Set the backlight enable gpio to disabled earlier during startup
to avoid flicker when the pinmux is configured but not yet the
enable gpio.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This enabled multi image support for the Garz&Fricke Vincell board. Also
it adds the Vincell-LT as a second image with a separate device tree.
Previously we used the same image on both the Vincell and the Vincell-LT
image since the differences are not that significant for barebox. Still
this was good for quite some confusion internally, so let's properly
introduce a second image.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We recently introduced ungate_all_peripherals and SoC specific low
level UART init functions. Add some more for i.MX5 SoCs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Instead of putting hardware specific bit masks in platform_data just
use the decimal interface width and encode this in the driver. This
makes it easier to create the platform_data and helps device tree
based implementations.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This patch makes it possible to use ddr_spd-related
routines in any arch not only in ppc.
Signed-off-by: Alexander Smirnov <alllecs@yandex.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Above the 0x800 offset the manufacturer provides the board type, a serial
number and the MAC as three simple strings. Extract these strings, provide
their value as global variables and set the MAC into the ethernet unit.
Signed-off-by: Juergen Borleis <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This IP core is shared between many FSL SoCs. The MPC5200 provides this
core as well.
Signed-off-by: Juergen Borleis <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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In preparation to re-use the i.MX I2C driver for the MPC5200 SoC use
clock.h instead of clocks.h for the clock API.
Signed-off-by: Juergen Borleis <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This change in the port config register enables the USB/OHCI support and
makes USB work on the PCM030's regular development baseboard.
Signed-off-by: Juergen Borleis <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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In order to enable and use USB/OHCI on the MPC5200 the USB PLL register must be
set.
It's not easy to find a correct value for this register, it seems it depends on
the used external reference frequency and some other 'magic' things. There are
some values out in the wild for the 33,333333 MHz and 33,333000 MHz reference
frequency case, but they are not consistent over the boards.
The value used here in this change for the USB PLL register is from the first
days of support for this platform and works at least on the reference
baseboard.
Signed-off-by: Juergen Borleis <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Juergen Borleis <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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