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| * | ARM: cfa10036: Retrieve the board variant from the AT24Maxime Ripard2012-12-144-1/+123
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AT24 found on the expansion boards store the variant of the board it is soldered onto. That means that we are that way able to determine what expansion board is currently plugged in if any. If we can't communicate with the EEPROM, we just assume that only the CFA-10036 is there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: cfa10036: Add the AT24HC02 I2C EEPROMMaxime Ripard2012-12-143-1/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This EEPROM is found on the expansion boards available for the 10036 module. Since we won't need to do anything fancy except reading/writing from it, use bitbanging to communicate with it. This EEPROM will hold mostly the board_id so that we can determine if there is an expansion board plugged in and what expansion board it is. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/misc'Sascha Hauer2013-01-092-1/+3
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| * | | ARM: OMAP: Remove unneeded dependencies for GPMCAlexander Shiyan2012-12-191-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARCH_OMAP2 missing in barebox. ARCH_OMAP3 and ARCH_OMAP4 is only choice for this target. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | x86: Add formal Kconfig parameter "X86_BOOTLOADER"Alexander Shiyan2012-12-191-0/+3
| | |/ | |/| | | | | | | | | | Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/mips'Sascha Hauer2013-01-0913-0/+440
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| * | | MIPS: qemu-malta_defconfig: use pblAntony Pavlov2012-12-141-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | USAGE $ make qemu-malta_defconfig ... $ make ... $ qemu-system-mips -nodefaults -M malta -m 256 \ -nographic -serial stdio -bios ./barebox-flash-image Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | MIPS: qemu-malta: add trivial pbl supportAntony Pavlov2012-12-142-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Trivial pbl support has no cpu specific setup. We will add cache setup routines in the future. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | MIPS: add pre-bootloader (pbl) image supportAntony Pavlov2012-12-1410-0/+403
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is based on ARM pbl support and allows creating a pre-bootloader binary for compressed image. For different MIPS SoCs (or even for different boards based on the same SoC) the operations carried on in start-pbl.S can be very different. The additional constraints can be imposed on the size of the boot code or the special magic labels in the beginning of the boot code; In some cases it could be necessary to show CPU is alive as early as possible (transmit a char via UART or blink a LED). So the demands for pbl start operation can be very different. E.g. malta board store boot code at the NOR flash mapped to the MIPS power-on address (0xbfc00000); it is the most simple case: we need just copy pbl image from direct-mapped flash to RAM and jump there. The XBurst-powered boards store boot code in the beginning of a NAND flash or in the beginning of SD/MMC card. In this case we must use simple and short NAND or SD/MMC access routines to copy pbl image to RAM. To meet so different demands a simple technique is selected: * MIPS pbl entry point located in file arch/mips/boot/start-pbl.S. * MIPS pbl code (see start-pbl.S) assumes that every pbl-enabled board has a arch/mips/boards/<BOARD>/include/board/board_pbl_start.h header file. This file must contain definition of the board_pbl_start macro. This macro is used as start of pbl image; * the most popular asm routines (stack setup, relocation to link address, NS16550 initialization (WIP) and so on) are containt in the arch/mips/include/asm/pbl_macros.h header file. So board pbl macro can use it if necessary. It is possible to create similar headers with macros for each specific SoC; so even if we have many different boards based on the same SoC the board_pbl_start macro for every board can be short and clear. * after board-specific initialization the stack pointer is initialized and pbl C code is started. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/imx'Sascha Hauer2013-01-0939-307/+1455
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| * \ \ Merge branch 'pu/efikasb' into for-next/imxSascha Hauer2012-12-192-24/+16
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| | * | | Arm Efika MX Smartbook: coding style fixesSascha Hauer2012-12-192-24/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some Coding style fixes as suggested by Peter Korsgaard. No functional change. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | Merge branch 'pu/efikasb' into for-next/imxSascha Hauer2012-12-1717-0/+880
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| | * | | ARM: Add defconfig for Efika MX smartbookSascha Hauer2012-12-171-0/+108
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | | ARM i.MX51: Add support for the Efika MX SmartbookSascha Hauer2012-12-1715-0/+771
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Efika MX Smartbook is a i.MX51 based netbook. This patch adds nearly full support for it including: - USB - SD card slots - Internal SPI NOR flash - Internal flash PATA drive - LEDs Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | | mci i.MX esdhc: Allow to specify devicename from platformdataSascha Hauer2012-12-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For boards which need to have persistent names for the device file. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | Merge branch 'pu/usb' into for-next/imxSascha Hauer2012-12-1710-33/+74
| |\| | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/mach-imx/include/mach/devices-imx31.h
| | * | | ARM i.MX pcm038: Update defconfig for chipidea driverSascha Hauer2012-12-131-6/+3
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | | pcm038: Stop ongoing ULPI transfers before registering the transceiverSascha Hauer2012-12-131-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ULPI lines are normally input to the USB port. In order to configure the ULPI transceiver properly the ongoing transfers must be stopped. This can be done by configuring the the STP pin as gpio output and drinving it high. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | | ARM i.MX pcm038: switch to chipidea supportSascha Hauer2012-12-132-26/+9
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | | ARM i.MX31: Add USB device functionsSascha Hauer2012-12-132-0/+16
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | | ARM i.MX51: Add USB device functionsSascha Hauer2012-12-132-0/+16
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | | ARM i.MX27: Add USB device functionsSascha Hauer2012-12-134-0/+23
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | Register the USB misc devices and provide convenience wrappers to register the USB ports for i.MX27. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM i.MX31 pcm037: add mmc supportSascha Hauer2012-12-121-0/+2
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM i.MX31: Add mmc register convenience functionsSascha Hauer2012-12-121-0/+10
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM i.MX31 pcm037: add more iomux pinsSascha Hauer2012-12-121-5/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use imx_iomux_setup_multiple_pins to setup the pinmux and add more pins. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM i.MX31: sync iomux with kernelSascha Hauer2012-12-122-38/+227
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM i.MX31 pcm037: Switch to new environmentSascha Hauer2012-12-127-59/+65
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM i.MX31 pcm037: rewrite lowlevel init code in CSascha Hauer2012-12-123-172/+164
| |/ / | | | | | | | | | | | | | | | Tested with NOR and NAND boot. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/gpio-request'Sascha Hauer2013-01-091-1/+1
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| * | | at91sam9x5ek: switch heartbeat to d2 (pioD21)Jean-Christophe PLAGNIOL-VILLARD2013-01-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | as d1 pioB18 is used for the one wire too Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | at91: add dump mux commandJean-Christophe PLAGNIOL-VILLARD2013-01-072-0/+230
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This will allow to dump all pin configuration in a nice table and if the bank/pin is specified the pin details barebox@Atmel at91sam9x5-ek:/ Pin PIOA PIOB PIOC PIOD 0: [gpio] set [periph A] [gpio] set [periph A] 1: [periph A] [periph A] [gpio] set [periph A] 2: [gpio] set [periph A] [gpio] set [periph A] 3: [gpio] set [periph A] [gpio] set [periph A] 4: [gpio] set [periph A] [gpio] set [gpio] clear 5: [gpio] set [periph A] [gpio] set [gpio] set 6: [gpio] set [periph A] [gpio] set [periph A] 7: [gpio] set [periph A] [gpio] set [periph A] 8: [gpio] set [gpio] set [gpio] set [periph A] 9: [periph A] [periph A] [gpio] set [periph A] 10: [periph A] [periph A] [gpio] set [periph A] 11: [periph A] [gpio] set [gpio] set [periph A] 12: [periph A] [gpio] set [gpio] set [periph A] 13: [periph A] [gpio] clear [gpio] set [periph A] 14: [gpio] set [gpio] clear [gpio] set [gpio] set 15: [periph A] [gpio] set [gpio] set [gpio] set 16: [periph A] [gpio] set [gpio] clear [periph A] 17: [periph A] [gpio] set [gpio] set [periph A] 18: [periph A] [gpio] set [gpio] set [periph A] 19: [periph A] [periph A] [gpio] set [gpio] set 20: [periph A] [periph A] [gpio] clear [gpio] set 21: [gpio] set [periph A] [gpio] clear [gpio] clear 22: [gpio] set [periph A] [gpio] set [periph A] 23: [gpio] set [periph A] [gpio] set [periph A] 24: [gpio] set [periph A] [gpio] set [periph A] 25: [gpio] set [periph A] [gpio] set [periph A] 26: [gpio] set [periph A] [gpio] set [periph A] 27: [gpio] clear [periph A] [gpio] set [periph A] 28: [gpio] set [periph A] [gpio] clear [periph A] 29: [gpio] set [periph A] [gpio] set [periph A] 30: [gpio] set [periph A] [gpio] set [periph A] 31: [gpio] set [periph A] [gpio] set [periph A] barebox@Atmel at91sam9x5-ek:/ pioA27 configuration [gpio] clear multidrive = disable pullup = disable degitch = disable debounce = disable pulldown = enable schmitt trigger = enable Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | at91: drop AT91_BASE_PIOx for soc specific one for none boot codeJean-Christophe PLAGNIOL-VILLARD2013-01-077-28/+28
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | at91: introduce AT91SAM9_SMC and AT91SAM9_TIMERJean-Christophe PLAGNIOL-VILLARD2013-01-072-14/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | to select the smc and timer for at91sam9 soc This will allow to simplify the Makefile Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | at91: wdt: drop AT91_SYS_BASEJean-Christophe PLAGNIOL-VILLARD2013-01-078-10/+10
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | at91: SMC: switch to platform_driverJean-Christophe PLAGNIOL-VILLARD2013-01-0730-108/+206
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This will allow to support multiple arch Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | at91: autodetect the soc one time at postcore_initcallJean-Christophe PLAGNIOL-VILLARD2013-01-0713-214/+515
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | and then register a device The code is take from linux drop AT91_BASE_SYS for dbgu factorise the soc type in the Kconfig but keep the ARCH_ so far as the device code have the same function accross soc which for now does not allow us to compile soc together Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | at91: PIT: switch to platform_driverJean-Christophe PLAGNIOL-VILLARD2013-01-0715-19/+57
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | at91: at91sam9: provide its own clkdev for pitJean-Christophe PLAGNIOL-VILLARD2013-01-076-0/+6
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | at91: sync with the kernel address baseJean-Christophe PLAGNIOL-VILLARD2013-01-077-60/+172
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add non AT91_SYS_BASE offset base address define This will prepare for multi arch support Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | at91: introduce Kconfig to select the dbgu for lowlevel debugJean-Christophe PLAGNIOL-VILLARD2013-01-072-1/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | so we can drop AT91_BASE_SYS too Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | at91: pmc: drop AT91_BASE_SYSJean-Christophe PLAGNIOL-VILLARD2013-01-077-64/+76
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | at91: factoryse PMC address as it's the same on every socJean-Christophe PLAGNIOL-VILLARD2013-01-078-7/+2
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | at91: enable clock via clock frameworkJean-Christophe PLAGNIOL-VILLARD2013-01-072-9/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | fix at91sam926x timer and dss11 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | at91: factorise dbgu addressJean-Christophe PLAGNIOL-VILLARD2013-01-021-0/+6
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | at91: switch to gpiolibJean-Christophe PLAGNIOL-VILLARD2012-12-227-76/+77
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | at91: gpio: switch to opsJean-Christophe PLAGNIOL-VILLARD2012-12-222-143/+293
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | imported from the kernel this allow to simplify the mux implemtation and will simplify the gpio support from bare_init or pbl Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | at91: gpio: switch to device driverJean-Christophe PLAGNIOL-VILLARD2012-12-2210-179/+189
| | | | | | | | | | | | | | | | | | | | | | | | | | | | this is the first step to prepare the switch to the gpiolib Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | at91: drop PIN_BASE offset for gpioJean-Christophe PLAGNIOL-VILLARD2012-12-222-167/+161
| | | | | | | | | | | | | | | | | | | | | | | | | | | | so 0 is a valid gpio as cleanned in the kernel Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | at91: use -EINVAL for invalid gpioJean-Christophe PLAGNIOL-VILLARD2012-12-2215-23/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | switch gpio type from u8 to int in the data struct Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-17 08:05:22 +0000