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* ARM: dts: imx6qdl: pfla02: use dummy regulatorsAndrej Picej2021-11-251-9/+3
| | | | | | | | | | The power for the phyFLEX sd cards and ethernet controller are supplied by the DA9063 PMIC's LDOs. There is no barebox driver for those LDO regulators. Thus use dummy-regulators to suppress warning message. Signed-off-by: Andrej Picej <andrej.picej@norik.com> Link: https://lore.barebox.org/20211119095429.1905473-6-andrej.picej@norik.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: configs: imx_v7_defconfig: add OCOTP write supportAndrej Picej2021-11-251-0/+1
| | | | | | Signed-off-by: Andrej Picej <andrej.picej@norik.com> Link: https://lore.barebox.org/20211119095429.1905473-4-andrej.picej@norik.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: configs: imx_v7_defconfig: add OF commandsAndrej Picej2021-11-251-0/+3
| | | | | | | | | | | Add OF commands: - of_overlay, - of_display_timings and - of_fixup_status. Signed-off-by: Andrej Picej <andrej.picej@norik.com> Link: https://lore.barebox.org/20211119095429.1905473-3-andrej.picej@norik.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* flash-header-phytec-pcl063: Set SOC voltage to 1.25 V during bootStefan Riedmueller2021-11-251-0/+2
| | | | | | | | | | | To increase stability during boot in cold conditions (< -30 °C) increase the SOC voltage from 1.15 V to 1.25 V in DCD. The ARM voltage is left unchanged at its default 1.15 V. Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de> Signed-off-by: Andrej Picej <andrej.picej@norik.com> Link: https://lore.barebox.org/20211119095429.1905473-2-andrej.picej@norik.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/skov-imx6'Sascha Hauer2021-11-157-34/+253
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| * ARM: boards: skov-imx6: use separate DTS for the iMX6 Solo variantOleksij Rempel2021-10-113-2/+28
| | | | | | | | | | | | | | | | | | iMX6 Solo boards do not have HDMI so remove it to avoid time spending on probing. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.barebox.org/20211006084323.14051-9-o.rempel@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: boards: skov-imx6: add defaultenv with eth1-discover scriptOleksij Rempel2021-10-113-0/+12
| | | | | | | | | | | | | | | | | | | | Add eth1-discover script to run USB detection if eth0 is disabled. The eth0 will be automatically disabled if the no on-board switch is detected. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.barebox.org/20211006084323.14051-8-o.rempel@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: boards: skov-imx6: start using deep-probeOleksij Rempel2021-10-111-5/+17
| | | | | | | | | | | | | | | | Port Skov boards to the deep-propbe and reduce boot time by 100msec. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.barebox.org/20211006084323.14051-7-o.rempel@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: boards: skov-imx6: fixup different DTS variantsOleksij Rempel2021-10-111-5/+43
| | | | | | | | | | | | Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.barebox.org/20211006084323.14051-6-o.rempel@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: boards: skov-imx6: disable eth0 for barebox if no switch is detectedOleksij Rempel2021-10-111-0/+10
| | | | | | | | | | | | Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.barebox.org/20211006084323.14051-5-o.rempel@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: boards: skov-imx6: add switch detectionOleksij Rempel2021-10-111-25/+124
| | | | | | | | | | | | | | | | | | There are board variants with same board ID but not switch. Detect this variants. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.barebox.org/20211006084323.14051-4-o.rempel@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: boards: skov-imx6: fixup_machine_compatible() add optional root nodeOleksij Rempel2021-10-111-6/+8
| | | | | | | | | | | | | | | | This will be needed by the next patch Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.barebox.org/20211006084323.14051-3-o.rempel@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: dts: skov-imx6: add USB nodesOleksij Rempel2021-10-111-0/+20
| | | | | | | | | | | | | | | | We need USB working to make use of USB ethernet adapters. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.barebox.org/20211006084323.14051-2-o.rempel@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/scripts-common-library'Sascha Hauer2021-11-152-0/+2
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| * | scripts: add target tool for rk-usb-loaderAhmad Fatoum2021-11-101-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Having rk-usb-loader as a target tool as well makes it easy to cross-compile it. Add the boilerplate. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | scripts: Add rk-usb-loader toolSascha Hauer2021-11-101-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a tool suitable for bootstrapping barebox on Rockchip RK3568 SoCs. It has been tested on this SoC only. It might or might not work with minor adjustments on other SoCs. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
* | | Merge branch 'for-next/rockchip'Sascha Hauer2021-11-1511-64/+209
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| * | | ARM: Rockchip: add delimiter between boards and board featuresAhmad Fatoum2021-11-101-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CONFIG_ARCH_RK3568_OPTEE is directly after the boards, has a very generic name and is selectable without CONFIG_ARCH_RK3568. Fix these. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20211108075209.2366770-9-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: Rockchip: make rk3568's atf_load_bl31 reusableAhmad Fatoum2021-11-101-24/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Future support for rk3399 can use the same function, so move the bulk into a macro. We can't use a function here, because the function itself uses macros like IS_ENABLED() and get_builtin_firmware(), which we would have to call outside of the common code, reducing amount of code we share. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20211108075209.2366770-8-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM64: <asm/barebox-arm-head.h>: mark prologue locationAhmad Fatoum2021-11-081-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unlike with ARM32, barebox prologue on ARM64 starts with the function prologue, because of the absence of the naked attribute. The code is written with that in mind (6 branches instead of 8 to account for the two instructions inserted by the compiler), but it's still suprising. Add a hint about that in the code. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20211108075209.2366770-5-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: Rockchip: rk3568: make rk3568_lowlevel_init voidAhmad Fatoum2021-11-082-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The lowlevel_init can't fail and there's no sane way to deal with an error that early anyway, so make return type void. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20211108075209.2366770-4-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: Rockchip: init: propagate error in init functionAhmad Fatoum2021-11-081-8/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SoC init functions return an error code when run on a SoC without support compiled in. Propagate error codes, so this is reported to the user. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20211108075209.2366770-3-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: Rockchip: RK3568: implement failsafe barebox updateSascha Hauer2021-10-125-15/+150
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The RK3568 ROM searches for valid boot images at different positions on SD/eMMC cards. This can be used to implement a failsafe barebox update which is immune against power failures. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20211012073352.4071559-9-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: rk3568: Detect USB bootSascha Hauer2021-10-121-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The table of register content to bootsource mapping has been taken from the vendor U-Boot. This table lacks an entry for USB boot. Add this entry. It's unknown if this entry is entirely correct, it reflects the value read from the register when doing USB boot. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20211012073352.4071559-7-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: Rockchip: rk3568 EVB: use 64bit partition sizesSascha Hauer2021-10-121-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ofpart partition fixup will use #address-cells = <2> and #size-cells = <2>. Use the same in the dts file to make the diff between the live tree and its fixed version smaller. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20211012073352.4071559-4-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: Rockchip rk3568 EVB: Enable deep probeSascha Hauer2021-10-121-0/+3
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | The rk3568 EVB board is successfully tested with deep probe support, enable it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20211012073352.4071559-3-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/misc'Sascha Hauer2021-11-158-8/+15
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| * | | spi: add STM32 SPI controller driverAhmad Fatoum2021-11-051-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested on a STM32MP1 communicating with a ksz9563. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20211105074657.3914257-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX: guf-santaro: fix passing around of uninitialized variableAhmad Fatoum2021-11-011-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i2c_device_present() does a zero byte read to probe for the i2c device. Make i2c_write_reg handle a NULL buf to silence the compiler warning. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20211030175812.2276705-3-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: Rockchip: move ARCH_RK3568_OPTEE into ARCH_ROCKCHIP menuAhmad Fatoum2021-11-011-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Otherwise, it's selectable for others as well. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20211030175812.2276705-2-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | include: add dedicated header for printf/printkAhmad Fatoum2021-11-012-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Including <stdio.h> for printf is a bit problematic, because it pulls in other headers for <console.h>, which includes quite a few more headers as well. To make it easier to share code between barebox and host tools make <printk.h> the new minimal header for printf and move the extra logging stuff into <linux/printk.h>. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20211030141739.2207431-3-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | gpio: add driver for xilinx zynq and zynqmpThomas Haemmerle2021-10-143-0/+4
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | Port the driver for the Xilinx Zynq/Zynq UltraScale+ MPSoC architecture to barebox (based on the Linux driver). Signed-off-by: Thomas Haemmerle <thomas.haemmerle@wolfvision.net> [apply format fixes, revise probe function, revise Kconfig] Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.barebox.org/20211013112247.3065-2-michael.riesch@wolfvision.net Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/dts'Sascha Hauer2021-11-151-1/+1
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| * | | dts: update to v5.15-rc5Sascha Hauer2021-10-271-1/+1
| |/ / | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | ARM: Terasic SoCkit: Use upstream compatible stringIan Abbott2021-11-082-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The upstream (Linux) 'compatible' string for the Terasic SoCkit board in "dts/src/arm/socfpga_cyclone5_sockit.dts" differs from the barebox 'compatible' string for the same board in "arch/arm/dts/socfpga_cyclone5_sockit.dts": Linux: "terasic,socfpga-cyclone5-sockit" barebox: "terasic,sockit" That results in an incompatibility when trying to boot a bootloader spec entry with a 'devicetree' key that refers to the DTB file built from the Linux sources. The barebox bootloader spec loader will ignore the entry because the 'compatible' string in the root node of the DTB does not match what barebox expects. Remove the 'compatible' string list from "arch/arm/dts/socfpga_cyclone5_sockit.dts" so that barebox uses the upstream compatible string list. Also remove the 'model' string ("Terasic SoCkit") which is identical to the upstream 'model' string. Finally, update the `of_machine_is_compatible("terasic,sockit")` function call in `socfpga_console_init()` to use the "terasic,socfpga-cyclone5-sockit" string. Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Link: https://lore.barebox.org/20211105122146.29370-3-abbotti@mev.co.uk Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | ARM: Terasic DE0-Nano-SoC/Atlas-SoC: Use upstream compatible stringIan Abbott2021-11-082-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The upstream (Linux) 'compatible' string for the Terasic DE0-Nano-SoC/Atlas-SoC board in "dts/src/arm/socfpga_cyclone5_de0_nano_soc.dts" differs from the barebox 'compatible' string for the same board in "arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts": Linux: "terasic,de0-atlas" barebox: "terasic,de0-nano-soc" That results in an incompatibility when trying to boot a bootloader spec entry with a 'devicetree' key that refers to the DTB file built from the Linux sources. The barebox bootloader spec loader will ignore the entry because the 'compatible' string in the root node of the DTB does not match what barebox expects. Remove the 'compatible' string list from "arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts" so that barebox uses the upstream compatible string list. Also remove the 'model' string ("Terasic DE0-Nano-SoC/Atlas-SoC Kit") so that barebox uses the upstream (and shorter!) model name ("Terasic DE-0(Atlas)"). Finally, update the `of_machine_is_compatible("terasic,de0-nano-soc")` function call in `socfpga_init()` to use the "terasic,de0-atlas" string. Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Link: https://lore.barebox.org/20211105122146.29370-2-abbotti@mev.co.uk Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | ARM: i.MX8M: nxp-imx8mn-evk: use regular i2c read for device detectionAhmad Fatoum2021-11-011-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The barebox-nxp-imx8mn-evk image supports both DDR4 and LPDDR4 variants by probing for the PMIC in use as the former uses a BD71847 and the latter a PCA9450B. The PCA9450B was observed to hang on the 0-byte (probe) reads. This results in I/O errors during later PMIC writes and the image would only boot on the EVKs with DDR4, which have the other PMIC. Fix this by switching to a 1 byte read instead. Change tested on i.MX8MN DDR4 EVK as well as another board with LPDDR4. While at it, note the address of the PMIC in the error message, so it's clear, what the result of the i2c probe was. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20211030141934.2207659-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | ARM: rpi_defconfig: Enable PHY core for dwc2 USB driverDaniel Brát2021-10-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable PHY core and USB NOP PHY driver in rpi_defconfig since the already enabled dwc2 usb driver uses it. Signed-off-by: Daniel Brát <danek.brat@gmail.com> Link: https://lore.barebox.org/20211020082505.3607-1-danek.brat@gmail.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | ARM: psci: client: fix power off and reset via 64-bit secure monitorAhmad Fatoum2021-10-181-1/+1
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PSCI function code is a 32-bit integer > 0x80000000, but the the PSCI client code erroneously casted it to a signed integer. On 32-bit systems, the cast later on to unsigned long restored the original value, but on 64-bit system, we passed a very large 64-bit number in the secure monitor call because of the sign extension. This worked because TF-A seems to ignore the upper 32-bits anyway, (tested with i.MX8MN), but for other secure monitors like the default HVC implementation for QEMU ARM64 Virt machine this didn't hold true for all commands, leading to aborts when doing reset or poweroff. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20211015160544.5783-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | sandbox: Fix stickypage.bin dependenciesSascha Hauer2021-10-112-8/+6
|/ | | | | | | | | | | stickypage.o is included in the build process once in arch/sandbox/board/Makefile using extra-y += stickypage.o and once again in arch/sandbox/Makefile using stickypage.bin: arch/sandbox/board/stickypage.o This doesn't work as expected. With parallel builds it can happen that the file is built twice confusing the build system. Create stickypage.bin in a single directory only. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/zynqmp'Sascha Hauer2021-10-0710-37/+178
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| * arm: zynqmp: add boot source supportMichael Riesch2021-10-041-0/+86
| | | | | | | | | | | | | | | | | | | | The ZynqMP reports the mode pins sampled at POR via the register ZYNQMP_CRL_APB_BOOT_MODE_USER. This commit adds a function that reads the register and populates the boot source. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.barebox.org/20210913121350.9307-4-michael.riesch@wolfvision.net Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * arm: zynqmp: add support for xilinx zcu106 boardMichael Riesch2021-10-048-0/+89
| | | | | | | | | | | | | | | | | | | | | | | | Add support for the Xilinx Zynq UltraScale+ MPSoC ZCU106 evaluation board. The changes are derived from the ZCU104 board support by applying s/104/106/g (more or less). Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.barebox.org/20210913121350.9307-2-michael.riesch@wolfvision.net Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: zynqmp: use std_file_update as update handlerMichael Tretter2021-08-231-37/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The update handler for zynqmp copies the boot.bin file into an existing fat partition. There is already a better implementation by bbu_register_std_file_update(). Drop the custom implementation. Keep the previous functions with its signature to have an obvious common update handler for all ZynqMP boards. Suggested-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Link: https://lore.barebox.org/20210818125848.560293-1-m.tretter@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/targettools'Sascha Hauer2021-10-071-0/+9
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| * | scripts: allow building USB loader tools for target as wellAhmad Fatoum2021-10-021-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We currently build the USB loader tools only for the host (build) system, but it can be useful to cross compile them as well for the target. We already have some target tools, but support for those is easier, because they don't link against libraries. We use pkg-config to get cc and ld flags, but we always assume that pkg-config is for the host system and there is no well-defined way to request pkg-config for the target system. Support this by introducing a new CROSS_PKG_CONFIG. This will be consulted only for target tools and default to $(CROSS_COMPILE)pkgconfig. Users can override it as necessary, for example, with Yocto, pkg-config will be for the cross environment, so target tools can now be built with: export ARCH=sandbox CROSS_COMPILE=aarch64-linux-gnu- export CROSS_PKG_CONFIG=pkg-config scripts make targettools_defconfig make scripts Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20210917174127.23345-4-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/riscv'Sascha Hauer2021-10-0713-0/+471
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| * | | RISC-V: virt: support poweroff/restart on tinyemuAhmad Fatoum2021-10-074-0/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QEMU Virt on RISC-V has syscon-reboot and syscon-poweroff compatible devices and describes them in the device tree. TinyEMU's Virt machine is different and has a HTIF based poweroff and no dedicated reset mechanism. Add board support for the HTIF poweroff and use a poor man's reset that jumps back to the reset vector. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20210916093532.21699-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | RISC-V: add litex_linux_defconfigAntony Pavlov2021-10-071-0/+75
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Link: https://lore.barebox.org/20210817101104.114945-9-antonynpavlov@gmail.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | RISC-V: add LiteX SoC and linux-on-litex-vexriscv supportAntony Pavlov2021-10-079-0/+308
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LiteX is a Migen-based System on Chip, supporting softcore VexRiscv CPU, a 32-bits Linux Capable RISC-V CPU. See https://github.com/enjoy-digital/litex and https://github.com/litex-hub/linux-on-litex-vexriscv for details. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Acked-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20210817101104.114945-8-antonynpavlov@gmail.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-01 17:44:01 +0000