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* ARM: nxp-imx8mq-evk: Update commentsSascha Hauer2019-08-231-5/+4
| | | | | | | | The comments mention contents of register r0, this is outdated. We base our decisions on the current EL. Update the comments. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
* ARM: nxp-imx8mq-evk: Replace trampolineSascha Hauer2019-08-233-33/+6
| | | | | | | | | | | | | | When the TF-A finishes it jumps to a hardcoded address in DRAM. We used to put a trampoline there which brings us back to our image in SRAM. Instead of putting a trampoline into DRAM just copy the image there which simplifies things a bit. Note that currently imx8_esdhc_load_piggy() uses that very same address as a temporary buffer. This is changed in the next patch. Currently the board is broken anyway, so we don't break bisectability. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
* ARM: nxp-imx8mq-evk: Remove duplicate call to imx8mq_cpu_lowlevel_init()Sascha Hauer2019-08-231-2/+0
| | | | | | | imx8mq_cpu_lowlevel_init() is called twice. Remove the second call. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
* ARM: i.MX: imx8-ddrc: Remove debug codeSascha Hauer2019-08-231-18/+2
| | | | | | | | | various puthex_ll() printed values without any context are not helpful when debugging unrelated stuff, so remove them. When they are really needed they should be added with proper pr_debug() statements. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
* pbl: Move piggy verification into pbl_barebox_uncompress()Sascha Hauer2019-08-231-16/+1
| | | | | | | | piggy verification is a direct prerequisite of uncompressing the piggydata, so move the verification there. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
* ARM: aarch64: Fix get_runtime_offset after relocationSascha Hauer2019-08-231-15/+9
| | | | | | | | | | | | | | | | | | | | | | | get_runtime_offset shall return the offset between the address we are running at and the address we are linked at. This value obviously changes when we relocate the binary. cf3b09737b tried to avoid using R_AARCH64_RELATIVE relocations, but in fact this is exactly what the function needs to work. Consider barebox starting at 0x10000000 when we are linked at 0x0 then get_runtime_offset() should return 0x10000000 before relocate_to_current_adr(), but afterwards it should return 0x0. This patch brings back the previously removed "a" flag. Since gcc5 doesn't put the values of R_AARCH64_RELATIVE fixup'd relocations into the binary but zeroes instead, we help ourselves by basing get_runtime_offset on an address which actually is zero. With CONFIG_RELOCATABLE=y the binary is always linked to 0x0, so _text is initially zero. Tested with gcc-5.4.0 (which was "fixed" by cf3b09737b) and gcc-8.2.1. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
* ARM: aarch64: Fixup relocation table for the second relocationSascha Hauer2019-08-231-0/+2
| | | | | | | | In case we want to relocate the binary multiple times we have to adjust the relocation table itself for any further relocations. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
* Merge branch 'for-next/stm32'Sascha Hauer2019-08-153-4/+8
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| * ARM: stm32mp: fix some misnomers/typosAhmad Fatoum2019-07-152-3/+3
| | | | | | | | | | | | | | | | | | The arch was renamed to stm32mp, so it doesn't look out of place when the stm32mp2 is released. Fix spotted comments/labels with the old name. While at it, fix a typo about the SoC name on the DK2 board. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: dts: stm32mp157c: correct gpioz idAhmad Fatoum2019-07-151-1/+1
| | | | | | | | | | | | | | | | | | The pinctrl-stm32 driver uses the alias id to infer the index of the first GPIO supported by a controller. Because gpioz' identifiers start at ('Z' - 'A') * 0x10, change the id to 25. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: stm32mp: set CONFIG_ARCH_NR_GPIO = (26 * 16)Ahmad Fatoum2019-07-151-0/+4
| | | | | | | | | | | | | | | | | | The STM32MP1 GPIO bindings uses the range [400; 415] for the gpioz controller, which exceeds the barebox-wide ARCH_NR_GPIOS of 256. Therefore have the stm32mp define a subarch-specific max of 416. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/misc'Sascha Hauer2019-08-153-23/+2
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| * | mips: use generic bitsperlong.hMasahiro Yamada2019-08-121-6/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linux highly depends on the fact that the 'long' and the pointer have the same width, and so does barebox. So, we can always use include/asm-generic/bitsperlong.h, which determines BITS_PER_LONG depending on CONFIG_64BIT. This is what Linux does (at least in the kernel-space), and barebox can follow it. It is true that MIPS Linux references _MIPS_SZLONG (arch/mips/include/uaspi/asm/bitsperlong.h), but this is bacause the user-space cannot reference CONFIG options. For the kernel-space, it uses the generic definition from include/asm-generic/bitsperlong.h. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | riscv: use generic bitsperlong.hMasahiro Yamada2019-08-121-10/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linux highly depends on the fact that the 'long' and the pointer have the same width, and so does barebox. So, we can always use include/asm-generic/bitsperlong.h, which determines BITS_PER_LONG depending on CONFIG_64BIT. This is what Linux does (at least in the kernel-space), and barebox can follow it. Currently, barebox only supports 32-bit riscv, but this should work when it supports 64-bit by adding CONFIG_64BIT to arch/riscv/Kconfig. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | dts/imx25: drop sram nodeUwe Kleine-König2019-07-151-7/+0
| |/ | | | | | | | | | | | | | | This node is in dts/src/arm/imx25.dtsi since 9313920df6d3 ("dts: update to v3.16-rc1"). Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/imx8-hab'Sascha Hauer2019-08-1511-53/+179
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| * | boards: nxp-mx8-evk: rework to different boot flowRouven Czerwinski2019-08-074-39/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rework the evk boot flow to use the new piggydata load function and install a trampoline for the TF-A setup. This allows the PBL boot process to stay in SRAM up until the verification of the piggydata is done and main barebox can be loaded. The trampoline loads 4 bytes right after the trampoline, we copy the runtime offset there so the trampoline jumps back into the SRAM PBL. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | mach-imx: hab: select piggy verification for i.MX8Rouven Czerwinski2019-08-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Always select the piggy verification if HAB is enabled on i.MX8, otherwise the signed PBL might load untrusted piggydata. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | mach-imx: add gencsf header for i.MX8MQRouven Czerwinski2019-08-071-0/+59
| | | | | | | | | | | | | | | | | | | | | Add the required gencsf header for i.MX8MQ. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | arm: uncompress: verify sha256 if enabledRouven Czerwinski2019-08-071-1/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add piggydata verification before the ARM uncompress function. This calculates the sha256sum of the compressed barebox binary and only continues if the builtin sha256sum matches the calculated sha256sum. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | images: always build sha256sum into pblRouven Czerwinski2019-08-071-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | Create a sha256sum of the compressed barebox image and always add it to the PBL. We also add a custom linker section for ARM, to retrieve the sha256sum for piggydata verification. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | scripts: imx: support signing for i.MX8MQRouven Czerwinski2019-08-071-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement signing of the PBL for i.MX8MQ. The imagesize is also modified to i.MX8MQ to only contain the PBL. This obsoletes the max_load_size, which is kept for other boards currently using it. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | esdhc-pbl: add piggy load functionRouven Czerwinski2019-08-072-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add a function to load and copy the piggy data to the correct offset expected by barebox in the RAM. This way the PBL can later verify the piggydata before uncompressing and loading the main barebox. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | arm: lib: add CSF section between PBL and piggyRouven Czerwinski2019-08-071-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signing on i.MX8MQ is done by signing only the PBL, since the DRAM is not available on early start and the SRAM is not big enough to contain the whole image. Reserve a CSF area between PBL and the piggydata, to ensure that the CSF area can be loaded into SRAM. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | mach-imx: enable HAB on i.MX8MQRouven Czerwinski2019-08-071-2/+2
| |/ | | | | | | | | | | | | | | Enable HAB for i.MX8MQ. Since the status and report functions are now implemented, we can safely enable HABV4 for i.MX8MQ. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/imx'Sascha Hauer2019-08-1527-514/+273
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| * | ARM: i.MX: scb9328: refurbish board suportSascha Hauer2019-08-1510-189/+155
| | | | | | | | | | | | | | | | | | | | | | | | | | | - switch the i.MX1 based scb9328 board to device tree - Remove scb9328_defconfig and enable scb9328 board support in imx_defconfig - Remove old environment and switch to new default environment Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | pinctrl: i.MX iomux-v1: Make base address initialization unnecessarySascha Hauer2019-08-1412-24/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | So far we have imx_gpio_mode() to configure a pinmux entry for the older i.MX pinmuxes. For this to work imx_iomuxv1_init() must be called beforehand to configure the base address. Simplify this by introducing SoC specific variants of imx_gpio_mode() which also pass the base address. This makes initialization of the base address unnecessary and the functions usable for PBL. Consequently also compile the code for PBL. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | arm: port imx28-evk to devicetreeOleksij Rempel2019-07-177-308/+88
| |/ | | | | | | | | Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: access __boot_cpu_mode with a functionSascha Hauer2019-08-075-5/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | __boot_cpu_mode is accessed from barebox_multi_pbl_start() and barebox_single_pbl_start(). These functions may be called at an address different from the address they are linked at. Calculating the address of global variables can yield wrong results when it is done before setup_c() is called. We can't make sure when the address is calculated, OSELAS.Toolchain-2018.12.0 indeed calculates the address after setup_c() is called, but Debian arm-linux-gnueabihf-gcc 8.3.0 does it before setup_c() is called and thus doesn't work. This is solved by accessing __boot_cpu_mode with a wrapper function which we call explicitly after setup_c() is done. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: zii-imx8mq-dev: Do setup_c() before accessing global variablesSascha Hauer2019-07-161-26/+33
| | | | | | | | | | | | | | | | The lowlevel board code accesses global variables, so call relocate_to_current_adr() / setup_c() to make sure we have a valid C environment. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: phyCORE-i.MX8M SOM: Do setup_c() before accessing global variablesSascha Hauer2019-07-161-23/+30
| | | | | | | | | | | | | | | | The lowlevel board code accesses global variables, so call relocate_to_current_adr() / setup_c() to make sure we have a valid C environment. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: nxp-imx8mq-evk: Do setup_c() before accessing global variablesSascha Hauer2019-07-161-23/+31
| | | | | | | | | | | | | | | | The lowlevel board code accesses global variables, so call relocate_to_current_adr() / setup_c() to make sure we have a valid C environment. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: Fix global_variable_offset() for aarch64Sascha Hauer2019-07-161-6/+14
|/ | | | | | | | | | | | | Not all toolchains use pc relative addresses for global variables. Apparently the gcc 8.3.0 YOCTO toolchain uses absolute addresses. This means can't simply return 0 for global_variable_offset() but instead have to calculate the offset between the compile addresses for global variables and their runtime address. We do this by getting the address of a global variable pc relative explicitely in assembly and substracting that address from the location the C compiler thinks they are. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/zii'Sascha Hauer2019-07-1214-738/+503
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| * ARM: zii-imx7d-dev: Add support for RMU2 boardAndrey Smirnov2019-06-266-3/+432
| | | | | | | | | | | | | | Add support for Remote Modem Unit i.MX7D board. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: imx7d-zii-rpu2: Switch to using kernel DTSAndrey Smirnov2019-06-261-601/+7
| | | | | | | | | | | | | | Now that it is availible, switch to using kernel DTS. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: Rename zii-imx7d-rpu2 to zii-imx7d-devAndrey Smirnov2019-06-267-5/+5
| | | | | | | | | | | | | | | | | | To prepare for addition of another ZII i.MX7D based board, i.MX7D RMU2, rename zii-imx7d-rpu2 to zii-imx7d-dev to avoid any image naming confusion. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX: zii-vf610-dev-rev-c: Fix DTS warningAndrey Smirnov2019-06-261-0/+3
| | | | | | | | | | | | | | Add missing #address-cells and #size-cells to fix a warning Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX: zii-vf610-dev-rev-b: Fix DTS warningAndrey Smirnov2019-06-261-0/+3
| | | | | | | | | | | | | | Add missing #address-cells and #size-cells to fix a warning Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX: zii-vf610-dev-rev-c: Use SPDX tag in DTSAndrey Smirnov2019-06-261-40/+2
| | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX: zii-vf610-dev-rev-b: Use SPDX tag in DTSAndrey Smirnov2019-06-261-40/+2
| | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/stm32'Sascha Hauer2019-07-1215-105/+108
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| * | ARM: sm: move get_gicd_base_address to header for reuseAhmad Fatoum2019-07-042-28/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | Incoming PSCI implementation for the STM32MP1 needs to get_gicd_base_address as well, so move it to gic.h to avoid code duplication. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: psci: fix erroneous call of ->system_reset on system_offAhmad Fatoum2019-07-041-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both psci_system_reset and psci_system_off call psci_ops->system_reset, which seems like a copy-paste error as there is an unused ->system_off as well. Adjust psci_system_off to use ->system_off instead. This won't matter for the existing i.MX7 PSCI implementation because it defines neither callback, but it will for the upcoming STM32MP PSCI support. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: stm32mp: turn on GPIO related optionsAhmad Fatoum2019-06-201-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | Now with pinctrl/GPIO support, enable some useful GPIO-related drivers and commands. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: dts: stm32mp157a-dk1: enable heartbeat and error LEDsAhmad Fatoum2019-06-201-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | Now that we have GPIO support, add the red LED to the barebox device tree and override the blue one's default state. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | pinctrl: add driver for STM32 GPIO and pin multiplexerAhmad Fatoum2019-06-202-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds driver support for the 12 GPIO banks on the STM32MP157. As they are accessible to both the Cortex-A cores as well as the Cortex-M core, modifications to these are protected by a hardware spinlock and clocks are enabled/disabled as required. All register fiddling done by the driver is collected in <soc/stm32/gpio.h>, so future PBL code may make use of it as well to chainload barebox proper. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: dts: stm32mp: factor out common DK nodes into dtsiAhmad Fatoum2019-06-203-64/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DK2 appears to be just the DK1 with a display, thus factor out the barebox-specifics into a new stm32mp157a-dk1.dtsi, which we can include in both device trees after including the upstream device tree. As the updated device tree introduced new nodes, the now duplicates (&ethernet0, &uart4, /chosen and /aliases) are dropped from the barebox device as part of this commit as well. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: dts: stm32mp157a-dk1.dts: include upstream dts before barebox'Ahmad Fatoum2019-06-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | To allow "stm32mp157c.dtsi" to extend nodes in <arm/stm32mp157c.dtsi>, it should be included after it. Do this. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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