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* clk: versatile: add basic clocksLucas Stach2017-10-174-0/+180
| | | | | | | | This adds the necessary basic clocks used on the ARM versatile platforms. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* clk: imx: cpu: don't store the address of a function parameterUwe Kleine-König2017-08-151-2/+10
| | | | | | | | | | | | | | | The function imx_clk_cpu takes a const char *parent_name as second paramter. The implementation introduced in commit 9a89ed9d281e then uses the address of this function parameter to assign clk.parent_names. This is an address on the stack that is saved in the clk tree and of course this is easily overwritten by later execution paths of barebox. Without this fix the clk_dump command reproducibly crashes on i.MX7 (which is the only SoC that makes use of imx_clk_cpu()). Fixes: 9a89ed9d281e ("clk: imx: Add clk-cpu support") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
* Merge branch 'for-next/misc'Lucas Stach2017-07-311-1/+0
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| * clk: clk-fixed-factor: remove leftover debuggingLucas Stach2017-07-201-1/+0
| | | | | | | | | | | | | | Don't spam the output with rate propagation messages. It isn't done for any other clock. Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
* | Merge branch 'for-next/imx'Lucas Stach2017-07-311-11/+0
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| * | clk: i.MX7: Remove unused UART clocks arrayAndrey Smirnov2017-07-301-11/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Remove what looks like unused leftover from analogous Linux kernel code. Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
* | | Merge branch 'for-next/at91'Lucas Stach2017-07-311-0/+1
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| * | clk: at91: fix clk-mainSam Ravnborg2017-07-201-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Following warning was reported during boot with at91sam9263ek with DT enabled. "Main crystal frequency not set, using approximate value" This occured due to a missing parent in clk_rm9200_main. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
* | | i.MX: clk-pllv3: Initially disable PLL_BYPASS bitPhilipp Zabel2017-07-121-0/+5
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit cbff8031b491 ("i.MX: clk-pllv3: Do not touch PLL_BYPASS bit") overreached a bit by removing the code that disables the PLL_BYPASS bit for all architectures instead of making an exception for Vybrid and i.MX6SL. This causes the USB controller on i.MX6Q to run at bypass frequency and fail: barebox@Boundary Devices i.MX6 Quad Nitrogen6x Board:/ usb usb: USB: scanning bus for devices... usb: Bus 001 Device 001: ID 0000:0000 EHCI Host Controller imx-usb 2184200.usb: port(0) reset error This patch adds code to unconditionally disable the PLL_BYPASS bit initially, when the PLL clocks are registered. Cc: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Fixes: cbff8031b491 ("i.MX: clk-pllv3: Do not touch PLL_BYPASS bit") Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
* | clk: fix clk_get error handlingSam Ravnborg2017-07-071-1/+1
|/ | | | | | | | | | | | | | | | | If there is no OFTREE support of_clk_get_by_name failed with -ENOENT, which caused clk_get to bail out. This had the effect that nothing was printed on the serial console with at91sam9263-ek. There are no error paths that will return -ENODEV as we test for today, so change this to -ENOENT which is in use. This allows us to contine with clk_get_sys() in case of other errors as was the intention of the original fix. Fixes: 90f7eacb ("clk: let clk_get return errors from of_clk_get_by_name") Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
* Merge branch 'for-next/mvebu'Sascha Hauer2017-06-304-0/+157
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| * clk: mvebu: Add support for Armada 38x's coreclkUwe Kleine-König2017-06-194-0/+157
| | | | | | | | | | | | | | | | This is a mixture of the Armada 370 barebox driver and the Armada 38x Linux driver. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/clk'Sascha Hauer2017-06-301-1/+1
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| * | clk: let clk_get return errors from of_clk_get_by_nameUwe Kleine-König2017-06-191-1/+1
| |/ | | | | | | | | | | | | | | When of_clk_get_by_name fails with -ENODEV it's fine to continue with clk_get_sys. Other errors (e.g. -EPROBE_DEFER) should be returned however. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | i.MX: clk: Remove imx_clk_pllv3_locked()Andrey Smirnov2017-06-213-30/+14
| | | | | | | | | | | | | | | | | | | | Remove imx_clk_pllv3_locked() which was introduced for the sake of Vybrid platform. The same effect (waiting on 'locked' bit) can be achived with vanilla clk_pllv3_enable/disable, which make said function unnecessary. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | i.MX: clk-pllv3: Do not touch PLL_BYPASS bitAndrey Smirnov2017-06-211-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not touch PLL_BYPASS bit as a part of clk_pll3_enable/disable execution. For a number of platforms (e.g. Vybrid, i.MX6SL) PLL_BYPASS is specified as a bit controlling a clock MUX represented by a dedicated 'struct clk'. Altering that bit as a part of clk_pll3_enable/disable is equivalent to calling clk_set_parent() and it makes in the following code: clk_enable(clk_disable(<some pll>)) change clock chain instead of being a no-op. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | clk-vf610: Mark all of CCSR muxes with CLK_OPS_PARENT_ENABLEAndrey Smirnov2017-06-211-6/+6
|/ | | | | | | | | | | | | | | As per VYBRIDRM.pdf, p. 673: "... When switching clock sources on GL MUX, both active and target clock sources must be active..." So mark all of the clock muxes controlled by CCM_CSSR with CLK_OPS_PARENT_ENABLE to satisfy that requirement. Experiment shows that failing to do so would result in failure (in some cases CPU hang). Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX6ul: Add Clock support for i.MX6ullStefan Riedmueller2017-05-171-11/+62
| | | | | | | From linux-4.10 clock support, only skipped some unnecessary clocks Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/socfpga'Sascha Hauer2017-05-057-2/+574
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| * clk: socfpga: add arria10 clk driversSteffen Trumtrar2017-05-036-1/+572
| | | | | | | | | | | | | | | | | | | | | | Arria10 has a (slightly) different clock controller than the Cyclone5. Add new drivers for it. This driver only reads out the setup and builds the clocktree, it does not setup any clocks. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: socfpga: move driver to subdirectorySteffen Trumtrar2017-05-033-1/+2
| | | | | | | | | | | | | | Prepare for Arria10 clock driver. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: i.MX50 clock: add clock for USB physbaseAlexander Kurz2017-04-241-0/+1
|/ | | | | | | | Add the USB physbase clock entry for i.MX50 SoC to enable USB device creation via DT. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/misc'Sascha Hauer2017-04-072-4/+0
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| * clk: No-op CLK_OF_DECLARE if not enabledAndrey Smirnov2017-03-302-4/+0
| | | | | | | | | | | | | | | | | | Instead of wrapping each defenition of CLK_OF_DECLARE hook with preprocessor guards, change the definition of CLK_OF_DECLARE to expand into no-op if COMMON_CLK_OF_PROVIDER is not enabled. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/mips'Sascha Hauer2017-04-071-3/+3
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| * | clk: clk-gate-shared: fix "no previous prototype" warningAntony Pavlov2017-03-301-3/+3
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | The patch fixes these compiler's warnings: drivers/clk/clk-gate-shared.c:72:13: warning: no previous prototype for 'clk_gate_shared_alloc' [-Wmissing-prototypes] struct clk *clk_gate_shared_alloc(const char *name, const char *parent, const char *companion, ^ drivers/clk/clk-gate-shared.c:89:6: warning: no previous prototype for 'clk_gate_shared_free' [-Wmissing-prototypes] void clk_gate_shared_free(struct clk *clk) ^ Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* / clk: at91: Port at91 DT clock codeAndrey Smirnov2017-03-3018-0/+4145
|/ | | | | | | | Port at91 DT clock code from Linux 4.9-rc3. Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/imx'Sascha Hauer2017-03-132-6/+2
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| * drivers: clk: clk-imx6.c: Don't gate LDB and IPUsDavid Jander2017-03-091-4/+1
| | | | | | | | | | | | | | | | | | | | | | Depending on CONFIG_DRIVER_VIDEO_IMX_IPUV3 to decide whether to gate IPU clocks or not is rather fragile. Any inadvertent dependency on the IPU (like setting the NoC AQoS registers for i.MX6QP) will result in a freeze if CONFIG_DRIVER_VIDEO_IMX_IPUV3 is disabled. Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: imx: clk-imx6ul: Use anatop_base pointer for consistencyRobin van der Gracht2017-03-061-2/+1
| | | | | | | | | | | | | | | | The anatop_base pointer was unused, but instead of removing it, assign and use it for readability like clk-imx6 and clk-imx6sx do. Signed-off-by: Robin van der Gracht <robin@protonic.nl> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/at91'Sascha Hauer2017-03-135-4/+44
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| * | clk: Make COMMON_CLK_OF_PROVIDER depend on OFTREEAndrey Smirnov2017-03-095-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make COMMON_CLK_OF_PROVIDER depend on OFTREE, this way checking for: defined(CONFIG_OFTREE) && defined(CONFIG_COMMON_CLK_OF_PROVIDER) can be simplified to just: defined(CONFIG_COMMON_CLK_OF_PROVIDER) Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | clk: Port two helper functions from LinuxAndrey Smirnov2017-03-091-0/+39
| |/ | | | | | | | | | | | | Port of_clk_get_parent_count() and of_clk_parent_fill() from Linux. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* / clk: imx: clk-imx6ul: Fixed conditional for enabling USB phy clocksRobin van der Gracht2017-03-031-1/+1
|/ | | | | Signed-off-by: Robin van der Gracht <robin@protonic.nl> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* clk: i.MX7: setup ethernet clocksSascha Hauer2017-02-061-0/+11
| | | | | | | Reparent ethernet clocks so that they can be used by the fec driver. The values are the same as U-Boot uses. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* clk: i.MX7: do not register PLL bypass clocks as separate clocksSascha Hauer2017-02-061-119/+85
| | | | | | | | | | | | | In the Kernel the bypass bits in the PLLs are now registered as separate clocks and are no longer handled in the PLL code. In barebox we haven't made this step and there currently seems to be no reason to do so. This means that the bypass bits are currently modified in both the PLL driver and in the separate clocks which does not work properly. Drop all the bypass clocks to let the bypass bits be handled in the PLL driver exclusively. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* clk: i.MX7: Fix ethernet clocksSascha Hauer2017-02-062-4/+17
| | | | | | | | | | | | | The original clock code from Linux registers some gates at base + 0x44e0, 0x44f0, 0x4500, 0x4510. These are not in the reference manual and do not seem to have any effect on the hardware. The reference manual lists clocks at 0x4700 and 0x4710 which Linux does not control at all. These clocks really do have an effect on the hardware and are needed for ethernet support. Register the existing clocks rather than the made up clocks to support ethernet. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* clk: Add support for shared gatesSascha Hauer2017-02-062-1/+125
| | | | | | | | | | | Sometimes a single software control knob controls multiple gates in hardware. This patch adds support for shared gates which help coping this situation. The first gate is registered with the hardware gate as usual, the others are registered as shared gates which does not have hardware control itself, but only switches the real hardware gate. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* clk: i.MX7: do clock reparenting when all clocks are initializedSascha Hauer2017-02-061-8/+23
| | | | | | | | | By the time the i.MX7 clock driver probes the fixed clocks which are the roots of the clock tree are not yet present, so reparenting especially to one of the fixed clocks does not work. Move the tree setup to a later initcall when the fixed clocks are there. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* clk: i.MX: Pass CLK_OPS_PARENT_ENABLE where necessarySascha Hauer2017-02-061-4/+4
| | | | | | CLK_OPS_PARENT_ENABLE was missing on some i.MX7 specific clocks. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* clk: i.MX: clk-gate2: Allow to pass flagsSascha Hauer2017-02-062-9/+10
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* clk: implement CLK_OPS_PARENT_ENABLESascha Hauer2017-02-061-4/+27
| | | | | | | | Some clocks may only be modified when their parent clocks are enabled. The kernel has the CLK_OPS_PARENT_ENABLE flag for this purpose. Implement it for barebox aswell. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* clk: Keep enable count consistent over reparentSascha Hauer2017-02-061-6/+15
| | | | | | | | When reparenting a clock we have to make sure the new parent is enabled when the clock was enabled on the old parent. Also we have to decrease the old parents use counter when the clock was enabled. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX: Add i.MX6SL supportAlexander Kurz2017-02-021-0/+1
| | | | | | | | | | | | | Most i.MX6SL infrastructure is already covered in barebox by general i.MX6 support. Missing infrastructure provided in separate commits are * SoC type detection * Clock infrastructure Add the missing fsl,imx6sl-mmdc, so it will not be catched by fsl,imx6q-mmdc and the remaining bits and pieces to provide barebox i.MX6SL SoC support. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX6SL: import clock infrastructure from linuxAlexander Kurz2017-02-021-0/+329
| | | | | | | | | | | | | | Import i.MX6SL clock infrastructure from linux clk-imx6sl.c To save space, clocks beeing unlikely usefull for bootloader purposes (SSI, SPDIF, EXTERN_AUDIO) were not imported. Further, the fixup code from linux mainline commits a49e6c4b8204 ("ARM: imx: add common clock support for fixup mux") cbe7fc8aaeef ("ARM: imx: add common clock support for fixup div") was ignored for this commit. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX31 clk: add pll_ref_clk and MCU PLL bypass selectAlexander Kurz2017-01-261-5/+23
| | | | | | | | | | | The three MX31 PLL may be clocked from either CKIH or a frequency-multiplied derivate of CKIL generated by the Frequency Pre Multiplier FPM. Add the pll_ref_clk selection infrastructure and support for MCU PLL bypass to support clock switching and boards not clocked CKIH. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* clk: i.MX7: Add missing USB clocksSascha Hauer2017-01-191-0/+3
| | | | | | The USB clocks are missing in the Kernel clock code. Add them here. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* clk: i.MX: Add clock support for i.MX7Juergen Borleis2017-01-193-0/+908
| | | | | Signed-off-by Juergen Borleis <jbe@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* clk: imx: Add clk-cpu supportSascha Hauer2017-01-193-0/+114
| | | | | | Taken from the kernel as of 4.10-rc3. Needed for i.MX7 Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* clk: i.MX: pllv3: Add support for the i.MX7 enet pllSascha Hauer2017-01-192-5/+19
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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