| Commit message (Collapse) | Author | Age | Files | Lines |
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driver_d::of_compatible outght to point at a NULL-terminated array.
Fix instances where this is not the case.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Avoid the example bitstream header to validate the bitstream that should
be loaded into the FPGA. The header is mostly 0xFFFFFFFF with a few
special values at a certain offsets and can be better described with the
offsets and their magic values.
As a drive by, this fixes/removes a broken check in the header
validation. The != operator has a higher precedence than ?: and this
check should have had parenthesis around the ?: expression:
bin_header[i] != (byte_order == XILINX_BYTE_ORDER_BIT) ?
bin_format[i] : __swab32(bin_format[i])
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Reviewed-by: Thomas Haemmerle <thomas.haemmerle@wolfvision.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The bitstream header has 5 fields, that start with a char for the type.
Four fields have a big-ending length and a null-terminated string for
the design name, the part number, and the date and time of creation. The
last field is a big-endian 32 bit unsigned int for the size of the
bitstream.
Print this info when loading the bitstream.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The driver provides functionalities to check and load a bitstream to FPGA.
A boolean parameter to check if FPGA is already programmed is
added.
Signed-off-by: Thomas Haemmerle <thomas.haemmerle@wolfvision.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Introduce dev_set_name() in order to hide implementation details of
setting device's name so it'd be easier to change it.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Make FPGA specific settings configurable (padding, spi bits per word,
delays) and add Arria 10 support. The Arria 10 compatible is the same
as in the kernel patch "fpga manager: Add altera-ps-spi driver for
Altera FPGAs" (drivers/fpga/altera-ps-spi.c). The Arria 5 compatible
works unchanged.
This patch was tested with Arria 5 and Arria 10.
Signed-off-by: Bastian Stender <bst@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Prepare the SoCFPGA code base for different system types
(Arria10, Stratix10,...).
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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dev_request_mem_region doesn't work properly one some SoCs on which
PTR_ERR() values clash with valid return values from dev_request_mem_region.
Replace them with dev_request_mem_resource where possible.
This patch has been generated with the following semantic patch:
// <smpl>
@@
expression d;
expression n;
expression io;
identifier func;
@@
func(...) {
+struct resource *iores;
<+...
-io = dev_request_mem_region(d, n);
-if (IS_ERR(io)) {
+iores = dev_request_mem_resource(d, n);
+if (IS_ERR(iores)) {
...
- return PTR_ERR(io);
-}
+ return PTR_ERR(iores);
+}
+io = IOMEM(iores->start);
...+>
}
@@
expression d;
expression n;
expression io;
identifier func;
@@
func(...) {
+struct resource *iores;
<+...
-io = dev_request_mem_region(d, n);
-if (IS_ERR(io)) {
+iores = dev_request_mem_resource(d, n);
+if (IS_ERR(iores))
- return PTR_ERR(io);
-}
+ return PTR_ERR(iores);
+io = IOMEM(iores->start);
...+>
}
@@
expression d;
expression n;
expression io;
identifier func;
@@
func(...) {
+struct resource *iores;
<+...
-io = dev_request_mem_region(d, n);
-if (IS_ERR(io)) {
- ret = PTR_ERR(io);
+iores = dev_request_mem_resource(d, n);
+if (IS_ERR(iores)) {
+ ret = PTR_ERR(iores);
...
}
+io = IOMEM(iores->start);
...+>
}
@@
expression d;
expression n;
expression io;
identifier func;
@@
func(...) {
+struct resource *iores;
<+...
-io = dev_request_mem_region(d, n);
+iores = dev_request_mem_resource(d, n);
+if (IS_ERR(iores))
+ return PTR_ERR(iores);
+io = IOMEM(iores->start);
...+>
}
@@
identifier func;
@@
func(...) {
<+...
struct resource *iores;
-struct resource *iores;
...+>
}
// </smpl>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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dev_request_mem_region returns an ERR_PTR, fix places which check for a
NULL pointer instead. This patch has been generated with this semantic
patch, written by me and improved by Andrey Smirnov:
// <smpl>
@@
expression e;
expression e1;
@@
e = dev_request_mem_region(...);
...
-if (!e)
- return e1;
+if (IS_ERR(e))
+ return PTR_ERR(e);
@ rule1 @
expression e;
@@
e = dev_request_mem_region(...);
@@
expression rule1.e;
identifier ret, label;
constant errno;
@@
if (!e) {
...
(
- ret = -errno;
+ ret = PTR_ERR(e);
...
goto label;
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- return -errno;
+ return PTR_ERR(e);
)
}
@depends on rule1@
expression rule1.e;
@@
- if (e == NULL)
+ if (IS_ERR(e))
{
...
}
// </smpl>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
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This boolean parameter tells you if the FPGA is programmed or not. It
can be accessed from the shell as "$fpga.programmed". One could use
this to not program the FPGA if it's already programmed.
There is an annoying limitation of the way barebox puts parameters
into the shell env: it requires they have no periods in the device
name. It uses the first period to divide the variable name into a
device and parameter name, which doesn't work correctly if the device
name has a period in it.
Since the names of any devices created from the OF device tree have a
period in them, this is a problem.
So what I did here was create a new device. Its parent will be the OF
device for the fpgamgr and it will in turn be the parent of the
firmware cdev. Previously the cdev's parent was the OF device. This
device won't have period in the name and the parameter is attached to
it. Even without the period limitation, doing this gives a nicer name
"fpga.programmed" instead of "ff706000.fpgamgr.programmed".
The fpgamgr code had a pointer to the OF device in its private state.
I changed this to be a struct for the new "fpga" device, which is then
used in all the places the former pointer was (nothing but dev_dbg,
etc. calls).
Signed-off-by: Trent Piepho <tpiepho@kymetacorp.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Fix a bug in fpgamgr_program_write_buf() where .rbf file whose length
is not a multiple of 4 would cause an integer overflow which would
result in infinite loop.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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By taking parts of the programming handshaking protocol on faith it is
possible to make due with only two GPIO for programming Altera
FPGAs. This is not a very advisable practice, but sometime unavoidable
in GPIO constrained designs.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The driver needs gpio support, so depend on GENERIC_GPIO
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Fixes:
.../altera_serial.c:118:2: warning: too many arguments for format
Also sz is of type size_t, so use proper format specifier.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Fixes:
.../altera_serial.c:84:6: error: void value not ignored as it ought to be
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This driver uses SPI bus functions.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This driver uses a lot of arch specific functionality and
fails to build on anything but SOCFPGA.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This handler uses a regular SPI master and a few GPIOs to program an
Altera FPGA in serial mode.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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