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* firmware: arm_scmi: pmdomain: restrict default y for driverAhmad Fatoum2024-03-011-1/+1
| | | | | | | | | | | | | | | | | default y is inappropriate for drivers that depend on CONFIG_COMPILE_TEST, because it enables the driver as soon as CONFIG_COMPILE_TEST is enabled. While the driver can be built in that case, without CONFIG_ARM_SCMI_PROTOCOL, it just prints a red error message on init: ERROR: initcall scmi_power_domain_driver_register+0x0/0x10 failed: Invalid argument Therefore, allow building, but don't enable it by default unless CONFIG_ARM_SCMI_PROTOCOL=y. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240301074752.1618164-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* firmware: arm_scmi: call device driver remove if definedAhmad Fatoum2024-02-161-5/+0
| | | | | | | | | | | | | | We don't have SCMI driver remove callbacks like Linux does, so scmi_bus_type.remove is just an empty function. As no SCMI driver in barebox populates its remove callback, we can just replace this empty implementation by the default one of calling driver::remove. This has the added benefit that the SCMI devices won't be printed on shutdown when CONFIG_DEBUG_PROBES=y is enabled. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240215103353.2799723-3-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/op-tee'Sascha Hauer2023-12-1818-1112/+4381
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| * firmware: arm_scmi: sync with Linux v6.6Ahmad Fatoum2023-12-0518-1112/+4381
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Since our initial import of the ARM SCMI infrastructure in Linux, the upstream driver has been extended to support SCMI via OP-TEE and arm_ffa as well and also gained support for more function, including sensors and power domains, which may be useful in barebox going forward. Let's sync with Linux again and add the OP-TEE transport alongside the existing SMC-based transport. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20231127064034.2206788-2-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | clk: ti-sci: fix build failure without TI_SCI_PROTOCOLAhmad Fatoum2023-12-051-0/+1
|/ | | | | | | | | | The SCI clk driver has an unconditional reference to ti_sci_get_handle(), but no dependency is specific in the Kconfig. Add a dependency and change defaults, so it's enabled by default. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20231204165238.1131311-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* drivers: firmware: arm-scmi: Fix iterating over idrSascha Hauer2023-12-041-3/+2
| | | | | | | | The iterator in idr_for_each_entry() is the pointer we store in the idr, not the idr element itself. Fixes: d28d3d9159 ("include: linux/idr.h: implement more Linux API") Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/prepare-optee'Sascha Hauer2023-11-272-2/+3
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| * include: linux/idr.h: implement more Linux APIAhmad Fatoum2023-11-232-2/+3
| | | | | | | | | | | | | | | | | | Upcoming sync of SCMI with the kernel will start using IDR API, which we lack in barebox, so let's retrofit it. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20231122172951.376531-14-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | firmware: Add basic support for TI System Control Interface (TI SCI) protocolSascha Hauer2023-11-034-0/+4294
|/ | | | | | | | | The TI System Control Interface is needed to control things like clocks and power domains on K3 SoCs. The code is based on the corresponding U-Boot code from U-Boot 2023.07-rc6. Link: https://lore.barebox.org/20230803105003.4088205-9-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* treewide: remove remaining _d suffixes from struct driver_d/device_dAhmad Fatoum2023-09-141-1/+1
| | | | | | | | | | Some drivers made their way upstream during the switch to removal of the _d suffix. There's a define to support the old naming still, so there was no breakage, but let's use the modern naming everywhere. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230913114230.1853679-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* firmware: zynqmp: fix loading for PMU FWv1.1Steffen Trumtrar2023-06-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | FPGA programming on ZynqMP is done by the PMU. The SoC just hands a file to the PMU and lets it load this file to the FPGA. The bitstream that is sent to the FPGA consists of two headers, the optional struct bs_header and a binary-header. See comment in driver: (...) * Bitstream can be provided with an optinal header (`struct bs_header`). * The true bitstream starts with the binary-header composed of 21 words: (...) The PMUFW v1.0 had a feature for taking the bitstream only, skipping the header, or including the binary-header and only skipping the optional header. This is controlled via the BIT_ONLY_BIN flag. When the flag is set, the complete header should be skipped. The current implementation sets the flag *and* sends the binary-header to the PMU: header_length = get_header_length(mgr->buf, mgr->size); (...) body = (u32 *)&mgr->buf[header_length]; get_header_length searches for the first DUMMY_WORD, i.e. the beginning of the binary header. Then we set body to this offset, skipping the optional header. The flag is always set to ZYNQMP_FPGA_BIT_ONLY_BIN, which is then obviously incorrect. It seems like the PMUFW v1.0 was capable of still handling this although the flag was set. The newer PMUFW v1.1 doesn't support this and expects the flag to be unset and getting handed binary-header+bitstream. This is the same as the linux kernel handles bitstream loading on the ZynqMP. There the flag is also always unset. As this wasn't correct in the first place (although it most likely still worked depending on PMUFW and its configuration), we won't break anything when we just set the flag to zero as the PMUFW v1.1 expects it. TLDR: set fpga_load flags to zero to fix firmwareloading with newer PMUFW versions. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Reviewed-by: Michael Tretter <m.tretter@pengutronix.de> Link: https://lore.barebox.org/20230623114348.26213-1-s.trumtrar@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/rockchip'Sascha Hauer2023-06-221-1/+1
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| * firmware: arm_scmi: fix async checkSascha Hauer2023-05-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | Originally the Linux code had atomic_inc_return(&ci->cur_async_req). atomic_inc_return() returns the new variable value after increasing it, so the equivalent is ++ci->cur_async_req, not ci->cur_async_req++. This fixes a case where the code erroneously chose to do an asynchronous clock rate change on RK3588. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | treewide: add MODULE_DEVICE_TABLE markersAhmad Fatoum2023-06-135-0/+5
|/ | | | | | | | | | | | | | | | Syncing device trees with Linux upstream can lead to breakage, when the device trees are switched to newer bindings, which are not yet supported in barebox. To make it easier to spot such issues, we want to start applying some heuristics to flag possibly problematic DT changes. One step towards being able to do that is to know what nodes barebox actually consumes. Most of the nodes have a compatible entry, which is matched by an array of of_device_id, so let's have MODULE_DEVICE_TABLE point at it for future extraction. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230612125908.1087340-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* firmware: zynqmp-fpga: pass physical device to DMA APIAhmad Fatoum2023-04-171-3/+4
| | | | | | | | | | | The manager device is just a child of the physical device with no DT node assigned. As such, it lacks all DMA settings that may be set in the DT. Fix this by using the hardware device instead. Cc: Michael Tretter <m.tretter@pengutronix.de> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230414145259.3644816-5-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: socfpga: Move mach header files to include/mach/socfpgaSascha Hauer2023-03-061-4/+4
| | | | | | | | | | Currently arch specific headers can be included with longer possible as there won't be a single mach anymore. Move all socfpga specific header files to include/mach/socfpga/ to prepare for multi-arch support. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: Zynqmp: Move mach header files to include/mach/zynqmpSascha Hauer2023-03-061-1/+1
| | | | | | | | | | Currently arch specific headers can be included with possible as there won't be a single mach anymore. Move all Zynqmp specific header files to include/mach/zynqmp/ to prepare for multi-arch support. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* treewide: Rename remaining struct device_d -> deviceSascha Hauer2023-02-231-2/+2
| | | | | | | struct device_d was renamed to struct device. Rename the remaining occurences of device_d. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* firmware: add QEMU FW CFG driverAhmad Fatoum2023-01-313-0/+318
| | | | | | | | | | | | | | | | | | | Quoting the QEMU Docs[1]: The QEMU Firmware Configuration (fw_cfg) Device allows the guest to retrieve various data items (blobs) that can influence how the firmware configures itself, or may contain tables to be installed for the guest OS. Examples include device boot order, ACPI and SMBIOS tables, virtual machine UUID, SMP and NUMA information, kernel/initrd images for direct (Linux) kernel booting, etc. The driver added here is mostly based on the Linux driver. [1]: https://www.qemu.org/docs/master/specs/fw_cfg.html Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Link: https://lore.barebox.org/20230130072707.2423294-4-ahmad@a3f.at Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Rename struct driver_d to driverSascha Hauer2023-01-105-5/+5
| | | | | | | | | | | The '_d' suffix was originally meant to distinguish barebox struct names from Linux struct names. struct driver doesn't exist in Linux, so we can rename it and remove the meaningless suffix. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20221214123512.189688-4-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Rename struct device_d to deviceSascha Hauer2023-01-109-42/+42
| | | | | | | | | | | | | The '_d' suffix was originally introduced in case we want to import Linux struct device as a separate struct into barebox. Over time it became clear that this won't happen, instead barebox struct device_d is basically the same as Linux struct device. Rename the struct name accordingly to make porting Linux code easier. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20221214123512.189688-3-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Rename device_d::device_node to device_d::of_nodeSascha Hauer2023-01-106-15/+15
| | | | | | | | | | | | | | | | | | | | Linux struct device has the member of_node for the device_node pointer. Rename this in barebox accordingly to minimize the necessary changes when porting Linux code. This was done with the semantic patch: @@ struct device_d E; @@ - E.device_node + E.of_node @@ struct device_d *E; @@ - E->device_node + E->of_node Plus some manual adjustments. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20221214123512.189688-2-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* drivers: firmware: arm-scmi: Use core_platform_driver() macroAlexander Shiyan2022-07-011-7/+2
| | | | | | | Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220628061941.24199-2-eagle.alexander923@gmail.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* regulator: add SCMI regulator driverAhmad Fatoum2022-02-234-1/+382
| | | | | | | | Import the Linux v5.13 state of the SCMI clock regulator driver. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220220124736.3052502-16-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* clk: add SCMI clock driverAhmad Fatoum2022-02-234-1/+377
| | | | | | | | Import the Linux v5.13 state of the SCMI clock protocol driver. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220220124736.3052502-15-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* reset: add SCMI supportAhmad Fatoum2022-02-234-1/+233
| | | | | | | | Import the Linux v5.13 state of the SCMI reset protocol driver. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220220124736.3052502-14-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* firmware: import Linux v5.13 SCMI supportAhmad Fatoum2022-02-239-0/+2359
| | | | | | | | | | | | | | | | | The ARM System Control and Management Interface (SCMI) is a standard way to offload handling of system resources like clocks, resets and power domain handling to the firmware. This should replace Silicon Provider specific conduits for new SoCs. Systems where this is already relevant: - STM32MP1: For trusted boot, the clock and reset controller are managed from secure world. This is not yet supported by barebox and must be disabled in TF-A - RK3568: At least the CPU clock is only controllable via SCMI - i.MX8X: Communication with the SCU occurs via SCMI Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220220124736.3052502-13-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* firmware: zynqmp-fpga: fix use of uninitialized addrMichael Tretter2022-02-031-7/+6
| | | | | | | | | | | | | | | | | | The bitstream loading API of the firmware is a bit clunky, as the driver needs to either pass the size of the bitstream or a pointer to the size of the bitstream. Commit 2f29ee311f1d ("firmware: zynqmp-fpga: do not use DMA coherent memory for bitstream") broke the loading by address, as the pointer to the bitstream size was set using the uninitialized DMA address. Fix it by determining the argument that is passed to the firmware after the bitstream has been mapped and always write the size of the bitstream at the end of the passed buffer. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Link: https://lore.barebox.org/20220202101054.3924339-1-m.tretter@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* drivers: migrate "GPL-2.0" license identifiers to SPDX 2.0Roland Hieber2021-11-225-5/+5
| | | | | | | | | | "GPL-2.0-only" was introduced in SPDX 2.0, and the old identifier "GPL-2.0" is now considered deprecated; see <https://spdx.org/licenses>. Fixes: 28f4a6a4df76f0f1581d (2021-10-30, "drivers: add missing SPDX-License-Identifier") Signed-off-by: Roland Hieber <rhi@pengutronix.de> Link: https://lore.barebox.org/20211117113851.2022669-2-rhi@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* drivers: add missing SPDX-License-IdentifierAhmad Fatoum2021-11-015-31/+5
| | | | | | | | | | | | | | | | | | | | This adds the suitable SPDX-License-Identifier to all files in drivers/ that previously lacked one. To aid manual inspection, following heuristics can be used: * No changes outside of comments/whitespace: git show -U0 HEAD | rg -v '^(@@|diff|index)|[-+]([-+]|//|#|[\s/]\*)' * -or-later come in pairs: git show --inter-hunk-context=19 HEAD | \ perl -0777 -F'/^@/gm' -ne 'for (@F) { @m = /later/g; print if @m & 1 }' Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20211030175632.2276077-4-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* firmware: zynqmp-fpga: do not use DMA coherent memory for bitstreamMichael Tretter2021-08-231-8/+15
| | | | | | | | | | | | | Trying to do unaligned access of coherent memory on AArch64 will lead to an abort. This can happen when the FPGA loader copies the bitstream to the temporary buffer for the transfer to the FPGA. Convert the driver to use regular memory for the temporary buffer to prevent the issue. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Link: https://lore.barebox.org/20210819081251.726840-4-m.tretter@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* firmware: zynqmp-fpga: avoid additional buffer for size argumentMichael Tretter2021-08-231-21/+16
| | | | | | | | | | | | | | | | | | | | There are two different APIs for loading an FPGA via the pmu-fw as indicated by the ZYNQMP_PM_FEATURE_SIZE_NOT_NEEDED feature flag. The pmu-fw expects as second argument either the size of the bitstream or a pointer to the size of the bitstream. The driver allocates a separate buffer for the size, which results in the allocation of a 4k page for storing a 32 bit value. Allocate some more memory for the bitstream and append the size of the bitstream at the end of the bitstream to avoid the additional memory allocation. Add a comment to explain the surprising size of the allocation. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Link: https://lore.barebox.org/20210819081251.726840-3-m.tretter@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* firmware: zynqmp-fpga: initialize flags at function startMichael Tretter2021-08-231-4/+1
| | | | | | | | | | The ZYNQMP_FPGA_BIT_ONLY_BIN flag is always set when programming the FPGA. Simplify the code by initializing the flags with ZYNQMP_FPGA_BIT_ONLY_BIN already set. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Link: https://lore.barebox.org/20210819081251.726840-2-m.tretter@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* firmware: socfpga: set APPLYCFG after loading bitstreamSteffen Trumtrar2021-06-283-1/+42
| | | | | | | | | | | To make changes to the SDRAM controller effective, the APPLYCFG bit must be set after programming the bitstream to the FPGA. This has to be done without any SDRAM usage. Therefore copy the function to execute to the OCRAM and execute it from there. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Link: https://lore.barebox.org/20210625085944.11260-1-s.trumtrar@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* firmware: Fix device_node matchingSascha Hauer2021-06-253-0/+5
| | | | | | | | | | | | firmwaremgr_find_by_node() matches against the device node of the parent of the device associated to the handler. This is correct for the socfpga and zyncmp driver, but not for the altera_serial driver. Add a device_node argument to the handler which is set by the drivers to the correct device node and match against that. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210624085223.14616-9-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* drivers: firmware: socfpga: remove bridges shutdownSteffen Trumtrar2021-06-221-9/+0
| | | | | | | | | The bridges are now handled via the bridges driver. There is no need to hardcode the memory writes anymore. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Link: https://lore.barebox.org/20210616063246.14900-9-s.trumtrar@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* firmware: import fpga-mgr.h from linuxSteffen Trumtrar2021-06-211-8/+1
| | | | | | | | | Instead of defining the fpga-mgr structure in the socfpga driver, import the fpga-mgr.h file from linux v4.13. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Link: https://lore.barebox.org/20210616063246.14900-5-s.trumtrar@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* firmware: socfpga: change function prefixesSteffen Trumtrar2021-06-211-29/+29
| | | | | | | | | Since there is now a fpgamgr framework in barebox, the function names are misleading. Change that to be SoCFPGA specific. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Link: https://lore.barebox.org/20210616063246.14900-4-s.trumtrar@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* treewide: fix unterminated of_device_id[] reported by CoccinelleAhmad Fatoum2020-10-022-0/+2
| | | | | | | | driver_d::of_compatible outght to point at a NULL-terminated array. Fix instances where this is not the case. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* firmware: zynqmp-fpga: drop example bin format headerMichael Tretter2019-12-111-59/+62
| | | | | | | | | | | | | | | | | | Avoid the example bitstream header to validate the bitstream that should be loaded into the FPGA. The header is mostly 0xFFFFFFFF with a few special values at a certain offsets and can be better described with the offsets and their magic values. As a drive by, this fixes/removes a broken check in the header validation. The != operator has a higher precedence than ?: and this check should have had parenthesis around the ?: expression: bin_header[i] != (byte_order == XILINX_BYTE_ORDER_BIT) ? bin_format[i] : __swab32(bin_format[i]) Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Reviewed-by: Thomas Haemmerle <thomas.haemmerle@wolfvision.net> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* firmware: zynqmp-fpga: fix comparison between pointer and integerLucas Stach2019-12-021-1/+1
| | | | | Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* firmware: zynqmp-fpga: print Xilinx bitstream headerMichael Tretter2019-10-281-0/+51
| | | | | | | | | | | | | The bitstream header has 5 fields, that start with a char for the type. Four fields have a big-ending length and a null-terminated string for the design name, the part number, and the date and time of creation. The last field is a big-endian 32 bit unsigned int for the size of the bitstream. Print this info when loading the bitstream. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* firmware: zynqmp-fpga: introduce driver to load bitstream to FPGAThomas Haemmerle2019-10-283-0/+367
| | | | | | | | | The driver provides functionalities to check and load a bitstream to FPGA. A boolean parameter to check if FPGA is already programmed is added. Signed-off-by: Thomas Haemmerle <thomas.haemmerle@wolfvision.net> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* drivers: Introduce dev_set_name()Andrey Smirnov2018-10-181-1/+1
| | | | | | | | Introduce dev_set_name() in order to hide implementation details of setting device's name so it'd be easier to change it. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* firmware: altera-serial: add support for Arria 10Bastian Stender2017-06-091-46/+113
| | | | | | | | | | | | | Make FPGA specific settings configurable (padding, spi bits per word, delays) and add Arria 10 support. The Arria 10 compatible is the same as in the kernel patch "fpga manager: Add altera-ps-spi driver for Altera FPGAs" (drivers/fpga/altera-ps-spi.c). The Arria 5 compatible works unchanged. This patch was tested with Arria 5 and Arria 10. Signed-off-by: Bastian Stender <bst@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: socfpga: rename socfpga->cyclone5Steffen Trumtrar2017-05-031-4/+4
| | | | | | | | Prepare the SoCFPGA code base for different system types (Arria10, Stratix10,...). Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* firmware: altera-serial: simplify handling of optional gpioUwe Kleine-König2016-09-271-7/+5
| | | | | Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* firmware: altera-serial: Make the driver match the dt binding documentationUwe Kleine-König2016-09-271-7/+7
| | | | | Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* driver: replace dev_request_mem_region with dev_request_mem_resourceSascha Hauer2016-03-071-6/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dev_request_mem_region doesn't work properly one some SoCs on which PTR_ERR() values clash with valid return values from dev_request_mem_region. Replace them with dev_request_mem_resource where possible. This patch has been generated with the following semantic patch: // <smpl> @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); -if (IS_ERR(io)) { +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) { ... - return PTR_ERR(io); -} + return PTR_ERR(iores); +} +io = IOMEM(iores->start); ...+> } @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); -if (IS_ERR(io)) { +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) - return PTR_ERR(io); -} + return PTR_ERR(iores); +io = IOMEM(iores->start); ...+> } @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); -if (IS_ERR(io)) { - ret = PTR_ERR(io); +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) { + ret = PTR_ERR(iores); ... } +io = IOMEM(iores->start); ...+> } @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) + return PTR_ERR(iores); +io = IOMEM(iores->start); ...+> } @@ identifier func; @@ func(...) { <+... struct resource *iores; -struct resource *iores; ...+> } // </smpl> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* driver: Fix return check of dev_request_mem_regionSascha Hauer2016-02-231-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dev_request_mem_region returns an ERR_PTR, fix places which check for a NULL pointer instead. This patch has been generated with this semantic patch, written by me and improved by Andrey Smirnov: // <smpl> @@ expression e; expression e1; @@ e = dev_request_mem_region(...); ... -if (!e) - return e1; +if (IS_ERR(e)) + return PTR_ERR(e); @ rule1 @ expression e; @@ e = dev_request_mem_region(...); @@ expression rule1.e; identifier ret, label; constant errno; @@ if (!e) { ... ( - ret = -errno; + ret = PTR_ERR(e); ... goto label; | - return -errno; + return PTR_ERR(e); ) } @depends on rule1@ expression rule1.e; @@ - if (e == NULL) + if (IS_ERR(e)) { ... } // </smpl> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-27 17:13:54 +0000