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* net: e1000: don't try to register eeprom if MTD support is missingLucas Stach2017-01-091-4/+7
| | | | | | | | EEPROM support is an optional feature and the driver should work just fine without it. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* of: base: add chosen node if it does not exist when adding initrdPhilipp Zabel2017-01-091-2/+2
| | | | | | | | | If the chosen node does not exist, of_add_initrd fails to pass the initrd to the kernel. Instead it should create the chosen node, just like of_fixup_bootargs does. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* spi: mvebu: fix baudrate selection for Armada 370/XPUwe Kleine-König2016-12-071-3/+5
| | | | | | | | | | | | | | | | | | There are two problems that made the driver choose the wrong baudrate calculation algorithm: a) The compatible used on 370/XP isn't marvell,armada-370-xp-spi but marvell,armada-370-spi or marvell,armada-xp-spi respectively. b) The probe function uses match = of_match_node(mvebu_spi_dt_ids, dev->device_node); to determine the right algorithm. As the devices are also compatible to marvell,orion-spi and this comes first in mvebu_spi_dt_ids[] it's always the older Orion algorithm that is used. This patch fixes both problems. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/vybrid'Sascha Hauer2016-11-145-7/+300
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| * clk: Port clock dependency resolution codeAndrey Smirnov2016-11-141-7/+82
| | | | | | | | | | | | | | | | | | | | Port the clock dependency resolution algorithm utilized by Linux kernel's version of of_clk_init(), to allow for SoCs whose DT clock configuration reqires such behaviour for correct initialization (Vybrid is one such example). Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * i.MX: Add pinctrl driver for VF610Andrey Smirnov2016-11-143-0/+173
| | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * pinctrl: Add provisions to control GPIO pin directionAndrey Smirnov2016-11-141-0/+45
| | | | | | | | | | | | | | | | | | | | Some SoC (of which Vybrid is a one example) relegate GPIO direction control to their pinmux IP block, instead of having that functionality within GPIO IP. Add provisions to control that aspect of pinmux to support such SoCs. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/state'Sascha Hauer2016-11-142-2/+9
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| * | of_path: handle no driver for deviceSascha Hauer2016-10-201-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | in __of_find_path it can happen that there is a device, but there is no driver for this device because it hasn't been probed yet. Return -ENODEV in this case to let the caller know that it has to try later again. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | state: driver: handle EPROBE_DEFERSascha Hauer2016-10-201-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | When state_new_from_node() returns -ENODEV that means that there is no device available for the node, so return -EPROBE_DEFER in this case and hope a device is there later. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/socfpga'Sascha Hauer2016-11-145-0/+325
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| * | | watchdog: add designware driverSteffen Trumtrar2016-11-033-0/+200
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Port the linux v4.8-rc1 Synopsys DesignWare watchdog driver to barebox. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | reset: import socfpga-reset driver from linuxSteffen Trumtrar2016-10-182-0/+125
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Port the linux v4.8-rc1 reset-socfpga driver to barebox. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | Merge branch 'for-next/pci'Sascha Hauer2016-11-141-20/+32
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| * | | | PCI: split PCI hierarchy enumeration and config from device registrationLucas Stach2016-11-031-15/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This gets rid of some of the special cases in the bus scanning function by splitting hierarchy enumeration and configuration and the actual device registration into 2 passes. This ensures that the PCI hierarchy below a root port is completely set up before any device driver is probed. This simplifies the code and makes it less error prone, while moving the PCI address space layout closer to the one used by Linux. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | PCI: align BAR address to BAR sizeLucas Stach2016-11-031-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PCI BARs require their address to be at least aligned to their size, otherwise address decoding will fail as the base address gets rounded down. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | PCI: align address range before scanning bridgeLucas Stach2016-11-031-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Otherwise we may end up with a too low base address and push requests for the upstream bus onto the downstream side. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | PCI: only check specific flag for 64bit BARLucas Stach2016-11-031-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The memory type may include other flags, so just check for the 64bit allocation flag to see if the BAR is a 64bit one. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | PCI: add some useful debug outputLucas Stach2016-11-031-0/+6
| | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | This makes diagnosing problems in address space allocation much easier. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | Merge branch 'for-next/net'Sascha Hauer2016-11-141-4/+8
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| * | | | net/designware: add explicit reset of {tx|rx}_currdescnumIan Abbott2016-11-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Driver "init" function might be called multiple times. On every "init" Tx/Rx buffer descriptors are initialized: "descs_init" -> "{tx|rx}_descs_init". In its turn those init functions set MAC's "{tx|rx}desclistaddr" to point on the first buffer descriptor in the list. So CPU to start operation from the first buffer descriptor as well after every "init" we have to reset "{tx|rx}_currdescnum". [Original U-Boot patch by Alexey Brodkin <abrodkin@synopsys.com>] Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | net: designware: Respect "bus mode" register contents on SW resetIan Abbott2016-11-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "bus mode" register contains lots of fields and some of them don't expect to be written with 0 (zero). So since we're only interested in resetting MAC (which is done with setting the least significant bit of this register with "0") I believe it's better to modify only 1 bit of the register. [Original U-Boot patch by Alexey Brodkin <abrodkin@synopsys.com>] Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | net/designware: Do not select MIIPORT for RGMII interfaceIan Abbott2016-11-091-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not select MIIPORT for RGMII interface [Original U-Boot patch by Vipin Kumar <vipin.kumar@st.com>] Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | net/designware: Consecutive writes to the same register to be avoidedIan Abbott2016-11-091-2/+2
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are a few registers where consecutive writes to the same location should be avoided or have a delay. According to Synopsys, here is a list of the registers and bit(s) where consecutive writes should be avoided or a delay is required: DMA Registers: Register 0 Bit 7 Register 6 All bits except for 24, 16-13, 2-1. GMAC Registers: Registers 0-3 All bits Registers 6-7 All bits Register 10 All bits Register 11 All bits except for 5-6. Registers 16-47 All bits Register 48 All bits except for 18-16, 14. Register 448 Bit 4. Register 459 Bits 0-3. [Original U-Boot patch by Dinh Nguyen <dinguyen@altera.com>] Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | Merge branch 'for-next/mvebu'Sascha Hauer2016-11-143-58/+61
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| * | | | pinctrl: mvebu: fix a comment about mv78460Uwe Kleine-König2016-10-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It's pin mpp57 that has function vdd/cpu2-3-pd Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | pinctrl: mvebu: sync mpp names to Linux 4.9-rc1Uwe Kleine-König2016-10-192-56/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linux changed several mpp names in commits: 438881dfddb9 (pinctrl: mvebu: armada-370: fix spi0 pin description) bc99357f3690 (pinctrl: mvebu: armada-xp: remove non-existing NAND pins) 80b3d04feab5 (pinctrl: mvebu: armada-xp: remove non-existing VDD cpu_pd functions) 100dc5d84095 (pinctrl: mvebu: armada-{38x,39x,xp}: normalize naming of DRAM functions) 7bd6a26db6f9 (pinctrl: mvebu: armada-{370,375,38x,39x}: normalize dev pins) dae5597f253a (pinctrl: mvebu: armada-{370,375,38x,39x,xp}: normalize TDM pins) d4974c16ed22 (pinctrl: mvebu: armada-{370,375}: normalize PCIe pins) f32f01e1ba6b (pinctrl: mvebu: armada-{370,375}: normalize audio pins) a361cbc575d6 (pinctrl: mvebu: armada-{370,xp}: normalize ethernet txclkout pins) bfacb5669474 (pinctrl: mvebu: armada-370: align VDD cpu-pd pin naming with datasheet) 9e05db29e2ac (pinctrl: mvebu: armada-370: align spi1 clock pin naming) 50a7d13d2410 (pinctrl: mvebu: armada-xp: rename spi to spi0) 88b355f1e4e5 (pinctrl: mvebu: armada-xp: add spi1 function) fb53b61d7768 (pinctrl: mvebu: armada-xp: add nand rb function) b19bf3797679 (pinctrl: mvebu: armada-xp: add dram functions) Adapt the barebox mvebu drivers accordingly. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | spi: mvebu: make more than one device on a bus workUwe Kleine-König2016-10-191-1/+1
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | The mvebu socs support up to 8 chip selects. Make use of them. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | Merge branch 'for-next/misc'Sascha Hauer2016-11-146-6/+33
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| * | | | clk: add clock command completionSascha Hauer2016-11-081-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds tab completion for the clk_* commands. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | net: phy: micrel: Do not overwrite reserved bitsSascha Hauer2016-11-081-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ksz8021_config_init() unconditionally sets the KSZPHY_OMSO_RMII_OVERRIDE bit. This is since the initial micrel phy commit, so it's not reproducible where this comes from and why this is done. Neither U-Boot nor the kernel ever touch this bit and so should we. Also, instead of doing a write only operation, read/modify/write the bit we actually want to change. This fixes operation on a KSZ8081MLX which is a MII only phy. KSZPHY_OMSO_RMII_OVERRIDE is reserved here and must be written to 0. KSZPHY_OMSO_MII_OVERRIDE is default 1 and must be written as 1. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | net: e1000: set edev parent pointerLucas Stach2016-11-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This way the ethernet device will show up at the correct point in the device hierarchy. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | of: fix typosAntony Pavlov2016-10-182-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ubi: fix spellingYegor Yefremov2016-10-121-3/+3
| |/ / / | | | | | | | | | | | | | | | | Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | Merge branch 'for-next/imx'Sascha Hauer2016-11-142-0/+5
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| * | | | serial: i.MX: Add i.MX6ul supportSascha Hauer2016-11-081-0/+3
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | pinmux: imx-iomux-v3: Add i.MX6ul supportSascha Hauer2016-11-081-0/+2
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | | of: of_find_path: Add support for new partition bindingSascha Hauer2016-11-111-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The partitions now may be in a subnode of the actual device node. Eventually go another step up in the hierarchy if required. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | | of: partitions: Support new bindingSascha Hauer2016-11-111-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new binding recommends to put the partitions into a subnode with compatible "fixed-partitions". Add support for this binding. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | | mtd: spi-nor: add MX25U2033EAlexander Kurz2016-11-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This chip can be found in 4th generation Kindle devices Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | | mtd: nand: nand_mxs: Fix readtotal calculationChristian Hemp2016-11-111-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The calculation of readtotal must be bit alligend. If not the bch core finds bit flips in every page, because readtotal is too small. This bug was mostly introduced since commit "51061a9 mtd: nand: nand_mxs: Add subpage read support". Tested with: nand: NAND device: Manufacturer ID: 0x01, Chip ID: 0xd3 (AMD/Spansion S34ML08G2), 1024MiB, page size: 2048, OOB size: 128 nand: NAND device: Manufacturer ID: 0x2c, Chip ID: 0xdc (Micron MT29F4G08ABADAWP), 512MiB, page size: 2048, OOB size: 64 nand: NAND device: Manufacturer ID: 0xec, Chip ID: 0xd3 (Samsung NAND 1GiB 3,3V 8-bit), 1024MiB, page size: 2048, OOB size: 64 Signed-off-by: Christian Hemp <c.hemp@phytec.de> Signed-off-by: Stefan Lengfeld <s.lengfeld@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | | mtd: Make UBI detection more robustSascha Hauer2016-11-111-11/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we want to detect if a mtd device contains an UBI image then testing the first block is not enough since it can always happen that UBI has just erased the block before the power failed during last boot. Since UBI only ever erases one block at a time and directly writes the ec header to it afterwards, it shouldn't be necessary to scan the whole device for UBI data. Scan the first 64 blocks. The first non-empty block then must contain UBI data, if instead we find foreign data we assume that no UBI is on that mtd device. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | | nand: imx6: Changed default NAND clockDaniel Schultz2016-11-111-1/+1
| |_|/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Barebox recognized false bad erase blocks while booting from a Spansion NAND (1). This error occurred due a to high clock. The Kernel sets the default NAND clock to 22Mhz. So, to fix this error and to be more identical with the Kernel, the Barebox should be too. 1: nand: NAND device: Manufacturer ID: 0x01, Chip ID: 0xd3 (AMD/Spansion S34ML08G2), 1024MiB, page size: 2048, OOB size: 128 Signed-off-by: Daniel Schultz <d.schultz@phytec.de> Tested-by: Stefan Lengfeld <s.lengfeld@phytec.de> Signed-off-by: Christian Hemp <c.hemp@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | net: e1000: fix i210 register remappingLucas Stach2016-11-031-3/+2
| |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | Don't mask out the remapping flag before checking the register offset, otherwise none of the switch statements will ever match. Fixes: ff6a64d42ffc (e1000: Consolidate register offset fixups) Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | mtd: ubi: enable thread earlierSascha Hauer2016-10-191-9/+5
| |/ |/| | | | | | | | | | | | | | | | | | | Since "57cebc4 mtd: ubi: Fix scrubbing during attach" we make sure that the wear level worker does not start too early. However, now there are cases when the worker starts too late. When a ubi image is freshly written a volume may be autoresized. This has to be done after the wear level worker is started because otherwise the initial fastmap update will not be able to find any anchor PEBs. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | mtd: ubi: Fix scrubbing during attachSascha Hauer2016-10-113-3/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ensure_wear_leveling() is called at the end of ubi_wl_init() and may come to the decision to scrub some blocks. In the Kernel this is done in a separate thread, but in barebox we do this synchronously. The problem is that during ubi_wl_init() the EBA system is not yet initialized (ubi_eba_init() is not yet called), so the wear level worker hits a NULL pointer deref when the fastmap needs to be updated and ubi_write_fastmap() accesses vol->eba_tbl. Solve this by honoring the ubi->thread_enabled flag which is only set to true when UBI is sufficiently initialized. This means we now can have multiple works queued, so we can no longer simply do one work when queued, but instead have to continue to do work until all work is done. The best place to do so is a ubi_thread() function which behaves similar to the Kernel function with the same name, but is called synchronously in barebox. To make sure that the initially queued works are done, the call to (no-op) wake_up_process() at the end of ubi_attach_mtd_dev() is replaced with a call to ubi_thread(). While at it also honor the ubi->ro_mode flag to make sure we do not do any wear leveling work on readonly UBI devices. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/usb'Sascha Hauer2016-10-1010-39/+292
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| * | usb: imx-us-phy: implement notify_(dis)concectSascha Hauer2016-09-291-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i.MX6 USB phy does not recognize disconnects of high speed devices when the USBPHY_CTRL_ENHOSTDISCONDETECT is not set. The phy does not work properly though when this bit is always set, so implement the notify_(dis)concect() callbacks to set this bit whenever a high speed device is connected and to clear it again when the device is disconnected. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | usb: imx-us-phy: Convert driver to generic phy supportSascha Hauer2016-09-293-4/+66
| | | | | | | | | | | | | | | | | | | | | The generic phy layer now supports USB phys, so convert the driver over to use it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | phy: Add usb-nop-xceiv supportSascha Hauer2016-09-293-4/+116
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add a nop usb transcveiver driver. At the moment it does nothing, so is nothing more than a driver to satisfy the device tree dependencies. clk / vbus-regulator / vbus-detect-gpio support can be added later. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-28 05:13:28 +0000