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* | | Merge branch 'for-next/net'Sascha Hauer2019-04-094-1/+354
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| * | | realtek phy driverSascha Hauer2019-03-113-0/+178
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | net: phy: Add register access helper functions for physSascha Hauer2019-03-112-1/+176
| |/ / | | | | | | | | | | | | | | | | | | Linux has phy helpers to access paged registers and to modify phy registers. Add them to barebox for upcoming realtek phy support. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/misc'Sascha Hauer2019-04-098-23/+42
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| * | | treewide: surround Kconfig file paths with double quotesMasahiro Yamada2019-03-216-15/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on Linux commit 8636a1f9677db4f883f29a072f401303acfc2edd This will be needed when you sync Kconfig with Linux 5.0 or later. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | drivers: video: Fix parsing oftree timingsAlexander Shiyan2019-03-181-8/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the parsing of the display timings options if the range is specified (min/typ/max). Also fixed the double release of memory in case of failure. barebox 2018.12.0-00341-g23b28d33a-dirty #6 Fri Mar 15 09:20:25 MSK 2019 Board: Mega-Milas Informer i.MX6 detected i.MX6 Quad revision 1.2 i.MX reset reason POR (SRSR: 0x00000001) mdio_bus: miibus0: probed eth0: got preset MAC address: 50:2d:f4:07:71:0b nand: NAND device: Manufacturer ID: 0xec, Chip ID: 0xd3 (Samsung NAND 1GiB 3,3V 8-bit), 1024MiB, page size: 2048, OOB size: 64 Bad block table found at page 524224, version 0x01 Bad block table found at page 524160, version 0x01 m25p80 flash@00: n25q128a13 (16384 Kbytes) imx-usb 2184000.usb@2184000: USB EHCI 1.00 imx-usb 2184200.usb@2184200: USB EHCI 1.00 imx-esdhc 2198000.usdhc@2198000: registered as mmc2 imx-ipuv3 2400000.ipu@2400000: IPUv3H probed ERROR: /ldb/lvds-channel@0/display-timings/PH320240T: illegal timing specification in clock-frequency ERROR: /ldb/lvds-channel@0/display-timings/PH320240T: error reading timing properties ERROR: /ldb/lvds-channel@0: error in timing 1 ERROR: unable to handle NULL pointer dereference at address 0x00000013 pc : [<4fe05742>] lr : [<4fe05849>] sp : 4ffefa80 ip : ffffffff fp : 2fefe84c r10: 2ff656e8 r9 : 0000002c r8 : 2ff19630 r7 : 00000000 r6 : 0000004c r5 : 2ff65960 r4 : 00000007 r3 : 00000013 r2 : 00000000 r1 : 4fe87584 r0 : 2fefb460 Flags: nzcv IRQs off FIQs off Mode SVC_32 [<4fe05742>] (remove_free_block+0xe/0x3e) from [<4fe05849>] (block_locate_free+0x7f/0x88) [<4fe05849>] (block_locate_free+0x7f/0x88) from [<4fe0599b>] (tlsf_malloc+0x17/0x32) [<4fe0599b>] (tlsf_malloc+0x17/0x32) from [<4fe0559b>] (malloc+0x13/0x24) [<4fe0559b>] (malloc+0x13/0x24) from [<4fe3a1f3>] (strdup+0x11/0x22) [<4fe3a1f3>] (strdup+0x11/0x22) from [<4fe006f3>] (pr_puts+0x33/0x84) [<4fe006f3>] (pr_puts+0x33/0x84) from [<4fe00803>] (dev_printf+0x6f/0x8c) [<4fe00803>] (dev_printf+0x6f/0x8c) from [<00000000>] (0x0) [<4fe54715>] (unwind_backtrace+0x1/0x60) from [<4fe00de1>] (panic+0x1d/0x34) [<4fe00de1>] (panic+0x1d/0x34) from [<4fe5285d>] (do_exception+0xd/0x10) [<4fe5285d>] (do_exception+0xd/0x10) from [<4fe528bd>] (do_data_abort+0x21/0x2c) [<4fe528bd>] (do_data_abort+0x21/0x2c) from [<4fe524d4>] (do_abort_6+0x48/0x54) ### ERROR ### Please RESET the board ### Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | usb: dwc3: Toggle GCTL.CORESOFTRESET as a first stepAndrey Smirnov2019-03-181-0/+21
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Toggle GCTL.CORESOFTRESET before trying to access any of the block's registers. Without this additional step, first read of DWC3_GHWPARAMS* that follows results in assertion of GSTS.CSRTIMEOUT and IP block stuck in a non-functional state. Note that all above has only been observerd on i.MX8MQ (ZII Zest board) for USB1 controller. USB2 doesn't seem to be affected by this. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/layerscape'Sascha Hauer2019-04-0830-19/+9150
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| * | | clk: Add Layerscape clk supportSascha Hauer2019-03-132-0/+666
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for the clock controller found on Layerscape SoCs. This is mostly an adoption of the corresponding Linux driver. This is tested on the LS1046a SoC. Other ARM based Layerscape SoCs should work aswell, support for the PowerPC based SoCs has been removed. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ddr: fsl: Add Freescale ddr driverSascha Hauer2019-03-1318-0/+7043
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the Freescale ddr driver used on various PowerPC and Layerscape SoCs. This is based on U-Boot-2019.01 but with many adjustments: - PowerPC support has been removed - CPP #ifdeffery replaced with C - No more global variables/functions expected from the driver, configuration is passed by the board code which calls the driver We already have the driver in the tree in an older version forked from U-Boot-2013.04. This version lacks Layerscape support and many quirks in the driver are PowerPC specific. Since the existing driver should work on all known PowerPC and PowerPC is a dead end I decided not to improve the existing driver and instead add a new Layerscape specific driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | i2c: i.MX: Add layerscape supportSascha Hauer2019-03-132-2/+4
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | watchdog: imx: Add big endian register access supportSascha Hauer2019-03-133-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Layerscape SoCs feature the same watchdog as the i.MX SoCs, but in big endian mode. Add support for it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | watchdog: imx: Add register accessor functionsSascha Hauer2019-03-131-14/+24
| | | | | | | | | | | | | | | | | | | | | | | | In preparation of adding big endian support in the next step. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | esdhc-xload: Add support for LayerscapeSascha Hauer2019-03-131-1/+59
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | net: Add Freescale FMan ethernet supportSascha Hauer2019-03-133-0/+1342
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds ethernet support for the Freecale Layerscape SoCs. The architecture in these SoCs is called "Data Path Acceleration Architecture" (DPAA). It is comprised of: - The Queue Manager (QMan) - Buffer Manager (BMan) - Frame Manager (FMan) - Multirate Ethernet Media Access Controller (mEMAC) The code is based on the corresponding U-Boot driver enriched with device tree parsing and proper device driver support. Tested on LS1046a, should work on other SoCs aswell with some minor quirks. SerDes support has been removed for now. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | mci: imx-esdhc: Actually enable cache snoopingSascha Hauer2019-03-131-1/+2
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | 15b64fd520 introduced the ESDHC_FLAG_CACHE_SNOOPING for layerscape support, but didn't actually set it for layerscape. Add the new flag to the layerscape SoC data. Fixes: 15b64fd520 ("mci: imx-esdhc: Add layerscape support") Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | / of: Fix reproducible names for #address-cells != 1Sascha Hauer2019-03-181-2/+2
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | For the new "fixed-partitions" binding we ignore the partitions subnode for creating reproducible names and set node to its parent. To get the number of address cells we must call of_n_addr_cells() before setting node to its parent though, not afterwards. With the current behaviour we always get OF_ROOT_NODE_ADDR_CELLS_DEFAULT (=1). This happens to work then the partitioned device is less than 4GiB in size. On bigger devices #address-cells = <2> is chosen by the mtd partition fixup code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reported-by: Bastian Krause <bst@pengutronix.de>
* | mci: imx-esdhc: resolve conflicting flagsAlexander Kurz2019-03-181-4/+5
| | | | | | | | | | | | | | | | | | | | | | With commit 3354adee3920 ("mci: imx-esdhc: Add bigendian register access support") and commit 15b64fd520c2 ("mci: imx-esdhc: Add layerscape support") two ESDHC_FLAGs got assigned to already existing values. This conflict made the imx6sl usdhc appear to be big endian. Resolve this conflict by assign the new flags to the next vacant values. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | mci: imx-esdhc-pbl: initialize is_beChristian Hemp2019-03-181-0/+2
|/ | | | | | | | | Initialize is_be, otherwise the value of is_be is undefined. So it is possible that the i.MX8 will not boot because the bigendian functions are used. Signed-off-by: Christian Hemp <c.hemp@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/spd'Sascha Hauer2019-03-072-3/+3
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| * crc: import crc_itu_t() from kernelSascha Hauer2019-03-042-3/+3
| | | | | | | | | | | | | | | | Our cyc_crc16() function is the same function as crc_itu_t() in the Linux kernel. Import and use crc_itu_t() from the Kernel for consistency. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/rpi'Sascha Hauer2019-03-077-7/+71
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| * | mci: bcm2835: parse other device tree properties.Tomaz Solc2019-02-191-0/+3
| | | | | | | | | | | | | | | | | | | | | The driver was missing a call to mci_of_parse() which fills in properties such as "bus-width", "no-sd" into the mci_host struct. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | mci: bcm2835: use device_initcall(), not coredev.Tomaz Solc2019-02-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pinctrl driver needs to be initialized before mci driver on Raspberry Pi. Otherwise the pinctrl device tree properties in the mci node are ignored. pinctrl is initialized by coredevice_initcall(), so moving mci-bcm2835 to device_initcall() ensures that it is initialized later. There is no reason for mci-bcm2835 to use coredevice_initcall(). Other mci drivers already use device_initcall(). Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | pinctrl: bcm2835: register the pin controller.Tomaz Solc2019-02-191-1/+51
| | | | | | | | | | | | | | | | | | | | | This adds hooks for the pin controller driver to the existing bcm2835_set_function(). Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | pinctrl: bcm2835: move existing code from gpio.Tomaz Solc2019-02-195-5/+7
| | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | Kconfig: add pin controllers submenu.Tomaz Solc2019-02-191-0/+4
| | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | watchdog: bcm2835: set timeout_max.Tomaz Solc2019-02-181-0/+5
| | | | | | | | | | | | | | | | | | BCM2835 watchdog timeout can be set to maximum 15 seconds (0xffffff >> 16). Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/nvme'Sascha Hauer2019-03-0713-24/+1491
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| * | | drivers: Import a very basic NVME implementation from LinuxAndrey Smirnov2019-02-189-0/+1487
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import a very abridged NVME implementation from Linux kernel in order to be able to access NVME storage attached via PCIe. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | drivers: Make use of device_pci_driver()Andrey Smirnov2019-02-184-24/+4
| |/ / | | | | | | | | | | | | | | | | | | Replace all of the generic PCI boilerplate with device_pci_driver(). Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/misc'Sascha Hauer2019-03-073-8/+2
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| * | | PCI: dwc: tune down link up messagesLucas Stach2019-03-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function may be called repeatedly while establishing the link, so printing a message each time a working link is found can add quite a bit of noise. Tune those messages down to the debug level. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | drivers: Drop dummy_probe()Andrey Smirnov2019-02-271-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Drop dummy_probe() due to lack of users in the tree. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | watchdog: fix WATCHDOG_POLLER menuconfigOleksij Rempel2019-02-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | make it properly represented by menuconfig Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | Merge branch 'for-next/imx8-usb'Sascha Hauer2019-03-0723-236/+4105
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| * | | | usb: usb251xb: add usb data lane port swap featureAndrey Smirnov2019-02-221-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Port of Linux patch https://patchwork.kernel.org/patch/10766235/ The HW can swap the USB differential-pair (D+/D-) for each port separately. So the USB signals can be re-aligned with a misplaced USB connector on the PCB. Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Reviewed-by: Richard Leitner <richard.leitner@skidata.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | usb: Port Microchip USB251x USB hub driver from LinuxAndrey Smirnov2019-02-225-0/+695
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Port Microchip USB251x USB hub driver from Linux. Needed by ZII's i.MX8MQ boards. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | usb: Import DWC3 USB controller driver from LinuxAndrey Smirnov2019-02-229-0/+2783
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import DWC3 USB controller driver from Linux. This is a bare minimum port of the code needed to support USB host functionality on i.MX8MQ. No other use-case is explicitly supported. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | clk: Import a subset of clk_bulk API from LinuxAndrey Smirnov2019-02-222-1/+104
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import a subset of clk_bulk API from Linux to support porting kernel code that uses it. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | clk: Drop separate definitions of clk_put()Andrey Smirnov2019-02-221-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Regardless of the value of CONFIG_HAVE_CLK, clk_put() implementation is always a no-op. Move the definition to linux/clk.h and drop the rest of the code implementing it. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | phy: Port i.MX8MQ USB PHY driver from LinuxAndrey Smirnov2019-02-225-0/+138
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Port i.MX8MQ USB PHY driver from Linux. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | phy: core: Assume EPROBE_DEFER in of_phy_provider_lookup()Andrey Smirnov2019-02-221-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to support PHY driver probe deferral change the code to assume EPROBE_DEFER instead of ENODEV when requested PHY is missing from phy_provider_list. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | usb: xhci-hcd: Make use of lo_hi_readq/writeq()Andrey Smirnov2019-02-221-10/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make use of lo_hi_readq/writeq() to implement xhci_read/write_64() helpers, same as it is done in the Linux kernel. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | usb: xhci-hcd: Simplify route string building loopAndrey Smirnov2019-02-221-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simplify route string building loop by avoiding checking top_dev->parent->descriptor->bDeviceClass twice. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | usb: xhci-hcd: Initialize TRT flag for xHCI >= 1.0Andrey Smirnov2019-02-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Initialize TRT flag for xHCI >= 1.0, not just == 1.0. This is what Linux xHCI driver does. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | usb: xhci-hcd: Check usb_pipein(pipe) only once in xhci_submit_normal()Andrey Smirnov2019-02-221-12/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simplfy xhci_submit_normal()'s logic a bit by using helper variables and making sure that usb_pipein(pipe) is only called once. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | usb: xhci-hcd: Drop 'dma' field from struct xhci_hcdAndrey Smirnov2019-02-222-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Drop 'dma' field from struct xhci_hcd since it is not really used anywhere. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | usb: xhci-hcd: Simplify TRB initialization codeAndrey Smirnov2019-02-221-50/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current TRB initialization code in xHCI driver is: a) Somewhat inconsistent in endianness correctness: LE is insured in some places whereas in some places it isn't b) Somewhat inconsistent in how DMA buffer address is being written: some places utilize xhci_write_64, whereas others just assing cmd_trb field directly c) A bit wasetful since in a number of codepaths where TRB is used it is memset to zero first only to have 80+% of its fields changed to something else right after. To fix all of the above introduce xhci_init_event_cmd_trb(), that will initialize all of the fileds to desired values only once as well as taking care of endianness. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | usb: xhci-hcd: Convert xhci_submit_control() to use dma_map_single()Andrey Smirnov2019-02-221-7/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert xhci_submit_control() to use dma_(un)map_single(). These functions both allow us to handle potential physical/virtual address differences as well as allowing to drop a number of typecasts. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>