| Commit message (Collapse) | Author | Age | Files | Lines |
|
|
|
| |
refacture, remove static eth_device because it does not work with more than one device
|
|
|
|
| |
moved to drivers/net
|
|
|
|
| |
add buffer write option for cfi driver
|
|
|
|
| |
CFG_FLASH_USE_BUFFER_WRITE -> CONFIG_CFI_BUFFER_WRITE
|
|
|
|
| |
make it work again
|
|
|
|
| |
implement initcalls
|
|
|
|
| |
thousands of things
|
|
|
|
| |
add dm9000 network driver
|
|
|
|
| |
new api, cleanup
|
|
|
|
| |
rename
|
|
|
|
| |
rename
|
|
|
|
| |
do not know anymore
|
|
|
|
| |
removed ifdefs
|
| |
|
| |
|
|
|
|
| |
moved
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Currently U-Boot uses globally defined eth_* functions. This is
horribly unflexible. This patch replaces the global functions
with pointers from structs. We could also use CONFIG_NET_MULTI,
but this has other implications, though we should merge this
some day.
Also, U-Boot has no unique way to handle MAC addresses. Each and
every board and network driver uses it's own mechanism to set the
MAC address. There are several problems which I've for too often.
For example everything goes well if we boot from network, but when
we boot from flash U-Boot forgets to set the MAC address and the
linux network driver has none.
This patch adds [gs]et_mac_address to the eth_device struct and
handles it as follows:
- First try to get a valid MAC address from the EEPROM and set
'ethaddr' accordingly.
- If no valid MAC address is found in the EEPROM (or no EEPROM is
connected), we set the devices MAC address from 'ethaddr'
This is done in eth_initialize which is called on startup for
every board.
|
|
|
|
| |
generic/u-boot-cmd-splash.diff
|
| |
|
| |
|
| |
|
| |
|
|
|
|
| |
rename
|
|
|
|
| |
move serial drivers to drivers/serial
|
|
|
|
| |
move all ethernet drivers to drivers/net
|
|
|
|
| |
Kconfig WIP
|
|
|
|
| |
timeout has 64bit
|
|
|
|
| |
change to clocksource api
|
|
|
|
| |
comment out most stuff
|
|
|
|
| |
remove get_tbclk from architectures other than powerpc
|
|
|
|
| |
update Makefiles to kbuild
|
|
|
|
| |
remove dataflash support
|
|
|
|
| |
remove all #if 0 and #if 1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Here the description from Brian Brelsford <Brian_Brelsford@dell.com>:
The Hynix part returns a 0x1d in the 4th ID byte. The Samsung part
returns a 0x15. In the code fragment below bits [1:0] determine the
page size, it is ANDed via "(extid & 0x3)" then shifted out. The
next field is also ANDed with 0x3. However this is a one bit field
as defined in the Hynix and Samsung parts in the 4th ID byte that
determins the oobsize, not a two bit field. It works on Samsung as
bits[3:2] are 01. However for the Hynix there is a 11 in these two
bits, so the oob size gets messed up.
I checked the correct linux code and the suggested fix from Brian is
also available in the linux nand mtd driver.
Signed-off-by: Stefan Roese <sr@denx.de>
|
| |
|
|\ |
|
| |
| |
| |
| | |
offset to go into CFI mode)
|
|\ \
| |/
|/| |
|
| |
| |
| |
| | |
Signed-off-by: Heiko Schocher <hs@denx.de>
|
| | |
|
|\ \ |
|
| | |
| | |
| | |
| | | |
Signed-off-by: Timur Tabi <timur@freescale.com>
|
| | |
| | |
| | |
| | | |
Signed-off-by: Timur Tabi <timur@freescale.com>
|
| |\ \ |
|
| | | |
| | | |
| | | |
| | | |
| | | | |
give initial values for reg_num, shift, p_cmxucr in ucc_set_clk_src
since they are passed by reference to ucc_get_cmxucr_reg and assigned.
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Update the 83xx tree to use I2C support in drivers/fsl_i2c.c. Delete
cpu/mpc83xx/i2c.c, include/asm-ppc/i2c.h, and all references to those files.
Added multiple I2C bus support to fsl_i2c.c.
Signed-off-by: Timur Tabi <timur@freescale.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Replace all instances of CFG_IMMRBAR with CFG_IMMR, so that the 83xx
tree matches the other 8xxx trees.
Signed-off-by: Timur Tabi <timur@freescale.com>
|
| | | |
| | | |
| | | |
| | | | |
this patch adds support for the QUICC Engine based UCC gigabit ethernet device.
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
PREREQUISITE PATCHES:
* This patch can only be applied after the following patches have been applied:
1) DNX#2006090742000024 "Add support for multiple I2C buses"
2) DNX#2006090742000033 "Multi-bus I2C implementation of MPC834x"
3) DNX#2006091242000041 "Additional MPC8349 support for multibus i2c"
4) DNX#2006091242000078 "Add support for variable flash memory sizes on 83xx systems"
5) DNX#2006091242000069 "Add support for Errata DDR6 on MPC 834x systems"
CHANGELOG:
* Add support for the Freescale MPC8349E-mITX reference design platform.
The second TSEC (Vitesse 7385 switch) is not supported at this time.
Signed-off-by: Timur Tabi <timur@freescale.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
This patch addresses a problem when CONFIG_MTD_NAND_VERIFY_WRITE is
defined
and the write crosses a block boundary. The pointer to the verification
buffer (bufstart) is not being updated to reflect the starting of the
new
block so the verification of the second block fails.
CHANGELOG:
* Fix NAND FLASH page verification across block boundaries
|