| Commit message (Collapse) | Author | Age | Files | Lines |
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Add support for the Xilinx Zynq UltraScale+ MPSoC ZCU106 evaluation
board.
The changes are derived from the ZCU104 board support by applying
s/104/106/g (more or less).
Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.barebox.org/20210913121350.9307-2-michael.riesch@wolfvision.net
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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LiteX is a Migen-based System on Chip, supporting softcore
VexRiscv CPU, a 32-bits Linux Capable RISC-V CPU.
See https://github.com/enjoy-digital/litex and
https://github.com/litex-hub/linux-on-litex-vexriscv
for details.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Acked-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210817101104.114945-8-antonynpavlov@gmail.com
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The jozacp is an industrial imx6ull based board with ethernet,
wifi and zigbee.
Note: this patch includes WIP version of the devicetree:
arch/arm/dts/imx6ull-jozacp.dtsi. This devicetree will be reworked,
mainlined to the kernel and at the end replaced with the kernel
mainline version.
Signed-off-by: Robin van der Gracht <robin@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Link: https://lore.barebox.org/20210825125430.26901-5-o.rempel@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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With driver support in place, we can now build and run barebox in the
i.MX8MN. Following tested working:
- Setting up DDR4 SDRAM
- Booting from SD-Card
- Booting from eMMC
- Updating barebox in SD-Card/eMMC boot partition
- USB Fastboot, ACM gadgets
- UART
- Early I2C with bd71837
- Ethernet
- Loading and communicating with TF-A
The resulting image supports both DDR4 and LPDDR4. They use different
PMICs, so probing the i2c addresses of them indicates what DRAM type
to setup. I have only tested this on a DDR4 EVK, but the LPDDR4 code
is equivalent to what's already used in barebox with i.MX8M Mini
and Plus, so it should work(tm).
Notably missing:
- boot from USB SDP doesn't work. early debug_ll doesn't indicate
that barebox PBL was actually entered.
This can follow later though.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20211001100949.6891-9-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We have one other DT-enabled SAMA5D3 board already:
microchip-ksz8477-evb, which is basically a sama5d3 xplained in
different form factor and with a switch. Mimic what we do there to get
rid of the sama5d3 board code.
Unlike the microchip-ksz9477-evb, the barebox support for this board
includes NAND, which is not yet up to date with respect to DT:
- SMC for NAND configuration has no DT driver. Instead the board
driver create this device
- We don't support the newer NAND DT bindings (EBI). The device trees
fix this up, so barebox sees the old bindings with the upstream
partition layout. In future, this could be fixed.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210922065000.20970-6-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds support for the rk3568 evb board. Tested features so far are:
- 1st stage booting
- Network
- SD card
- eMMC
The dts files are based on the ones posted on the mailing lists, they
should be rebased on the upstream files once they show up in barebox.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.barebox.org/20210615141641.31577-11-s.hauer@pengutronix.de
Link: https://lore.barebox.org/20210621092802.27275-11-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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With the different drivers now in place, we have everything to start a
barebox image.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210619045055.779-30-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Having to manually swap the words in the MIPS Malta image for QEMU
little endian emulation is annoying.
Have the multi-image build for Malta generate a second .swapped
image that can be readily used if needed.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210604084704.17410-5-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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For CI, it would be useful to have the barebox build install the
artifacts into a directory. Add an install target that does this.
Example usage: make install INSTALL_PATH=install/
Unlike Linux, we don't set INSTALL_PATH to a default value, because
most barebox-enabled boards don't have barebox in a file system.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210604084704.17410-2-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This board is a low-cost 7" touchscreen virtual terminal for
agricultural applications.
There is no upstream Linux DT yet, so we add a minimal DT for use with the
bootloader in this patch.
Signed-off-by: David Jander <david@protonic.nl>
[lst: fixed and cleaned up for upstream]
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Link: https://lore.barebox.org/20210528133041.1109923-2-l.stach@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The SabreSD comes with different SoC variants. This patch adds support
for the i.MX6QP based board. the DCD data has been taken from U-Boot
2021.04
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.barebox.org/20210415140313.29161-1-s.hauer@pengutronix.de
Link: https://lore.barebox.org/20210526064249.25378-1-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add variant for 512MB RAM board.
Two firmware files will be generated - one for 256MB and 512MB
respectively; the choice for shipment has to be done and depends on the
underlying hardware.
Signed-off-by: Holger Assmann <h.assmann@pengutronix.de>
v4 ARM: webasto-ccbv2: Add variant with 512MB RAM
Link: https://lore.barebox.org/20210521144313.14990-1-h.assmann@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The Terasic DE10-Nano board is based on CycloneV SoCFPGA (5CSEBA6) with
What has been tested to work:
- SD card
- Gigabit network
- FPGA (FPPx16 & FPPx32)
Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
Link: https://lore.barebox.org/20210531194019.951-1-gwenj@trabucayre.com
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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With the recently added SiFive support, we now have enough functionality
to boot a HiFive board to shell:
qemu-system-riscv64 -M sifive_u serial_stdio \
-kernel./images/barebox-hifive-unleashed.img
Some more drivers need to be ported for this to be useful:
- sifive,spi0 needed for talking to SD-Card
- clocksource The riscv-timer seems to be 10x too fast
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210427202309.32077-12-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Rework the lowlevel init code to make it multiimage capable. With this
patch we can build first and second stage in one run.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Link: https://lore.barebox.org/20210423142829.29468-7-o.rempel@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds support for an older SKOV board, the arm9cpu.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Ulrich Ölmann <u.oelmann@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds support for Kamstrup mx7 concentrator board
Signed-off-by: Lars Pedersen <lapeddk@gmail.com>
Reviewed-by: Bruno Thomsen <bruno.thomsen@gmail.com>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The Skov platform potentially consists of many variants of CPUs (i.MX6S/DL and
i.MX6D/Q), NAND memories (size differs from 256 MiB to 8 GiB) and populated
SDRAM (256 MiB up to 2 GiB). All these variants share one PCB.
Some bootstrap resistors are provided which decode the variant and which allow
for it's detection at runtime. This information is needed to choose the bootspec
entry with the matching devicetree to boot the system. Based upon this mechanism
usage of a single Barebox image and Linux root filesystem for all known board
variants is made possible.
Signed-off-by: Juergen Borleis <jbe@pengutronix.de>
Signed-off-by: Enrico Jorns <ejo@pengutronix.de>
Signed-off-by: Ulrich Ölmann <u.oelmann@pengutronix.de>
Signed-off-by: Søren Andersen <san@skov.dk>
Signed-off-by: Sam Ravnborg <srn@skov.dk>
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We now have everything in place to migrate erizo to PBL.
As currently, this is the only board, we can drop all non-PBL support
in the same go.
Cc: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Other architectures would benefit from the generic DT image too.
Add a new arch-agnostic symbol that arches besides ARM can select.
The new symbol itself should not have a prompt as the help text for
each architecture likely differs (e.g. device tree handoff register).
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The STM32MP157A-EV1 and STM32MP157C-EV1 Evaluation boards are the
full-feature demonstration and development platforms for
STMicroelectronics Arm®-based dual Cortex®-A7 32 bits and
Cortex®-M4 32 bits MPUs in the STM32MP1 Series.
Add support for running barebox as SSBL on either of them.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The MNT Reform is a DIY Laptop, built around a Boundarydevices i.MX8MQ SoM.
This adds a pretty minimal support, as there is no upstream DT yet. It also
does not properly abstract the SoM (power supply init in MNT Reform lowlevel
code and only single DRAM configuration supported), as there are a lot of
variants of the SoM and I'm only able to test the single one that will be
shipped with the Reform.
What has been tested to work:
- SD card
- eMMC
- Gigabit network
- NVMe storage
There is a quirk in the board support: the Nitrogen SoM only allows to
configure one of the BOOT_MODE straps, which means the choices for the boot
selection are only "boot from fuses", which means eMMC boot and
"serial boot". As serial boot isn't really useful on the device (requires
USB A<->A cable with VBUS protection), we rely on the BootROM fallback to
boot from SD card in this mode. The board support code thus treats the
bootsource "serial" as SD card boot.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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As we now support both the stm32mp157a-dk1 and stm32mp157c-dk2 with
the same barebox image, we should call the board stm32mp15xx-dkx
instead. That's also how the upstream DTSI is named.
Suggested-by: Holger Assmann <has@pengutronix.de>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add support for the Webasto Common Communication Board Version 2. The
device tree included with barebox can eventually be replaced with the
required barebox changes when the ccbv2 device tree is upstream.
Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add a phyCORE-i.MX 6UL with eMMC. It has following features:
- i.MX 6UL
- 512 MB RAM
- eMMC
- 10/100 MBits Ethernet
- USB OTG
- USB Host
Signed-off-by: Yunus Bas <y.bas@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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When building out of tree we must explicitly include an absolute path
starting with $(srctree) as a relative path would be relative to
$(objtree).
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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i.MX6ULL
i.MX6UL and i.MX6ULL have different engines for Secure Boot on HABv4.
For better differentiation rename existing pcl063 flash headers to
pcl063ul and pcl063ull.
Signed-off-by: Maik Otto <m.otto@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Board consists of SoM with stm32mp157c with 4G eMMC and 512M DDR3 RAM.
Carrier board features USB and ETH interfaces and SD card connector.
USB and ETH interfaces not yet operational.
Boot from eMMC requires boot ack bit set.
Device Tree taken from v5 of kernel device tree off mailing list[1].
[1]: https://lore.kernel.org/linux-arm-kernel/20200724145107.35772-3-marcin.sloniewski@gmail.com/
Tested-by: Jookia <contact@jookia.org>
Tested-by: Xogium <contact@xogium.me>
Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Anees Rehman <anees.r3hman@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Oleksij and Kevin's Useless Devices.
O&KUD Max9331
AR9331 400MHz MIPS
64M DRAM
16M SPI Flash
4G USB Nand Flash
3 User LEDs
3 Ports(1Wan/2Lan)
1 TTL Debug Uart
Signed-off-by: Du Huanpeng <u74147@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds support for the NXP i.MX8MP-EVK board.
The SDRAM timings are taken from U-Boot-2020.07-rc4, other information
how to initialize the board are form U-Boot as well.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add initial support for 15 i.MX6 based Protonic boards.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The BootROM constrains us to a 64K big first stage bootloader. Add a PBL
entry point for a xload barebox that sets up the minimum necessary to
load a FAT32 barebox.bin from the SD-Card.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The BootROM constrains us to a 64K big first stage bootloader. Add a PBL
entry point for a xload barebox that sets up the minimum necessary to
load a FAT32 barebox.bin from the SD-Card.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Starting v4.13, Linux always uses thin archive instead of relocatable
ELF to combine builtin objects.
The thin archive is basically a text file that only contains paths to
object files.
As Linux commit 98ced886dd79 mentioned, this has a lot of benefits:
- save disk space for builds
- speed-up building a little
- fix some issues when liking a giant executable (for example,
allyesconfig on ARM Linux)
- work better with dead code elimination
The last one is important for barebox because pbl highly relies on the
dead code elimination (-f{function,data}-sections and --gc-sections)
dropping symbols that are unreachable from the linker's entry point.
The dead code elimination does not work if the same symbol names are
used in the pevious incremental link mechanism because the same name
symbols all go into the same section.
Commit a83c97f2a406 ("ARM: socfpga: generate smaller images when
multiple boards are selected") worked around it by giving a dedicate
section to each of the same name symbols. This workaround can go away.
built-in.o was renamed to built-in.a since it is now an archive.
built-in-pbl.o was renamed to built-in.pbl.a for consistency.
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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