summaryrefslogtreecommitdiffstats
path: root/arch/arm/boards/boundarydevices-nitrogen6/1066mhz_4x512mx16-qp.imxcfg
blob: 6409b745d727d18607e003d1636a76a962591d5b (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
/*
 * Copyright (C) 2016 Boundary Devices
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

/* NOC setup */
wm 32 0x00bb0008				0x00000004
wm 32 0x00bb000c				0x2891E41A
wm 32 0x00bb0038				0x00000564
wm 32 0x00bb0014				0x00000040
wm 32 0x00bb0028				0x00000020
wm 32 0x00bb002c				0x00000020

/* Disable all MMDC arbitration and reordering controls */
wm 32 0x021b0400				0x14420000

wm 32 MX6_MMDC_P0_MDPDC			0x00020036
wm 32 MX6_MMDC_P0_MDSCR			0x00008000
wm 32 MX6_MMDC_P0_MDCFG0		0x898E79A4
wm 32 MX6_MMDC_P0_MDCFG1		0xDB538F64
wm 32 MX6_MMDC_P0_MDCFG2		0x01FF00DD
wm 32 MX6_MMDC_P0_MDRWD			0x0f9f26d2
wm 32 MX6_MMDC_P0_MDOR			0x008E1023
wm 32 MX6_MMDC_P0_MDOTC			0x09444040
wm 32 MX6_MMDC_P0_MDPDC			0x00025576
wm 32 MX6_MMDC_P0_MDASP			0x00000047
wm 32 MX6_MMDC_P0_MDCTL			0xC41A0000
wm 32 MX6_MMDC_P0_MDSCR			0x04088032
wm 32 MX6_MMDC_P0_MDSCR			0x0408803a
wm 32 MX6_MMDC_P0_MDSCR			0x00008033
wm 32 MX6_MMDC_P0_MDSCR			0x0000803b
wm 32 MX6_MMDC_P0_MDSCR			0x00428031
wm 32 MX6_MMDC_P0_MDSCR			0x00428039
wm 32 MX6_MMDC_P0_MDSCR			0x19308030
wm 32 MX6_MMDC_P0_MDSCR			0x19308038
wm 32 MX6_MMDC_P0_MDSCR			0x04008040
wm 32 MX6_MMDC_P0_MDSCR			0x04008048
wm 32 MX6_MMDC_P0_MPZQHWCTRL	0xA1390003
wm 32 MX6_MMDC_P1_MPZQHWCTRL	0xA1390003
wm 32 MX6_MMDC_P0_MDREF			0x00007800
wm 32 MX6_MMDC_P0_MPODTCTRL		0x00022227
wm 32 MX6_MMDC_P1_MPODTCTRL		0x00022227
wm 32 MX6_MMDC_P0_MPDGCTRL0		0x4327033b
wm 32 MX6_MMDC_P0_MPDGCTRL1		0x0324031a
wm 32 MX6_MMDC_P1_MPDGCTRL0		0x43240337
wm 32 MX6_MMDC_P1_MPDGCTRL1		0x03210269
wm 32 MX6_MMDC_P0_MPRDDLCTL		0x483c3e4a
wm 32 MX6_MMDC_P1_MPRDDLCTL		0x423a3848
wm 32 MX6_MMDC_P0_MPWRDLCTL		0x33363a2c
wm 32 MX6_MMDC_P1_MPWRDLCTL		0x3e314137
wm 32 MX6_MMDC_P0_MPWLDECTRL0	0x00200026
wm 32 MX6_MMDC_P0_MPWLDECTRL1	0x00260021
wm 32 MX6_MMDC_P1_MPWLDECTRL0	0x00180028
wm 32 MX6_MMDC_P1_MPWLDECTRL1	0x000f001e
wm 32 MX6_MMDC_P0_MPMUR0		0x00000800
wm 32 MX6_MMDC_P1_MPMUR0		0x00000800
wm 32 MX6_MMDC_P0_MDSCR			0x00000000
wm 32 MX6_MMDC_P0_MAPSR			0x00011006