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soc vf610
loadaddr 0x80000000
dcdofs 0x400
#include <mach/vf610-iomux-regs.h>
#include <mach/vf610-ddrmc-regs.h>
/*
* Ungate all IP block clocks
*/
wm 32 0x4006b040 0xffffffff
wm 32 0x4006b044 0xffffffff
wm 32 0x4006b048 0xffffffff
wm 32 0x4006b04c 0xffffffff
wm 32 0x4006b050 0xffffffff
wm 32 0x4006b058 0xffffffff
wm 32 0x4006b05c 0xffffffff
wm 32 0x4006b060 0xffffffff
wm 32 0x4006b064 0xffffffff
wm 32 0x4006b068 0xffffffff
wm 32 0x4006b06c 0xffffffff
/*
* Turn PLL2 on
*/
wm 32 0x40050030 0x00002001 /* Fout = Fin * 22 */
/*
* Wait for PLLs to lock
*/
check 32 until_any_bit_set 0x40050030 0x80000000
clear_bits 32 0x4006b008 0x00000040
set_bits 32 0x4006b008 0x00002000
#include <mach/flash-header/vf610-iomux-ddr-default.imxcfg>
wm 32 0x400ae000 0x00000600
wm 32 0x400ae008 0x00000005
wm 32 0x400ae028 0x00013880
wm 32 0x400ae02c 0x00030d40
wm 32 0x400ae030 0x00000506
wm 32 0x400ae034 0x06040400
wm 32 0x400ae038 0x1006040e
wm 32 0x400ae040 0x04040000
wm 32 0x400ae044 0x006db00c
wm 32 0x400ae048 0x00000403
wm 32 0x400ae050 0x01000000
wm 32 0x400ae054 0x00060001
wm 32 0x400ae058 0x000c0000
wm 32 0x400ae05c 0x03000200
wm 32 0x400ae060 0x00000006
wm 32 0x400ae064 0x00010000
wm 32 0x400ae068 0x0c300068
wm 32 0x400ae070 0x00000000
wm 32 0x400ae074 0x00000003
wm 32 0x400ae078 0x0000000a
wm 32 0x400ae07c 0x006c0200
wm 32 0x400ae084 0x00010000
wm 32 0x400ae088 0x00050500
wm 32 0x400ae098 0x00000000
wm 32 0x400ae09c 0x04001002
wm 32 0x400ae0a4 0x00000001
wm 32 0x400ae0c0 0x00460420
wm 32 0x400ae0c4 0x00000000
wm 32 0x400ae0cc 0x00000000
wm 32 0x400ae0e4 0x02000000
wm 32 0x400ae108 0x01000200
wm 32 0x400ae10c 0x00000040
wm 32 0x400ae114 0x00000200
wm 32 0x400ae118 0x00000040
wm 32 0x400ae120 0x00000000
wm 32 0x400ae124 0x0a010100
wm 32 0x400ae128 0x01014040
wm 32 0x400ae12c 0x01010101
wm 32 0x400ae130 0x03030000
wm 32 0x400ae134 0x01000101
wm 32 0x400ae138 0x0700000c
wm 32 0x400ae13c 0x00000000
wm 32 0x400ae148 0x10000000
wm 32 0x400ae15c 0x01000000
wm 32 0x400ae160 0x00040000
wm 32 0x400ae164 0x00000002
wm 32 0x400ae16c 0x00020000
wm 32 0x400ae180 0x00002819
wm 32 0x400ae184 0x01000000
wm 32 0x400ae188 0x00000000
wm 32 0x400ae18c 0x00000000
wm 32 0x400ae198 0x00000000
wm 32 0x400ae1a4 0x00000c00
wm 32 0x400ae1a8 0x00000000
wm 32 0x400ae1b8 0x0000000c
wm 32 0x400ae1c8 0x00000000
wm 32 0x400ae1cc 0x00000000
wm 32 0x400ae1d4 0x00000000
wm 32 0x400ae1d8 0x01010000
wm 32 0x400ae1e0 0x02020000
wm 32 0x400ae1e4 0x00000202
wm 32 0x400ae1e8 0x01010064
wm 32 0x400ae1ec 0x00010101
wm 32 0x400ae1f0 0x00000064
wm 32 0x400ae1f8 0x00000800
wm 32 0x400ae210 0x00000506
wm 32 0x400ae224 0x00020000
wm 32 0x400ae228 0x01000000
wm 32 0x400ae22c 0x04070303
wm 32 0x400ae230 0x00000040
wm 32 0x400ae23c 0x06000080
wm 32 0x400ae240 0x04070303
wm 32 0x400ae244 0x00000040
wm 32 0x400ae248 0x00000040
wm 32 0x400ae24c 0x000f0000
wm 32 0x400ae250 0x000f0000
wm 32 0x400ae25c 0x00000101
wm 32 0x400ae268 0x682c4000
wm 32 0x400ae26c 0x00000012
wm 32 0x400ae278 0x00000006
wm 32 0x400ae284 0x00010202
#include <mach/flash-header/vf610-ddr-phy-default.imxcfg>
wm 32 0x400ae000 0x00000601
check 32 until_any_bit_set 0x400ae140 0x100
wm 32 0x80000000 0xa5a5a5a5
check 32 until_any_bit_set 0x80000000 0xa5a5a5a5
wm 32 0x400ae000 0x00000600
wm 32 0x400ae000 0x00000601
check 32 until_any_bit_set 0x400ae140 0x100
|
