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// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) 2014 Protonic Holland
*/
/dts-v1/;
#include <arm/imx6dl.dtsi>
#include "imx6qdl-prti6q.dtsi"
/ {
model = "Plymovent M2M board";
compatible = "ply,plym2m", "fsl,imx6dl";
memory {
reg = <0x10000000 0x10000000>;
};
leds: leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_leds>;
debug0 {
label = "debug0";
gpios = <&gpio1 8 0>;
linux,default-trigger = "heartbeat";
};
};
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rmii";
phy-reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
clocks = <&clks IMX6QDL_CLK_ENET>,
<&clks IMX6QDL_CLK_ENET>;
clock-names = "ipg", "ahb";
status = "okay";
};
&iomuxc {
pinctrl_hog: hoggrp {
fsl,pins = <
/* CAN1_SR GPIO output */
MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x13070
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 /* CAN1_TERM */
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0 /* TSC_BUSY */
/* HW revision detect */
MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x1b0b0 /* REV_ID0 */
MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x1b0b0 /* REV_ID1 */
MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x1b0b0 /* REV_ID2 */
MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b0 /* REV_ID3 */
MX6QDL_PAD_SD4_DAT4__GPIO2_IO12 0x1b0b0 /* REV_ID4 */
>;
};
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0
/* power enable, high active */
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
>;
};
pinctrl_ipu1_disp: ipudisp1grp {
fsl,pins = <
/* DSE 0x30 => 25 Ohm, 0x20 => 37 Ohm, 0x10 => 75 Ohm */
MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x30
MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x30
MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x30
MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x30
MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x30
MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x30
MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x30
MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x30
MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x30
MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x30
MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x30
MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x30
MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x30
MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x30
MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x30
MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x30
MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x30
MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x30
MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x30
MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x30
MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x30
MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x30
>;
};
pinctrl_enet: enetgrp {
fsl,pins = <
/* MX6QDL_ENET_PINGRP4 */
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b0b0
/* Phy reset */
MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22 0x1b0b0
/* nINTRP */
MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x1b0b0
>;
};
pinctrl_pwm1: pwm1grp {
fsl,pins = <
MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b0
>;
};
pinctrl_backlight_m2m: backlightm2mgrp {
};
pinctrl_leds: ledsgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0
>;
};
};
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