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|
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright 2016 TQ Systems GmbH
* Author: Marco Felsch
*/
/dts-v1/;
#include <dt-bindings/input/input.h>
#include "imx6ul-tqma6ulx.dtsi"
/ {
model = "TQ TQMa6ULx SoM on MBa6ULx";
compatible = "tq,mba6ulx", "tq,imx6ul-tqma6ul2l", "fsl,imx6ul";
chosen {
stdout-path = &uart1;
};
reg_mba6ul_3v3: regulator-mba6ul-3v3 {
compatible = "regulator-fixed";
regulator-name = "supply-mba6ul-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_mba6ul_5v0: regulator-mba6ul-5v0 {
compatible = "regulator-fixed";
regulator-name = "supply-mba6ul-5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
reg_otg2vbus_5v0: regulator-otg2-vbus-5v0 {
compatible = "regulator-fixed";
gpio = <&gpio3 21 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-name = "otg2-vbus-supply-5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <®_mba6ul_5v0>;
};
reg_otg1vbus_5v0: regulator-otg1-vbus-5v0 {
compatible = "regulator-fixed";
gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-name = "otg1-vbus-supply-5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <®_mba6ul_5v0>;
};
reg_fec_3v3: regulator-fec-3v3 {
compatible = "regulator-fixed";
regulator-name = "fec-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
vin-supply = <®_mba6ul_3v3>;
};
reg_mpcie: regulator-mpcie-1v5 {
compatible = "regulator-fixed";
pinctrl-names = "default";
regulator-name = "mpcie-1v5";
/* gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>; */
enable-active-high;
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
vin-supply = <®_mba6ul_3v3>;
};
};
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet1>;
phy-mode = "rmii";
phy-handle = <ðphy0>;
phy-supply = <®_fec_3v3>;
phy-reset-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
phy-reset-duration = <26>;
status = "okay";
};
&fec2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet2>;
phy-mode = "rmii";
phy-handle = <ðphy1>;
phy-supply = <®_fec_3v3>;
phy-reset-gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>;
phy-reset-duration = <26>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
max-speed = <100>;
reg = <0>;
/* ToDo: check if following 2 lines are required */
clocks = <&clks IMX6UL_CLK_ENET_REF>;
clock-names = "rmii-ref";
};
ethphy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
max-speed = <100>;
reg = <1>;
/* ToDo: check if following 2 lines are required */
clocks = <&clks IMX6UL_CLK_ENET2_REF>;
clock-names = "rmii-ref";
};
};
};
&i2c3 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
expander_io: gpio-expander@20 {
compatible = "nxp,pca9554";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
status = "okay";
};
expander_in: gpio-expander@21 {
compatible = "nxp,pca9554";
reg = <0x21>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_expander_irq>;
interrupt-parent = <&gpio5>;
interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
#interrupt-cells = <2>;
gpio-controller;
#gpio-cells = <2>;
status = "okay";
};
expander_out: gpio-expander@22 {
compatible = "nxp,pca9554";
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
status = "okay";
};
/* NXP SE97BTP with temperature sensor + eeprom */
jc42_1b: eeprom-temperature-sensor@1b {
compatible = "nxp,se97", "jedec,jc-42.4-temp";
reg = <0x1b>;
status = "okay";
};
se97_53: eeprom-temperature-sensor@53 {
compatible = "nxp,spd";
reg = <0x53>;
pagesize = <16>;
status = "okay";
};
};
&iomuxc {
pinctrl-names = "default";
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6UL_PAD_LCD_DATA00__I2C3_SDA 0x4001b8b0
MX6UL_PAD_LCD_DATA01__I2C3_SCL 0x4001b8b0
>;
};
pinctrl_enet1: enet1grp {
fsl,pins = <
MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0
MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b0a8
>;
};
pinctrl_enet2: enet2grp {
fsl,pins = <
MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0a0
MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0a0
MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b0a8
/* mdio */
MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
>;
};
pinctrl_expander_irq: expanderirqgrp {
fsl,pins = <
MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x1b0b1
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
>;
};
pinctrl_usb_otg1: usbotg1grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x00017059
MX6UL_PAD_GPIO1_IO01__USB_OTG1_OC 0x0001b0b0
/* PWR */
MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0x0001b099
>;
};
pinctrl_usb_otg2: usbotg2grp {
fsl,pins = <
/* reset */
MX6UL_PAD_LCD_DATA16__GPIO3_IO21 0x0001b099
>;
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x00017069
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x00017059
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x00017059
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x00017059
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x00017059
MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x00017059
/* CD */
MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x0001b099
>;
};
pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
fsl,pins = <
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x00017069
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x000170b9
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x000170b9
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x000170b9
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x000170b9
MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x000170b9
/* CD */
MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x0001b099
>;
};
pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
fsl,pins = <
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x00017069
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x000170f9
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x000170f9
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x000170f9
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x000170f9
MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x000170f9
/* CD */
MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x0001b099
>;
};
pinctrl_wdog1: wdog1grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO08__WDOG1_WDOG_B 0x0001b099
>;
};
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
/* otg-port */
&usbotg1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb_otg1>;
vbus-supply = <®_otg1vbus_5v0>;
dr_mode = "otg";
status = "okay";
};
/* 7-port usb hub */
/* id, pwr, oc pins not connected */
&usbotg2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb_otg2>;
disable-over-current;
vbus-supply = <®_otg2vbus_5v0>;
dr_mode = "host";
status = "okay";
};
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;
cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
disable-wp;
bus-width = <4>;
vmmc-supply = <®_mba6ul_3v3>;
vqmmc-supply = <®_vccsd>;
no-1-8-v;
status = "okay";
};
&wdog1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog1>;
fsl,ext-reset-output;
status = "okay";
};
|
