blob: 0f90afe902328f8e4b32d6687a5dbe7754916fbd (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
|
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef AT91_SAMA5_BOOTSOURCE_H_
#define AT91_SAMA5_BOOTSOURCE_H_
#include <errno.h>
#include <bootsource.h>
#include <linux/bitops.h>
#include <linux/bitfield.h>
#include <mach/hardware.h>
/* Boot modes stored by BootROM in r4 */
#define SAMA5_BOOTSOURCE_SPI 0
#define SAMA5_BOOTSOURCE_MCI 1
#define SAMA5_BOOTSOURCE_SMC 2
#define SAMA5_BOOTSOURCE_TWI 3
#define SAMA5_BOOTSOURCE_QSPI 4
#define SAMA5_BOOTSOURCE_SAM_BA 7
#define SAMA5_BOOTSOURCE GENMASK(3, 0)
#define SAMA5_BOOTSOURCE_INSTANCE GENMASK(7, 4)
static inline int sama5_bootsource(u32 reg)
{
u32 dev = FIELD_GET(SAMA5_BOOTSOURCE, reg);
switch(dev) {
case SAMA5_BOOTSOURCE_MCI:
return BOOTSOURCE_MMC;
case SAMA5_BOOTSOURCE_SPI:
return BOOTSOURCE_SPI_NOR;
case SAMA5_BOOTSOURCE_QSPI:
return BOOTSOURCE_SPI;
case SAMA5_BOOTSOURCE_SMC:
return BOOTSOURCE_NAND;
case SAMA5_BOOTSOURCE_SAM_BA:
return BOOTSOURCE_SERIAL;
}
return BOOTSOURCE_UNKNOWN;
}
static inline int sama5_bootsource_instance(u32 reg)
{
return FIELD_GET(SAMA5_BOOTSOURCE_INSTANCE, reg);
}
#define __sama5d2_stashed_bootrom_r4 \
(*(volatile u32 *)(SAMA5D2_SRAM_BASE + SAMA5D2_SRAM_SIZE - 0x4))
#endif
|