blob: 56b90700b8d0c7da61693b29221ccf26728c838f (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
|
config CRYPTO_DEV_FSL_CAAM
bool "Freescale CAAM-Multicore driver backend"
depends on ARCH_IMX6
help
Enables the driver module for Freescale's Cryptographic Accelerator
and Assurance Module (CAAM), also known as the SEC version 4 (SEC4).
This module creates job ring devices, and configures h/w
to operate as a DPAA component automatically, depending
on h/w feature availability.
config CRYPTO_DEV_FSL_CAAM_RINGSIZE
int "Job Ring size"
depends on CRYPTO_DEV_FSL_CAAM
range 2 9
default "9"
help
Select size of Job Rings as a power of 2, within the
range 2-9 (ring size 4-512).
Examples:
2 => 4
3 => 8
4 => 16
5 => 32
6 => 64
7 => 128
8 => 256
9 => 512
config CRYPTO_DEV_FSL_CAAM_RNG
bool "Register caam RNG device"
depends on CRYPTO_DEV_FSL_CAAM
depends on HWRNG
default y
help
Selecting this will register the SEC4 hardware rng.
if CRYPTO_DEV_FSL_CAAM_RNG
config CRYPTO_DEV_FSL_CAAM_RNG_SELF_TEST
bool "Run RNG software self-test on impacted chips"
depends on ARCH_IMX6
depends on HABV4
default y
help
Some chips with HAB >= 4.2.3 have an incorrect implementation of the
RNG self-test in ROM code. In this case, a software self-test should
be run to ensure correctness of the RNG. By enabling this config
option, the software self-test is run automatically when this case
is detected.
Currently known impacted chips:
* i.MX6DQ+ silicon revision 1.1
* i.MX6DQ silicon revision 1.6
* i.MX6DLS silicon revision 1.4
* i.MX6SX silicon revision 1.4
* i.MX6UL silicon revision 1.2
* i.MX67SD silicon revision 1.3
endif
|
