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* Synopsys DesignWare I2C

Required properties :

 - compatible : should be "snps,designware-i2c"
                or "mscc,ocelot-i2c" with "snps,designware-i2c" for fallback
 - reg : Offset and length of the register set for the device
 - interrupts : <IRQ> where IRQ is the interrupt number.

Recommended properties :

 - clock-frequency : desired I2C bus clock frequency in Hz.

Optional properties :
 - reg : for "mscc,ocelot-i2c", a second register set to configure the SDA hold
   time, named ICPU_CFG:TWI_DELAY in the datasheet.

 - i2c-sda-hold-time-ns : should contain the SDA hold time in nanoseconds.
   This option is only supported in hardware blocks version 1.11a or newer and
   on Microsemi SoCs ("mscc,ocelot-i2c" compatible).

 - i2c-scl-falling-time-ns : should contain the SCL falling time in nanoseconds.
   This value which is by default 300ns is used to compute the tLOW period.

 - i2c-sda-falling-time-ns : should contain the SDA falling time in nanoseconds.
   This value which is by default 300ns is used to compute the tHIGH period.

Examples :

	i2c@f0000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "snps,designware-i2c";
		reg = <0xf0000 0x1000>;
		interrupts = <11>;
		clock-frequency = <400000>;
	};

	i2c@1120000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "snps,designware-i2c";
		reg = <0x1120000 0x1000>;
		interrupt-parent = <&ictl>;
		interrupts = <12 1>;
		clock-frequency = <400000>;
		i2c-sda-hold-time-ns = <300>;
		i2c-sda-falling-time-ns = <300>;
		i2c-scl-falling-time-ns = <300>;
	};

	i2c@1120000 {
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x2000 0x100>;
		clock-frequency = <400000>;
		clocks = <&i2cclk>;
		interrupts = <0>;

		eeprom@64 {
			compatible = "linux,slave-24c02";
			reg = <0x40000064>;
		};
	};