summaryrefslogtreecommitdiffstats
path: root/dts/Bindings/media/rockchip,rk3568-vepu.yaml
blob: 81b26eb4cd354a32675ec93739e9b092d333ca4a (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2
---
$id: "http://devicetree.org/schemas/media/rockchip,rk3568-vepu.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"

title: Hantro G1 VPU encoders implemented on Rockchip SoCs

maintainers:
  - Nicolas Frattaroli <frattaroli.nicolas@gmail.com>

description:
  Hantro G1 video encode-only accelerators present on Rockchip SoCs.

properties:
  compatible:
    enum:
      - rockchip,rk3568-vepu

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    maxItems: 2

  clock-names:
    items:
      - const: aclk
      - const: hclk

  power-domains:
    maxItems: 1

  iommus:
    maxItems: 1

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/rk3568-cru.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/power/rk3568-power.h>

    bus {
        #address-cells = <2>;
        #size-cells = <2>;

        vepu: video-codec@fdee0000 {
            compatible = "rockchip,rk3568-vepu";
            reg = <0x0 0xfdee0000 0x0 0x800>;
            interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
            clocks = <&cru ACLK_JENC>, <&cru HCLK_JENC>;
            clock-names = "aclk", "hclk";
            iommus = <&vepu_mmu>;
            power-domains = <&power RK3568_PD_RGA>;
        };
    };