summaryrefslogtreecommitdiffstats
path: root/dts/Bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml
blob: 2d0d7e9e643117f5ec625e49270ac94c70603e7e (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm QMP USB4-USB3-DP PHY controller (SC8280XP)

maintainers:
  - Vinod Koul <vkoul@kernel.org>

description:
  The QMP PHY controller supports physical layer functionality for a number of
  controllers on Qualcomm chipsets, such as, PCIe, UFS and USB.

properties:
  compatible:
    enum:
      - qcom,sc7180-qmp-usb3-dp-phy
      - qcom,sc7280-qmp-usb3-dp-phy
      - qcom,sc8180x-qmp-usb3-dp-phy
      - qcom,sc8280xp-qmp-usb43dp-phy
      - qcom,sdm845-qmp-usb3-dp-phy
      - qcom,sm6350-qmp-usb3-dp-phy
      - qcom,sm8150-qmp-usb3-dp-phy
      - qcom,sm8250-qmp-usb3-dp-phy
      - qcom,sm8350-qmp-usb3-dp-phy
      - qcom,sm8450-qmp-usb3-dp-phy
      - qcom,sm8550-qmp-usb3-dp-phy
      - qcom,sm8650-qmp-usb3-dp-phy
      - qcom,x1e80100-qmp-usb3-dp-phy

  reg:
    maxItems: 1

  clocks:
    minItems: 4
    maxItems: 5

  clock-names:
    minItems: 4
    items:
      - const: aux
      - const: ref
      - const: com_aux
      - const: usb3_pipe
      - const: cfg_ahb

  power-domains:
    maxItems: 1

  resets:
    maxItems: 2

  reset-names:
    items:
      - const: phy
      - const: common

  vdda-phy-supply: true

  vdda-pll-supply: true

  "#clock-cells":
    const: 1
    description:
      See include/dt-bindings/phy/phy-qcom-qmp.h

  "#phy-cells":
    const: 1
    description:
      See include/dt-bindings/phy/phy-qcom-qmp.h

  orientation-switch:
    description:
      Flag the PHY as possible handler of USB Type-C orientation switching
    type: boolean

  ports:
    $ref: /schemas/graph.yaml#/properties/ports
    properties:
      port@0:
        $ref: /schemas/graph.yaml#/properties/port
        description: Output endpoint of the PHY

      port@1:
        $ref: /schemas/graph.yaml#/properties/port
        description: Incoming endpoint from the USB controller

      port@2:
        $ref: /schemas/graph.yaml#/properties/port
        description: Incoming endpoint from the DisplayPort controller

required:
  - compatible
  - reg
  - clocks
  - clock-names
  - resets
  - reset-names
  - vdda-phy-supply
  - vdda-pll-supply
  - "#clock-cells"
  - "#phy-cells"

allOf:
  - if:
      properties:
        compatible:
          enum:
            - qcom,sc7180-qmp-usb3-dp-phy
            - qcom,sdm845-qmp-usb3-dp-phy
    then:
      properties:
        clocks:
          maxItems: 5
        clock-names:
          maxItems: 5
    else:
      properties:
        clocks:
          maxItems: 4
        clock-names:
          maxItems: 4

  - if:
      properties:
        compatible:
          enum:
            - qcom,sc8280xp-qmp-usb43dp-phy
            - qcom,sm6350-qmp-usb3-dp-phy
            - qcom,sm8550-qmp-usb3-dp-phy
            - qcom,sm8650-qmp-usb3-dp-phy
            - qcom,x1e80100-qmp-usb3-dp-phy
    then:
      required:
        - power-domains
    else:
      properties:
        power-domains: false

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>

    phy@88eb000 {
      compatible = "qcom,sc8280xp-qmp-usb43dp-phy";
      reg = <0x088eb000 0x4000>;

      clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
               <&gcc GCC_USB4_EUD_CLKREF_CLK>,
               <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
               <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
      clock-names = "aux", "ref", "com_aux", "usb3_pipe";

      power-domains = <&gcc USB30_PRIM_GDSC>;

      resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
               <&gcc GCC_USB4_DP_PHY_PRIM_BCR>;
      reset-names = "phy", "common";

      vdda-phy-supply = <&vreg_l9d>;
      vdda-pll-supply = <&vreg_l4d>;

      orientation-switch;

      #clock-cells = <1>;
      #phy-cells = <1>;

      ports {
          #address-cells = <1>;
          #size-cells = <0>;

          port@0 {
              reg = <0>;

              endpoint {
                  remote-endpoint = <&typec_connector_ss>;
              };
          };

          port@1 {
              reg = <1>;

              endpoint {
                  remote-endpoint = <&dwc3_ss_out>;
              };
          };

          port@2 {
              reg = <2>;

              endpoint {
                  remote-endpoint = <&mdss_dp_out>;
              };
          };
      };
    };