dts/Bindings/pwm/imx-pwm.yaml


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pwm/imx-pwm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Freescale i.MX PWM controller

maintainers:
  - Philipp Zabel <p.zabel@pengutronix.de>

properties:
  "#pwm-cells":
    description: |
      Should be 2 for i.MX1 and 3 for i.MX27 and newer SoCs. See pwm.yaml
      in this directory for a description of the cells format.
    enum:
      - 2
      - 3

  compatible:
    enum:
      - fsl,imx1-pwm
      - fsl,imx27-pwm

  reg:
    maxItems: 1

  clocks:
    items:
      - description: SoC PWM ipg clock
      - description: SoC PWM per clock

  clock-names:
    items:
      - const: ipg
      - const: per

  interrupts:
    maxItems: 1

required:
  - "#pwm-cells"
  - compatible
  - reg
  - clocks
  - clock-names
  - interrupts

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/imx5-clock.h>

    pwm@53fb4000 {
        #pwm-cells = <3>;
        compatible = "fsl,imx27-pwm";
        reg = <0x53fb4000 0x4000>;
        clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,
                 <&clks IMX5_CLK_PWM1_HF_GATE>;
        clock-names = "ipg", "per";
        interrupts = <61>;
    };