blob: ea6abfe2d95e5e721190f96684637c6bdeb5dc2c (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
|
# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/serial/qcom,msm-uart.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm MSM SoC Serial UART
maintainers:
- Bjorn Andersson <andersson@kernel.org>
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
description:
The MSM serial UART hardware is designed for low-speed use cases where a
dma-engine isn't needed. From a software perspective it's mostly compatible
with the MSM serial UARTDM except that it only supports reading and writing
one character at a time.
properties:
compatible:
const: qcom,msm-uart
clocks:
maxItems: 1
clock-names:
items:
- const: core
interrupts:
maxItems: 1
reg:
maxItems: 1
required:
- compatible
- clock-names
- clocks
- interrupts
- reg
allOf:
- $ref: /schemas/serial/serial.yaml#
unevaluatedProperties: false
examples:
- |
serial@a9c00000 {
compatible = "qcom,msm-uart";
reg = <0xa9c00000 0x1000>;
interrupts = <11>;
clocks = <&uart_cxc>;
clock-names = "core";
};
|
