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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NXP i.MX8MQ VPU blk-ctrl
maintainers:
- Lucas Stach <l.stach@pengutronix.de>
description:
The i.MX8MQ VPU blk-ctrl is a top-level peripheral providing access to
the NoC and ensuring proper power sequencing of the VPU peripherals
located in the VPU domain of the SoC.
properties:
compatible:
items:
- const: fsl,imx8mq-vpu-blk-ctrl
reg:
maxItems: 1
'#power-domain-cells':
const: 1
power-domains:
minItems: 3
maxItems: 3
power-domain-names:
items:
- const: bus
- const: g1
- const: g2
clocks:
minItems: 2
maxItems: 2
clock-names:
items:
- const: g1
- const: g2
required:
- compatible
- reg
- power-domains
- power-domain-names
- clocks
- clock-names
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/imx8mq-clock.h>
#include <dt-bindings/power/imx8mq-power.h>
vpu_blk_ctrl: blk-ctrl@38320000 {
compatible = "fsl,imx8mq-vpu-blk-ctrl";
reg = <0x38320000 0x100>;
power-domains = <&pgc_vpu>, <&pgc_vpu>, <&pgc_vpu>;
power-domain-names = "bus", "g1", "g2";
clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>,
<&clk IMX8MQ_CLK_VPU_G2_ROOT>;
clock-names = "g1", "g2";
#power-domain-cells = <1>;
};
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