summaryrefslogtreecommitdiffstats
path: root/dts/include/dt-bindings/power/tegra194-powergate.h
blob: 82253742a4936c6c738e55150289728a0ac147f1 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. */

#ifndef __ABI_MACH_T194_POWERGATE_T194_H_
#define __ABI_MACH_T194_POWERGATE_T194_H_

#define TEGRA194_POWER_DOMAIN_AUD	1
#define TEGRA194_POWER_DOMAIN_DISP	2
#define TEGRA194_POWER_DOMAIN_DISPB	3
#define TEGRA194_POWER_DOMAIN_DISPC	4
#define TEGRA194_POWER_DOMAIN_ISPA	5
#define TEGRA194_POWER_DOMAIN_NVDECA	6
#define TEGRA194_POWER_DOMAIN_NVJPG	7
#define TEGRA194_POWER_DOMAIN_NVENCA	8
#define TEGRA194_POWER_DOMAIN_NVENCB	9
#define TEGRA194_POWER_DOMAIN_NVDECB	10
#define TEGRA194_POWER_DOMAIN_SAX	11
#define TEGRA194_POWER_DOMAIN_VE	12
#define TEGRA194_POWER_DOMAIN_VIC	13
#define TEGRA194_POWER_DOMAIN_XUSBA	14
#define TEGRA194_POWER_DOMAIN_XUSBB	15
#define TEGRA194_POWER_DOMAIN_XUSBC	16
#define TEGRA194_POWER_DOMAIN_PCIEX8A	17
#define TEGRA194_POWER_DOMAIN_PCIEX4A	18
#define TEGRA194_POWER_DOMAIN_PCIEX1A	19
#define TEGRA194_POWER_DOMAIN_PCIEX8B	21
#define TEGRA194_POWER_DOMAIN_PVAA	22
#define TEGRA194_POWER_DOMAIN_PVAB	23
#define TEGRA194_POWER_DOMAIN_DLAA	24
#define TEGRA194_POWER_DOMAIN_DLAB	25
#define TEGRA194_POWER_DOMAIN_CV	26
#define TEGRA194_POWER_DOMAIN_GPU	27
#define TEGRA194_POWER_DOMAIN_MAX	27

#endif