summaryrefslogtreecommitdiffstats
path: root/dts/src/arm64/nuvoton/ma35d1-som-256m.dts
blob: a1ebddecb7f8166bf83ed4a39e1542c8d5232b80 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2023 Nuvoton Technology Corp.
 * Author: Shan-Chun Hung <schung@nuvoton.com>
 *         Jacky huang <ychuang3@nuvoton.com>
 */

/dts-v1/;
#include "ma35d1.dtsi"

/ {
	model = "Nuvoton MA35D1-SOM";
	compatible = "nuvoton,ma35d1-som", "nuvoton,ma35d1";

	aliases {
		serial0 = &uart0;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	mem: memory@80000000 {
		device_type = "memory";
		reg = <0x00000000 0x80000000 0 0x10000000>; /* 256M DRAM */
	};

	clk_hxt: clock-hxt {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <24000000>;
		clock-output-names = "clk_hxt";
	};
};

&uart0 {
	status = "okay";
};

&clk {
	assigned-clocks = <&clk CAPLL>,
			  <&clk DDRPLL>,
			  <&clk APLL>,
			  <&clk EPLL>,
			  <&clk VPLL>;
	assigned-clock-rates = <800000000>,
			       <266000000>,
			       <180000000>,
			       <500000000>,
			       <102000000>;
	nuvoton,pll-mode = "integer",
			   "fractional",
			   "integer",
			   "integer",
			   "integer";
};