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authorSascha Hauer <s.hauer@pengutronix.de>2011-08-22 12:05:03 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2011-08-22 12:05:05 +0200
commit949afa5819932c76760cd7f4de089cc1b19cd778 (patch)
tree25971f8361832ca4528f2a01c57d4a73586e7115
parente97fc84a7b7ec7fcb2e660a1f6c4d5d135509fcf (diff)
downloadgst-plugins-fsl-vpu-949afa5819932c76760cd7f4de089cc1b19cd778.tar.gz
gst-plugins-fsl-vpu-949afa5819932c76760cd7f4de089cc1b19cd778.tar.xz
vpu module decoder: Do not completely fill the fifo
When rd pointer == wr pointer the vpu hardware interpretes this as fifo empty instead of fifo full, so put one byte less into fifo. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r--module/imx-vpu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/module/imx-vpu.c b/module/imx-vpu.c
index bffaecc..1ecebac 100644
--- a/module/imx-vpu.c
+++ b/module/imx-vpu.c
@@ -352,7 +352,7 @@ static int vpu_fifo_in(struct vpu_instance *instance, const char __user *ubuf, s
unsigned int off, l;
int ret;
- len = min(vpu_fifo_avail(instance), len);
+ len = min(vpu_fifo_avail(instance) - 1, len);
off = instance->fifo_in & (regs->bitstream_buf_size - 1);