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authorGreg Kroah-Hartman <gregkh@suse.de>2011-06-09 13:49:02 -0700
committerGreg Kroah-Hartman <gregkh@suse.de>2011-06-09 13:49:02 -0700
commitdc5a18941b4226846f0c5994e4f45bc685f7bcfe (patch)
tree8189cc7586fb875484bce2a7122f2152343904bb
parent461df4ded3a143f09f9d0e870e7b16b787dc0591 (diff)
parentc773298788598a26e325bc2639877c76818943e3 (diff)
downloadlinux-0-day-dc5a18941b4226846f0c5994e4f45bc685f7bcfe.tar.gz
linux-0-day-dc5a18941b4226846f0c5994e4f45bc685f7bcfe.tar.xz
Merge Linus's tree into staging-next
This was done to resolve the conflicts that were in a number of files due to changes done upstream with others done in the staging-next branch. Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-rw-r--r--MAINTAINERS3
-rw-r--r--drivers/staging/brcm80211/Kconfig2
-rw-r--r--drivers/staging/brcm80211/Makefile2
-rw-r--r--drivers/staging/brcm80211/README65
-rw-r--r--drivers/staging/brcm80211/TODO14
-rw-r--r--drivers/staging/brcm80211/brcmfmac/bcmcdc.h98
-rw-r--r--drivers/staging/brcm80211/brcmfmac/bcmchip.h6
-rw-r--r--drivers/staging/brcm80211/brcmfmac/bcmsdbus.h2
-rw-r--r--drivers/staging/brcm80211/brcmfmac/bcmsdh.c13
-rw-r--r--drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c29
-rw-r--r--drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c196
-rw-r--r--drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.h2
-rw-r--r--drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c8
-rw-r--r--drivers/staging/brcm80211/brcmfmac/dhd.h920
-rw-r--r--drivers/staging/brcm80211/brcmfmac/dhd_bus.h2
-rw-r--r--drivers/staging/brcm80211/brcmfmac/dhd_cdc.c85
-rw-r--r--drivers/staging/brcm80211/brcmfmac/dhd_common.c152
-rw-r--r--drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c8
-rw-r--r--drivers/staging/brcm80211/brcmfmac/dhd_dbg.h3
-rw-r--r--drivers/staging/brcm80211/brcmfmac/dhd_linux.c24
-rw-r--r--drivers/staging/brcm80211/brcmfmac/dhd_proto.h5
-rw-r--r--drivers/staging/brcm80211/brcmfmac/dhd_sdio.c907
-rw-r--r--drivers/staging/brcm80211/brcmfmac/dhdioctl.h100
-rw-r--r--drivers/staging/brcm80211/brcmfmac/hndrte_armtrap.h75
-rw-r--r--drivers/staging/brcm80211/brcmfmac/hndrte_cons.h62
-rw-r--r--drivers/staging/brcm80211/brcmfmac/msgtrace.h61
-rw-r--r--drivers/staging/brcm80211/brcmfmac/pcicfg.h (renamed from drivers/staging/brcm80211/include/pcicfg.h)2
-rw-r--r--drivers/staging/brcm80211/brcmfmac/sbsdio.h373
-rw-r--r--drivers/staging/brcm80211/brcmfmac/sdio_host.h (renamed from drivers/staging/brcm80211/include/bcmsdh.h)27
-rw-r--r--drivers/staging/brcm80211/brcmfmac/sdioh.h63
-rw-r--r--drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c48
-rw-r--r--drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h15
-rw-r--r--drivers/staging/brcm80211/brcmfmac/wl_iw.c66
-rw-r--r--drivers/staging/brcm80211/brcmfmac/wl_iw.h4
-rw-r--r--drivers/staging/brcm80211/brcmsmac/Makefile45
-rw-r--r--drivers/staging/brcm80211/brcmsmac/aiutils.c508
-rw-r--r--drivers/staging/brcm80211/brcmsmac/aiutils.h218
-rw-r--r--drivers/staging/brcm80211/brcmsmac/alloc.c (renamed from drivers/staging/brcm80211/brcmsmac/wlc_alloc.c)38
-rw-r--r--drivers/staging/brcm80211/brcmsmac/alloc.h (renamed from drivers/staging/brcm80211/brcmsmac/wlc_alloc.h)0
-rw-r--r--drivers/staging/brcm80211/brcmsmac/ampdu.c (renamed from drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c)48
-rw-r--r--drivers/staging/brcm80211/brcmsmac/ampdu.h (renamed from drivers/staging/brcm80211/brcmsmac/wlc_ampdu.h)6
-rw-r--r--drivers/staging/brcm80211/brcmsmac/antsel.c (renamed from drivers/staging/brcm80211/brcmsmac/wlc_antsel.c)39
-rw-r--r--drivers/staging/brcm80211/brcmsmac/antsel.h (renamed from drivers/staging/brcm80211/brcmsmac/wlc_antsel.h)6
-rw-r--r--drivers/staging/brcm80211/brcmsmac/bcmsrom.c714
-rw-r--r--drivers/staging/brcm80211/brcmsmac/bmac.c (renamed from drivers/staging/brcm80211/brcmsmac/wlc_bmac.c)110
-rw-r--r--drivers/staging/brcm80211/brcmsmac/bmac.h (renamed from drivers/staging/brcm80211/brcmsmac/wlc_bmac.h)17
-rw-r--r--drivers/staging/brcm80211/brcmsmac/channel.c (renamed from drivers/staging/brcm80211/brcmsmac/wlc_channel.c)31
-rw-r--r--drivers/staging/brcm80211/brcmsmac/channel.h (renamed from drivers/staging/brcm80211/brcmsmac/wlc_channel.h)11
-rw-r--r--drivers/staging/brcm80211/brcmsmac/d11.h49
-rw-r--r--drivers/staging/brcm80211/brcmsmac/dma.c (renamed from drivers/staging/brcm80211/brcmsmac/hnddma.c)293
-rw-r--r--drivers/staging/brcm80211/brcmsmac/dma.h (renamed from drivers/staging/brcm80211/include/hnddma.h)139
-rw-r--r--drivers/staging/brcm80211/brcmsmac/mac80211_if.c (renamed from drivers/staging/brcm80211/brcmsmac/wl_mac80211.c)704
-rw-r--r--drivers/staging/brcm80211/brcmsmac/mac80211_if.h (renamed from drivers/staging/brcm80211/brcmsmac/wl_mac80211.h)74
-rw-r--r--drivers/staging/brcm80211/brcmsmac/main.c (renamed from drivers/staging/brcm80211/brcmsmac/wlc_main.c)2102
-rw-r--r--drivers/staging/brcm80211/brcmsmac/main.h (renamed from drivers/staging/brcm80211/brcmsmac/wlc_main.h)322
-rw-r--r--drivers/staging/brcm80211/brcmsmac/nicpci.c393
-rw-r--r--drivers/staging/brcm80211/brcmsmac/nicpci.h85
-rw-r--r--drivers/staging/brcm80211/brcmsmac/nvram.c215
-rw-r--r--drivers/staging/brcm80211/brcmsmac/otp.c (renamed from drivers/staging/brcm80211/brcmsmac/bcmotp.c)464
-rw-r--r--drivers/staging/brcm80211/brcmsmac/otp.h (renamed from drivers/staging/brcm80211/include/bcmotp.h)11
-rw-r--r--drivers/staging/brcm80211/brcmsmac/phy/phy_cmn.c (renamed from drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c)106
-rw-r--r--drivers/staging/brcm80211/brcmsmac/phy/phy_hal.h (renamed from drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h)51
-rw-r--r--drivers/staging/brcm80211/brcmsmac/phy/phy_int.h (renamed from drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h)31
-rw-r--r--drivers/staging/brcm80211/brcmsmac/phy/phy_lcn.c (renamed from drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.c)25
-rw-r--r--drivers/staging/brcm80211/brcmsmac/phy/phy_lcn.h (renamed from drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.h)6
-rw-r--r--drivers/staging/brcm80211/brcmsmac/phy/phy_n.c (renamed from drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c)24
-rw-r--r--drivers/staging/brcm80211/brcmsmac/phy/phy_qmath.c (renamed from drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_qmath.c)2
-rw-r--r--drivers/staging/brcm80211/brcmsmac/phy/phy_qmath.h (renamed from drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_qmath.h)6
-rw-r--r--drivers/staging/brcm80211/brcmsmac/phy/phy_radio.h (renamed from drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_radio.h)6
-rw-r--r--drivers/staging/brcm80211/brcmsmac/phy/phy_version.h36
-rw-r--r--drivers/staging/brcm80211/brcmsmac/phy/phyreg_n.h (renamed from drivers/staging/brcm80211/brcmsmac/phy/wlc_phyreg_n.h)0
-rw-r--r--drivers/staging/brcm80211/brcmsmac/phy/phytbl_lcn.c (renamed from drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_lcn.c)6
-rw-r--r--drivers/staging/brcm80211/brcmsmac/phy/phytbl_lcn.h (renamed from drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_lcn.h)0
-rw-r--r--drivers/staging/brcm80211/brcmsmac/phy/phytbl_n.c (renamed from drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.c)6
-rw-r--r--drivers/staging/brcm80211/brcmsmac/phy/phytbl_n.h (renamed from drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.h)0
-rw-r--r--drivers/staging/brcm80211/brcmsmac/phy_shim.c (renamed from drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c)62
-rw-r--r--drivers/staging/brcm80211/brcmsmac/phy_shim.h (renamed from drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.h)61
-rw-r--r--drivers/staging/brcm80211/brcmsmac/pmu.c (renamed from drivers/staging/brcm80211/brcmsmac/wlc_pmu.c)552
-rw-r--r--drivers/staging/brcm80211/brcmsmac/pmu.h (renamed from drivers/staging/brcm80211/brcmsmac/wlc_pmu.h)42
-rw-r--r--drivers/staging/brcm80211/brcmsmac/pub.h (renamed from drivers/staging/brcm80211/brcmsmac/wlc_pub.h)160
-rw-r--r--drivers/staging/brcm80211/brcmsmac/rate.c (renamed from drivers/staging/brcm80211/brcmsmac/wlc_rate.c)18
-rw-r--r--drivers/staging/brcm80211/brcmsmac/rate.h (renamed from drivers/staging/brcm80211/brcmsmac/wlc_rate.h)0
-rw-r--r--drivers/staging/brcm80211/brcmsmac/scb.h (renamed from drivers/staging/brcm80211/brcmsmac/wlc_scb.h)9
-rw-r--r--drivers/staging/brcm80211/brcmsmac/srom.c (renamed from drivers/staging/brcm80211/brcmsmac/bcmsrom_tbl.h)983
-rw-r--r--drivers/staging/brcm80211/brcmsmac/srom.h (renamed from drivers/staging/brcm80211/include/bcmsrom.h)12
-rw-r--r--drivers/staging/brcm80211/brcmsmac/stf.c (renamed from drivers/staging/brcm80211/brcmsmac/wlc_stf.c)67
-rw-r--r--drivers/staging/brcm80211/brcmsmac/stf.h (renamed from drivers/staging/brcm80211/brcmsmac/wlc_stf.h)8
-rw-r--r--drivers/staging/brcm80211/brcmsmac/types.h (renamed from drivers/staging/brcm80211/brcmsmac/wlc_cfg.h)284
-rw-r--r--drivers/staging/brcm80211/brcmsmac/ucode_loader.c (renamed from drivers/staging/brcm80211/brcmsmac/wl_ucode_loader.c)78
-rw-r--r--drivers/staging/brcm80211/brcmsmac/ucode_loader.h (renamed from drivers/staging/brcm80211/brcmsmac/wl_ucode.h)15
-rw-r--r--drivers/staging/brcm80211/brcmsmac/wl_dbg.h92
-rw-r--r--drivers/staging/brcm80211/brcmsmac/wl_export.h47
-rw-r--r--drivers/staging/brcm80211/brcmsmac/wlc_bsscfg.h135
-rw-r--r--drivers/staging/brcm80211/brcmsmac/wlc_key.h140
-rw-r--r--drivers/staging/brcm80211/brcmsmac/wlc_types.h37
-rw-r--r--drivers/staging/brcm80211/brcmutil/Makefile (renamed from drivers/staging/brcm80211/util/Makefile)6
-rw-r--r--drivers/staging/brcm80211/brcmutil/utils.c (renamed from drivers/staging/brcm80211/util/bcmutils.c)143
-rw-r--r--drivers/staging/brcm80211/brcmutil/wifi.c (renamed from drivers/staging/brcm80211/util/bcmwifi.c)18
-rw-r--r--drivers/staging/brcm80211/include/aidmp.h374
-rw-r--r--drivers/staging/brcm80211/include/bcmdefs.h150
-rw-r--r--drivers/staging/brcm80211/include/bcmdevs.h124
-rw-r--r--drivers/staging/brcm80211/include/bcmnvram.h153
-rw-r--r--drivers/staging/brcm80211/include/bcmsdpcm.h208
-rw-r--r--drivers/staging/brcm80211/include/bcmsrom_fmt.h367
-rw-r--r--drivers/staging/brcm80211/include/brcm_hw_ids.h59
-rw-r--r--drivers/staging/brcm80211/include/brcmu_utils.h (renamed from drivers/staging/brcm80211/include/bcmutils.h)269
-rw-r--r--drivers/staging/brcm80211/include/brcmu_wifi.h (renamed from drivers/staging/brcm80211/include/bcmwifi.h)89
-rw-r--r--drivers/staging/brcm80211/include/chipcommon.h281
-rw-r--r--drivers/staging/brcm80211/include/defs.h110
-rw-r--r--drivers/staging/brcm80211/include/hndsoc.h199
-rw-r--r--drivers/staging/brcm80211/include/nicpci.h79
-rw-r--r--drivers/staging/brcm80211/include/pci_core.h122
-rw-r--r--drivers/staging/brcm80211/include/pcie_core.h299
-rw-r--r--drivers/staging/brcm80211/include/proto/802.11.h200
-rw-r--r--drivers/staging/brcm80211/include/proto/bcmeth.h44
-rw-r--r--drivers/staging/brcm80211/include/proto/bcmevent.h207
-rw-r--r--drivers/staging/brcm80211/include/sbchipc.h1588
-rw-r--r--drivers/staging/brcm80211/include/sbconfig.h272
-rw-r--r--drivers/staging/brcm80211/include/sbhnddma.h315
-rw-r--r--drivers/staging/brcm80211/include/sbsdio.h152
-rw-r--r--drivers/staging/brcm80211/include/sbsdpcmdev.h281
-rw-r--r--drivers/staging/brcm80211/include/sdio.h552
-rw-r--r--drivers/staging/brcm80211/include/soc.h95
-rw-r--r--drivers/staging/brcm80211/include/wlioctl.h1365
-rw-r--r--drivers/staging/comedi/drivers.c4
-rw-r--r--drivers/staging/comedi/drivers/addi-data/addi_common.c2
-rw-r--r--drivers/staging/comedi/drivers/adl_pci9118.c1
-rw-r--r--drivers/staging/comedi/drivers/das1800.c1
-rw-r--r--drivers/staging/comedi/drivers/dt282x.c1
-rw-r--r--drivers/staging/comedi/drivers/ni_at_a2150.c1
-rw-r--r--drivers/staging/comedi/drivers/ni_labpc.c1
-rw-r--r--drivers/staging/comedi/drivers/pcl812.c1
-rw-r--r--drivers/staging/comedi/drivers/pcl816.c1
-rw-r--r--drivers/staging/comedi/drivers/pcl818.c1
-rw-r--r--drivers/staging/hv/blkvsc_drv.c42
-rw-r--r--drivers/staging/hv/channel.c111
-rw-r--r--drivers/staging/hv/channel_mgmt.c6
-rw-r--r--drivers/staging/hv/connection.c50
-rw-r--r--drivers/staging/hv/hv.c4
-rw-r--r--drivers/staging/hv/hv_mouse.c1
-rw-r--r--drivers/staging/hv/hyperv.h86
-rw-r--r--drivers/staging/hv/hyperv_net.h14
-rw-r--r--drivers/staging/hv/hyperv_vmbus.h2
-rw-r--r--drivers/staging/hv/netvsc.c161
-rw-r--r--drivers/staging/hv/netvsc_drv.c42
-rw-r--r--drivers/staging/hv/ring_buffer.c6
-rw-r--r--drivers/staging/hv/rndis_filter.c53
-rw-r--r--drivers/staging/hv/storvsc_drv.c86
-rw-r--r--drivers/staging/hv/vmbus_drv.c135
-rw-r--r--drivers/staging/usbip/README1
-rw-r--r--drivers/staging/usbip/stub.h4
-rw-r--r--drivers/staging/usbip/stub_dev.c68
-rw-r--r--drivers/staging/usbip/stub_main.c193
-rw-r--r--drivers/staging/usbip/stub_rx.c6
-rw-r--r--drivers/staging/usbip/stub_tx.c13
-rw-r--r--drivers/staging/usbip/usbip_common.c35
-rw-r--r--drivers/staging/usbip/usbip_common.h238
-rw-r--r--drivers/staging/usbip/userspace/configure.ac8
-rw-r--r--drivers/staging/usbip/userspace/libsrc/stub_driver.c17
-rw-r--r--drivers/staging/usbip/userspace/libsrc/stub_driver.h4
-rw-r--r--drivers/staging/usbip/userspace/libsrc/usbip_common.c9
-rw-r--r--drivers/staging/usbip/userspace/libsrc/usbip_common.h20
-rw-r--r--drivers/staging/usbip/userspace/libsrc/vhci_driver.c78
-rw-r--r--drivers/staging/usbip/userspace/libsrc/vhci_driver.h21
-rw-r--r--drivers/staging/usbip/userspace/src/Makefile.am11
-rw-r--r--drivers/staging/usbip/userspace/src/bind-driver.c643
-rw-r--r--drivers/staging/usbip/userspace/src/usbip.c813
-rw-r--r--drivers/staging/usbip/userspace/src/usbip.h39
-rw-r--r--drivers/staging/usbip/userspace/src/usbip_attach.c228
-rw-r--r--drivers/staging/usbip/userspace/src/usbip_bind.c264
-rw-r--r--drivers/staging/usbip/userspace/src/usbip_detach.c103
-rw-r--r--drivers/staging/usbip/userspace/src/usbip_list.c286
-rw-r--r--drivers/staging/usbip/userspace/src/usbip_network.c91
-rw-r--r--drivers/staging/usbip/userspace/src/usbip_network.h57
-rw-r--r--drivers/staging/usbip/userspace/src/usbip_unbind.c95
-rw-r--r--drivers/staging/usbip/userspace/src/usbipd.c28
-rw-r--r--drivers/staging/usbip/userspace/src/utils.c66
-rw-r--r--drivers/staging/usbip/userspace/src/utils.h29
-rw-r--r--drivers/staging/usbip/vhci.h11
-rw-r--r--drivers/staging/usbip/vhci_hcd.c17
-rw-r--r--drivers/staging/usbip/vhci_rx.c2
-rw-r--r--drivers/staging/usbip/vhci_sysfs.c6
182 files changed, 8950 insertions, 16679 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index bbe49d8c22afb..31c25269012cd 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1533,9 +1533,10 @@ F: drivers/net/tg3.*
BROADCOM BRCM80211 IEEE802.11n WIRELESS DRIVER
M: Brett Rudley <brudley@broadcom.com>
M: Henry Ptasinski <henryp@broadcom.com>
-M: Dowan Kim <dowan@broadcom.com>
M: Roland Vossen <rvossen@broadcom.com>
M: Arend van Spriel <arend@broadcom.com>
+M: Franky (Zhenhui) Lin <frankyl@broadcom.com>
+M: Kan Yan <kanyan@broadcom.com>
L: linux-wireless@vger.kernel.org
S: Supported
F: drivers/staging/brcm80211/
diff --git a/drivers/staging/brcm80211/Kconfig b/drivers/staging/brcm80211/Kconfig
index f4cf9b23481e0..2d1a29bdc0eee 100644
--- a/drivers/staging/brcm80211/Kconfig
+++ b/drivers/staging/brcm80211/Kconfig
@@ -7,6 +7,7 @@ config BRCMSMAC
default n
depends on PCI
depends on WLAN && MAC80211
+ depends on !PPC64 && !PPC32
select BRCMUTIL
select FW_LOADER
select CRC_CCITT
@@ -20,6 +21,7 @@ config BRCMFMAC
default n
depends on MMC
depends on WLAN && CFG80211
+ depends on !PPC64 && !PPC32
select BRCMUTIL
select FW_LOADER
select WIRELESS_EXT
diff --git a/drivers/staging/brcm80211/Makefile b/drivers/staging/brcm80211/Makefile
index e7b3f27847cf1..db9a57e4607a7 100644
--- a/drivers/staging/brcm80211/Makefile
+++ b/drivers/staging/brcm80211/Makefile
@@ -19,6 +19,6 @@
subdir-ccflags-y := -DBCMDMA32
subdir-ccflags-$(CONFIG_BRCMDBG) += -DBCMDBG -DBCMDBG_ASSERT
-obj-$(CONFIG_BRCMUTIL) += util/
+obj-$(CONFIG_BRCMUTIL) += brcmutil/
obj-$(CONFIG_BRCMFMAC) += brcmfmac/
obj-$(CONFIG_BRCMSMAC) += brcmsmac/
diff --git a/drivers/staging/brcm80211/README b/drivers/staging/brcm80211/README
index 8ad558675bd36..bb86b1b3e58ee 100644
--- a/drivers/staging/brcm80211/README
+++ b/drivers/staging/brcm80211/README
@@ -1,64 +1 @@
-Broadcom brcmsmac (mac80211-based softmac PCIe) and brcmfmac (SDIO) drivers.
-
-Completely open source host drivers, no binary object files.
-
-Support for the following chips:
-===============================
-
- brcmsmac (PCIe)
- Name Device ID
- BCM4313 0x4727
- BCM43224 0x4353
- BCM43225 0x4357
-
- brcmfmac (SDIO)
- Name
- BCM4329
-
-Both brcmsmac and brcmfmac drivers require firmware files that need to be
-separately downloaded.
-
-Firmware
-======================
-Firmware is available from the Linux firmware repository at:
-
- git://git.kernel.org/pub/scm/linux/kernel/git/dwmw2/linux-firmware.git
- http://git.kernel.org/?p=linux/kernel/git/dwmw2/linux-firmware.git
- https://git.kernel.org/?p=linux/kernel/git/dwmw2/linux-firmware.git
-
-
-===============================================================
-Broadcom brcmsmac driver
-===============================================================
-- Support for both 32 and 64 bit Linux kernels
-
-
-Firmware installation
-======================
-Copy brcm/bcm43xx-0.fw and brcm/bcm43xx_hdr-0.fw to
-/lib/firmware/brcm (or wherever firmware is normally installed
-on your system).
-
-
-===============================================================
-Broadcom brcmfmac driver
-===============================================================
-- Support for 32 bit Linux kernel, 64 bit untested
-
-
-Firmware installation
-======================
-Copy brcm/bcm4329-fullmac-4.bin and brcm/bcm4329-fullmac-4.txt
-to /lib/firmware/brcm (or wherever firmware is normally installed on your
-system).
-
-
-Contact Info:
-=============
-Brett Rudley brudley@broadcom.com
-Henry Ptasinski henryp@broadcom.com
-Dowan Kim dowan@broadcom.com
-Roland Vossen rvossen@broadcom.com
-Arend van Spriel arend@broadcom.com
-
-For more info, refer to: http://linuxwireless.org/en/users/Drivers/brcm80211
+refer to: http://linuxwireless.org/en/users/Drivers/brcm80211
diff --git a/drivers/staging/brcm80211/TODO b/drivers/staging/brcm80211/TODO
index e9c1393a2b92e..94c792b9719e8 100644
--- a/drivers/staging/brcm80211/TODO
+++ b/drivers/staging/brcm80211/TODO
@@ -2,14 +2,22 @@ To Do List for Broadcom Mac80211 driver before getting in mainline
Bugs
====
-- Oops on AMPDU traffic, to be solved by new ucode (currently under test)
+- none known at this moment
brcmfmac and brcmsmac
=====================
-- ASSERTS not allowed in mainline, replace by warning + error handling
-- Replace printk and WL_ERROR() with proper routines
+- replace company specific acronym wlc_
+- Resolve all XXX, TODO, FIXME in code
brcmfmac
=====================
+- Remove unnecessary includes, move #includes from .h files into .c files.
+- Absorb and delete header files that are included in only one .c file
+- ASSERTS not allowed in mainline, replace by warning + error handling
+- Replace printk and WL_ERROR() with proper routines
- Replace driver's proprietary ssb interface with generic kernel ssb module
- Build and test on 64 bit linux kernel
+
+brcm80211 info page
+=====================
+http://linuxwireless.org/en/users/Drivers/brcm80211
diff --git a/drivers/staging/brcm80211/brcmfmac/bcmcdc.h b/drivers/staging/brcm80211/brcmfmac/bcmcdc.h
deleted file mode 100644
index ed4c4a517ecab..0000000000000
--- a/drivers/staging/brcm80211/brcmfmac/bcmcdc.h
+++ /dev/null
@@ -1,98 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-#include <linux/if_ether.h>
-
-typedef struct cdc_ioctl {
- u32 cmd; /* ioctl command value */
- u32 len; /* lower 16: output buflen; upper 16:
- input buflen (excludes header) */
- u32 flags; /* flag defns given below */
- u32 status; /* status code returned from the device */
-} cdc_ioctl_t;
-
-/* Max valid buffer size that can be sent to the dongle */
-#define CDC_MAX_MSG_SIZE (ETH_FRAME_LEN+ETH_FCS_LEN)
-
-/* len field is divided into input and output buffer lengths */
-#define CDCL_IOC_OUTLEN_MASK 0x0000FFFF /* maximum or expected
- response length, */
- /* excluding IOCTL header */
-#define CDCL_IOC_OUTLEN_SHIFT 0
-#define CDCL_IOC_INLEN_MASK 0xFFFF0000 /* input buffer length,
- excluding IOCTL header */
-#define CDCL_IOC_INLEN_SHIFT 16
-
-/* CDC flag definitions */
-#define CDCF_IOC_ERROR 0x01 /* 0=success, 1=ioctl cmd failed */
-#define CDCF_IOC_SET 0x02 /* 0=get, 1=set cmd */
-#define CDCF_IOC_IF_MASK 0xF000 /* I/F index */
-#define CDCF_IOC_IF_SHIFT 12
-#define CDCF_IOC_ID_MASK 0xFFFF0000 /* used to uniquely id an ioctl
- req/resp pairing */
-#define CDCF_IOC_ID_SHIFT 16 /* # of bits of shift for ID Mask */
-
-#define CDC_IOC_IF_IDX(flags) \
- (((flags) & CDCF_IOC_IF_MASK) >> CDCF_IOC_IF_SHIFT)
-#define CDC_IOC_ID(flags) \
- (((flags) & CDCF_IOC_ID_MASK) >> CDCF_IOC_ID_SHIFT)
-
-#define CDC_GET_IF_IDX(hdr) \
- ((int)((((hdr)->flags) & CDCF_IOC_IF_MASK) >> CDCF_IOC_IF_SHIFT))
-#define CDC_SET_IF_IDX(hdr, idx) \
- ((hdr)->flags = (((hdr)->flags & ~CDCF_IOC_IF_MASK) | \
- ((idx) << CDCF_IOC_IF_SHIFT)))
-
-/*
- * BDC header
- *
- * The BDC header is used on data packets to convey priority across USB.
- */
-
-#define BDC_HEADER_LEN 4
-
-#define BDC_PROTO_VER 1 /* Protocol version */
-
-#define BDC_FLAG_VER_MASK 0xf0 /* Protocol version mask */
-#define BDC_FLAG_VER_SHIFT 4 /* Protocol version shift */
-
-#define BDC_FLAG__UNUSED 0x03 /* Unassigned */
-#define BDC_FLAG_SUM_GOOD 0x04 /* Dongle has verified good
- RX checksums */
-#define BDC_FLAG_SUM_NEEDED 0x08 /* Dongle needs to do TX checksums */
-
-#define BDC_PRIORITY_MASK 0x7
-
-#define BDC_FLAG2_FC_FLAG 0x10 /* flag to indicate if pkt contains */
- /* FLOW CONTROL info only */
-#define BDC_PRIORITY_FC_SHIFT 4 /* flow control info shift */
-
-#define BDC_FLAG2_IF_MASK 0x0f /* APSTA: interface on which the
- packet was received */
-#define BDC_FLAG2_IF_SHIFT 0
-
-#define BDC_GET_IF_IDX(hdr) \
- ((int)((((hdr)->flags2) & BDC_FLAG2_IF_MASK) >> BDC_FLAG2_IF_SHIFT))
-#define BDC_SET_IF_IDX(hdr, idx) \
- ((hdr)->flags2 = (((hdr)->flags2 & ~BDC_FLAG2_IF_MASK) | \
- ((idx) << BDC_FLAG2_IF_SHIFT)))
-
-struct bdc_header {
- u8 flags; /* Flags */
- u8 priority; /* 802.1d Priority 0:2 bits, 4:7 flow
- control info for usb */
- u8 flags2;
- u8 rssi;
-};
diff --git a/drivers/staging/brcm80211/brcmfmac/bcmchip.h b/drivers/staging/brcm80211/brcmfmac/bcmchip.h
index c0d4c3bf6d42f..08729e1cf3d04 100644
--- a/drivers/staging/brcm80211/brcmfmac/bcmchip.h
+++ b/drivers/staging/brcm80211/brcmfmac/bcmchip.h
@@ -17,12 +17,6 @@
#ifndef _bcmchip_h_
#define _bcmchip_h_
-/* Core reg address translation */
-#define CORE_CC_REG(base, field) (base + offsetof(chipcregs_t, field))
-#define CORE_BUS_REG(base, field) (base + offsetof(sdpcmd_regs_t, field))
-#define CORE_SB(base, field) \
- (base + SBCONFIGOFF + offsetof(sbconfig_t, field))
-
/* bcm4329 */
/* SDIO device core, ID 0x829 */
#define BCM4329_CORE_BUS_BASE 0x18011000
diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdbus.h b/drivers/staging/brcm80211/brcmfmac/bcmsdbus.h
index 53c32915acc9e..e9da1ce13fa7b 100644
--- a/drivers/staging/brcm80211/brcmfmac/bcmsdbus.h
+++ b/drivers/staging/brcm80211/brcmfmac/bcmsdbus.h
@@ -17,6 +17,8 @@
#ifndef _sdio_api_h_
#define _sdio_api_h_
+#include "sdio_host.h"
+
#define SDIOH_API_RC_SUCCESS (0x00)
#define SDIOH_API_RC_FAIL (0x01)
#define SDIOH_API_SUCCESS(status) (status == 0)
diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh.c
index 3750fcf5a8718..b3bdd489a9fd9 100644
--- a/drivers/staging/brcm80211/brcmfmac/bcmsdh.c
+++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh.c
@@ -18,17 +18,16 @@
#include <linux/types.h>
#include <linux/netdevice.h>
#include <linux/pci_ids.h>
-#include <bcmdefs.h>
-#include <bcmdevs.h>
-#include <bcmutils.h>
-#include <hndsoc.h>
+#include <linux/sched.h>
+#include <defs.h>
+#include <brcm_hw_ids.h>
+#include <brcmu_utils.h>
+#include <brcmu_wifi.h>
+#include <soc.h>
-#include <bcmsdh.h> /* BRCM API for SDIO
- clients (such as wl, dhd) */
#include <bcmsdbus.h> /* common SDIO/controller interface */
#include <sbsdio.h> /* BRCM sdio device core */
-#include <sdio.h> /* sdio spec */
#include "dngl_stats.h"
#include "dhd.h"
diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c
index 465f623760f3f..71ef23a9f47b4 100644
--- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c
+++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c
@@ -23,17 +23,17 @@
#include <linux/netdevice.h>
#include <linux/pci.h>
#include <linux/completion.h>
+#include <linux/sched.h>
-#include <pcicfg.h>
-#include <bcmdefs.h>
-#include <bcmdevs.h>
-#include <bcmutils.h>
+#include <defs.h>
+#include <brcm_hw_ids.h>
+#include <brcmu_utils.h>
+#include <brcmu_wifi.h>
+#include "sdio_host.h"
#if defined(OOB_INTR_ONLY)
#include <linux/irq.h>
extern void dhdsdio_isr(void *args);
-#include <dngl_stats.h>
-#include <dhd.h>
#endif /* defined(OOB_INTR_ONLY) */
#if defined(CONFIG_MACH_SANDGATE2G) || defined(CONFIG_MACH_LOGICPD_PXA270)
#if !defined(BCMPLATFORM_BUS)
@@ -365,22 +365,5 @@ void bcmsdh_unregister_oob_intr(void)
extern uint sd_msglevel; /* Debug message level */
module_param(sd_msglevel, uint, 0);
-extern uint sd_power; /* 0 = SD Power OFF,
- 1 = SD Power ON. */
-module_param(sd_power, uint, 0);
-
-extern uint sd_clock; /* SD Clock Control, 0 = SD Clock OFF,
- 1 = SD Clock ON */
-module_param(sd_clock, uint, 0);
-
-extern uint sd_divisor; /* Divisor (-1 means external clock) */
-module_param(sd_divisor, uint, 0);
-
-extern uint sd_sdmode; /* Default is SD4, 0=SPI, 1=SD1, 2=SD4 */
-module_param(sd_sdmode, uint, 0);
-
-extern uint sd_hiok; /* Ok to use hi-speed mode */
-module_param(sd_hiok, uint, 0);
-
extern uint sd_f2_blocksize;
module_param(sd_f2_blocksize, int, 0);
diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c
index c0ffbd35e0ca0..66e204b60b639 100644
--- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c
+++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c
@@ -15,11 +15,12 @@
*/
#include <linux/types.h>
#include <linux/netdevice.h>
-#include <bcmdefs.h>
-#include <bcmdevs.h>
-#include <bcmutils.h>
-#include <sdio.h> /* SDIO Device and Protocol Specs */
-#include <sdioh.h> /* SDIO Host Controller Specification */
+#include <linux/mmc/sdio.h>
+#include <defs.h>
+#include <brcm_hw_ids.h>
+#include <brcmu_utils.h>
+#include <brcmu_wifi.h>
+#include "sdio_host.h"
#include <bcmsdbus.h> /* bcmsdh to/from specific controller APIs */
#include <sdiovar.h> /* ioctl/iovars */
@@ -45,16 +46,9 @@ extern int sdio_reset_comm(struct mmc_card *card);
extern PBCMSDH_SDMMC_INSTANCE gInstance;
-uint sd_sdmode = SDIOH_MODE_SD4; /* Use SD4 mode by default */
uint sd_f2_blocksize = 512; /* Default blocksize */
-uint sd_divisor = 2; /* Default 48MHz/2 = 24MHz */
-
-uint sd_power = 1; /* Default to SD Slot powered ON */
-uint sd_clock = 1; /* Default to SD Clock turned ON */
-uint sd_hiok = false; /* Don't use hi-speed mode by default */
uint sd_msglevel = 0x01;
-uint sd_use_dma = true;
DHD_PM_RESUME_WAIT_INIT(sdioh_request_byte_wait);
DHD_PM_RESUME_WAIT_INIT(sdioh_request_word_wait);
DHD_PM_RESUME_WAIT_INIT(sdioh_request_packet_wait);
@@ -81,16 +75,16 @@ static int sdioh_sdmmc_card_enablefuncs(sdioh_info_t *sd)
sd_trace(("%s\n", __func__));
/* Get the Card's common CIS address */
- sd->com_cis_ptr = sdioh_sdmmc_get_cisaddr(sd, SDIOD_CCCR_CISPTR_0);
+ sd->com_cis_ptr = sdioh_sdmmc_get_cisaddr(sd, SDIO_CCCR_CIS);
sd->func_cis_ptr[0] = sd->com_cis_ptr;
sd_info(("%s: Card's Common CIS Ptr = 0x%x\n", __func__,
sd->com_cis_ptr));
/* Get the Card's function CIS (for each function) */
- for (fbraddr = SDIOD_FBR_STARTADDR, func = 1;
+ for (fbraddr = SDIO_FBR_BASE(1), func = 1;
func <= sd->num_funcs; func++, fbraddr += SDIOD_FBR_SIZE) {
sd->func_cis_ptr[func] =
- sdioh_sdmmc_get_cisaddr(sd, SDIOD_FBR_CISPTR_0 + fbraddr);
+ sdioh_sdmmc_get_cisaddr(sd, SDIO_FBR_CIS + fbraddr);
sd_info(("%s: Function %d CIS Ptr = 0x%x\n", __func__, func,
sd->func_cis_ptr[func]));
}
@@ -138,7 +132,6 @@ sdioh_info_t *sdioh_attach(void *bar0, uint irq)
}
sd->num_funcs = 2;
- sd->sd_blockmode = true;
sd->use_client_ints = true;
sd->client_block_size[0] = 64;
@@ -352,46 +345,22 @@ uint sdioh_query_iofnum(sdioh_info_t *sd)
/* IOVar table */
enum {
IOV_MSGLEVEL = 1,
- IOV_BLOCKMODE,
IOV_BLOCKSIZE,
- IOV_DMA,
IOV_USEINTS,
IOV_NUMINTS,
- IOV_NUMLOCALINTS,
- IOV_HOSTREG,
IOV_DEVREG,
- IOV_DIVISOR,
- IOV_SDMODE,
- IOV_HISPEED,
IOV_HCIREGS,
- IOV_POWER,
- IOV_CLOCK,
IOV_RXCHAIN
};
-const bcm_iovar_t sdioh_iovars[] = {
+const struct brcmu_iovar sdioh_iovars[] = {
{"sd_msglevel", IOV_MSGLEVEL, 0, IOVT_UINT32, 0},
- {"sd_blockmode", IOV_BLOCKMODE, 0, IOVT_BOOL, 0},
{"sd_blocksize", IOV_BLOCKSIZE, 0, IOVT_UINT32, 0},/* ((fn << 16) |
size) */
- {"sd_dma", IOV_DMA, 0, IOVT_BOOL, 0},
{"sd_ints", IOV_USEINTS, 0, IOVT_BOOL, 0},
{"sd_numints", IOV_NUMINTS, 0, IOVT_UINT32, 0},
- {"sd_numlocalints", IOV_NUMLOCALINTS, 0, IOVT_UINT32, 0},
- {"sd_hostreg", IOV_HOSTREG, 0, IOVT_BUFFER, sizeof(sdreg_t)}
- ,
{"sd_devreg", IOV_DEVREG, 0, IOVT_BUFFER, sizeof(sdreg_t)}
,
- {"sd_divisor", IOV_DIVISOR, 0, IOVT_UINT32, 0}
- ,
- {"sd_power", IOV_POWER, 0, IOVT_UINT32, 0}
- ,
- {"sd_clock", IOV_CLOCK, 0, IOVT_UINT32, 0}
- ,
- {"sd_mode", IOV_SDMODE, 0, IOVT_UINT32, 100}
- ,
- {"sd_highspeed", IOV_HISPEED, 0, IOVT_UINT32, 0}
- ,
{"sd_rxchain", IOV_RXCHAIN, 0, IOVT_BOOL, 0}
,
{NULL, 0, 0, 0, 0}
@@ -401,7 +370,7 @@ int
sdioh_iovar_op(sdioh_info_t *si, const char *name,
void *params, int plen, void *arg, int len, bool set)
{
- const bcm_iovar_t *vi = NULL;
+ const struct brcmu_iovar *vi = NULL;
int bcmerror = 0;
int val_size;
s32 int_val = 0;
@@ -418,13 +387,13 @@ sdioh_iovar_op(sdioh_info_t *si, const char *name,
sd_trace(("%s: Enter (%s %s)\n", __func__, (set ? "set" : "get"),
name));
- vi = bcm_iovar_lookup(sdioh_iovars, name);
+ vi = brcmu_iovar_lookup(sdioh_iovars, name);
if (vi == NULL) {
bcmerror = -ENOTSUPP;
goto exit;
}
- bcmerror = bcm_iovar_lencheck(vi, arg, len, set);
+ bcmerror = brcmu_iovar_lencheck(vi, arg, len, set);
if (bcmerror != 0)
goto exit;
@@ -457,16 +426,6 @@ sdioh_iovar_op(sdioh_info_t *si, const char *name,
sd_msglevel = int_val;
break;
- case IOV_GVAL(IOV_BLOCKMODE):
- int_val = (s32) si->sd_blockmode;
- memcpy(arg, &int_val, val_size);
- break;
-
- case IOV_SVAL(IOV_BLOCKMODE):
- si->sd_blockmode = (bool) int_val;
- /* Haven't figured out how to make non-block mode with DMA */
- break;
-
case IOV_GVAL(IOV_BLOCKSIZE):
if ((u32) int_val > si->num_funcs) {
bcmerror = -EINVAL;
@@ -518,15 +477,6 @@ sdioh_iovar_op(sdioh_info_t *si, const char *name,
memcpy(arg, &int_val, val_size);
break;
- case IOV_GVAL(IOV_DMA):
- int_val = (s32) si->sd_use_dma;
- memcpy(arg, &int_val, val_size);
- break;
-
- case IOV_SVAL(IOV_DMA):
- si->sd_use_dma = (bool) int_val;
- break;
-
case IOV_GVAL(IOV_USEINTS):
int_val = (s32) si->use_client_ints;
memcpy(arg, &int_val, val_size);
@@ -541,111 +491,11 @@ sdioh_iovar_op(sdioh_info_t *si, const char *name,
break;
- case IOV_GVAL(IOV_DIVISOR):
- int_val = (u32) sd_divisor;
- memcpy(arg, &int_val, val_size);
- break;
-
- case IOV_SVAL(IOV_DIVISOR):
- sd_divisor = int_val;
- break;
-
- case IOV_GVAL(IOV_POWER):
- int_val = (u32) sd_power;
- memcpy(arg, &int_val, val_size);
- break;
-
- case IOV_SVAL(IOV_POWER):
- sd_power = int_val;
- break;
-
- case IOV_GVAL(IOV_CLOCK):
- int_val = (u32) sd_clock;
- memcpy(arg, &int_val, val_size);
- break;
-
- case IOV_SVAL(IOV_CLOCK):
- sd_clock = int_val;
- break;
-
- case IOV_GVAL(IOV_SDMODE):
- int_val = (u32) sd_sdmode;
- memcpy(arg, &int_val, val_size);
- break;
-
- case IOV_SVAL(IOV_SDMODE):
- sd_sdmode = int_val;
- break;
-
- case IOV_GVAL(IOV_HISPEED):
- int_val = (u32) sd_hiok;
- memcpy(arg, &int_val, val_size);
- break;
-
- case IOV_SVAL(IOV_HISPEED):
- sd_hiok = int_val;
- break;
-
case IOV_GVAL(IOV_NUMINTS):
int_val = (s32) si->intrcount;
memcpy(arg, &int_val, val_size);
break;
- case IOV_GVAL(IOV_NUMLOCALINTS):
- int_val = (s32) 0;
- memcpy(arg, &int_val, val_size);
- break;
-
- case IOV_GVAL(IOV_HOSTREG):
- {
- sdreg_t *sd_ptr = (sdreg_t *) params;
-
- if (sd_ptr->offset < SD_SysAddr
- || sd_ptr->offset > SD_MaxCurCap) {
- sd_err(("%s: bad offset 0x%x\n", __func__,
- sd_ptr->offset));
- bcmerror = -EINVAL;
- break;
- }
-
- sd_trace(("%s: rreg%d at offset %d\n", __func__,
- (sd_ptr->offset & 1) ? 8
- : ((sd_ptr->offset & 2) ? 16 : 32),
- sd_ptr->offset));
- if (sd_ptr->offset & 1)
- int_val = 8; /* sdioh_sdmmc_rreg8(si,
- sd_ptr->offset); */
- else if (sd_ptr->offset & 2)
- int_val = 16; /* sdioh_sdmmc_rreg16(si,
- sd_ptr->offset); */
- else
- int_val = 32; /* sdioh_sdmmc_rreg(si,
- sd_ptr->offset); */
-
- memcpy(arg, &int_val, sizeof(int_val));
- break;
- }
-
- case IOV_SVAL(IOV_HOSTREG):
- {
- sdreg_t *sd_ptr = (sdreg_t *) params;
-
- if (sd_ptr->offset < SD_SysAddr
- || sd_ptr->offset > SD_MaxCurCap) {
- sd_err(("%s: bad offset 0x%x\n", __func__,
- sd_ptr->offset));
- bcmerror = -EINVAL;
- break;
- }
-
- sd_trace(("%s: wreg%d value 0x%08x at offset %d\n",
- __func__, sd_ptr->value,
- (sd_ptr->offset & 1) ? 8
- : ((sd_ptr->offset & 2) ? 16 : 32),
- sd_ptr->offset));
- break;
- }
-
case IOV_GVAL(IOV_DEVREG):
{
sdreg_t *sd_ptr = (sdreg_t *) params;
@@ -792,7 +642,7 @@ sdioh_request_byte(sdioh_info_t *sd, uint rw, uint func, uint regaddr,
* Handle F2 enable
* as a special case.
*/
- if (regaddr == SDIOD_CCCR_IOEN) {
+ if (regaddr == SDIO_CCCR_IOEx) {
if (gInstance->func[2]) {
sdio_claim_host(gInstance->func[2]);
if (*byte & SDIO_FUNC_ENABLE_2) {
@@ -817,7 +667,7 @@ sdioh_request_byte(sdioh_info_t *sd, uint rw, uint func, uint regaddr,
}
#if defined(MMC_SDIO_ABORT)
/* to allow abort command through F1 */
- else if (regaddr == SDIOD_CCCR_IOABORT) {
+ else if (regaddr == SDIO_CCCR_ABORT) {
sdio_claim_host(gInstance->func[func]);
/*
* this sdio_f0_writeb() can be replaced
@@ -1039,9 +889,9 @@ sdioh_request_buffer(sdioh_info_t *sd, uint pio_dma, uint fix_inc, uint write,
if (pkt == NULL) {
sd_data(("%s: Creating new %s Packet, len=%d\n",
__func__, write ? "TX" : "RX", buflen_u));
- mypkt = bcm_pkt_buf_get_skb(buflen_u);
+ mypkt = brcmu_pkt_buf_get_skb(buflen_u);
if (!mypkt) {
- sd_err(("%s: bcm_pkt_buf_get_skb failed: len %d\n",
+ sd_err(("%s: brcmu_pkt_buf_get_skb failed: len %d\n",
__func__, buflen_u));
return SDIOH_API_RC_FAIL;
}
@@ -1057,7 +907,7 @@ sdioh_request_buffer(sdioh_info_t *sd, uint pio_dma, uint fix_inc, uint write,
if (!write)
memcpy(buffer, mypkt->data, buflen_u);
- bcm_pkt_buf_free_skb(mypkt);
+ brcmu_pkt_buf_free_skb(mypkt);
} else if (((u32) (pkt->data) & DMA_ALIGN_MASK) != 0) {
/* Case 2: We have a packet, but it is unaligned. */
@@ -1066,9 +916,9 @@ sdioh_request_buffer(sdioh_info_t *sd, uint pio_dma, uint fix_inc, uint write,
sd_data(("%s: Creating aligned %s Packet, len=%d\n",
__func__, write ? "TX" : "RX", pkt->len));
- mypkt = bcm_pkt_buf_get_skb(pkt->len);
+ mypkt = brcmu_pkt_buf_get_skb(pkt->len);
if (!mypkt) {
- sd_err(("%s: bcm_pkt_buf_get_skb failed: len %d\n",
+ sd_err(("%s: brcmu_pkt_buf_get_skb failed: len %d\n",
__func__, pkt->len));
return SDIOH_API_RC_FAIL;
}
@@ -1084,7 +934,7 @@ sdioh_request_buffer(sdioh_info_t *sd, uint pio_dma, uint fix_inc, uint write,
if (!write)
memcpy(pkt->data, mypkt->data, mypkt->len);
- bcm_pkt_buf_free_skb(mypkt);
+ brcmu_pkt_buf_free_skb(mypkt);
} else { /* case 3: We have a packet and
it is aligned. */
sd_data(("%s: Aligned %s Packet, direct DMA\n",
@@ -1105,8 +955,8 @@ extern int sdioh_abort(sdioh_info_t *sd, uint func)
sd_trace(("%s: Enter\n", __func__));
#if defined(MMC_SDIO_ABORT)
- /* issue abort cmd52 command through F1 */
- sdioh_request_byte(sd, SD_IO_OP_WRITE, SDIO_FUNC_0, SDIOD_CCCR_IOABORT,
+ /* issue abort cmd52 command through F0 */
+ sdioh_request_byte(sd, SDIOH_WRITE, SDIO_FUNC_0, SDIO_CCCR_ABORT,
&t_func);
#endif /* defined(MMC_SDIO_ABORT) */
diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.h b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.h
index 3ef42b318493e..42c71a853b669 100644
--- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.h
+++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.h
@@ -85,11 +85,9 @@ struct sdioh_info {
uint irq; /* Client irq */
int intrcount; /* Client interrupts */
- bool sd_use_dma; /* DMA on CMD53 */
bool sd_blockmode; /* sd_blockmode == false => 64 Byte Cmd 53s. */
/* Must be on for sd_multiblock to be effective */
bool use_client_ints; /* If this is false, make sure to restore */
- int sd_mode; /* SD1/SD4/SPI */
int client_block_size[SDIOD_MAX_IOFUNCS]; /* Blocksize */
u8 num_funcs; /* Supported funcs on client */
u32 com_cis_ptr;
diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c
index 2792a4dfe6511..9fc491dff018c 100644
--- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c
+++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c
@@ -16,9 +16,11 @@
#include <linux/types.h>
#include <linux/sched.h> /* request_irq() */
#include <linux/netdevice.h>
-#include <bcmdefs.h>
-#include <bcmutils.h>
-#include <sdio.h> /* SDIO Specs */
+#include <net/cfg80211.h>
+#include <defs.h>
+#include <brcmu_utils.h>
+#include <brcmu_wifi.h>
+#include "sdio_host.h"
#include <bcmsdbus.h> /* bcmsdh to/from specific controller APIs */
#include <sdiovar.h> /* to get msglevel bit values */
diff --git a/drivers/staging/brcm80211/brcmfmac/dhd.h b/drivers/staging/brcm80211/brcmfmac/dhd.h
index a726b493ea8d6..1fc52023a3d61 100644
--- a/drivers/staging/brcm80211/brcmfmac/dhd.h
+++ b/drivers/staging/brcm80211/brcmfmac/dhd.h
@@ -21,28 +21,348 @@
#ifndef _dhd_h_
#define _dhd_h_
-#include <linux/sched.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/slab.h>
-#include <linux/skbuff.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/random.h>
-#include <linux/spinlock.h>
-#include <linux/ethtool.h>
-#include <linux/suspend.h>
-#include <asm/uaccess.h>
-#include <asm/unaligned.h>
-/* The kernel threading is sdio-specific */
-
-#include <wlioctl.h>
-
/* Forward decls */
struct dhd_bus;
struct dhd_prot;
struct dhd_info;
+#define WLC_UP 2
+#define WLC_SET_PROMISC 10
+#define WLC_GET_RATE 12
+#define WLC_GET_INFRA 19
+#define WLC_SET_INFRA 20
+#define WLC_GET_AUTH 21
+#define WLC_SET_AUTH 22
+#define WLC_GET_BSSID 23
+#define WLC_GET_SSID 25
+#define WLC_SET_SSID 26
+#define WLC_GET_CHANNEL 29
+#define WLC_GET_SRL 31
+#define WLC_GET_LRL 33
+#define WLC_GET_RADIO 37
+#define WLC_SET_RADIO 38
+#define WLC_GET_PHYTYPE 39
+#define WLC_SET_KEY 45
+#define WLC_SET_PASSIVE_SCAN 49
+#define WLC_SCAN 50
+#define WLC_SCAN_RESULTS 51
+#define WLC_DISASSOC 52
+#define WLC_REASSOC 53
+#define WLC_SET_ROAM_TRIGGER 55
+#define WLC_SET_ROAM_DELTA 57
+#define WLC_GET_DTIMPRD 77
+#define WLC_SET_COUNTRY 84
+#define WLC_GET_PM 85
+#define WLC_SET_PM 86
+#define WLC_GET_AP 117
+#define WLC_SET_AP 118
+#define WLC_GET_RSSI 127
+#define WLC_GET_WSEC 133
+#define WLC_SET_WSEC 134
+#define WLC_GET_PHY_NOISE 135
+#define WLC_GET_BSS_INFO 136
+#define WLC_SET_SCAN_CHANNEL_TIME 185
+#define WLC_SET_SCAN_UNASSOC_TIME 187
+#define WLC_SCB_DEAUTHENTICATE_FOR_REASON 201
+#define WLC_GET_VALID_CHANNELS 217
+#define WLC_GET_KEY_PRIMARY 235
+#define WLC_SET_KEY_PRIMARY 236
+#define WLC_SET_SCAN_PASSIVE_TIME 258
+#define WLC_GET_VAR 262 /* get value of named variable */
+#define WLC_SET_VAR 263 /* set named variable to value */
+
+/* phy types (returned by WLC_GET_PHYTPE) */
+#define WLC_PHY_TYPE_A 0
+#define WLC_PHY_TYPE_B 1
+#define WLC_PHY_TYPE_G 2
+#define WLC_PHY_TYPE_N 4
+#define WLC_PHY_TYPE_LP 5
+#define WLC_PHY_TYPE_SSN 6
+#define WLC_PHY_TYPE_HT 7
+#define WLC_PHY_TYPE_LCN 8
+#define WLC_PHY_TYPE_NULL 0xf
+
+#define WL_PKT_FILTER_FIXED_LEN offsetof(wl_pkt_filter_t, u)
+#define WL_PKT_FILTER_PATTERN_FIXED_LEN offsetof(wl_pkt_filter_pattern_t, mask_and_pattern)
+
+#define WL_EVENTING_MASK_LEN 16
+
+#define TOE_TX_CSUM_OL 0x00000001
+#define TOE_RX_CSUM_OL 0x00000002
+
+/* maximum channels returned by the get valid channels iovar */
+#define WL_NUMCHANNELS 64
+
+#define WL_BSS_INFO_VERSION 108 /* current ver of wl_bss_info struct */
+
+/* size of wl_scan_params not including variable length array */
+#define WL_SCAN_PARAMS_FIXED_SIZE 64
+
+/* masks for channel and ssid count */
+#define WL_SCAN_PARAMS_COUNT_MASK 0x0000ffff
+#define WL_SCAN_PARAMS_NSSID_SHIFT 16
+
+#define WL_SCAN_ACTION_START 1
+#define WL_SCAN_ACTION_CONTINUE 2
+#define WL_SCAN_ACTION_ABORT 3
+
+#define ISCAN_REQ_VERSION 1
+
+/* wl_iscan_results status values */
+#define WL_SCAN_RESULTS_SUCCESS 0
+#define WL_SCAN_RESULTS_PARTIAL 1
+#define WL_SCAN_RESULTS_PENDING 2
+#define WL_SCAN_RESULTS_ABORTED 3
+#define WL_SCAN_RESULTS_NO_MEM 4
+
+#define MAX_CCA_CHANNELS 38 /* Max number of 20 Mhz wide channels */
+#define MAX_CCA_SECS 60 /* CCA keeps this many seconds history */
+
+#define IBSS_MED 15 /* Mediom in-bss congestion percentage */
+#define IBSS_HI 25 /* Hi in-bss congestion percentage */
+#define OBSS_MED 12
+#define OBSS_HI 25
+#define INTERFER_MED 5
+#define INTERFER_HI 10
+
+#define CCA_FLAG_2G_ONLY 0x01 /* Return a channel from 2.4 Ghz band */
+#define CCA_FLAG_5G_ONLY 0x02 /* Return a channel from 2.4 Ghz band */
+#define CCA_FLAG_IGNORE_DURATION 0x04 /* Ignore dwell time for each channel */
+#define CCA_FLAGS_PREFER_1_6_11 0x10
+#define CCA_FLAG_IGNORE_INTERFER 0x20 /* do not exlude channel based on interfer level */
+
+#define CCA_ERRNO_BAND 1 /* After filtering for band pref, no choices left */
+#define CCA_ERRNO_DURATION 2 /* After filtering for duration, no choices left */
+#define CCA_ERRNO_PREF_CHAN 3 /* After filtering for chan pref, no choices left */
+#define CCA_ERRNO_INTERFER 4 /* After filtering for interference, no choices left */
+#define CCA_ERRNO_TOO_FEW 5 /* Only 1 channel was input */
+
+#define WL_NUM_RPI_BINS 8
+#define WL_RM_TYPE_BASIC 1
+#define WL_RM_TYPE_CCA 2
+#define WL_RM_TYPE_RPI 3
+
+#define WL_RM_FLAG_PARALLEL (1<<0)
+
+#define WL_RM_FLAG_LATE (1<<1)
+#define WL_RM_FLAG_INCAPABLE (1<<2)
+#define WL_RM_FLAG_REFUSED (1<<3)
+
+#define WL_SOFT_KEY (1 << 0) /* Indicates this key is using soft encrypt */
+#define WL_PRIMARY_KEY (1 << 1) /* Indicates this key is the primary (ie tx) key */
+#define WL_KF_RES_4 (1 << 4) /* Reserved for backward compat */
+#define WL_KF_RES_5 (1 << 5) /* Reserved for backward compat */
+#define WL_IBSS_PEER_GROUP_KEY (1 << 6) /* Indicates a group key for a IBSS PEER */
+
+#define WLC_IOCTL_SMLEN 256 /* "small" length ioctl buffer required */
+#define WLC_IOCTL_MEDLEN 1536 /* "med" length ioctl buffer required */
+#define WLC_IOCTL_MAXLEN 8192
+
+#define DHD_IF_VIF 0x01 /* Virtual IF (Hidden from user) */
+
+/* optionally set by a module_param_string() */
+#define MOD_PARAM_PATHLEN 2048
+
+/* For supporting multiple interfaces */
+#define DHD_MAX_IFS 16
+#define DHD_DEL_IF -0xe
+#define DHD_BAD_IF -0xf
+
+#define DOT11_BSSTYPE_ANY 2
+#define DOT11_MAX_DEFAULT_KEYS 4
+
+#define BCM_EVENT_MSG_VERSION 1
+#define BCM_MSG_IFNAME_MAX 16
+
+#define WLC_EVENT_MSG_LINK 0x01
+#define WLC_EVENT_MSG_FLUSHTXQ 0x02
+#define WLC_EVENT_MSG_GROUP 0x04
+
+typedef struct {
+ u16 version;
+ u16 flags;
+ u32 event_type;
+ u32 status;
+ u32 reason;
+ u32 auth_type;
+ u32 datalen;
+ u8 addr[ETH_ALEN];
+ char ifname[BCM_MSG_IFNAME_MAX];
+} __attribute__((packed)) wl_event_msg_t;
+
+typedef struct bcmeth_hdr {
+ u16 subtype;
+ u16 length;
+ u8 version;
+ u8 oui[3];
+ u16 usr_subtype;
+} __attribute__((packed)) bcmeth_hdr_t;
+
+#ifdef BRCM_FULLMAC
+typedef struct bcm_event {
+ struct ethhdr eth;
+ bcmeth_hdr_t bcm_hdr;
+ wl_event_msg_t event;
+} __attribute__((packed)) bcm_event_t;
+#endif
+#define BCM_MSG_LEN (sizeof(bcm_event_t) - sizeof(bcmeth_hdr_t) - \
+ sizeof(struct ether_header))
+
+#define WLC_E_SET_SSID 0
+#define WLC_E_JOIN 1
+#define WLC_E_START 2
+#define WLC_E_AUTH 3
+#define WLC_E_AUTH_IND 4
+#define WLC_E_DEAUTH 5
+#define WLC_E_DEAUTH_IND 6
+#define WLC_E_ASSOC 7
+#define WLC_E_ASSOC_IND 8
+#define WLC_E_REASSOC 9
+#define WLC_E_REASSOC_IND 10
+#define WLC_E_DISASSOC 11
+#define WLC_E_DISASSOC_IND 12
+#define WLC_E_QUIET_START 13
+#define WLC_E_QUIET_END 14
+#define WLC_E_BEACON_RX 15
+#define WLC_E_LINK 16
+#define WLC_E_MIC_ERROR 17
+#define WLC_E_NDIS_LINK 18
+#define WLC_E_ROAM 19
+#define WLC_E_TXFAIL 20
+#define WLC_E_PMKID_CACHE 21
+#define WLC_E_RETROGRADE_TSF 22
+#define WLC_E_PRUNE 23
+#define WLC_E_AUTOAUTH 24
+#define WLC_E_EAPOL_MSG 25
+#define WLC_E_SCAN_COMPLETE 26
+#define WLC_E_ADDTS_IND 27
+#define WLC_E_DELTS_IND 28
+#define WLC_E_BCNSENT_IND 29
+#define WLC_E_BCNRX_MSG 30
+#define WLC_E_BCNLOST_MSG 31
+#define WLC_E_ROAM_PREP 32
+#define WLC_E_PFN_NET_FOUND 33
+#define WLC_E_PFN_NET_LOST 34
+#define WLC_E_RESET_COMPLETE 35
+#define WLC_E_JOIN_START 36
+#define WLC_E_ROAM_START 37
+#define WLC_E_ASSOC_START 38
+#define WLC_E_IBSS_ASSOC 39
+#define WLC_E_RADIO 40
+#define WLC_E_PSM_WATCHDOG 41
+#define WLC_E_PROBREQ_MSG 44
+#define WLC_E_SCAN_CONFIRM_IND 45
+#define WLC_E_PSK_SUP 46
+#define WLC_E_COUNTRY_CODE_CHANGED 47
+#define WLC_E_EXCEEDED_MEDIUM_TIME 48
+#define WLC_E_ICV_ERROR 49
+#define WLC_E_UNICAST_DECODE_ERROR 50
+#define WLC_E_MULTICAST_DECODE_ERROR 51
+#define WLC_E_TRACE 52
+#define WLC_E_IF 54
+#define WLC_E_RSSI 56
+#define WLC_E_PFN_SCAN_COMPLETE 57
+#define WLC_E_EXTLOG_MSG 58
+#define WLC_E_ACTION_FRAME 59
+#define WLC_E_ACTION_FRAME_COMPLETE 60
+#define WLC_E_PRE_ASSOC_IND 61
+#define WLC_E_PRE_REASSOC_IND 62
+#define WLC_E_CHANNEL_ADOPTED 63
+#define WLC_E_AP_STARTED 64
+#define WLC_E_DFS_AP_STOP 65
+#define WLC_E_DFS_AP_RESUME 66
+#define WLC_E_RESERVED1 67
+#define WLC_E_RESERVED2 68
+#define WLC_E_ESCAN_RESULT 69
+#define WLC_E_ACTION_FRAME_OFF_CHAN_COMPLETE 70
+#define WLC_E_DCS_REQUEST 73
+
+#define WLC_E_FIFO_CREDIT_MAP 74
+
+#define WLC_E_LAST 75
+
+#define WLC_E_STATUS_SUCCESS 0
+#define WLC_E_STATUS_FAIL 1
+#define WLC_E_STATUS_TIMEOUT 2
+#define WLC_E_STATUS_NO_NETWORKS 3
+#define WLC_E_STATUS_ABORT 4
+#define WLC_E_STATUS_NO_ACK 5
+#define WLC_E_STATUS_UNSOLICITED 6
+#define WLC_E_STATUS_ATTEMPT 7
+#define WLC_E_STATUS_PARTIAL 8
+#define WLC_E_STATUS_NEWSCAN 9
+#define WLC_E_STATUS_NEWASSOC 10
+#define WLC_E_STATUS_11HQUIET 11
+#define WLC_E_STATUS_SUPPRESS 12
+#define WLC_E_STATUS_NOCHANS 13
+#define WLC_E_STATUS_CS_ABORT 15
+#define WLC_E_STATUS_ERROR 16
+
+#define WLC_E_REASON_INITIAL_ASSOC 0
+#define WLC_E_REASON_LOW_RSSI 1
+#define WLC_E_REASON_DEAUTH 2
+#define WLC_E_REASON_DISASSOC 3
+#define WLC_E_REASON_BCNS_LOST 4
+#define WLC_E_REASON_MINTXRATE 9
+#define WLC_E_REASON_TXFAIL 10
+
+#define WLC_E_REASON_FAST_ROAM_FAILED 5
+#define WLC_E_REASON_DIRECTED_ROAM 6
+#define WLC_E_REASON_TSPEC_REJECTED 7
+#define WLC_E_REASON_BETTER_AP 8
+
+#define WLC_E_PRUNE_ENCR_MISMATCH 1
+#define WLC_E_PRUNE_BCAST_BSSID 2
+#define WLC_E_PRUNE_MAC_DENY 3
+#define WLC_E_PRUNE_MAC_NA 4
+#define WLC_E_PRUNE_REG_PASSV 5
+#define WLC_E_PRUNE_SPCT_MGMT 6
+#define WLC_E_PRUNE_RADAR 7
+#define WLC_E_RSN_MISMATCH 8
+#define WLC_E_PRUNE_NO_COMMON_RATES 9
+#define WLC_E_PRUNE_BASIC_RATES 10
+#define WLC_E_PRUNE_CIPHER_NA 12
+#define WLC_E_PRUNE_KNOWN_STA 13
+#define WLC_E_PRUNE_WDS_PEER 15
+#define WLC_E_PRUNE_QBSS_LOAD 16
+#define WLC_E_PRUNE_HOME_AP 17
+
+#define WLC_E_SUP_OTHER 0
+#define WLC_E_SUP_DECRYPT_KEY_DATA 1
+#define WLC_E_SUP_BAD_UCAST_WEP128 2
+#define WLC_E_SUP_BAD_UCAST_WEP40 3
+#define WLC_E_SUP_UNSUP_KEY_LEN 4
+#define WLC_E_SUP_PW_KEY_CIPHER 5
+#define WLC_E_SUP_MSG3_TOO_MANY_IE 6
+#define WLC_E_SUP_MSG3_IE_MISMATCH 7
+#define WLC_E_SUP_NO_INSTALL_FLAG 8
+#define WLC_E_SUP_MSG3_NO_GTK 9
+#define WLC_E_SUP_GRP_KEY_CIPHER 10
+#define WLC_E_SUP_GRP_MSG1_NO_GTK 11
+#define WLC_E_SUP_GTK_DECRYPT_FAIL 12
+#define WLC_E_SUP_SEND_FAIL 13
+#define WLC_E_SUP_DEAUTH 14
+
+#define WLC_E_IF_ADD 1
+#define WLC_E_IF_DEL 2
+#define WLC_E_IF_CHANGE 3
+
+#define WLC_E_IF_ROLE_STA 0
+#define WLC_E_IF_ROLE_AP 1
+#define WLC_E_IF_ROLE_WDS 2
+
+#define WLC_E_LINK_BCN_LOSS 1
+#define WLC_E_LINK_DISASSOC 2
+#define WLC_E_LINK_ASSOC_REC 3
+#define WLC_E_LINK_BSSCFG_DIS 4
+
+enum cust_gpio_modes {
+ WLAN_RESET_ON,
+ WLAN_RESET_OFF,
+ WLAN_POWER_ON,
+ WLAN_POWER_OFF
+};
+
/* The level of bus communication with the dongle */
enum dhd_bus_state {
DHD_BUS_DOWN, /* Not ready for frame transfers */
@@ -50,6 +370,316 @@ enum dhd_bus_state {
DHD_BUS_DATA /* Ready for frame transfers */
};
+/* Pattern matching filter. Specifies an offset within received packets to
+ * start matching, the pattern to match, the size of the pattern, and a bitmask
+ * that indicates which bits within the pattern should be matched.
+ */
+typedef struct wl_pkt_filter_pattern {
+ u32 offset; /* Offset within received packet to start pattern matching.
+ * Offset '0' is the first byte of the ethernet header.
+ */
+ u32 size_bytes; /* Size of the pattern. Bitmask must be the same size. */
+ u8 mask_and_pattern[1]; /* Variable length mask and pattern data. mask starts
+ * at offset 0. Pattern immediately follows mask.
+ */
+} wl_pkt_filter_pattern_t;
+
+/* IOVAR "pkt_filter_add" parameter. Used to install packet filters. */
+typedef struct wl_pkt_filter {
+ u32 id; /* Unique filter id, specified by app. */
+ u32 type; /* Filter type (WL_PKT_FILTER_TYPE_xxx). */
+ u32 negate_match; /* Negate the result of filter matches */
+ union { /* Filter definitions */
+ wl_pkt_filter_pattern_t pattern; /* Pattern matching filter */
+ } u;
+} wl_pkt_filter_t;
+
+/* IOVAR "pkt_filter_enable" parameter. */
+typedef struct wl_pkt_filter_enable {
+ u32 id; /* Unique filter id */
+ u32 enable; /* Enable/disable bool */
+} wl_pkt_filter_enable_t;
+
+/* BSS info structure
+ * Applications MUST CHECK ie_offset field and length field to access IEs and
+ * next bss_info structure in a vector (in wl_scan_results_t)
+ */
+typedef struct wl_bss_info {
+ u32 version; /* version field */
+ u32 length; /* byte length of data in this record,
+ * starting at version and including IEs
+ */
+ u8 BSSID[ETH_ALEN];
+ u16 beacon_period; /* units are Kusec */
+ u16 capability; /* Capability information */
+ u8 SSID_len;
+ u8 SSID[32];
+ struct {
+ uint count; /* # rates in this set */
+ u8 rates[16]; /* rates in 500kbps units w/hi bit set if basic */
+ } rateset; /* supported rates */
+ chanspec_t chanspec; /* chanspec for bss */
+ u16 atim_window; /* units are Kusec */
+ u8 dtim_period; /* DTIM period */
+ s16 RSSI; /* receive signal strength (in dBm) */
+ s8 phy_noise; /* noise (in dBm) */
+
+ u8 n_cap; /* BSS is 802.11N Capable */
+ u32 nbss_cap; /* 802.11N BSS Capabilities (based on HT_CAP_*) */
+ u8 ctl_ch; /* 802.11N BSS control channel number */
+ u32 reserved32[1]; /* Reserved for expansion of BSS properties */
+ u8 flags; /* flags */
+ u8 reserved[3]; /* Reserved for expansion of BSS properties */
+ u8 basic_mcs[MCSSET_LEN]; /* 802.11N BSS required MCS set */
+
+ u16 ie_offset; /* offset at which IEs start, from beginning */
+ u32 ie_length; /* byte length of Information Elements */
+ s16 SNR; /* average SNR of during frame reception */
+ /* Add new fields here */
+ /* variable length Information Elements */
+} wl_bss_info_t;
+
+typedef struct wlc_ssid {
+ u32 SSID_len;
+ unsigned char SSID[32];
+} wlc_ssid_t;
+
+typedef struct wl_scan_params {
+ wlc_ssid_t ssid; /* default: {0, ""} */
+ u8 bssid[ETH_ALEN]; /* default: bcast */
+ s8 bss_type; /* default: any,
+ * DOT11_BSSTYPE_ANY/INFRASTRUCTURE/INDEPENDENT
+ */
+ u8 scan_type; /* flags, 0 use default */
+ s32 nprobes; /* -1 use default, number of probes per channel */
+ s32 active_time; /* -1 use default, dwell time per channel for
+ * active scanning
+ */
+ s32 passive_time; /* -1 use default, dwell time per channel
+ * for passive scanning
+ */
+ s32 home_time; /* -1 use default, dwell time for the home channel
+ * between channel scans
+ */
+ s32 channel_num; /* count of channels and ssids that follow
+ *
+ * low half is count of channels in channel_list, 0
+ * means default (use all available channels)
+ *
+ * high half is entries in wlc_ssid_t array that
+ * follows channel_list, aligned for s32 (4 bytes)
+ * meaning an odd channel count implies a 2-byte pad
+ * between end of channel_list and first ssid
+ *
+ * if ssid count is zero, single ssid in the fixed
+ * parameter portion is assumed, otherwise ssid in
+ * the fixed portion is ignored
+ */
+ u16 channel_list[1]; /* list of chanspecs */
+} wl_scan_params_t;
+
+/* incremental scan struct */
+typedef struct wl_iscan_params {
+ u32 version;
+ u16 action;
+ u16 scan_duration;
+ wl_scan_params_t params;
+} wl_iscan_params_t;
+
+/* 3 fields + size of wl_scan_params, not including variable length array */
+#define WL_ISCAN_PARAMS_FIXED_SIZE (offsetof(wl_iscan_params_t, params) + sizeof(wlc_ssid_t))
+
+typedef struct wl_scan_results {
+ u32 buflen;
+ u32 version;
+ u32 count;
+ wl_bss_info_t bss_info[1];
+} wl_scan_results_t;
+
+typedef struct wl_rateset_args {
+ u32 count; /* # rates in this set */
+ u8 rates[WL_NUMRATES]; /* rates in 500kbps units w/hi bit set if basic */
+ u8 mcs[MCSSET_LEN]; /* supported mcs index bit map */
+} wl_rateset_args_t;
+
+/* u32 list */
+typedef struct wl_u32_list {
+ /* in - # of elements, out - # of entries */
+ u32 count;
+ /* variable length u32 list */
+ u32 element[1];
+} wl_u32_list_t;
+
+/* used for association with a specific BSSID and chanspec list */
+typedef struct wl_assoc_params {
+ u8 bssid[ETH_ALEN]; /* 00:00:00:00:00:00: broadcast scan */
+ s32 chanspec_num; /* 0: all available channels,
+ * otherwise count of chanspecs in chanspec_list
+ */
+ chanspec_t chanspec_list[1]; /* list of chanspecs */
+} wl_assoc_params_t;
+#define WL_ASSOC_PARAMS_FIXED_SIZE (sizeof(wl_assoc_params_t) - sizeof(chanspec_t))
+
+/* used for reassociation/roam to a specific BSSID and channel */
+typedef wl_assoc_params_t wl_reassoc_params_t;
+#define WL_REASSOC_PARAMS_FIXED_SIZE WL_ASSOC_PARAMS_FIXED_SIZE
+
+/* used for join with or without a specific bssid and channel list */
+typedef struct wl_join_params {
+ wlc_ssid_t ssid;
+ wl_assoc_params_t params; /* optional field, but it must include the fixed portion
+ * of the wl_assoc_params_t struct when it does present.
+ */
+} wl_join_params_t;
+#define WL_JOIN_PARAMS_FIXED_SIZE (sizeof(wl_join_params_t) - sizeof(chanspec_t))
+
+/* size of wl_scan_results not including variable length array */
+#define WL_SCAN_RESULTS_FIXED_SIZE (sizeof(wl_scan_results_t) - sizeof(wl_bss_info_t))
+
+/* incremental scan results struct */
+typedef struct wl_iscan_results {
+ u32 status;
+ wl_scan_results_t results;
+} wl_iscan_results_t;
+
+/* size of wl_iscan_results not including variable length array */
+#define WL_ISCAN_RESULTS_FIXED_SIZE \
+ (WL_SCAN_RESULTS_FIXED_SIZE + offsetof(wl_iscan_results_t, results))
+
+typedef struct {
+ u32 duration; /* millisecs spent sampling this channel */
+ u32 congest_ibss; /* millisecs in our bss (presumably this traffic will */
+ /* move if cur bss moves channels) */
+ u32 congest_obss; /* traffic not in our bss */
+ u32 interference; /* millisecs detecting a non 802.11 interferer. */
+ u32 timestamp; /* second timestamp */
+} cca_congest_t;
+
+typedef struct {
+ chanspec_t chanspec; /* Which channel? */
+ u8 num_secs; /* How many secs worth of data */
+ cca_congest_t secs[1]; /* Data */
+} cca_congest_channel_req_t;
+
+typedef struct wl_country {
+ char country_abbrev[WLC_CNTRY_BUF_SZ]; /* nul-terminated country code used in
+ * the Country IE
+ */
+ s32 rev; /* revision specifier for ccode
+ * on set, -1 indicates unspecified.
+ * on get, rev >= 0
+ */
+ char ccode[WLC_CNTRY_BUF_SZ]; /* nul-terminated built-in country code.
+ * variable length, but fixed size in
+ * struct allows simple allocation for
+ * expected country strings <= 3 chars.
+ */
+} wl_country_t;
+
+typedef struct wl_channels_in_country {
+ u32 buflen;
+ u32 band;
+ char country_abbrev[WLC_CNTRY_BUF_SZ];
+ u32 count;
+ u32 channel[1];
+} wl_channels_in_country_t;
+
+typedef struct wl_country_list {
+ u32 buflen;
+ u32 band_set;
+ u32 band;
+ u32 count;
+ char country_abbrev[1];
+} wl_country_list_t;
+
+typedef struct wl_rm_req_elt {
+ s8 type;
+ s8 flags;
+ chanspec_t chanspec;
+ u32 token; /* token for this measurement */
+ u32 tsf_h; /* TSF high 32-bits of Measurement start time */
+ u32 tsf_l; /* TSF low 32-bits */
+ u32 dur; /* TUs */
+} wl_rm_req_elt_t;
+
+typedef struct wl_rm_req {
+ u32 token; /* overall measurement set token */
+ u32 count; /* number of measurement requests */
+ void *cb; /* completion callback function: may be NULL */
+ void *cb_arg; /* arg to completion callback function */
+ wl_rm_req_elt_t req[1]; /* variable length block of requests */
+} wl_rm_req_t;
+#define WL_RM_REQ_FIXED_LEN offsetof(wl_rm_req_t, req)
+
+typedef struct wl_rm_rep_elt {
+ s8 type;
+ s8 flags;
+ chanspec_t chanspec;
+ u32 token; /* token for this measurement */
+ u32 tsf_h; /* TSF high 32-bits of Measurement start time */
+ u32 tsf_l; /* TSF low 32-bits */
+ u32 dur; /* TUs */
+ u32 len; /* byte length of data block */
+ u8 data[1]; /* variable length data block */
+} wl_rm_rep_elt_t;
+#define WL_RM_REP_ELT_FIXED_LEN 24 /* length excluding data block */
+
+#define WL_RPI_REP_BIN_NUM 8
+typedef struct wl_rm_rpi_rep {
+ u8 rpi[WL_RPI_REP_BIN_NUM];
+ s8 rpi_max[WL_RPI_REP_BIN_NUM];
+} wl_rm_rpi_rep_t;
+
+typedef struct wl_rm_rep {
+ u32 token; /* overall measurement set token */
+ u32 len; /* length of measurement report block */
+ wl_rm_rep_elt_t rep[1]; /* variable length block of reports */
+} wl_rm_rep_t;
+#define WL_RM_REP_FIXED_LEN 8
+
+typedef struct wl_wsec_key {
+ u32 index; /* key index */
+ u32 len; /* key length */
+ u8 data[WLAN_MAX_KEY_LEN]; /* key data */
+ u32 pad_1[18];
+ u32 algo; /* CRYPTO_ALGO_AES_CCM, CRYPTO_ALGO_WEP128, etc */
+ u32 flags; /* misc flags */
+ u32 pad_2[2];
+ int pad_3;
+ int iv_initialized; /* has IV been initialized already? */
+ int pad_4;
+ /* Rx IV */
+ struct {
+ u32 hi; /* upper 32 bits of IV */
+ u16 lo; /* lower 16 bits of IV */
+ } rxiv;
+ u32 pad_5[2];
+ u8 ea[ETH_ALEN]; /* per station */
+} wl_wsec_key_t;
+
+/* Used to get specific STA parameters */
+typedef struct {
+ u32 val;
+ u8 ea[ETH_ALEN];
+} scb_val_t;
+
+/* channel encoding */
+typedef struct channel_info {
+ int hw_channel;
+ int target_channel;
+ int scan_channel;
+} channel_info_t;
+
+/* Linux network driver ioctl encoding */
+typedef struct wl_ioctl {
+ uint cmd; /* common ioctl definition */
+ void *buf; /* pointer to user buffer */
+ uint len; /* length of user buffer */
+ u8 set; /* get or set request (optional) */
+ uint used; /* bytes read or written (optional) */
+ uint needed; /* bytes needed (optional) */
+} wl_ioctl_t;
+
/* Common structure for module and instance linkage */
typedef struct dhd_pub {
/* Linkage ponters */
@@ -122,6 +752,25 @@ typedef struct dhd_pub {
} dhd_pub_t;
+typedef struct dhd_if_event {
+ u8 ifidx;
+ u8 action;
+ u8 flags;
+ u8 bssidx;
+} dhd_if_event_t;
+
+typedef struct {
+ u32 limit; /* Expiration time (usec) */
+ u32 increment; /* Current expiration increment (usec) */
+ u32 elapsed; /* Current elapsed time (usec) */
+ u32 tick; /* O/S tick time (usec) */
+} dhd_timeout_t;
+
+typedef struct {
+ uint event;
+ const char *name;
+} bcmevent_name_t;
+
#if defined(CONFIG_PM_SLEEP)
extern atomic_t dhd_mmc_suspend;
#define DHD_PM_RESUME_WAIT_INIT(a) DECLARE_WAIT_QUEUE_HEAD(a);
@@ -167,7 +816,72 @@ extern atomic_t dhd_mmc_suspend;
} while (0)
#endif /* defined(CONFIG_PM_SLEEP) */
-#define DHD_IF_VIF 0x01 /* Virtual IF (Hidden from user) */
+
+/*
+ * Insmod parameters for debug/test
+ */
+
+/* Watchdog timer interval */
+extern uint dhd_watchdog_ms;
+
+#if defined(DHD_DEBUG)
+/* Console output poll interval */
+extern uint dhd_console_ms;
+#endif /* defined(DHD_DEBUG) */
+
+/* Use interrupts */
+extern uint dhd_intr;
+
+/* Use polling */
+extern uint dhd_poll;
+
+/* ARP offload agent mode */
+extern uint dhd_arp_mode;
+
+/* ARP offload enable */
+extern uint dhd_arp_enable;
+
+/* Pkt filte enable control */
+extern uint dhd_pkt_filter_enable;
+
+/* Pkt filter init setup */
+extern uint dhd_pkt_filter_init;
+
+/* Pkt filter mode control */
+extern uint dhd_master_mode;
+
+/* Roaming mode control */
+extern uint dhd_roam;
+
+/* Roaming mode control */
+extern uint dhd_radio_up;
+
+/* Initial idletime ticks (may be -1 for immediate idle, 0 for no idle) */
+extern int dhd_idletime;
+#define DHD_IDLETIME_TICKS 1
+
+/* SDIO Drive Strength */
+extern uint dhd_sdiod_drive_strength;
+
+/* Override to force tx queueing all the time */
+extern uint dhd_force_tx_queueing;
+
+#ifdef SDTEST
+/* Echo packet generator (SDIO), pkts/s */
+extern uint dhd_pktgen;
+
+/* Echo packet len (0 => sawtooth, max 1800) */
+extern uint dhd_pktgen_len;
+#define MAX_PKTGEN_LEN 1800
+#endif
+
+extern char fw_path[MOD_PARAM_PATHLEN];
+extern char nv_path[MOD_PARAM_PATHLEN];
+
+extern u32 g_assert_type;
+extern const bcmevent_name_t bcmevent_names[];
+extern const int bcmevent_names_size;
+
static inline void MUTEX_LOCK_INIT(dhd_pub_t *dhdp)
{
@@ -205,13 +919,6 @@ static inline void MUTEX_UNLOCK_WL_SCAN_SET(void)
{
}
-typedef struct dhd_if_event {
- u8 ifidx;
- u8 action;
- u8 flags;
- u8 bssidx;
-} dhd_if_event_t;
-
/*
* Exported from dhd OS modules (dhd_linux/dhd_ndis)
*/
@@ -286,13 +993,6 @@ extern void dhd_os_sdtxunlock(dhd_pub_t *pub);
int setScheduler(struct task_struct *p, int policy, struct sched_param *param);
-typedef struct {
- u32 limit; /* Expiration time (usec) */
- u32 increment; /* Current expiration increment (usec) */
- u32 elapsed; /* Current elapsed time (usec) */
- u32 tick; /* O/S tick time (usec) */
-} dhd_timeout_t;
-
extern void dhd_timeout_start(dhd_timeout_t *tmo, uint usec);
extern int dhd_timeout_expired(dhd_timeout_t *tmo);
@@ -324,85 +1024,9 @@ extern int dhd_bus_devreset(dhd_pub_t *dhdp, u8 flag);
extern uint dhd_bus_status(dhd_pub_t *dhdp);
extern int dhd_bus_start(dhd_pub_t *dhdp);
-enum cust_gpio_modes {
- WLAN_RESET_ON,
- WLAN_RESET_OFF,
- WLAN_POWER_ON,
- WLAN_POWER_OFF
-};
-/*
- * Insmod parameters for debug/test
- */
-
-/* Watchdog timer interval */
-extern uint dhd_watchdog_ms;
-
-#if defined(DHD_DEBUG)
-/* Console output poll interval */
-extern uint dhd_console_ms;
-#endif /* defined(DHD_DEBUG) */
-
-/* Use interrupts */
-extern uint dhd_intr;
-
-/* Use polling */
-extern uint dhd_poll;
-
-/* ARP offload agent mode */
-extern uint dhd_arp_mode;
-
-/* ARP offload enable */
-extern uint dhd_arp_enable;
-
-/* Pkt filte enable control */
-extern uint dhd_pkt_filter_enable;
-
-/* Pkt filter init setup */
-extern uint dhd_pkt_filter_init;
-
-/* Pkt filter mode control */
-extern uint dhd_master_mode;
-
-/* Roaming mode control */
-extern uint dhd_roam;
-
-/* Roaming mode control */
-extern uint dhd_radio_up;
-
-/* Initial idletime ticks (may be -1 for immediate idle, 0 for no idle) */
-extern int dhd_idletime;
-#define DHD_IDLETIME_TICKS 1
-
-/* SDIO Drive Strength */
-extern uint dhd_sdiod_drive_strength;
-
-/* Override to force tx queueing all the time */
-extern uint dhd_force_tx_queueing;
-
-#ifdef SDTEST
-/* Echo packet generator (SDIO), pkts/s */
-extern uint dhd_pktgen;
-
-/* Echo packet len (0 => sawtooth, max 1800) */
-extern uint dhd_pktgen_len;
-#define MAX_PKTGEN_LEN 1800
-#endif
-
-/* optionally set by a module_param_string() */
-#define MOD_PARAM_PATHLEN 2048
-extern char fw_path[MOD_PARAM_PATHLEN];
-extern char nv_path[MOD_PARAM_PATHLEN];
-
-/* For supporting multiple interfaces */
-#define DHD_MAX_IFS 16
-#define DHD_DEL_IF -0xe
-#define DHD_BAD_IF -0xf
-
extern void dhd_wait_for_event(dhd_pub_t *dhd, bool * lockvar);
extern void dhd_wait_event_wakeup(dhd_pub_t *dhd);
-extern u32 g_assert_type;
-
#ifdef BCMDBG
#define ASSERT(exp) \
do { if (!(exp)) osl_assert(#exp, __FILE__, __LINE__); } while (0)
@@ -411,4 +1035,84 @@ extern void osl_assert(char *exp, char *file, int line);
#define ASSERT(exp) do {} while (0)
#endif /* defined(BCMDBG) */
+/* Linux network driver ioctl encoding */
+typedef struct dhd_ioctl {
+ uint cmd; /* common ioctl definition */
+ void *buf; /* pointer to user buffer */
+ uint len; /* length of user buffer */
+ bool set; /* get or set request (optional) */
+ uint used; /* bytes read or written (optional) */
+ uint needed; /* bytes needed (optional) */
+ uint driver; /* to identify target driver */
+} dhd_ioctl_t;
+
+/* per-driver magic numbers */
+#define DHD_IOCTL_MAGIC 0x00444944
+
+/* bump this number if you change the ioctl interface */
+#define DHD_IOCTL_VERSION 1
+
+#define DHD_IOCTL_MAXLEN 8192 /* max length ioctl buffer required */
+#define DHD_IOCTL_SMLEN 256 /* "small" length ioctl buffer required */
+
+/* common ioctl definitions */
+#define DHD_GET_MAGIC 0
+#define DHD_GET_VERSION 1
+#define DHD_GET_VAR 2
+#define DHD_SET_VAR 3
+
+/* message levels */
+#define DHD_ERROR_VAL 0x0001
+#define DHD_TRACE_VAL 0x0002
+#define DHD_INFO_VAL 0x0004
+#define DHD_DATA_VAL 0x0008
+#define DHD_CTL_VAL 0x0010
+#define DHD_TIMER_VAL 0x0020
+#define DHD_HDRS_VAL 0x0040
+#define DHD_BYTES_VAL 0x0080
+#define DHD_INTR_VAL 0x0100
+#define DHD_LOG_VAL 0x0200
+#define DHD_GLOM_VAL 0x0400
+#define DHD_EVENT_VAL 0x0800
+#define DHD_BTA_VAL 0x1000
+#define DHD_ISCAN_VAL 0x2000
+
+#ifdef SDTEST
+/* For pktgen iovar */
+typedef struct dhd_pktgen {
+ uint version; /* To allow structure change tracking */
+ uint freq; /* Max ticks between tx/rx attempts */
+ uint count; /* Test packets to send/rcv each attempt */
+ uint print; /* Print counts every <print> attempts */
+ uint total; /* Total packets (or bursts) */
+ uint minlen; /* Minimum length of packets to send */
+ uint maxlen; /* Maximum length of packets to send */
+ uint numsent; /* Count of test packets sent */
+ uint numrcvd; /* Count of test packets received */
+ uint numfail; /* Count of test send failures */
+ uint mode; /* Test mode (type of test packets) */
+ uint stop; /* Stop after this many tx failures */
+} dhd_pktgen_t;
+
+/* Version in case structure changes */
+#define DHD_PKTGEN_VERSION 2
+
+/* Type of test packets to use */
+#define DHD_PKTGEN_ECHO 1 /* Send echo requests */
+#define DHD_PKTGEN_SEND 2 /* Send discard packets */
+#define DHD_PKTGEN_RXBURST 3 /* Request dongle send N packets */
+#define DHD_PKTGEN_RECV 4 /* Continuous rx from continuous
+ tx dongle */
+#endif /* SDTEST */
+
+/* Enter idle immediately (no timeout) */
+#define DHD_IDLE_IMMEDIATE (-1)
+
+/* Values for idleclock iovar: other values are the sd_divisor to use
+ when idle */
+#define DHD_IDLE_ACTIVE 0 /* Do not request any SD clock change
+ when idle */
+#define DHD_IDLE_STOP (-1) /* Request SD clock be stopped
+ (and use SD1 mode) */
+
#endif /* _dhd_h_ */
diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_bus.h b/drivers/staging/brcm80211/brcmfmac/dhd_bus.h
index 065f1aeb6ca9c..b1bb04fa0da5b 100644
--- a/drivers/staging/brcm80211/brcmfmac/dhd_bus.h
+++ b/drivers/staging/brcm80211/brcmfmac/dhd_bus.h
@@ -63,7 +63,7 @@ extern int dhd_bus_iovar_op(dhd_pub_t *dhdp, const char *name,
bool set);
/* Add bus dump output to a buffer */
-extern void dhd_bus_dump(dhd_pub_t *dhdp, struct bcmstrbuf *strbuf);
+extern void dhd_bus_dump(dhd_pub_t *dhdp, struct brcmu_strbuf *strbuf);
/* Clear any bus counters */
extern void dhd_bus_clearcounts(dhd_pub_t *dhdp);
diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c b/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c
index ba5a5cb7eede5..2220941a100e9 100644
--- a/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c
+++ b/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c
@@ -16,16 +16,70 @@
#include <linux/types.h>
#include <linux/netdevice.h>
-#include <bcmdefs.h>
+#include <linux/sched.h>
+#include <defs.h>
-#include <bcmutils.h>
-#include <bcmcdc.h>
+#include <brcmu_utils.h>
+#include <brcmu_wifi.h>
#include <dngl_stats.h>
#include <dhd.h>
#include <dhd_proto.h>
#include <dhd_bus.h>
#include <dhd_dbg.h>
+
+struct cdc_ioctl {
+ u32 cmd; /* ioctl command value */
+ u32 len; /* lower 16: output buflen;
+ * upper 16: input buflen (excludes header) */
+ u32 flags; /* flag defns given below */
+ u32 status; /* status code returned from the device */
+};
+
+/* Max valid buffer size that can be sent to the dongle */
+#define CDC_MAX_MSG_SIZE (ETH_FRAME_LEN+ETH_FCS_LEN)
+
+/* CDC flag definitions */
+#define CDCF_IOC_ERROR 0x01 /* 1=ioctl cmd failed */
+#define CDCF_IOC_SET 0x02 /* 0=get, 1=set cmd */
+#define CDCF_IOC_IF_MASK 0xF000 /* I/F index */
+#define CDCF_IOC_IF_SHIFT 12
+#define CDCF_IOC_ID_MASK 0xFFFF0000 /* id an ioctl pairing */
+#define CDCF_IOC_ID_SHIFT 16 /* ID Mask shift bits */
+#define CDC_IOC_ID(flags) \
+ (((flags) & CDCF_IOC_ID_MASK) >> CDCF_IOC_ID_SHIFT)
+#define CDC_SET_IF_IDX(hdr, idx) \
+ ((hdr)->flags = (((hdr)->flags & ~CDCF_IOC_IF_MASK) | \
+ ((idx) << CDCF_IOC_IF_SHIFT)))
+
+/*
+ * BDC header
+ * Used on data packets to convey priority across USB.
+ */
+#define BDC_HEADER_LEN 4
+#define BDC_PROTO_VER 1 /* Protocol version */
+#define BDC_FLAG_VER_MASK 0xf0 /* Protocol version mask */
+#define BDC_FLAG_VER_SHIFT 4 /* Protocol version shift */
+#define BDC_FLAG_SUM_GOOD 0x04 /* Good RX checksums */
+#define BDC_FLAG_SUM_NEEDED 0x08 /* Dongle needs to do TX checksums */
+#define BDC_PRIORITY_MASK 0x7
+#define BDC_FLAG2_IF_MASK 0x0f /* packet rx interface in APSTA */
+#define BDC_FLAG2_IF_SHIFT 0
+
+#define BDC_GET_IF_IDX(hdr) \
+ ((int)((((hdr)->flags2) & BDC_FLAG2_IF_MASK) >> BDC_FLAG2_IF_SHIFT))
+#define BDC_SET_IF_IDX(hdr, idx) \
+ ((hdr)->flags2 = (((hdr)->flags2 & ~BDC_FLAG2_IF_MASK) | \
+ ((idx) << BDC_FLAG2_IF_SHIFT)))
+
+struct bdc_header {
+ u8 flags;
+ u8 priority; /* 802.1d Priority, 4:7 flow control info for usb */
+ u8 flags2;
+ u8 rssi;
+};
+
+
#ifdef CUSTOMER_HW2
int wifi_get_mac_addr(unsigned char *buf);
#endif
@@ -56,14 +110,14 @@ typedef struct dhd_prot {
u8 pending;
u32 lastcmd;
u8 bus_header[BUS_HEADER_LEN];
- cdc_ioctl_t msg;
+ struct cdc_ioctl msg;
unsigned char buf[WLC_IOCTL_MAXLEN + ROUND_UP_MARGIN];
} dhd_prot_t;
static int dhdcdc_msg(dhd_pub_t *dhd)
{
dhd_prot_t *prot = dhd->prot;
- int len = le32_to_cpu(prot->msg.len) + sizeof(cdc_ioctl_t);
+ int len = le32_to_cpu(prot->msg.len) + sizeof(struct cdc_ioctl);
DHD_TRACE(("%s: Enter\n", __func__));
@@ -88,7 +142,7 @@ static int dhdcdc_cmplt(dhd_pub_t *dhd, u32 id, u32 len)
do {
ret =
dhd_bus_rxctl(dhd->bus, (unsigned char *)&prot->msg,
- len + sizeof(cdc_ioctl_t));
+ len + sizeof(struct cdc_ioctl));
if (ret < 0)
break;
} while (CDC_IOC_ID(le32_to_cpu(prot->msg.flags)) != id);
@@ -100,7 +154,7 @@ int
dhdcdc_query_ioctl(dhd_pub_t *dhd, int ifidx, uint cmd, void *buf, uint len)
{
dhd_prot_t *prot = dhd->prot;
- cdc_ioctl_t *msg = &prot->msg;
+ struct cdc_ioctl *msg = &prot->msg;
void *info;
int ret = 0, retries = 0;
u32 id, flags = 0;
@@ -120,7 +174,7 @@ dhdcdc_query_ioctl(dhd_pub_t *dhd, int ifidx, uint cmd, void *buf, uint len)
}
}
- memset(msg, 0, sizeof(cdc_ioctl_t));
+ memset(msg, 0, sizeof(struct cdc_ioctl));
msg->cmd = cpu_to_le32(cmd);
msg->len = cpu_to_le32(len);
@@ -180,14 +234,14 @@ done:
int dhdcdc_set_ioctl(dhd_pub_t *dhd, int ifidx, uint cmd, void *buf, uint len)
{
dhd_prot_t *prot = dhd->prot;
- cdc_ioctl_t *msg = &prot->msg;
+ struct cdc_ioctl *msg = &prot->msg;
int ret = 0;
u32 flags, id;
DHD_TRACE(("%s: Enter\n", __func__));
DHD_CTL(("%s: cmd %d len %d\n", __func__, cmd, len));
- memset(msg, 0, sizeof(cdc_ioctl_t));
+ memset(msg, 0, sizeof(struct cdc_ioctl));
msg->cmd = cpu_to_le32(cmd);
msg->len = cpu_to_le32(len);
@@ -266,14 +320,14 @@ dhd_prot_ioctl(dhd_pub_t *dhd, int ifidx, wl_ioctl_t *ioc, void *buf, int len)
else {
ret = dhdcdc_query_ioctl(dhd, ifidx, ioc->cmd, buf, len);
if (ret > 0)
- ioc->used = ret - sizeof(cdc_ioctl_t);
+ ioc->used = ret - sizeof(struct cdc_ioctl);
}
/* Too many programs assume ioctl() returns 0 on success */
if (ret >= 0)
ret = 0;
else {
- cdc_ioctl_t *msg = &prot->msg;
+ struct cdc_ioctl *msg = &prot->msg;
/* len == needed when set/query fails from dongle */
ioc->needed = le32_to_cpu(msg->len);
}
@@ -312,9 +366,9 @@ dhd_prot_iovar_op(dhd_pub_t *dhdp, const char *name,
return -ENOTSUPP;
}
-void dhd_prot_dump(dhd_pub_t *dhdp, struct bcmstrbuf *strbuf)
+void dhd_prot_dump(dhd_pub_t *dhdp, struct brcmu_strbuf *strbuf)
{
- bcm_bprintf(strbuf, "Protocol CDC: reqid %d\n", dhdp->prot->reqid);
+ brcmu_bprintf(strbuf, "Protocol CDC: reqid %d\n", dhdp->prot->reqid);
}
void dhd_prot_hdrpush(dhd_pub_t *dhd, int ifidx, struct sk_buff *pktbuf)
@@ -411,7 +465,8 @@ int dhd_prot_attach(dhd_pub_t *dhd)
#ifdef BDC
dhd->hdrlen += BDC_HEADER_LEN;
#endif
- dhd->maxctl = WLC_IOCTL_MAXLEN + sizeof(cdc_ioctl_t) + ROUND_UP_MARGIN;
+ dhd->maxctl =
+ WLC_IOCTL_MAXLEN + sizeof(struct cdc_ioctl) + ROUND_UP_MARGIN;
return 0;
fail:
diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_common.c b/drivers/staging/brcm80211/brcmfmac/dhd_common.c
index 0bfb93c0075a4..73d8b0229de02 100644
--- a/drivers/staging/brcm80211/brcmfmac/dhd_common.c
+++ b/drivers/staging/brcm80211/brcmfmac/dhd_common.c
@@ -15,16 +15,21 @@
*/
#include <linux/kernel.h>
#include <linux/string.h>
-#include <bcmdefs.h>
+#include <linux/sched.h>
+#include <defs.h>
+#include <brcmu_wifi.h>
#include <linux/netdevice.h>
-#include <bcmutils.h>
+#include <asm/unaligned.h>
+#include <brcmu_utils.h>
#include <dngl_stats.h>
#include <dhd.h>
#include <dhd_bus.h>
#include <dhd_proto.h>
#include <dhd_dbg.h>
-#include <msgtrace.h>
-#include <wlioctl.h>
+
+#define BRCM_OUI "\x00\x10\x18"
+#define DOT11_OUI_LEN 3
+#define BCMILCP_BCM_SUBTYPE_EVENT 1
int dhd_msg_level;
char fw_path[MOD_PARAM_PATHLEN];
@@ -51,6 +56,8 @@ void dhd_iscan_unlock(void);
#endif
#define EPI_VERSION_STR "4.218.248.5"
+#define MSGTRACE_VERSION 1
+
#ifdef DHD_DEBUG
const char dhd_version[] =
"Dongle Host Driver, version " EPI_VERSION_STR "\nCompiled on " __DATE__
@@ -82,7 +89,7 @@ enum {
IOV_LAST
};
-const bcm_iovar_t dhd_iovars[] = {
+const struct brcmu_iovar dhd_iovars[] = {
{"version", IOV_VERSION, 0, IOVT_BUFFER, sizeof(dhd_version)}
,
#ifdef DHD_DEBUG
@@ -112,6 +119,22 @@ const bcm_iovar_t dhd_iovars[] = {
{NULL, 0, 0, 0, 0}
};
+/* Message trace header */
+struct msgtrace_hdr {
+ u8 version;
+ u8 spare;
+ u16 len; /* Len of the trace */
+ u32 seqnum; /* Sequence number of message. Useful
+ * if the messsage has been lost
+ * because of DMA error or a bus reset
+ * (ex: SDIO Func2)
+ */
+ u32 discarded_bytes; /* Number of discarded bytes because of
+ trace overflow */
+ u32 discarded_printf; /* Number of discarded printf
+ because of trace overflow */
+} __packed;
+
void dhd_common_init(void)
{
/* Init global variables at run-time, not as part of the declaration.
@@ -137,54 +160,54 @@ void dhd_common_init(void)
static int dhd_dump(dhd_pub_t *dhdp, char *buf, int buflen)
{
- struct bcmstrbuf b;
- struct bcmstrbuf *strbuf = &b;
+ struct brcmu_strbuf b;
+ struct brcmu_strbuf *strbuf = &b;
- bcm_binit(strbuf, buf, buflen);
+ brcmu_binit(strbuf, buf, buflen);
/* Base DHD info */
- bcm_bprintf(strbuf, "%s\n", dhd_version);
- bcm_bprintf(strbuf, "\n");
- bcm_bprintf(strbuf, "pub.up %d pub.txoff %d pub.busstate %d\n",
+ brcmu_bprintf(strbuf, "%s\n", dhd_version);
+ brcmu_bprintf(strbuf, "\n");
+ brcmu_bprintf(strbuf, "pub.up %d pub.txoff %d pub.busstate %d\n",
dhdp->up, dhdp->txoff, dhdp->busstate);
- bcm_bprintf(strbuf, "pub.hdrlen %d pub.maxctl %d pub.rxsz %d\n",
+ brcmu_bprintf(strbuf, "pub.hdrlen %d pub.maxctl %d pub.rxsz %d\n",
dhdp->hdrlen, dhdp->maxctl, dhdp->rxsz);
- bcm_bprintf(strbuf, "pub.iswl %d pub.drv_version %ld pub.mac %pM\n",
+ brcmu_bprintf(strbuf, "pub.iswl %d pub.drv_version %ld pub.mac %pM\n",
dhdp->iswl, dhdp->drv_version, &dhdp->mac);
- bcm_bprintf(strbuf, "pub.bcmerror %d tickcnt %d\n", dhdp->bcmerror,
+ brcmu_bprintf(strbuf, "pub.bcmerror %d tickcnt %d\n", dhdp->bcmerror,
dhdp->tickcnt);
- bcm_bprintf(strbuf, "dongle stats:\n");
- bcm_bprintf(strbuf,
+ brcmu_bprintf(strbuf, "dongle stats:\n");
+ brcmu_bprintf(strbuf,
"tx_packets %ld tx_bytes %ld tx_errors %ld tx_dropped %ld\n",
dhdp->dstats.tx_packets, dhdp->dstats.tx_bytes,
dhdp->dstats.tx_errors, dhdp->dstats.tx_dropped);
- bcm_bprintf(strbuf,
+ brcmu_bprintf(strbuf,
"rx_packets %ld rx_bytes %ld rx_errors %ld rx_dropped %ld\n",
dhdp->dstats.rx_packets, dhdp->dstats.rx_bytes,
dhdp->dstats.rx_errors, dhdp->dstats.rx_dropped);
- bcm_bprintf(strbuf, "multicast %ld\n", dhdp->dstats.multicast);
+ brcmu_bprintf(strbuf, "multicast %ld\n", dhdp->dstats.multicast);
- bcm_bprintf(strbuf, "bus stats:\n");
- bcm_bprintf(strbuf, "tx_packets %ld tx_multicast %ld tx_errors %ld\n",
+ brcmu_bprintf(strbuf, "bus stats:\n");
+ brcmu_bprintf(strbuf, "tx_packets %ld tx_multicast %ld tx_errors %ld\n",
dhdp->tx_packets, dhdp->tx_multicast, dhdp->tx_errors);
- bcm_bprintf(strbuf, "tx_ctlpkts %ld tx_ctlerrs %ld\n",
+ brcmu_bprintf(strbuf, "tx_ctlpkts %ld tx_ctlerrs %ld\n",
dhdp->tx_ctlpkts, dhdp->tx_ctlerrs);
- bcm_bprintf(strbuf, "rx_packets %ld rx_multicast %ld rx_errors %ld\n",
+ brcmu_bprintf(strbuf, "rx_packets %ld rx_multicast %ld rx_errors %ld\n",
dhdp->rx_packets, dhdp->rx_multicast, dhdp->rx_errors);
- bcm_bprintf(strbuf,
+ brcmu_bprintf(strbuf,
"rx_ctlpkts %ld rx_ctlerrs %ld rx_dropped %ld rx_flushed %ld\n",
dhdp->rx_ctlpkts, dhdp->rx_ctlerrs, dhdp->rx_dropped,
dhdp->rx_flushed);
- bcm_bprintf(strbuf,
+ brcmu_bprintf(strbuf,
"rx_readahead_cnt %ld tx_realloc %ld fc_packets %ld\n",
dhdp->rx_readahead_cnt, dhdp->tx_realloc, dhdp->fc_packets);
- bcm_bprintf(strbuf, "wd_dpc_sched %ld\n", dhdp->wd_dpc_sched);
- bcm_bprintf(strbuf, "\n");
+ brcmu_bprintf(strbuf, "wd_dpc_sched %ld\n", dhdp->wd_dpc_sched);
+ brcmu_bprintf(strbuf, "\n");
/* Add any prot info */
dhd_prot_dump(dhdp, strbuf);
- bcm_bprintf(strbuf, "\n");
+ brcmu_bprintf(strbuf, "\n");
/* Add any bus info */
dhd_bus_dump(dhdp, strbuf);
@@ -193,7 +216,7 @@ static int dhd_dump(dhd_pub_t *dhdp, char *buf, int buflen)
}
static int
-dhd_doiovar(dhd_pub_t *dhd_pub, const bcm_iovar_t *vi, u32 actionid,
+dhd_doiovar(dhd_pub_t *dhd_pub, const struct brcmu_iovar *vi, u32 actionid,
const char *name, void *params, int plen, void *arg, int len,
int val_size)
{
@@ -202,7 +225,7 @@ dhd_doiovar(dhd_pub_t *dhd_pub, const bcm_iovar_t *vi, u32 actionid,
DHD_TRACE(("%s: Enter\n", __func__));
- bcmerror = bcm_iovar_lencheck(vi, arg, len, IOV_ISSET(actionid));
+ bcmerror = brcmu_iovar_lencheck(vi, arg, len, IOV_ISSET(actionid));
if (bcmerror != 0)
goto exit;
@@ -316,7 +339,7 @@ bool dhd_prec_enq(dhd_pub_t *dhdp, struct pktq *q, struct sk_buff *pkt,
* exceeding total queue length
*/
if (!pktq_pfull(q, prec) && !pktq_full(q)) {
- bcm_pktq_penq(q, prec, pkt);
+ brcmu_pktq_penq(q, prec, pkt);
return true;
}
@@ -324,7 +347,7 @@ bool dhd_prec_enq(dhd_pub_t *dhdp, struct pktq *q, struct sk_buff *pkt,
if (pktq_pfull(q, prec))
eprec = prec;
else if (pktq_full(q)) {
- p = bcm_pktq_peek_tail(q, &eprec);
+ p = brcmu_pktq_peek_tail(q, &eprec);
ASSERT(p);
if (eprec > prec)
return false;
@@ -338,21 +361,21 @@ bool dhd_prec_enq(dhd_pub_t *dhdp, struct pktq *q, struct sk_buff *pkt,
if (eprec == prec && !discard_oldest)
return false; /* refuse newer (incoming) packet */
/* Evict packet according to discard policy */
- p = discard_oldest ? bcm_pktq_pdeq(q, eprec) :
- bcm_pktq_pdeq_tail(q, eprec);
+ p = discard_oldest ? brcmu_pktq_pdeq(q, eprec) :
+ brcmu_pktq_pdeq_tail(q, eprec);
if (p == NULL) {
- DHD_ERROR(("%s: bcm_pktq_penq() failed, oldest %d.",
+ DHD_ERROR(("%s: brcmu_pktq_penq() failed, oldest %d.",
__func__, discard_oldest));
ASSERT(p);
}
- bcm_pkt_buf_free_skb(p);
+ brcmu_pkt_buf_free_skb(p);
}
/* Enqueue */
- p = bcm_pktq_penq(q, prec, pkt);
+ p = brcmu_pktq_penq(q, prec, pkt);
if (p == NULL) {
- DHD_ERROR(("%s: bcm_pktq_penq() failed.", __func__));
+ DHD_ERROR(("%s: brcmu_pktq_penq() failed.", __func__));
ASSERT(p);
}
@@ -365,7 +388,7 @@ dhd_iovar_op(dhd_pub_t *dhd_pub, const char *name,
{
int bcmerror = 0;
int val_size;
- const bcm_iovar_t *vi = NULL;
+ const struct brcmu_iovar *vi = NULL;
u32 actionid;
DHD_TRACE(("%s: Enter\n", __func__));
@@ -379,7 +402,7 @@ dhd_iovar_op(dhd_pub_t *dhd_pub, const char *name,
/* Set does NOT take qualifiers */
ASSERT(!set || (!params && !plen));
- vi = bcm_iovar_lookup(dhd_iovars, name);
+ vi = brcmu_iovar_lookup(dhd_iovars, name);
if (vi == NULL) {
bcmerror = -ENOTSUPP;
goto exit;
@@ -726,12 +749,12 @@ static void wl_show_host_event(wl_event_msg_t *event, void *event_data)
case WLC_E_TRACE:
{
static u32 seqnum_prev;
- msgtrace_hdr_t hdr;
+ struct msgtrace_hdr hdr;
u32 nblost;
char *s, *p;
buf = (unsigned char *) event_data;
- memcpy(&hdr, buf, MSGTRACE_HDRLEN);
+ memcpy(&hdr, buf, sizeof(struct msgtrace_hdr));
if (hdr.version != MSGTRACE_VERSION) {
DHD_ERROR(
@@ -745,7 +768,8 @@ static void wl_show_host_event(wl_event_msg_t *event, void *event_data)
}
/* There are 2 bytes available at the end of data */
- buf[MSGTRACE_HDRLEN + be16_to_cpu(hdr.len)] = '\0';
+ *(buf + sizeof(struct msgtrace_hdr)
+ + be16_to_cpu(hdr.len)) = '\0';
if (be32_to_cpu(hdr.discarded_bytes)
|| be32_to_cpu(hdr.discarded_printf)) {
@@ -768,7 +792,7 @@ static void wl_show_host_event(wl_event_msg_t *event, void *event_data)
* avoid display big
* printf (issue with Linux printk )
*/
- p = (char *)&buf[MSGTRACE_HDRLEN];
+ p = (char *)&buf[sizeof(struct msgtrace_hdr)];
while ((s = strstr(p, "\n")) != NULL) {
*s = '\0';
printk(KERN_DEBUG"%s\n", p);
@@ -989,7 +1013,7 @@ dhd_pktfilter_offload_enable(dhd_pub_t *dhd, char *arg, int enable,
__func__, arg));
/* Contorl the master mode */
- bcm_mkiovar("pkt_filter_mode", (char *)&master_mode, 4, buf,
+ brcmu_mkiovar("pkt_filter_mode", (char *)&master_mode, 4, buf,
sizeof(buf));
rc = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, buf, sizeof(buf));
rc = rc >= 0 ? 0 : rc;
@@ -1143,7 +1167,7 @@ void dhd_arp_offload_set(dhd_pub_t *dhd, int arp_mode)
char iovbuf[32];
int retcode;
- bcm_mkiovar("arp_ol", (char *)&arp_mode, 4, iovbuf, sizeof(iovbuf));
+ brcmu_mkiovar("arp_ol", (char *)&arp_mode, 4, iovbuf, sizeof(iovbuf));
retcode = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
retcode = retcode >= 0 ? 0 : retcode;
if (retcode)
@@ -1159,7 +1183,7 @@ void dhd_arp_offload_enable(dhd_pub_t *dhd, int arp_enable)
char iovbuf[32];
int retcode;
- bcm_mkiovar("arpoe", (char *)&arp_enable, 4, iovbuf, sizeof(iovbuf));
+ brcmu_mkiovar("arpoe", (char *)&arp_enable, 4, iovbuf, sizeof(iovbuf));
retcode = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
retcode = retcode >= 0 ? 0 : retcode;
if (retcode)
@@ -1198,7 +1222,7 @@ int dhd_preinit_ioctls(dhd_pub_t *dhd)
*/
ret = dhd_custom_get_mac_address(ea_addr);
if (!ret) {
- bcm_mkiovar("cur_etheraddr", (void *)ea_addr, ETH_ALEN,
+ brcmu_mkiovar("cur_etheraddr", (void *)ea_addr, ETH_ALEN,
buf, sizeof(buf));
ret = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, buf, sizeof(buf));
if (ret < 0) {
@@ -1223,7 +1247,7 @@ int dhd_preinit_ioctls(dhd_pub_t *dhd)
/* query for 'ver' to get version info from firmware */
memset(buf, 0, sizeof(buf));
ptr = buf;
- bcm_mkiovar("ver", 0, 0, buf, sizeof(buf));
+ brcmu_mkiovar("ver", 0, 0, buf, sizeof(buf));
dhdcdc_query_ioctl(dhd, 0, WLC_GET_VAR, buf, sizeof(buf));
strsep(&ptr, "\n");
/* Print fw version info */
@@ -1234,23 +1258,23 @@ int dhd_preinit_ioctls(dhd_pub_t *dhd)
sizeof(power_mode));
/* Match Host and Dongle rx alignment */
- bcm_mkiovar("bus:txglomalign", (char *)&dongle_align, 4, iovbuf,
+ brcmu_mkiovar("bus:txglomalign", (char *)&dongle_align, 4, iovbuf,
sizeof(iovbuf));
dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
/* disable glom option per default */
- bcm_mkiovar("bus:txglom", (char *)&glom, 4, iovbuf, sizeof(iovbuf));
+ brcmu_mkiovar("bus:txglom", (char *)&glom, 4, iovbuf, sizeof(iovbuf));
dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
/* Setup timeout if Beacons are lost and roam is off to report
link down */
- bcm_mkiovar("bcn_timeout", (char *)&bcn_timeout, 4, iovbuf,
+ brcmu_mkiovar("bcn_timeout", (char *)&bcn_timeout, 4, iovbuf,
sizeof(iovbuf));
dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
/* Enable/Disable build-in roaming to allowed ext supplicant to take
of romaing */
- bcm_mkiovar("roam_off", (char *)&dhd_roam, 4, iovbuf, sizeof(iovbuf));
+ brcmu_mkiovar("roam_off", (char *)&dhd_roam, 4, iovbuf, sizeof(iovbuf));
dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
/* Force STA UP */
@@ -1258,8 +1282,8 @@ int dhd_preinit_ioctls(dhd_pub_t *dhd)
dhdcdc_set_ioctl(dhd, 0, WLC_UP, (char *)&up, sizeof(up));
/* Setup event_msgs */
- bcm_mkiovar("event_msgs", dhd->eventmask, WL_EVENTING_MASK_LEN, iovbuf,
- sizeof(iovbuf));
+ brcmu_mkiovar("event_msgs", dhd->eventmask, WL_EVENTING_MASK_LEN,
+ iovbuf, sizeof(iovbuf));
dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
dhdcdc_set_ioctl(dhd, 0, WLC_SET_SCAN_CHANNEL_TIME,
@@ -1623,7 +1647,7 @@ int dhd_iscan_request(void *dhdp, u16 action)
params.action = action;
params.scan_duration = 0;
- bcm_mkiovar("iscan", (char *)&params, sizeof(wl_iscan_params_t), buf,
+ brcmu_mkiovar("iscan", (char *)&params, sizeof(wl_iscan_params_t), buf,
WLC_IOCTL_SMLEN);
rc = dhd_wl_ioctl(dhdp, WLC_SET_VAR, buf, WLC_IOCTL_SMLEN);
@@ -1659,8 +1683,9 @@ static int dhd_iscan_get_partial_result(void *dhdp, uint *scan_count)
memset(&list, 0, sizeof(list));
list.results.buflen = WLC_IW_ISCAN_MAXLEN;
- bcm_mkiovar("iscanresults", (char *)&list, WL_ISCAN_RESULTS_FIXED_SIZE,
- iscan_cur->iscan_buf, WLC_IW_ISCAN_MAXLEN);
+ brcmu_mkiovar("iscanresults", (char *)&list,
+ WL_ISCAN_RESULTS_FIXED_SIZE,
+ iscan_cur->iscan_buf, WLC_IW_ISCAN_MAXLEN);
rc = dhd_wl_ioctl(dhdp, WLC_GET_VAR, iscan_cur->iscan_buf,
WLC_IW_ISCAN_MAXLEN);
@@ -1690,12 +1715,13 @@ int dhd_pno_clean(dhd_pub_t *dhd)
int ret;
/* Disable pfn */
- iov_len =
- bcm_mkiovar("pfn", (char *)&pfn_enabled, 4, iovbuf, sizeof(iovbuf));
+ iov_len = brcmu_mkiovar("pfn", (char *)&pfn_enabled, 4, iovbuf,
+ sizeof(iovbuf));
ret = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
if (ret >= 0) {
/* clear pfn */
- iov_len = bcm_mkiovar("pfnclear", 0, 0, iovbuf, sizeof(iovbuf));
+ iov_len = brcmu_mkiovar("pfnclear", 0, 0, iovbuf,
+ sizeof(iovbuf));
if (iov_len) {
ret = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf,
iov_len);
@@ -1724,7 +1750,7 @@ int dhd_pno_enable(dhd_pub_t *dhd, int pfn_enabled)
}
/* Enable/disable PNO */
- ret = bcm_mkiovar("pfn", (char *)&pfn_enabled, 4, iovbuf,
+ ret = brcmu_mkiovar("pfn", (char *)&pfn_enabled, 4, iovbuf,
sizeof(iovbuf));
if (ret > 0) {
ret = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf,
@@ -1797,7 +1823,7 @@ dhd_pno_set(dhd_pub_t *dhd, wlc_ssid_t *ssids_local, int nssid, unsigned char sc
if (scan_fr != 0)
pfn_param.scan_freq = scan_fr;
- bcm_mkiovar("pfn_set", (char *)&pfn_param, sizeof(pfn_param), iovbuf,
+ brcmu_mkiovar("pfn_set", (char *)&pfn_param, sizeof(pfn_param), iovbuf,
sizeof(iovbuf));
dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
@@ -1814,7 +1840,7 @@ dhd_pno_set(dhd_pub_t *dhd, wlc_ssid_t *ssids_local, int nssid, unsigned char sc
ssids_local[i].SSID_len);
pfn_element.ssid.SSID_len = ssids_local[i].SSID_len;
- err = bcm_mkiovar("pfn_add", (char *)&pfn_element,
+ err = brcmu_mkiovar("pfn_add", (char *)&pfn_element,
sizeof(pfn_element), iovbuf, sizeof(iovbuf));
if (err > 0) {
err = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf,
diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c b/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c
index 1cf6c5dc2bb75..6008888626071 100644
--- a/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c
+++ b/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c
@@ -15,14 +15,14 @@
*/
#include <linux/netdevice.h>
-#include <bcmutils.h>
+#include <linux/sched.h>
+#include <brcmu_utils.h>
+#include <defs.h>
+#include <brcmu_wifi.h>
#include <dngl_stats.h>
#include <dhd.h>
-#include <wlioctl.h>
-#include <wl_iw.h>
-
#define WL_ERROR(fmt, args...) printk(fmt, ##args)
#define WL_TRACE(fmt, args...) no_printk(fmt, ##args)
diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_dbg.h b/drivers/staging/brcm80211/brcmfmac/dhd_dbg.h
index 0817f1348e099..d0fa23187859c 100644
--- a/drivers/staging/brcm80211/brcmfmac/dhd_dbg.h
+++ b/drivers/staging/brcm80211/brcmfmac/dhd_dbg.h
@@ -97,7 +97,4 @@
#define DHD_NONE(args)
extern int dhd_msg_level;
-/* Defines msg bits */
-#include <dhdioctl.h>
-
#endif /* _dhd_dbg_ */
diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_linux.c b/drivers/staging/brcm80211/brcmfmac/dhd_linux.c
index f356c564cfb99..b48447c8005eb 100644
--- a/drivers/staging/brcm80211/brcmfmac/dhd_linux.c
+++ b/drivers/staging/brcm80211/brcmfmac/dhd_linux.c
@@ -31,8 +31,10 @@
#include <linux/fcntl.h>
#include <linux/fs.h>
#include <linux/uaccess.h>
-#include <bcmdefs.h>
-#include <bcmutils.h>
+#include <net/cfg80211.h>
+#include <defs.h>
+#include <brcmu_utils.h>
+#include <brcmu_wifi.h>
#include <dngl_stats.h>
#include <dhd.h>
@@ -483,7 +485,7 @@ static int dhd_set_suspend(int value, dhd_pub_t *dhd)
bcn_li_dtim = 3;
else
bcn_li_dtim = dhd->dtim_skip;
- bcm_mkiovar("bcn_li_dtim", (char *)&bcn_li_dtim,
+ brcmu_mkiovar("bcn_li_dtim", (char *)&bcn_li_dtim,
4, iovbuf, sizeof(iovbuf));
dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf,
sizeof(iovbuf));
@@ -491,7 +493,7 @@ static int dhd_set_suspend(int value, dhd_pub_t *dhd)
/* Disable build-in roaming to allowed \
* supplicant to take of romaing
*/
- bcm_mkiovar("roam_off", (char *)&roamvar, 4,
+ brcmu_mkiovar("roam_off", (char *)&roamvar, 4,
iovbuf, sizeof(iovbuf));
dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf,
sizeof(iovbuf));
@@ -511,14 +513,14 @@ static int dhd_set_suspend(int value, dhd_pub_t *dhd)
dhd_set_packet_filter(0, dhd);
/* restore pre-suspend setting for dtim_skip */
- bcm_mkiovar("bcn_li_dtim", (char *)&dhd->dtim_skip,
+ brcmu_mkiovar("bcn_li_dtim", (char *)&dhd->dtim_skip,
4, iovbuf, sizeof(iovbuf));
dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf,
sizeof(iovbuf));
#ifdef CUSTOMER_HW2
roamvar = 0;
- bcm_mkiovar("roam_off", (char *)&roamvar, 4, iovbuf,
+ brcmu_mkiovar("roam_off", (char *)&roamvar, 4, iovbuf,
sizeof(iovbuf));
dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf,
sizeof(iovbuf));
@@ -748,7 +750,7 @@ static void _dhd_set_multicast_list(dhd_info_t *dhd, int ifidx)
}
allmulti = cpu_to_le32(allmulti);
- if (!bcm_mkiovar
+ if (!brcmu_mkiovar
("allmulti", (void *)&allmulti, sizeof(allmulti), buf, buflen)) {
DHD_ERROR(("%s: mkiovar failed for allmulti, datalen %d "
"buflen %u\n", dhd_ifname(&dhd->pub, ifidx),
@@ -800,7 +802,7 @@ _dhd_set_mac_address(dhd_info_t *dhd, int ifidx, u8 *addr)
int ret;
DHD_TRACE(("%s enter\n", __func__));
- if (!bcm_mkiovar
+ if (!brcmu_mkiovar
("cur_etheraddr", (char *)addr, ETH_ALEN, buf, 32)) {
DHD_ERROR(("%s: mkiovar failed for cur_etheraddr\n",
dhd_ifname(&dhd->pub, ifidx)));
@@ -2089,8 +2091,8 @@ int dhd_bus_start(dhd_pub_t *dhdp)
return -ENODEV;
}
#ifdef EMBEDDED_PLATFORM
- bcm_mkiovar("event_msgs", dhdp->eventmask, WL_EVENTING_MASK_LEN, iovbuf,
- sizeof(iovbuf));
+ brcmu_mkiovar("event_msgs", dhdp->eventmask, WL_EVENTING_MASK_LEN,
+ iovbuf, sizeof(iovbuf));
dhdcdc_query_ioctl(dhdp, 0, WLC_GET_VAR, iovbuf, sizeof(iovbuf));
memcpy(dhdp->eventmask, iovbuf, WL_EVENTING_MASK_LEN);
@@ -2140,7 +2142,7 @@ dhd_iovar(dhd_pub_t *pub, int ifidx, char *name, char *cmd_buf, uint cmd_len,
wl_ioctl_t ioc;
int ret;
- len = bcm_mkiovar(name, cmd_buf, cmd_len, buf, len);
+ len = brcmu_mkiovar(name, cmd_buf, cmd_len, buf, len);
memset(&ioc, 0, sizeof(ioc));
diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_proto.h b/drivers/staging/brcm80211/brcmfmac/dhd_proto.h
index 030d5ffb0e838..188b5885fca54 100644
--- a/drivers/staging/brcm80211/brcmfmac/dhd_proto.h
+++ b/drivers/staging/brcm80211/brcmfmac/dhd_proto.h
@@ -17,9 +17,6 @@
#ifndef _dhd_proto_h_
#define _dhd_proto_h_
-#include <dhdioctl.h>
-#include <wlioctl.h>
-
#ifndef IOCTL_RESP_TIMEOUT
#define IOCTL_RESP_TIMEOUT 2000 /* In milli second */
#endif
@@ -64,7 +61,7 @@ extern int dhd_prot_iovar_op(dhd_pub_t *dhdp, const char *name,
bool set);
/* Add prot dump output to a buffer */
-extern void dhd_prot_dump(dhd_pub_t *dhdp, struct bcmstrbuf *strbuf);
+extern void dhd_prot_dump(dhd_pub_t *dhdp, struct brcmu_strbuf *strbuf);
/* Update local copy of dongle statistics */
extern void dhd_prot_dstats(dhd_pub_t *dhdp);
diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c
index a71c6f8ee8a38..330703bb33464 100644
--- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c
+++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c
@@ -19,38 +19,156 @@
#include <linux/printk.h>
#include <linux/pci_ids.h>
#include <linux/netdevice.h>
-#include <bcmdefs.h>
-#include <bcmsdh.h>
+#include <linux/sched.h>
+#include <linux/mmc/sdio.h>
+#include <asm/unaligned.h>
+#include <defs.h>
+#include "sdio_host.h"
+#include <brcmu_wifi.h>
+#include <brcmu_utils.h>
+#include <brcm_hw_ids.h>
+
+#include <soc.h>
+
+/* register access macros */
+#ifndef __BIG_ENDIAN
+#ifndef __mips__
+#define R_REG(r) \
+ bcmsdh_reg_read(NULL, (unsigned long)(r), sizeof(*(r)))
+#else /* __mips__ */
+#define R_REG(r) \
+ ({ \
+ __typeof(*(r)) __osl_v; \
+ __asm__ __volatile__("sync"); \
+ __osl_v = bcmsdh_reg_read(NULL, (unsigned long)(r),\
+ sizeof(*(r))); \
+ __asm__ __volatile__("sync"); \
+ __osl_v; \
+ })
+#endif /* __mips__ */
+
+#define W_REG(r, v) do { \
+ bcmsdh_reg_write(NULL, (unsigned long)(r), sizeof(*(r)), (v)); \
+ } while (0)
+#else /* __BIG_ENDIAN */
+#define R_REG(r) \
+ bcmsdh_reg_read(NULL, (unsigned long)(r), sizeof(*(r)))
+#define W_REG(r, v) do { \
+ bcmsdh_reg_write(NULL, (unsigned long)(r), sizeof(*(r)), (v)); \
+ } while (0)
+#endif /* __BIG_ENDIAN */
-#ifdef BCMEMBEDIMAGE
-#include BCMEMBEDIMAGE
-#endif /* BCMEMBEDIMAGE */
+#define AND_REG(r, v) W_REG((r), R_REG(r) & (v))
+#define OR_REG(r, v) W_REG((r), R_REG(r) | (v))
-#include <bcmdefs.h>
-#include <bcmutils.h>
-#include <bcmdevs.h>
+#define SET_REG(r, mask, val) \
+ W_REG((r), ((R_REG(r) & ~(mask)) | (val)))
-#include <hndsoc.h>
#ifdef DHD_DEBUG
-#include <hndrte_armtrap.h>
-#include <hndrte_cons.h>
+
+/* ARM trap handling */
+
+/* Trap types defined by ARM (see arminc.h) */
+
+/* Trap locations in lo memory */
+#define TRAP_STRIDE 4
+#define FIRST_TRAP TR_RST
+#define LAST_TRAP (TR_FIQ * TRAP_STRIDE)
+
+#if defined(__ARM_ARCH_4T__)
+#define MAX_TRAP_TYPE (TR_FIQ + 1)
+#elif defined(__ARM_ARCH_7M__)
+#define MAX_TRAP_TYPE (TR_ISR + ARMCM3_NUMINTS)
+#endif /* __ARM_ARCH_7M__ */
+
+/* The trap structure is defined here as offsets for assembly */
+#define TR_TYPE 0x00
+#define TR_EPC 0x04
+#define TR_CPSR 0x08
+#define TR_SPSR 0x0c
+#define TR_REGS 0x10
+#define TR_REG(n) (TR_REGS + (n) * 4)
+#define TR_SP TR_REG(13)
+#define TR_LR TR_REG(14)
+#define TR_PC TR_REG(15)
+
+#define TRAP_T_SIZE 80
+
+typedef struct _trap_struct {
+ u32 type;
+ u32 epc;
+ u32 cpsr;
+ u32 spsr;
+ u32 r0;
+ u32 r1;
+ u32 r2;
+ u32 r3;
+ u32 r4;
+ u32 r5;
+ u32 r6;
+ u32 r7;
+ u32 r8;
+ u32 r9;
+ u32 r10;
+ u32 r11;
+ u32 r12;
+ u32 r13;
+ u32 r14;
+ u32 pc;
+} trap_t;
+
+#define CBUF_LEN (128)
+
+#define LOG_BUF_LEN 1024
+
+typedef struct {
+ u32 buf; /* Can't be pointer on (64-bit) hosts */
+ uint buf_size;
+ uint idx;
+ char *_buf_compat; /* Redundant pointer for backward compat. */
+} rte_log_t;
+
+typedef struct {
+ /* Virtual UART
+ * When there is no UART (e.g. Quickturn),
+ * the host should write a complete
+ * input line directly into cbuf and then write
+ * the length into vcons_in.
+ * This may also be used when there is a real UART
+ * (at risk of conflicting with
+ * the real UART). vcons_out is currently unused.
+ */
+ volatile uint vcons_in;
+ volatile uint vcons_out;
+
+ /* Output (logging) buffer
+ * Console output is written to a ring buffer log_buf at index log_idx.
+ * The host may read the output when it sees log_idx advance.
+ * Output will be lost if the output wraps around faster than the host
+ * polls.
+ */
+ rte_log_t log;
+
+ /* Console input line buffer
+ * Characters are read one at a time into cbuf
+ * until <CR> is received, then
+ * the buffer is processed as a command line.
+ * Also used for virtual UART.
+ */
+ uint cbuf_idx;
+ char cbuf[CBUF_LEN];
+} rte_cons_t;
+
#endif /* DHD_DEBUG */
-#include <sbchipc.h>
-#include <sbhnddma.h>
+#include <chipcommon.h>
-#include <sdio.h>
#include <sbsdio.h>
-#include <sbsdpcmdev.h>
-#include <bcmsdpcm.h>
-
-#include <proto/802.11.h>
#include <dngl_stats.h>
#include <dhd.h>
#include <dhd_bus.h>
#include <dhd_proto.h>
#include <dhd_dbg.h>
-#include <dhdioctl.h>
#include <sdiovar.h>
#include <bcmchip.h>
@@ -106,6 +224,114 @@
#define SDPCM_RESERVE (SDPCM_HDRLEN + DHD_SDALIGN)
#endif
+/*
+ * Software allocation of To SB Mailbox resources
+ */
+
+/* tosbmailbox bits corresponding to intstatus bits */
+#define SMB_NAK (1 << 0) /* Frame NAK */
+#define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
+#define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
+#define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
+
+/* tosbmailboxdata */
+#define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
+
+/*
+ * Software allocation of To Host Mailbox resources
+ */
+
+/* intstatus bits */
+#define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
+#define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
+#define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
+#define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
+
+/* tohostmailboxdata */
+#define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
+#define HMB_DATA_DEVREADY 2 /* talk to host after enable */
+#define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
+#define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
+
+#define HMB_DATA_FCDATA_MASK 0xff000000
+#define HMB_DATA_FCDATA_SHIFT 24
+
+#define HMB_DATA_VERSION_MASK 0x00ff0000
+#define HMB_DATA_VERSION_SHIFT 16
+
+/*
+ * Software-defined protocol header
+ */
+
+/* Current protocol version */
+#define SDPCM_PROT_VERSION 4
+
+/* SW frame header */
+#define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff)
+
+#define SDPCM_CHANNEL_MASK 0x00000f00
+#define SDPCM_CHANNEL_SHIFT 8
+#define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f)
+
+#define SDPCM_NEXTLEN_OFFSET 2
+
+/* Data Offset from SOF (HW Tag, SW Tag, Pad) */
+#define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */
+#define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
+#define SDPCM_DOFFSET_MASK 0xff000000
+#define SDPCM_DOFFSET_SHIFT 24
+#define SDPCM_FCMASK_OFFSET 4 /* Flow control */
+#define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff)
+#define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */
+#define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff)
+
+#define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */
+
+/* logical channel numbers */
+#define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */
+#define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */
+#define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */
+#define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */
+#define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */
+
+#define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */
+
+#define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
+
+/* For TEST_CHANNEL packets, define another 4-byte header */
+#define SDPCM_TEST_HDRLEN 4 /*
+ * Generally: Cmd(1), Ext(1), Len(2);
+ * Semantics of Ext byte depend on
+ * command. Len is current or requested
+ * frame length, not including test
+ * header; sent little-endian.
+ */
+#define SDPCM_TEST_DISCARD 0x01 /* Receiver discards. Ext:pattern id. */
+#define SDPCM_TEST_ECHOREQ 0x02 /* Echo request. Ext:pattern id. */
+#define SDPCM_TEST_ECHORSP 0x03 /* Echo response. Ext:pattern id. */
+#define SDPCM_TEST_BURST 0x04 /*
+ * Receiver to send a burst.
+ * Ext is a frame count
+ */
+#define SDPCM_TEST_SEND 0x05 /*
+ * Receiver sets send mode.
+ * Ext is boolean on/off
+ */
+
+/* Handy macro for filling in datagen packets with a pattern */
+#define SDPCM_TEST_FILL(byteno, id) ((u8)(id + byteno))
+
+/*
+ * Shared structure between dongle and the host.
+ * The structure contains pointers to trap or assert information.
+ */
+#define SDPCM_SHARED_VERSION 0x0002
+#define SDPCM_SHARED_VERSION_MASK 0x00FF
+#define SDPCM_SHARED_ASSERT_BUILT 0x0100
+#define SDPCM_SHARED_ASSERT 0x0200
+#define SDPCM_SHARED_TRAP 0x0400
+
+
/* Space for header read, limit for data packets */
#ifndef MAX_HDR_READ
#define MAX_HDR_READ 32
@@ -137,6 +363,42 @@
/* Flags for SDH calls */
#define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
+/* sbimstate */
+#define SBIM_IBE 0x20000 /* inbanderror */
+#define SBIM_TO 0x40000 /* timeout */
+#define SBIM_BY 0x01800000 /* busy (sonics >= 2.3) */
+#define SBIM_RJ 0x02000000 /* reject (sonics >= 2.3) */
+
+/* sbtmstatelow */
+#define SBTML_RESET 0x0001 /* reset */
+#define SBTML_REJ_MASK 0x0006 /* reject field */
+#define SBTML_REJ 0x0002 /* reject */
+#define SBTML_TMPREJ 0x0004 /* temporary reject, for error recovery */
+
+#define SBTML_SICF_SHIFT 16 /* Shift to locate the SI control flags in sbtml */
+
+/* sbtmstatehigh */
+#define SBTMH_SERR 0x0001 /* serror */
+#define SBTMH_INT 0x0002 /* interrupt */
+#define SBTMH_BUSY 0x0004 /* busy */
+#define SBTMH_TO 0x0020 /* timeout (sonics >= 2.3) */
+
+#define SBTMH_SISF_SHIFT 16 /* Shift to locate the SI status flags in sbtmh */
+
+/* sbidlow */
+#define SBIDL_INIT 0x80 /* initiator */
+
+/* sbidhigh */
+#define SBIDH_RC_MASK 0x000f /* revision code */
+#define SBIDH_RCE_MASK 0x7000 /* revision code extension field */
+#define SBIDH_RCE_SHIFT 8
+#define SBCOREREV(sbidh) \
+ ((((sbidh) & SBIDH_RCE_MASK) >> SBIDH_RCE_SHIFT) | ((sbidh) & SBIDH_RC_MASK))
+#define SBIDH_CC_MASK 0x8ff0 /* core code */
+#define SBIDH_CC_SHIFT 4
+#define SBIDH_VC_MASK 0xffff0000 /* vendor code */
+#define SBIDH_VC_SHIFT 16
+
/*
* Conversion of 802.1D priority to precedence level
*/
@@ -148,18 +410,37 @@ DHD_SPINWAIT_SLEEP_INIT(sdioh_spinwait_sleep);
extern int dhdcdc_set_ioctl(dhd_pub_t *dhd, int ifidx, uint cmd, void *buf,
uint len);
+/* Core reg address translation */
+#define CORE_CC_REG(base, field) (base + offsetof(chipcregs_t, field))
+#define CORE_BUS_REG(base, field) \
+ (base + offsetof(struct sdpcmd_regs, field))
+#define CORE_SB(base, field) \
+ (base + SBCONFIGOFF + offsetof(sbconfig_t, field))
+
#ifdef DHD_DEBUG
/* Device console log buffer state */
typedef struct dhd_console {
uint count; /* Poll interval msec counter */
uint log_addr; /* Log struct address (fixed) */
- hndrte_log_t log; /* Log struct (host copy) */
+ rte_log_t log; /* Log struct (host copy) */
uint bufsize; /* Size of log buffer */
u8 *buf; /* Log buffer (host copy) */
uint last; /* Last buffer read index */
} dhd_console_t;
#endif /* DHD_DEBUG */
+struct sdpcm_shared {
+ u32 flags;
+ u32 trap_addr;
+ u32 assert_exp_addr;
+ u32 assert_file_addr;
+ u32 assert_line;
+ u32 console_addr; /* Address of rte_cons_t */
+ u32 msgtrace_addr;
+ u8 tag[32];
+};
+
+
/* misc chip info needed by some of the routines */
struct chip_info {
u32 chip;
@@ -186,7 +467,7 @@ typedef struct dhd_bus {
uint varsz; /* Size of variables buffer */
u32 sbaddr; /* Current SB window pointer (-1, invalid) */
- sdpcmd_regs_t *regs; /* Registers for SDIO core */
+ struct sdpcmd_regs *regs; /* SDIO core */
uint sdpcmrev; /* SDIO core revision */
uint armrev; /* CPU core revision */
uint ramrev; /* SOCRAM core revision */
@@ -254,8 +535,6 @@ typedef struct dhd_bus {
s32 idletime; /* Control for activity timeout */
s32 idlecount; /* Activity timeout counter */
s32 idleclock; /* How to set bus driver when idle */
- s32 sd_divisor; /* Speed control to bus driver */
- s32 sd_mode; /* Mode control to bus driver */
s32 sd_rxchain; /* If bcmsdh api accepts PKT chains */
bool use_rxchain; /* If dhd should use PKT chains */
bool sleeping; /* Is SDIO bus sleeping? */
@@ -316,6 +595,46 @@ typedef struct dhd_bus {
bool ctrl_frame_stat;
} dhd_bus_t;
+typedef volatile struct _sbconfig {
+ u32 PAD[2];
+ u32 sbipsflag; /* initiator port ocp slave flag */
+ u32 PAD[3];
+ u32 sbtpsflag; /* target port ocp slave flag */
+ u32 PAD[11];
+ u32 sbtmerrloga; /* (sonics >= 2.3) */
+ u32 PAD;
+ u32 sbtmerrlog; /* (sonics >= 2.3) */
+ u32 PAD[3];
+ u32 sbadmatch3; /* address match3 */
+ u32 PAD;
+ u32 sbadmatch2; /* address match2 */
+ u32 PAD;
+ u32 sbadmatch1; /* address match1 */
+ u32 PAD[7];
+ u32 sbimstate; /* initiator agent state */
+ u32 sbintvec; /* interrupt mask */
+ u32 sbtmstatelow; /* target state */
+ u32 sbtmstatehigh; /* target state */
+ u32 sbbwa0; /* bandwidth allocation table0 */
+ u32 PAD;
+ u32 sbimconfiglow; /* initiator configuration */
+ u32 sbimconfighigh; /* initiator configuration */
+ u32 sbadmatch0; /* address match0 */
+ u32 PAD;
+ u32 sbtmconfiglow; /* target configuration */
+ u32 sbtmconfighigh; /* target configuration */
+ u32 sbbconfig; /* broadcast configuration */
+ u32 PAD;
+ u32 sbbstate; /* broadcast state */
+ u32 PAD[3];
+ u32 sbactcnfg; /* activate configuration */
+ u32 PAD[3];
+ u32 sbflagst; /* current sbflags */
+ u32 PAD[3];
+ u32 sbidlow; /* identification */
+ u32 sbidhigh; /* identification */
+} sbconfig_t;
+
/* clkstate */
#define CLK_NONE 0
#define CLK_SDONLY 1
@@ -466,9 +785,6 @@ static int _dhdsdio_download_firmware(struct dhd_bus *bus);
static int dhdsdio_download_code_file(struct dhd_bus *bus, char *image_path);
static int dhdsdio_download_nvram(struct dhd_bus *bus);
-#ifdef BCMEMBEDIMAGE
-static int dhdsdio_download_code_array(struct dhd_bus *bus);
-#endif
static void dhdsdio_chip_disablecore(bcmsdh_info_t *sdh, u32 corebase);
static int dhdsdio_chip_attach(struct dhd_bus *bus, void *regs);
static void dhdsdio_chip_resetcore(bcmsdh_info_t *sdh, u32 corebase);
@@ -483,7 +799,7 @@ static void dhdsdio_pktfree2(dhd_bus_t *bus, struct sk_buff *pkt)
{
dhd_os_sdlock_rxq(bus->dhd);
if ((bus->bus != SPI_BUS) || bus->usebufpool)
- bcm_pkt_buf_free_skb(pkt);
+ brcmu_pkt_buf_free_skb(pkt);
dhd_os_sdunlock_rxq(bus->dhd);
}
@@ -661,86 +977,12 @@ static int dhdsdio_htclk(dhd_bus_t *bus, bool on, bool pendok)
/* Change idle/active SD state */
static int dhdsdio_sdclk(dhd_bus_t *bus, bool on)
{
- int err;
- s32 iovalue;
-
DHD_TRACE(("%s: Enter\n", __func__));
- if (on) {
- if (bus->idleclock == DHD_IDLE_STOP) {
- /* Turn on clock and restore mode */
- iovalue = 1;
- err = bcmsdh_iovar_op(bus->sdh, "sd_clock", NULL, 0,
- &iovalue, sizeof(iovalue), true);
- if (err) {
- DHD_ERROR(("%s: error enabling sd_clock: %d\n",
- __func__, err));
- return -EBADE;
- }
-
- iovalue = bus->sd_mode;
- err = bcmsdh_iovar_op(bus->sdh, "sd_mode", NULL, 0,
- &iovalue, sizeof(iovalue), true);
- if (err) {
- DHD_ERROR(("%s: error changing sd_mode: %d\n",
- __func__, err));
- return -EBADE;
- }
- } else if (bus->idleclock != DHD_IDLE_ACTIVE) {
- /* Restore clock speed */
- iovalue = bus->sd_divisor;
- err = bcmsdh_iovar_op(bus->sdh, "sd_divisor", NULL, 0,
- &iovalue, sizeof(iovalue), true);
- if (err) {
- DHD_ERROR(("%s: error restoring sd_divisor: %d\n",
- __func__, err));
- return -EBADE;
- }
- }
+ if (on)
bus->clkstate = CLK_SDONLY;
- } else {
- /* Stop or slow the SD clock itself */
- if ((bus->sd_divisor == -1) || (bus->sd_mode == -1)) {
- DHD_TRACE(("%s: can't idle clock, divisor %d mode %d\n",
- __func__, bus->sd_divisor, bus->sd_mode));
- return -EBADE;
- }
- if (bus->idleclock == DHD_IDLE_STOP) {
- if (sd1idle) {
- /* Change to SD1 mode and turn off clock */
- iovalue = 1;
- err =
- bcmsdh_iovar_op(bus->sdh, "sd_mode", NULL,
- 0, &iovalue,
- sizeof(iovalue), true);
- if (err) {
- DHD_ERROR(("%s: error changing sd_clock: %d\n",
- __func__, err));
- return -EBADE;
- }
- }
-
- iovalue = 0;
- err = bcmsdh_iovar_op(bus->sdh, "sd_clock", NULL, 0,
- &iovalue, sizeof(iovalue), true);
- if (err) {
- DHD_ERROR(("%s: error disabling sd_clock: %d\n",
- __func__, err));
- return -EBADE;
- }
- } else if (bus->idleclock != DHD_IDLE_ACTIVE) {
- /* Set divisor to idle value */
- iovalue = bus->idleclock;
- err = bcmsdh_iovar_op(bus->sdh, "sd_divisor", NULL, 0,
- &iovalue, sizeof(iovalue), true);
- if (err) {
- DHD_ERROR(("%s: error changing sd_divisor: %d\n",
- __func__, err));
- return -EBADE;
- }
- }
+ else
bus->clkstate = CLK_NONE;
- }
return 0;
}
@@ -805,7 +1047,7 @@ static int dhdsdio_clkctl(dhd_bus_t *bus, uint target, bool pendok)
int dhdsdio_bussleep(dhd_bus_t *bus, bool sleep)
{
bcmsdh_info_t *sdh = bus->sdh;
- sdpcmd_regs_t *regs = bus->regs;
+ struct sdpcmd_regs *regs = bus->regs;
uint retries = 0;
DHD_INFO(("dhdsdio_bussleep: request %s (currently %s)\n",
@@ -957,7 +1199,7 @@ static int dhdsdio_txpkt(dhd_bus_t *bus, struct sk_buff *pkt, uint chan,
DHD_INFO(("%s: insufficient headroom %d for %d pad\n",
__func__, skb_headroom(pkt), pad));
bus->dhd->tx_realloc++;
- new = bcm_pkt_buf_get_skb(pkt->len + DHD_SDALIGN);
+ new = brcmu_pkt_buf_get_skb(pkt->len + DHD_SDALIGN);
if (!new) {
DHD_ERROR(("%s: couldn't allocate new %d-byte "
"packet\n",
@@ -969,7 +1211,7 @@ static int dhdsdio_txpkt(dhd_bus_t *bus, struct sk_buff *pkt, uint chan,
PKTALIGN(new, pkt->len, DHD_SDALIGN);
memcpy(new->data, pkt->data, pkt->len);
if (free_pkt)
- bcm_pkt_buf_free_skb(pkt);
+ brcmu_pkt_buf_free_skb(pkt);
/* free the pkt if canned one is not used */
free_pkt = true;
pkt = new;
@@ -1086,7 +1328,7 @@ done:
dhd_os_sdlock(bus->dhd);
if (free_pkt)
- bcm_pkt_buf_free_skb(pkt);
+ brcmu_pkt_buf_free_skb(pkt);
return ret;
}
@@ -1135,7 +1377,7 @@ int dhd_bus_txdata(struct dhd_bus *bus, struct sk_buff *pkt)
if (dhd_prec_enq(bus->dhd, &bus->txq, pkt, prec) == false) {
skb_pull(pkt, SDPCM_HDRLEN);
dhd_txcomplete(bus->dhd, pkt, false);
- bcm_pkt_buf_free_skb(pkt);
+ brcmu_pkt_buf_free_skb(pkt);
DHD_ERROR(("%s: out of bus->txq !!!\n", __func__));
ret = -ENOSR;
} else {
@@ -1199,7 +1441,7 @@ static uint dhdsdio_sendfromq(dhd_bus_t *bus, uint maxframes)
u8 tx_prec_map;
dhd_pub_t *dhd = bus->dhd;
- sdpcmd_regs_t *regs = bus->regs;
+ struct sdpcmd_regs *regs = bus->regs;
DHD_TRACE(("%s: Enter\n", __func__));
@@ -1208,7 +1450,7 @@ static uint dhdsdio_sendfromq(dhd_bus_t *bus, uint maxframes)
/* Send frames until the limit or some other event */
for (cnt = 0; (cnt < maxframes) && DATAOK(bus); cnt++) {
dhd_os_sdlock_txq(bus->dhd);
- pkt = bcm_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out);
+ pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out);
if (pkt == NULL) {
dhd_os_sdunlock_txq(bus->dhd);
break;
@@ -1494,7 +1736,7 @@ enum {
IOV_VARS
};
-const bcm_iovar_t dhdsdio_iovars[] = {
+const struct brcmu_iovar dhdsdio_iovars[] = {
{"intr", IOV_INTR, 0, IOVT_BOOL, 0},
{"sleep", IOV_SLEEP, 0, IOVT_BOOL, 0},
{"pollrate", IOV_POLLRATE, 0, IOVT_UINT32, 0},
@@ -1544,50 +1786,51 @@ const bcm_iovar_t dhdsdio_iovars[] = {
};
static void
-dhd_dump_pct(struct bcmstrbuf *strbuf, char *desc, uint num, uint div)
+dhd_dump_pct(struct brcmu_strbuf *strbuf, char *desc, uint num, uint div)
{
uint q1, q2;
if (!div) {
- bcm_bprintf(strbuf, "%s N/A", desc);
+ brcmu_bprintf(strbuf, "%s N/A", desc);
} else {
q1 = num / div;
q2 = (100 * (num - (q1 * div))) / div;
- bcm_bprintf(strbuf, "%s %d.%02d", desc, q1, q2);
+ brcmu_bprintf(strbuf, "%s %d.%02d", desc, q1, q2);
}
}
-void dhd_bus_dump(dhd_pub_t *dhdp, struct bcmstrbuf *strbuf)
+void dhd_bus_dump(dhd_pub_t *dhdp, struct brcmu_strbuf *strbuf)
{
dhd_bus_t *bus = dhdp->bus;
- bcm_bprintf(strbuf, "Bus SDIO structure:\n");
- bcm_bprintf(strbuf,
+ brcmu_bprintf(strbuf, "Bus SDIO structure:\n");
+ brcmu_bprintf(strbuf,
"hostintmask 0x%08x intstatus 0x%08x sdpcm_ver %d\n",
bus->hostintmask, bus->intstatus, bus->sdpcm_ver);
- bcm_bprintf(strbuf,
+ brcmu_bprintf(strbuf,
"fcstate %d qlen %d tx_seq %d, max %d, rxskip %d rxlen %d rx_seq %d\n",
bus->fcstate, pktq_len(&bus->txq), bus->tx_seq, bus->tx_max,
bus->rxskip, bus->rxlen, bus->rx_seq);
- bcm_bprintf(strbuf, "intr %d intrcount %d lastintrs %d spurious %d\n",
+ brcmu_bprintf(strbuf, "intr %d intrcount %d lastintrs %d spurious %d\n",
bus->intr, bus->intrcount, bus->lastintrs, bus->spurious);
- bcm_bprintf(strbuf, "pollrate %d pollcnt %d regfails %d\n",
+ brcmu_bprintf(strbuf, "pollrate %d pollcnt %d regfails %d\n",
bus->pollrate, bus->pollcnt, bus->regfails);
- bcm_bprintf(strbuf, "\nAdditional counters:\n");
- bcm_bprintf(strbuf,
+ brcmu_bprintf(strbuf, "\nAdditional counters:\n");
+ brcmu_bprintf(strbuf,
"tx_sderrs %d fcqueued %d rxrtx %d rx_toolong %d rxc_errors %d\n",
bus->tx_sderrs, bus->fcqueued, bus->rxrtx, bus->rx_toolong,
bus->rxc_errors);
- bcm_bprintf(strbuf, "rx_hdrfail %d badhdr %d badseq %d\n",
+ brcmu_bprintf(strbuf, "rx_hdrfail %d badhdr %d badseq %d\n",
bus->rx_hdrfail, bus->rx_badhdr, bus->rx_badseq);
- bcm_bprintf(strbuf, "fc_rcvd %d, fc_xoff %d, fc_xon %d\n", bus->fc_rcvd,
- bus->fc_xoff, bus->fc_xon);
- bcm_bprintf(strbuf, "rxglomfail %d, rxglomframes %d, rxglompkts %d\n",
+ brcmu_bprintf(strbuf, "fc_rcvd %d, fc_xoff %d, fc_xon %d\n",
+ bus->fc_rcvd, bus->fc_xoff, bus->fc_xon);
+ brcmu_bprintf(strbuf, "rxglomfail %d, rxglomframes %d, rxglompkts %d\n",
bus->rxglomfail, bus->rxglomframes, bus->rxglompkts);
- bcm_bprintf(strbuf, "f2rx (hdrs/data) %d (%d/%d), f2tx %d f1regs %d\n",
- (bus->f2rxhdrs + bus->f2rxdata), bus->f2rxhdrs,
- bus->f2rxdata, bus->f2txdata, bus->f1regdata);
+ brcmu_bprintf(strbuf, "f2rx (hdrs/data) %d (%d/%d), f2tx %d f1regs"
+ " %d\n",
+ (bus->f2rxhdrs + bus->f2rxdata), bus->f2rxhdrs,
+ bus->f2rxdata, bus->f2txdata, bus->f1regdata);
{
dhd_dump_pct(strbuf, "\nRx: pkts/f2rd", bus->dhd->rx_packets,
(bus->f2rxhdrs + bus->f2rxdata));
@@ -1597,13 +1840,13 @@ void dhd_bus_dump(dhd_pub_t *dhdp, struct bcmstrbuf *strbuf)
(bus->f2rxhdrs + bus->f2rxdata + bus->f1regdata));
dhd_dump_pct(strbuf, ", pkts/int", bus->dhd->rx_packets,
bus->intrcount);
- bcm_bprintf(strbuf, "\n");
+ brcmu_bprintf(strbuf, "\n");
dhd_dump_pct(strbuf, "Rx: glom pct", (100 * bus->rxglompkts),
bus->dhd->rx_packets);
dhd_dump_pct(strbuf, ", pkts/glom", bus->rxglompkts,
bus->rxglomframes);
- bcm_bprintf(strbuf, "\n");
+ brcmu_bprintf(strbuf, "\n");
dhd_dump_pct(strbuf, "Tx: pkts/f2wr", bus->dhd->tx_packets,
bus->f2txdata);
@@ -1613,7 +1856,7 @@ void dhd_bus_dump(dhd_pub_t *dhdp, struct bcmstrbuf *strbuf)
(bus->f2txdata + bus->f1regdata));
dhd_dump_pct(strbuf, ", pkts/int", bus->dhd->tx_packets,
bus->intrcount);
- bcm_bprintf(strbuf, "\n");
+ brcmu_bprintf(strbuf, "\n");
dhd_dump_pct(strbuf, "Total: pkts/f2rw",
(bus->dhd->tx_packets + bus->dhd->rx_packets),
@@ -1628,30 +1871,30 @@ void dhd_bus_dump(dhd_pub_t *dhdp, struct bcmstrbuf *strbuf)
dhd_dump_pct(strbuf, ", pkts/int",
(bus->dhd->tx_packets + bus->dhd->rx_packets),
bus->intrcount);
- bcm_bprintf(strbuf, "\n\n");
+ brcmu_bprintf(strbuf, "\n\n");
}
#ifdef SDTEST
if (bus->pktgen_count) {
- bcm_bprintf(strbuf, "pktgen config and count:\n");
- bcm_bprintf(strbuf,
+ brcmu_bprintf(strbuf, "pktgen config and count:\n");
+ brcmu_bprintf(strbuf,
"freq %d count %d print %d total %d min %d len %d\n",
bus->pktgen_freq, bus->pktgen_count,
bus->pktgen_print, bus->pktgen_total,
bus->pktgen_minlen, bus->pktgen_maxlen);
- bcm_bprintf(strbuf, "send attempts %d rcvd %d fail %d\n",
+ brcmu_bprintf(strbuf, "send attempts %d rcvd %d fail %d\n",
bus->pktgen_sent, bus->pktgen_rcvd,
bus->pktgen_fail);
}
#endif /* SDTEST */
#ifdef DHD_DEBUG
- bcm_bprintf(strbuf, "dpc_sched %d host interrupt%spending\n",
+ brcmu_bprintf(strbuf, "dpc_sched %d host interrupt%spending\n",
bus->dpc_sched,
(bcmsdh_intr_pending(bus->sdh) ? " " : " not "));
- bcm_bprintf(strbuf, "blocksize %d roundup %d\n", bus->blocksize,
+ brcmu_bprintf(strbuf, "blocksize %d roundup %d\n", bus->blocksize,
bus->roundup);
#endif /* DHD_DEBUG */
- bcm_bprintf(strbuf,
+ brcmu_bprintf(strbuf,
"clkstate %d activity %d idletime %d idlecount %d sleeping %d\n",
bus->clkstate, bus->activity, bus->idletime, bus->idlecount,
bus->sleeping);
@@ -1786,7 +2029,7 @@ xfer_done:
}
#ifdef DHD_DEBUG
-static int dhdsdio_readshared(dhd_bus_t *bus, sdpcm_shared_t *sh)
+static int dhdsdio_readshared(dhd_bus_t *bus, struct sdpcm_shared *sh)
{
u32 addr;
int rv;
@@ -1811,9 +2054,9 @@ static int dhdsdio_readshared(dhd_bus_t *bus, sdpcm_shared_t *sh)
return -EBADE;
}
- /* Read hndrte_shared structure */
+ /* Read rte_shared structure */
rv = dhdsdio_membytes(bus, false, addr, (u8 *) sh,
- sizeof(sdpcm_shared_t));
+ sizeof(struct sdpcm_shared));
if (rv < 0)
return rv;
@@ -1845,8 +2088,8 @@ static int dhdsdio_checkdied(dhd_bus_t *bus, u8 *data, uint size)
uint maxstrlen = 256;
char *str = NULL;
trap_t tr;
- sdpcm_shared_t sdpcm_shared;
- struct bcmstrbuf strbuf;
+ struct sdpcm_shared sdpcm_shared;
+ struct brcmu_strbuf strbuf;
DHD_TRACE(("%s: Enter\n", __func__));
@@ -1876,9 +2119,9 @@ static int dhdsdio_checkdied(dhd_bus_t *bus, u8 *data, uint size)
if (bcmerror < 0)
goto done;
- bcm_binit(&strbuf, data, size);
+ brcmu_binit(&strbuf, data, size);
- bcm_bprintf(&strbuf,
+ brcmu_bprintf(&strbuf,
"msgtrace address : 0x%08X\nconsole address : 0x%08X\n",
sdpcm_shared.msgtrace_addr, sdpcm_shared.console_addr);
@@ -1887,7 +2130,7 @@ static int dhdsdio_checkdied(dhd_bus_t *bus, u8 *data, uint size)
* (Avoids conflict with real asserts for programmatic
* parsing of output.)
*/
- bcm_bprintf(&strbuf, "Assrt not built in dongle\n");
+ brcmu_bprintf(&strbuf, "Assrt not built in dongle\n");
}
if ((sdpcm_shared.flags & (SDPCM_SHARED_ASSERT | SDPCM_SHARED_TRAP)) ==
@@ -1896,13 +2139,13 @@ static int dhdsdio_checkdied(dhd_bus_t *bus, u8 *data, uint size)
* (Avoids conflict with real asserts for programmatic
* parsing of output.)
*/
- bcm_bprintf(&strbuf, "No trap%s in dongle",
+ brcmu_bprintf(&strbuf, "No trap%s in dongle",
(sdpcm_shared.flags & SDPCM_SHARED_ASSERT_BUILT)
? "/assrt" : "");
} else {
if (sdpcm_shared.flags & SDPCM_SHARED_ASSERT) {
/* Download assert */
- bcm_bprintf(&strbuf, "Dongle assert");
+ brcmu_bprintf(&strbuf, "Dongle assert");
if (sdpcm_shared.assert_exp_addr != 0) {
str[0] = '\0';
bcmerror = dhdsdio_membytes(bus, false,
@@ -1912,7 +2155,7 @@ static int dhdsdio_checkdied(dhd_bus_t *bus, u8 *data, uint size)
goto done;
str[maxstrlen - 1] = '\0';
- bcm_bprintf(&strbuf, " expr \"%s\"", str);
+ brcmu_bprintf(&strbuf, " expr \"%s\"", str);
}
if (sdpcm_shared.assert_file_addr != 0) {
@@ -1924,10 +2167,10 @@ static int dhdsdio_checkdied(dhd_bus_t *bus, u8 *data, uint size)
goto done;
str[maxstrlen - 1] = '\0';
- bcm_bprintf(&strbuf, " file \"%s\"", str);
+ brcmu_bprintf(&strbuf, " file \"%s\"", str);
}
- bcm_bprintf(&strbuf, " line %d ",
+ brcmu_bprintf(&strbuf, " line %d ",
sdpcm_shared.assert_line);
}
@@ -1938,7 +2181,7 @@ static int dhdsdio_checkdied(dhd_bus_t *bus, u8 *data, uint size)
if (bcmerror < 0)
goto done;
- bcm_bprintf(&strbuf,
+ brcmu_bprintf(&strbuf,
"Dongle trap type 0x%x @ epc 0x%x, cpsr 0x%x, spsr 0x%x, sp 0x%x,"
"lp 0x%x, rpc 0x%x Trap offset 0x%x, "
"r0 0x%x, r1 0x%x, r2 0x%x, r3 0x%x, r4 0x%x, r5 0x%x, r6 0x%x, r7 0x%x\n",
@@ -2026,7 +2269,7 @@ static int dhdsdio_readconsole(dhd_bus_t *bus)
return 0;
/* Read console log struct */
- addr = bus->console_addr + offsetof(hndrte_cons_t, log);
+ addr = bus->console_addr + offsetof(rte_cons_t, log);
rv = dhdsdio_membytes(bus, false, addr, (u8 *)&c->log,
sizeof(c->log));
if (rv < 0)
@@ -2125,7 +2368,7 @@ err:
}
static int
-dhdsdio_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, u32 actionid,
+dhdsdio_doiovar(dhd_bus_t *bus, const struct brcmu_iovar *vi, u32 actionid,
const char *name, void *params, int plen, void *arg, int len,
int val_size)
{
@@ -2137,7 +2380,7 @@ dhdsdio_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, u32 actionid,
"len %d val_size %d\n",
__func__, actionid, name, params, plen, arg, len, val_size));
- bcmerror = bcm_iovar_lencheck(vi, arg, len, IOV_ISSET(actionid));
+ bcmerror = brcmu_iovar_lencheck(vi, arg, len, IOV_ISSET(actionid));
if (bcmerror != 0)
goto exit;
@@ -2681,7 +2924,7 @@ dhd_bus_iovar_op(dhd_pub_t *dhdp, const char *name,
void *params, int plen, void *arg, int len, bool set)
{
dhd_bus_t *bus = dhdp->bus;
- const bcm_iovar_t *vi = NULL;
+ const struct brcmu_iovar *vi = NULL;
int bcmerror = 0;
int val_size;
u32 actionid;
@@ -2698,7 +2941,7 @@ dhd_bus_iovar_op(dhd_pub_t *dhdp, const char *name,
ASSERT(!set || (!params && !plen));
/* Look up var locally; if not found pass to host driver */
- vi = bcm_iovar_lookup(dhdsdio_iovars, name);
+ vi = brcmu_iovar_lookup(dhdsdio_iovars, name);
if (vi == NULL) {
dhd_os_sdlock(bus->dhd);
@@ -2711,34 +2954,6 @@ dhd_bus_iovar_op(dhd_pub_t *dhdp, const char *name,
bcmsdh_iovar_op(bus->sdh, name, params, plen, arg, len,
set);
- /* Check for bus configuration changes of interest */
-
- /* If it was divisor change, read the new one */
- if (set && strcmp(name, "sd_divisor") == 0) {
- if (bcmsdh_iovar_op(bus->sdh, "sd_divisor", NULL, 0,
- &bus->sd_divisor, sizeof(s32),
- false) != 0) {
- bus->sd_divisor = -1;
- DHD_ERROR(("%s: fail on %s get\n", __func__,
- name));
- } else {
- DHD_INFO(("%s: noted %s update, value now %d\n",
- __func__, name, bus->sd_divisor));
- }
- }
- /* If it was a mode change, read the new one */
- if (set && strcmp(name, "sd_mode") == 0) {
- if (bcmsdh_iovar_op(bus->sdh, "sd_mode", NULL, 0,
- &bus->sd_mode, sizeof(s32),
- false) != 0) {
- bus->sd_mode = -1;
- DHD_ERROR(("%s: fail on %s get\n", __func__,
- name));
- } else {
- DHD_INFO(("%s: noted %s update, value now %d\n",
- __func__, name, bus->sd_mode));
- }
- }
/* Similar check for blocksize change */
if (set && strcmp(name, "sd_blocksize") == 0) {
s32 fnum = 2;
@@ -2835,7 +3050,7 @@ void dhd_bus_stop(struct dhd_bus *bus, bool enforce_mutex)
/* Turn off the bus (F2), free any pending packets */
DHD_INTR(("%s: disable SDIO interrupts\n", __func__));
bcmsdh_intr_disable(bus->sdh);
- bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIOD_CCCR_IOEN,
+ bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIO_CCCR_IOEx,
SDIO_FUNC_ENABLE_1, NULL);
/* Clear any pending interrupts now that F2 is disabled */
@@ -2845,14 +3060,14 @@ void dhd_bus_stop(struct dhd_bus *bus, bool enforce_mutex)
dhdsdio_clkctl(bus, CLK_SDONLY, false);
/* Clear the data packet queues */
- bcm_pktq_flush(&bus->txq, true, NULL, NULL);
+ brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
/* Clear any held glomming stuff */
if (bus->glomd)
- bcm_pkt_buf_free_skb(bus->glomd);
+ brcmu_pkt_buf_free_skb(bus->glomd);
if (bus->glom)
- bcm_pkt_buf_free_skb(bus->glom);
+ brcmu_pkt_buf_free_skb(bus->glom);
bus->glom = bus->glomd = NULL;
@@ -2910,7 +3125,7 @@ int dhd_bus_init(dhd_pub_t *dhdp, bool enforce_mutex)
&bus->regs->tosbmailboxdata, retries);
enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
- bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIOD_CCCR_IOEN, enable, NULL);
+ bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIO_CCCR_IOEx, enable, NULL);
/* Give the dongle some time to do its thing and set IOR2 */
dhd_timeout_start(&tmo, DHD_WAIT_F2RDY * 1000);
@@ -2918,7 +3133,7 @@ int dhd_bus_init(dhd_pub_t *dhdp, bool enforce_mutex)
ready = 0;
while (ready != enable && !dhd_timeout_expired(&tmo))
ready =
- bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_0, SDIOD_CCCR_IORDY,
+ bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_0, SDIO_CCCR_IORx,
NULL);
DHD_INFO(("%s: enable 0x%02x, ready 0x%02x (waited %uus)\n",
@@ -2955,7 +3170,7 @@ int dhd_bus_init(dhd_pub_t *dhdp, bool enforce_mutex)
else {
/* Disable F2 again */
enable = SDIO_FUNC_ENABLE_1;
- bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIOD_CCCR_IOEN, enable,
+ bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIO_CCCR_IOEx, enable,
NULL);
}
@@ -2977,7 +3192,7 @@ exit:
static void dhdsdio_rxfail(dhd_bus_t *bus, bool abort, bool rtx)
{
bcmsdh_info_t *sdh = bus->sdh;
- sdpcmd_regs_t *regs = bus->regs;
+ struct sdpcmd_regs *regs = bus->regs;
uint retries = 0;
u16 lastrbc;
u8 hi, lo;
@@ -3204,7 +3419,7 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq)
}
/* Allocate/chain packet for next subframe */
- pnext = bcm_pkt_buf_get_skb(sublen + DHD_SDALIGN);
+ pnext = brcmu_pkt_buf_get_skb(sublen + DHD_SDALIGN);
if (pnext == NULL) {
DHD_ERROR(("%s: bcm_pkt_buf_get_skb failed, "
"num %d len %d\n", __func__,
@@ -3241,13 +3456,13 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq)
pfirst = pnext = NULL;
} else {
if (pfirst)
- bcm_pkt_buf_free_skb(pfirst);
+ brcmu_pkt_buf_free_skb(pfirst);
bus->glom = NULL;
num = 0;
}
/* Done with descriptor packet */
- bcm_pkt_buf_free_skb(bus->glomd);
+ brcmu_pkt_buf_free_skb(bus->glomd);
bus->glomd = NULL;
bus->nextlen = 0;
@@ -3268,7 +3483,7 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq)
}
pfirst = bus->glom;
- dlen = (u16) bcm_pkttotlen(pfirst);
+ dlen = (u16) brcmu_pkttotlen(pfirst);
/* Do an SDIO read for the superframe. Configurable iovar to
* read directly into the chained packet, or allocate a large
@@ -3284,7 +3499,7 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq)
bcmsdh_cur_sbwad(bus->sdh), SDIO_FUNC_2,
F2SYNC, bus->dataptr, dlen,
NULL, NULL, NULL);
- sublen = (u16) bcm_pktfrombuf(pfirst, 0, dlen,
+ sublen = (u16) brcmu_pktfrombuf(pfirst, 0, dlen,
bus->dataptr);
if (sublen != dlen) {
DHD_ERROR(("%s: FAILED TO COPY, dlen %d sublen %d\n",
@@ -3312,7 +3527,7 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq)
bus->glomerr = 0;
dhdsdio_rxfail(bus, true, false);
dhd_os_sdlock_rxq(bus->dhd);
- bcm_pkt_buf_free_skb(bus->glom);
+ brcmu_pkt_buf_free_skb(bus->glom);
dhd_os_sdunlock_rxq(bus->dhd);
bus->rxglomfail++;
bus->glom = NULL;
@@ -3445,7 +3660,7 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq)
bus->glomerr = 0;
dhdsdio_rxfail(bus, true, false);
dhd_os_sdlock_rxq(bus->dhd);
- bcm_pkt_buf_free_skb(bus->glom);
+ brcmu_pkt_buf_free_skb(bus->glom);
dhd_os_sdunlock_rxq(bus->dhd);
bus->rxglomfail++;
bus->glom = NULL;
@@ -3496,7 +3711,7 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq)
skb_pull(pfirst, doff);
if (pfirst->len == 0) {
- bcm_pkt_buf_free_skb(pfirst);
+ brcmu_pkt_buf_free_skb(pfirst);
if (plast) {
plast->next = pnext;
} else {
@@ -3509,7 +3724,7 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq)
DHD_ERROR(("%s: rx protocol error\n",
__func__));
bus->dhd->rx_errors++;
- bcm_pkt_buf_free_skb(pfirst);
+ brcmu_pkt_buf_free_skb(pfirst);
if (plast) {
plast->next = pnext;
} else {
@@ -3647,7 +3862,7 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished)
*/
/* Allocate a packet buffer */
dhd_os_sdlock_rxq(bus->dhd);
- pkt = bcm_pkt_buf_get_skb(rdlen + DHD_SDALIGN);
+ pkt = brcmu_pkt_buf_get_skb(rdlen + DHD_SDALIGN);
if (!pkt) {
if (bus->bus == SPI_BUS) {
bus->usebufpool = false;
@@ -3691,7 +3906,8 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished)
/* Give up on data,
request rtx of events */
DHD_ERROR(("%s (nextlen): "
- "bcm_pkt_buf_get_skb failed:"
+ "brcmu_pkt_buf_get_skb "
+ "failed:"
" len %d rdlen %d expected"
" rxseq %d\n", __func__,
len, rdlen, rxseq));
@@ -3719,7 +3935,7 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished)
if (sdret < 0) {
DHD_ERROR(("%s (nextlen): read %d bytes failed: %d\n",
__func__, rdlen, sdret));
- bcm_pkt_buf_free_skb(pkt);
+ brcmu_pkt_buf_free_skb(pkt);
bus->dhd->rx_errors++;
dhd_os_sdunlock_rxq(bus->dhd);
/* Force retry w/normal header read.
@@ -4032,11 +4248,11 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished)
}
dhd_os_sdlock_rxq(bus->dhd);
- pkt = bcm_pkt_buf_get_skb(rdlen + firstread + DHD_SDALIGN);
+ pkt = brcmu_pkt_buf_get_skb(rdlen + firstread + DHD_SDALIGN);
if (!pkt) {
/* Give up on data, request rtx of events */
- DHD_ERROR(("%s: bcm_pkt_buf_get_skb failed: rdlen %d "
- "chan %d\n", __func__, rdlen, chan));
+ DHD_ERROR(("%s: brcmu_pkt_buf_get_skb failed: rdlen %d"
+ " chan %d\n", __func__, rdlen, chan));
bus->dhd->rx_dropped++;
dhd_os_sdunlock_rxq(bus->dhd);
dhdsdio_rxfail(bus, false, RETRYCHAN(chan));
@@ -4067,7 +4283,7 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished)
? "data" : "test")),
sdret));
dhd_os_sdlock_rxq(bus->dhd);
- bcm_pkt_buf_free_skb(pkt);
+ brcmu_pkt_buf_free_skb(pkt);
dhd_os_sdunlock_rxq(bus->dhd);
bus->dhd->rx_errors++;
dhdsdio_rxfail(bus, true, RETRYCHAN(chan));
@@ -4126,13 +4342,13 @@ deliver:
if (pkt->len == 0) {
dhd_os_sdlock_rxq(bus->dhd);
- bcm_pkt_buf_free_skb(pkt);
+ brcmu_pkt_buf_free_skb(pkt);
dhd_os_sdunlock_rxq(bus->dhd);
continue;
} else if (dhd_prot_hdrpull(bus->dhd, &ifidx, pkt) != 0) {
DHD_ERROR(("%s: rx protocol error\n", __func__));
dhd_os_sdlock_rxq(bus->dhd);
- bcm_pkt_buf_free_skb(pkt);
+ brcmu_pkt_buf_free_skb(pkt);
dhd_os_sdunlock_rxq(bus->dhd);
bus->dhd->rx_errors++;
continue;
@@ -4162,7 +4378,7 @@ deliver:
static u32 dhdsdio_hostmail(dhd_bus_t *bus)
{
- sdpcmd_regs_t *regs = bus->regs;
+ struct sdpcmd_regs *regs = bus->regs;
u32 intstatus = 0;
u32 hmb_data;
u8 fcbits;
@@ -4237,7 +4453,7 @@ static u32 dhdsdio_hostmail(dhd_bus_t *bus)
bool dhdsdio_dpc(dhd_bus_t *bus)
{
bcmsdh_info_t *sdh = bus->sdh;
- sdpcmd_regs_t *regs = bus->regs;
+ struct sdpcmd_regs *regs = bus->regs;
u32 intstatus, newstatus = 0;
uint retries = 0;
uint rxlimit = dhd_rxbound; /* Rx frames to read before resched */
@@ -4453,7 +4669,7 @@ clkwait:
}
/* Send queued frames (limit 1 if rx may still be pending) */
else if ((bus->clkstate == CLK_AVAIL) && !bus->fcstate &&
- bcm_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
+ brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
&& DATAOK(bus)) {
framecnt = rxdone ? txlimit : min(txlimit, dhd_txminmax);
framecnt = dhdsdio_sendfromq(bus, framecnt);
@@ -4474,8 +4690,8 @@ clkwait:
"I_CHIPACTIVE interrupt\n", __func__));
resched = true;
} else if (bus->intstatus || bus->ipend ||
- (!bus->fcstate && bcm_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
- DATAOK(bus)) || PKT_AVAILABLE()) {
+ (!bus->fcstate && brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol)
+ && DATAOK(bus)) || PKT_AVAILABLE()) {
resched = true;
}
@@ -4608,12 +4824,12 @@ static void dhdsdio_pktgen(dhd_bus_t *bus)
/* Allocate an appropriate-sized packet */
len = bus->pktgen_len;
- pkt = bcm_pkt_buf_get_skb(
+ pkt = brcmu_pkt_buf_get_skb(
(len + SDPCM_HDRLEN + SDPCM_TEST_HDRLEN + DHD_SDALIGN),
true);
if (!pkt) {
- DHD_ERROR(("%s: bcm_pkt_buf_get_skb failed!\n",
- __func__));
+ DHD_ERROR(("%s: brcmu_pkt_buf_get_skb failed!\n",
+ __func__));
break;
}
PKTALIGN(pkt, (len + SDPCM_HDRLEN + SDPCM_TEST_HDRLEN),
@@ -4640,7 +4856,7 @@ static void dhdsdio_pktgen(dhd_bus_t *bus)
default:
DHD_ERROR(("Unrecognized pktgen mode %d\n",
bus->pktgen_mode));
- bcm_pkt_buf_free_skb(pkt, true);
+ brcmu_pkt_buf_free_skb(pkt, true);
bus->pktgen_count = 0;
return;
}
@@ -4689,10 +4905,10 @@ static void dhdsdio_sdtest_set(dhd_bus_t *bus, bool start)
u8 *data;
/* Allocate the packet */
- pkt = bcm_pkt_buf_get_skb(SDPCM_HDRLEN + SDPCM_TEST_HDRLEN +
+ pkt = brcmu_pkt_buf_get_skb(SDPCM_HDRLEN + SDPCM_TEST_HDRLEN +
DHD_SDALIGN, true);
if (!pkt) {
- DHD_ERROR(("%s: bcm_pkt_buf_get_skb failed!\n", __func__));
+ DHD_ERROR(("%s: brcmu_pkt_buf_get_skb failed!\n", __func__));
return;
}
PKTALIGN(pkt, (SDPCM_HDRLEN + SDPCM_TEST_HDRLEN), DHD_SDALIGN);
@@ -4724,7 +4940,7 @@ static void dhdsdio_testrcv(dhd_bus_t *bus, struct sk_buff *pkt, uint seq)
if (pktlen < SDPCM_TEST_HDRLEN) {
DHD_ERROR(("dhdsdio_restrcv: toss runt frame, pktlen %d\n",
pktlen));
- bcm_pkt_buf_free_skb(pkt, false);
+ brcmu_pkt_buf_free_skb(pkt, false);
return;
}
@@ -4742,7 +4958,7 @@ static void dhdsdio_testrcv(dhd_bus_t *bus, struct sk_buff *pkt, uint seq)
DHD_ERROR(("dhdsdio_testrcv: frame length mismatch, "
"pktlen %d seq %d" " cmd %d extra %d len %d\n",
pktlen, seq, cmd, extra, len));
- bcm_pkt_buf_free_skb(pkt, false);
+ brcmu_pkt_buf_free_skb(pkt, false);
return;
}
}
@@ -4757,14 +4973,14 @@ static void dhdsdio_testrcv(dhd_bus_t *bus, struct sk_buff *pkt, uint seq)
bus->pktgen_sent++;
} else {
bus->pktgen_fail++;
- bcm_pkt_buf_free_skb(pkt, false);
+ brcmu_pkt_buf_free_skb(pkt, false);
}
bus->pktgen_rcvd++;
break;
case SDPCM_TEST_ECHORSP:
if (bus->ext_loop) {
- bcm_pkt_buf_free_skb(pkt, false);
+ brcmu_pkt_buf_free_skb(pkt, false);
bus->pktgen_rcvd++;
break;
}
@@ -4777,12 +4993,12 @@ static void dhdsdio_testrcv(dhd_bus_t *bus, struct sk_buff *pkt, uint seq)
break;
}
}
- bcm_pkt_buf_free_skb(pkt, false);
+ brcmu_pkt_buf_free_skb(pkt, false);
bus->pktgen_rcvd++;
break;
case SDPCM_TEST_DISCARD:
- bcm_pkt_buf_free_skb(pkt, false);
+ brcmu_pkt_buf_free_skb(pkt, false);
bus->pktgen_rcvd++;
break;
@@ -4792,7 +5008,7 @@ static void dhdsdio_testrcv(dhd_bus_t *bus, struct sk_buff *pkt, uint seq)
DHD_INFO(("dhdsdio_testrcv: unsupported or unknown command, "
"pktlen %d seq %d" " cmd %d extra %d len %d\n",
pktlen, seq, cmd, extra, len));
- bcm_pkt_buf_free_skb(pkt, false);
+ brcmu_pkt_buf_free_skb(pkt, false);
break;
}
@@ -4837,7 +5053,7 @@ extern bool dhd_bus_watchdog(dhd_pub_t *dhdp)
if (!bus->dpc_sched) {
u8 devpend;
devpend = bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_0,
- SDIOD_CCCR_INTPEND,
+ SDIO_CCCR_INTx,
NULL);
intstatus =
devpend & (INTR_STATUS_FUNC1 |
@@ -4931,20 +5147,20 @@ extern int dhd_bus_console_in(dhd_pub_t *dhdp, unsigned char *msg, uint msglen)
dhdsdio_clkctl(bus, CLK_AVAIL, false);
/* Zero cbuf_index */
- addr = bus->console_addr + offsetof(hndrte_cons_t, cbuf_idx);
+ addr = bus->console_addr + offsetof(rte_cons_t, cbuf_idx);
val = cpu_to_le32(0);
rv = dhdsdio_membytes(bus, true, addr, (u8 *)&val, sizeof(val));
if (rv < 0)
goto done;
/* Write message into cbuf */
- addr = bus->console_addr + offsetof(hndrte_cons_t, cbuf);
+ addr = bus->console_addr + offsetof(rte_cons_t, cbuf);
rv = dhdsdio_membytes(bus, true, addr, (u8 *)msg, msglen);
if (rv < 0)
goto done;
/* Write length into vcons_in */
- addr = bus->console_addr + offsetof(hndrte_cons_t, vcons_in);
+ addr = bus->console_addr + offsetof(rte_cons_t, vcons_in);
val = cpu_to_le32(msglen);
rv = dhdsdio_membytes(bus, true, addr, (u8 *)&val, sizeof(val));
if (rv < 0)
@@ -4953,7 +5169,7 @@ extern int dhd_bus_console_in(dhd_pub_t *dhdp, unsigned char *msg, uint msglen)
/* Bump dongle by sending an empty event pkt.
* sdpcm_sendup (RX) checks for virtual console input.
*/
- pkt = bcm_pkt_buf_get_skb(4 + SDPCM_RESERVE);
+ pkt = brcmu_pkt_buf_get_skb(4 + SDPCM_RESERVE);
if ((pkt != NULL) && bus->clkstate == CLK_AVAIL)
dhdsdio_txpkt(bus, pkt, SDPCM_EVENT_CHANNEL, true);
@@ -4969,35 +5185,6 @@ done:
}
#endif /* DHD_DEBUG */
-#ifdef DHD_DEBUG
-static void dhd_dump_cis(uint fn, u8 *cis)
-{
- uint byte, tag, tdata;
- DHD_INFO(("Function %d CIS:\n", fn));
-
- for (tdata = byte = 0; byte < SBSDIO_CIS_SIZE_LIMIT; byte++) {
- if ((byte % 16) == 0)
- DHD_INFO((" "));
- DHD_INFO(("%02x ", cis[byte]));
- if ((byte % 16) == 15)
- DHD_INFO(("\n"));
- if (!tdata--) {
- tag = cis[byte];
- if (tag == 0xff)
- break;
- else if (!tag)
- tdata = 0;
- else if ((byte + 1) < SBSDIO_CIS_SIZE_LIMIT)
- tdata = cis[byte + 1] + 1;
- else
- DHD_INFO(("]"));
- }
- }
- if ((byte % 16) != 15)
- DHD_INFO(("\n"));
-}
-#endif /* DHD_DEBUG */
-
static bool dhdsdio_chipmatch(u16 chipid)
{
if (chipid == BCM4325_CHIP_ID)
@@ -5195,56 +5382,6 @@ dhdsdio_probe_attach(struct dhd_bus *bus, void *sdh, void *regsva, u16 devid)
err, DHD_INIT_CLKCTL1, clkctl));
goto fail;
}
-#ifdef DHD_DEBUG
- if (DHD_INFO_ON()) {
- uint fn, numfn;
- u8 *cis[SDIOD_MAX_IOFUNCS];
- int err = 0;
-
- numfn = bcmsdh_query_iofnum(sdh);
- ASSERT(numfn <= SDIOD_MAX_IOFUNCS);
-
- /* Make sure ALP is available before trying to read CIS */
- SPINWAIT(((clkctl = bcmsdh_cfg_read(sdh, SDIO_FUNC_1,
- SBSDIO_FUNC1_CHIPCLKCSR,
- NULL)),
- !SBSDIO_ALPAV(clkctl)), PMU_MAX_TRANSITION_DLY);
-
- /* Now request ALP be put on the bus */
- bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
- DHD_INIT_CLKCTL2, &err);
- udelay(65);
-
- for (fn = 0; fn <= numfn; fn++) {
- cis[fn] = kzalloc(SBSDIO_CIS_SIZE_LIMIT, GFP_ATOMIC);
- if (!cis[fn]) {
- DHD_INFO(("dhdsdio_probe: fn %d cis malloc "
- "failed\n", fn));
- break;
- }
-
- err = bcmsdh_cis_read(sdh, fn, cis[fn],
- SBSDIO_CIS_SIZE_LIMIT);
- if (err) {
- DHD_INFO(("dhdsdio_probe: fn %d cis read "
- "err %d\n", fn, err));
- kfree(cis[fn]);
- break;
- }
- dhd_dump_cis(fn, cis[fn]);
- }
-
- while (fn-- > 0) {
- ASSERT(cis[fn]);
- kfree(cis[fn]);
- }
-
- if (err) {
- DHD_ERROR(("dhdsdio_probe: error read/parsing CIS\n"));
- goto fail;
- }
- }
-#endif /* DHD_DEBUG */
if (dhdsdio_chip_attach(bus, regsva)) {
DHD_ERROR(("%s: dhdsdio_chip_attach failed!\n", __func__));
@@ -5284,7 +5421,7 @@ dhdsdio_probe_attach(struct dhd_bus *bus, void *sdh, void *regsva, u16 devid)
/* Set core control so an SDIO reset does a backplane reset */
OR_REG(&bus->regs->corecontrol, CC_BPRESEN);
- bcm_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
+ brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
/* Locate an appropriately-aligned portion of hdrbuf */
bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0], DHD_SDALIGN);
@@ -5353,7 +5490,7 @@ static bool dhdsdio_probe_init(dhd_bus_t *bus, void *sdh)
#endif /* SDTEST */
/* Disable F2 to clear any intermediate frame state on the dongle */
- bcmsdh_cfg_write(sdh, SDIO_FUNC_0, SDIOD_CCCR_IOEN, SDIO_FUNC_ENABLE_1,
+ bcmsdh_cfg_write(sdh, SDIO_FUNC_0, SDIO_CCCR_IOEx, SDIO_FUNC_ENABLE_1,
NULL);
bus->dhd->busstate = DHD_BUS_DOWN;
@@ -5369,27 +5506,6 @@ static bool dhdsdio_probe_init(dhd_bus_t *bus, void *sdh)
bus->idletime = (s32) dhd_idletime;
bus->idleclock = DHD_IDLE_ACTIVE;
- /* Query the SD clock speed */
- if (bcmsdh_iovar_op(sdh, "sd_divisor", NULL, 0,
- &bus->sd_divisor, sizeof(s32),
- false) != 0) {
- DHD_ERROR(("%s: fail on %s get\n", __func__, "sd_divisor"));
- bus->sd_divisor = -1;
- } else {
- DHD_INFO(("%s: Initial value for %s is %d\n",
- __func__, "sd_divisor", bus->sd_divisor));
- }
-
- /* Query the SD bus mode */
- if (bcmsdh_iovar_op(sdh, "sd_mode", NULL, 0,
- &bus->sd_mode, sizeof(s32), false) != 0) {
- DHD_ERROR(("%s: fail on %s get\n", __func__, "sd_mode"));
- bus->sd_mode = -1;
- } else {
- DHD_INFO(("%s: Initial value for %s is %d\n",
- __func__, "sd_mode", bus->sd_mode));
- }
-
/* Query the F2 block size, set roundup accordingly */
fnum = 2;
if (bcmsdh_iovar_op(sdh, "sd_blocksize", &fnum, sizeof(s32),
@@ -5543,97 +5659,6 @@ void dhd_bus_unregister(void)
bcmsdh_unregister();
}
-#ifdef BCMEMBEDIMAGE
-static int dhdsdio_download_code_array(struct dhd_bus *bus)
-{
- int bcmerror = -1;
- int offset = 0;
-
- DHD_INFO(("%s: download embedded firmware...\n", __func__));
-
- /* Download image */
- while ((offset + MEMBLOCK) < sizeof(dlarray)) {
- bcmerror =
- dhdsdio_membytes(bus, true, offset, dlarray + offset,
- MEMBLOCK);
- if (bcmerror) {
- DHD_ERROR(("%s: error %d on writing %d membytes at "
- "0x%08x\n",
- __func__, bcmerror, MEMBLOCK, offset));
- goto err;
- }
-
- offset += MEMBLOCK;
- }
-
- if (offset < sizeof(dlarray)) {
- bcmerror = dhdsdio_membytes(bus, true, offset,
- dlarray + offset,
- sizeof(dlarray) - offset);
- if (bcmerror) {
- DHD_ERROR(("%s: error %d on writing %d membytes at "
- "0x%08x\n", __func__, bcmerror,
- sizeof(dlarray) - offset, offset));
- goto err;
- }
- }
-#ifdef DHD_DEBUG
- /* Upload and compare the downloaded code */
- {
- unsigned char *ularray;
-
- ularray = kmalloc(bus->ramsize, GFP_ATOMIC);
- if (!ularray) {
- bcmerror = -ENOMEM;
- goto err;
- }
- /* Upload image to verify downloaded contents. */
- offset = 0;
- memset(ularray, 0xaa, bus->ramsize);
- while ((offset + MEMBLOCK) < sizeof(dlarray)) {
- bcmerror =
- dhdsdio_membytes(bus, false, offset,
- ularray + offset, MEMBLOCK);
- if (bcmerror) {
- DHD_ERROR(("%s: error %d on reading %d membytes"
- " at 0x%08x\n",
- __func__, bcmerror, MEMBLOCK, offset));
- goto free;
- }
-
- offset += MEMBLOCK;
- }
-
- if (offset < sizeof(dlarray)) {
- bcmerror = dhdsdio_membytes(bus, false, offset,
- ularray + offset,
- sizeof(dlarray) - offset);
- if (bcmerror) {
- DHD_ERROR(("%s: error %d on reading %d membytes at 0x%08x\n",
- __func__, bcmerror,
- sizeof(dlarray) - offset, offset));
- goto free;
- }
- }
-
- if (memcmp(dlarray, ularray, sizeof(dlarray))) {
- DHD_ERROR(("%s: Downloaded image is corrupted.\n",
- __func__));
- ASSERT(0);
- goto free;
- } else
- DHD_ERROR(("%s: Download/Upload/Compare succeeded.\n",
- __func__));
-free:
- kfree(ularray);
- }
-#endif /* DHD_DEBUG */
-
-err:
- return bcmerror;
-}
-#endif /* BCMEMBEDIMAGE */
-
static int dhdsdio_download_code_file(struct dhd_bus *bus, char *fw_path)
{
int bcmerror = -1;
@@ -5827,13 +5852,8 @@ static int _dhdsdio_download_firmware(struct dhd_bus *bus)
bool dlok = false; /* download firmware succeeded */
/* Out immediately if no image to download */
- if ((bus->fw_path == NULL) || (bus->fw_path[0] == '\0')) {
-#ifdef BCMEMBEDIMAGE
- embed = true;
-#else
+ if ((bus->fw_path == NULL) || (bus->fw_path[0] == '\0'))
return bcmerror;
-#endif
- }
/* Keep arm in reset */
if (dhdsdio_download_state(bus, true)) {
@@ -5846,27 +5866,12 @@ static int _dhdsdio_download_firmware(struct dhd_bus *bus)
if (dhdsdio_download_code_file(bus, bus->fw_path)) {
DHD_ERROR(("%s: dongle image file download failed\n",
__func__));
-#ifdef BCMEMBEDIMAGE
- embed = true;
-#else
goto err;
-#endif
} else {
embed = false;
dlok = true;
}
}
-#ifdef BCMEMBEDIMAGE
- if (embed) {
- if (dhdsdio_download_code_array(bus)) {
- DHD_ERROR(("%s: dongle image array download failed\n",
- __func__));
- goto err;
- } else {
- dlok = true;
- }
- }
-#endif
if (!dlok) {
DHD_ERROR(("%s: dongle image download failed\n", __func__));
goto err;
@@ -6213,7 +6218,7 @@ dhdsdio_chip_attach(struct dhd_bus *bus, void *regs)
CORE_CC_REG(ci->cccorebase, gpiopulldown), 4, 0);
/* Disable F2 to clear any intermediate frame state on the dongle */
- bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIOD_CCCR_IOEN,
+ bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIO_CCCR_IOEx,
SDIO_FUNC_ENABLE_1, NULL);
/* WAR: cmd52 backplane read so core HW will drop ALPReq */
@@ -6346,7 +6351,7 @@ dhdsdio_sdiod_drive_strength_init(struct dhd_bus *bus, u32 drivestrength) {
default:
DHD_ERROR(("No SDIO Drive strength init"
"done for chip %s rev %d pmurev %d\n",
- bcm_chipname(bus->ci->chip, chn, 8),
+ brcmu_chipname(bus->ci->chip, chn, 8),
bus->ci->chiprev, bus->ci->pmurev));
break;
}
diff --git a/drivers/staging/brcm80211/brcmfmac/dhdioctl.h b/drivers/staging/brcm80211/brcmfmac/dhdioctl.h
deleted file mode 100644
index f0ba53558ccdb..0000000000000
--- a/drivers/staging/brcm80211/brcmfmac/dhdioctl.h
+++ /dev/null
@@ -1,100 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _dhdioctl_h_
-#define _dhdioctl_h_
-
-/* Linux network driver ioctl encoding */
-typedef struct dhd_ioctl {
- uint cmd; /* common ioctl definition */
- void *buf; /* pointer to user buffer */
- uint len; /* length of user buffer */
- bool set; /* get or set request (optional) */
- uint used; /* bytes read or written (optional) */
- uint needed; /* bytes needed (optional) */
- uint driver; /* to identify target driver */
-} dhd_ioctl_t;
-
-/* per-driver magic numbers */
-#define DHD_IOCTL_MAGIC 0x00444944
-
-/* bump this number if you change the ioctl interface */
-#define DHD_IOCTL_VERSION 1
-
-#define DHD_IOCTL_MAXLEN 8192 /* max length ioctl buffer required */
-#define DHD_IOCTL_SMLEN 256 /* "small" length ioctl buffer required */
-
-/* common ioctl definitions */
-#define DHD_GET_MAGIC 0
-#define DHD_GET_VERSION 1
-#define DHD_GET_VAR 2
-#define DHD_SET_VAR 3
-
-/* message levels */
-#define DHD_ERROR_VAL 0x0001
-#define DHD_TRACE_VAL 0x0002
-#define DHD_INFO_VAL 0x0004
-#define DHD_DATA_VAL 0x0008
-#define DHD_CTL_VAL 0x0010
-#define DHD_TIMER_VAL 0x0020
-#define DHD_HDRS_VAL 0x0040
-#define DHD_BYTES_VAL 0x0080
-#define DHD_INTR_VAL 0x0100
-#define DHD_LOG_VAL 0x0200
-#define DHD_GLOM_VAL 0x0400
-#define DHD_EVENT_VAL 0x0800
-#define DHD_BTA_VAL 0x1000
-#define DHD_ISCAN_VAL 0x2000
-
-#ifdef SDTEST
-/* For pktgen iovar */
-typedef struct dhd_pktgen {
- uint version; /* To allow structure change tracking */
- uint freq; /* Max ticks between tx/rx attempts */
- uint count; /* Test packets to send/rcv each attempt */
- uint print; /* Print counts every <print> attempts */
- uint total; /* Total packets (or bursts) */
- uint minlen; /* Minimum length of packets to send */
- uint maxlen; /* Maximum length of packets to send */
- uint numsent; /* Count of test packets sent */
- uint numrcvd; /* Count of test packets received */
- uint numfail; /* Count of test send failures */
- uint mode; /* Test mode (type of test packets) */
- uint stop; /* Stop after this many tx failures */
-} dhd_pktgen_t;
-
-/* Version in case structure changes */
-#define DHD_PKTGEN_VERSION 2
-
-/* Type of test packets to use */
-#define DHD_PKTGEN_ECHO 1 /* Send echo requests */
-#define DHD_PKTGEN_SEND 2 /* Send discard packets */
-#define DHD_PKTGEN_RXBURST 3 /* Request dongle send N packets */
-#define DHD_PKTGEN_RECV 4 /* Continuous rx from continuous
- tx dongle */
-#endif /* SDTEST */
-
-/* Enter idle immediately (no timeout) */
-#define DHD_IDLE_IMMEDIATE (-1)
-
-/* Values for idleclock iovar: other values are the sd_divisor to use
- when idle */
-#define DHD_IDLE_ACTIVE 0 /* Do not request any SD clock change
- when idle */
-#define DHD_IDLE_STOP (-1) /* Request SD clock be stopped
- (and use SD1 mode) */
-
-#endif /* _dhdioctl_h_ */
diff --git a/drivers/staging/brcm80211/brcmfmac/hndrte_armtrap.h b/drivers/staging/brcm80211/brcmfmac/hndrte_armtrap.h
deleted file mode 100644
index 28f092c9e027a..0000000000000
--- a/drivers/staging/brcm80211/brcmfmac/hndrte_armtrap.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _hndrte_armtrap_h
-#define _hndrte_armtrap_h
-
-/* ARM trap handling */
-
-/* Trap types defined by ARM (see arminc.h) */
-
-/* Trap locations in lo memory */
-#define TRAP_STRIDE 4
-#define FIRST_TRAP TR_RST
-#define LAST_TRAP (TR_FIQ * TRAP_STRIDE)
-
-#if defined(__ARM_ARCH_4T__)
-#define MAX_TRAP_TYPE (TR_FIQ + 1)
-#elif defined(__ARM_ARCH_7M__)
-#define MAX_TRAP_TYPE (TR_ISR + ARMCM3_NUMINTS)
-#endif /* __ARM_ARCH_7M__ */
-
-/* The trap structure is defined here as offsets for assembly */
-#define TR_TYPE 0x00
-#define TR_EPC 0x04
-#define TR_CPSR 0x08
-#define TR_SPSR 0x0c
-#define TR_REGS 0x10
-#define TR_REG(n) (TR_REGS + (n) * 4)
-#define TR_SP TR_REG(13)
-#define TR_LR TR_REG(14)
-#define TR_PC TR_REG(15)
-
-#define TRAP_T_SIZE 80
-
-#ifndef _LANGUAGE_ASSEMBLY
-
-typedef struct _trap_struct {
- u32 type;
- u32 epc;
- u32 cpsr;
- u32 spsr;
- u32 r0;
- u32 r1;
- u32 r2;
- u32 r3;
- u32 r4;
- u32 r5;
- u32 r6;
- u32 r7;
- u32 r8;
- u32 r9;
- u32 r10;
- u32 r11;
- u32 r12;
- u32 r13;
- u32 r14;
- u32 pc;
-} trap_t;
-
-#endif /* !_LANGUAGE_ASSEMBLY */
-
-#endif /* _hndrte_armtrap_h */
diff --git a/drivers/staging/brcm80211/brcmfmac/hndrte_cons.h b/drivers/staging/brcm80211/brcmfmac/hndrte_cons.h
deleted file mode 100644
index 4df3eecaa83b4..0000000000000
--- a/drivers/staging/brcm80211/brcmfmac/hndrte_cons.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-#ifndef _hndrte_cons_h
-#define _hndrte_cons_h
-
-#define CBUF_LEN (128)
-
-#define LOG_BUF_LEN 1024
-
-typedef struct {
- u32 buf; /* Can't be pointer on (64-bit) hosts */
- uint buf_size;
- uint idx;
- char *_buf_compat; /* Redundant pointer for backward compat. */
-} hndrte_log_t;
-
-typedef struct {
- /* Virtual UART
- * When there is no UART (e.g. Quickturn),
- * the host should write a complete
- * input line directly into cbuf and then write
- * the length into vcons_in.
- * This may also be used when there is a real UART
- * (at risk of conflicting with
- * the real UART). vcons_out is currently unused.
- */
- volatile uint vcons_in;
- volatile uint vcons_out;
-
- /* Output (logging) buffer
- * Console output is written to a ring buffer log_buf at index log_idx.
- * The host may read the output when it sees log_idx advance.
- * Output will be lost if the output wraps around faster than the host
- * polls.
- */
- hndrte_log_t log;
-
- /* Console input line buffer
- * Characters are read one at a time into cbuf
- * until <CR> is received, then
- * the buffer is processed as a command line.
- * Also used for virtual UART.
- */
- uint cbuf_idx;
- char cbuf[CBUF_LEN];
-} hndrte_cons_t;
-
-#endif /* _hndrte_cons_h */
-
diff --git a/drivers/staging/brcm80211/brcmfmac/msgtrace.h b/drivers/staging/brcm80211/brcmfmac/msgtrace.h
deleted file mode 100644
index d654671a5a30e..0000000000000
--- a/drivers/staging/brcm80211/brcmfmac/msgtrace.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _MSGTRACE_H
-#define _MSGTRACE_H
-
-#define MSGTRACE_VERSION 1
-
-/* Message trace header */
-typedef struct msgtrace_hdr {
- u8 version;
- u8 spare;
- u16 len; /* Len of the trace */
- u32 seqnum; /* Sequence number of message. Useful
- * if the messsage has been lost
- * because of DMA error or a bus reset
- * (ex: SDIO Func2)
- */
- u32 discarded_bytes; /* Number of discarded bytes because of
- trace overflow */
- u32 discarded_printf; /* Number of discarded printf
- because of trace overflow */
-} __attribute__((packed)) msgtrace_hdr_t;
-
-#define MSGTRACE_HDRLEN sizeof(msgtrace_hdr_t)
-
-/* The hbus driver generates traces when sending a trace message.
- * This causes endless traces.
- * This flag must be set to true in any hbus traces.
- * The flag is reset in the function msgtrace_put.
- * This prevents endless traces but generates hasardous
- * lost of traces only in bus device code.
- * It is recommendat to set this flag in macro SD_TRACE
- * but not in SD_ERROR for avoiding missing
- * hbus error traces. hbus error trace should not generates endless traces.
- */
-extern bool msgtrace_hbus_trace;
-
-typedef void (*msgtrace_func_send_t) (void *hdl1, void *hdl2, u8 *hdr,
- u16 hdrlen, u8 *buf,
- u16 buflen);
-
-extern void msgtrace_sent(void);
-extern void msgtrace_put(char *buf, int count);
-extern void msgtrace_init(void *hdl1, void *hdl2,
- msgtrace_func_send_t func_send);
-
-#endif /* _MSGTRACE_H */
diff --git a/drivers/staging/brcm80211/include/pcicfg.h b/drivers/staging/brcm80211/brcmfmac/pcicfg.h
index d0c617a63c4ff..325844932811d 100644
--- a/drivers/staging/brcm80211/include/pcicfg.h
+++ b/drivers/staging/brcm80211/brcmfmac/pcicfg.h
@@ -22,7 +22,7 @@
/* PCI configuration address space size */
#define PCI_SZPCR 256
-/* Everything below is BRCM HND proprietary */
+/* Everything below is Broadcom specific */
/* Brcm PCI configuration registers */
#define PCI_BAR0_WIN 0x80 /* backplane address space accessed by BAR0 */
diff --git a/drivers/staging/brcm80211/brcmfmac/sbsdio.h b/drivers/staging/brcm80211/brcmfmac/sbsdio.h
new file mode 100644
index 0000000000000..86b62b81ccaac
--- /dev/null
+++ b/drivers/staging/brcm80211/brcmfmac/sbsdio.h
@@ -0,0 +1,373 @@
+/*
+ * Copyright (c) 2010 Broadcom Corporation
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _SBSDIO_H
+#define _SBSDIO_H
+
+#define SBSDIO_NUM_FUNCTION 3 /* as of sdiod rev 0, supports 3 functions */
+
+/* function 1 miscellaneous registers */
+#define SBSDIO_SPROM_CS 0x10000 /* sprom command and status */
+#define SBSDIO_SPROM_INFO 0x10001 /* sprom info register */
+#define SBSDIO_SPROM_DATA_LOW 0x10002 /* sprom indirect access data byte 0 */
+#define SBSDIO_SPROM_DATA_HIGH 0x10003 /* sprom indirect access data byte 1 */
+#define SBSDIO_SPROM_ADDR_LOW 0x10004 /* sprom indirect access addr byte 0 */
+#define SBSDIO_SPROM_ADDR_HIGH 0x10005 /* sprom indirect access addr byte 0 */
+#define SBSDIO_CHIP_CTRL_DATA 0x10006 /* xtal_pu (gpio) output */
+#define SBSDIO_CHIP_CTRL_EN 0x10007 /* xtal_pu (gpio) enable */
+#define SBSDIO_WATERMARK 0x10008 /* rev < 7, watermark for sdio device */
+#define SBSDIO_DEVICE_CTL 0x10009 /* control busy signal generation */
+
+/* registers introduced in rev 8, some content (mask/bits) defs in sbsdpcmdev.h */
+#define SBSDIO_FUNC1_SBADDRLOW 0x1000A /* SB Address Window Low (b15) */
+#define SBSDIO_FUNC1_SBADDRMID 0x1000B /* SB Address Window Mid (b23:b16) */
+#define SBSDIO_FUNC1_SBADDRHIGH 0x1000C /* SB Address Window High (b31:b24) */
+#define SBSDIO_FUNC1_FRAMECTRL 0x1000D /* Frame Control (frame term/abort) */
+#define SBSDIO_FUNC1_CHIPCLKCSR 0x1000E /* ChipClockCSR (ALP/HT ctl/status) */
+#define SBSDIO_FUNC1_SDIOPULLUP 0x1000F /* SdioPullUp (on cmd, d0-d2) */
+#define SBSDIO_FUNC1_WFRAMEBCLO 0x10019 /* Write Frame Byte Count Low */
+#define SBSDIO_FUNC1_WFRAMEBCHI 0x1001A /* Write Frame Byte Count High */
+#define SBSDIO_FUNC1_RFRAMEBCLO 0x1001B /* Read Frame Byte Count Low */
+#define SBSDIO_FUNC1_RFRAMEBCHI 0x1001C /* Read Frame Byte Count High */
+
+#define SBSDIO_FUNC1_MISC_REG_START 0x10000 /* f1 misc register start */
+#define SBSDIO_FUNC1_MISC_REG_LIMIT 0x1001C /* f1 misc register end */
+
+/* SBSDIO_SPROM_CS */
+#define SBSDIO_SPROM_IDLE 0
+#define SBSDIO_SPROM_WRITE 1
+#define SBSDIO_SPROM_READ 2
+#define SBSDIO_SPROM_WEN 4
+#define SBSDIO_SPROM_WDS 7
+#define SBSDIO_SPROM_DONE 8
+
+/* SBSDIO_SPROM_INFO */
+#define SROM_SZ_MASK 0x03 /* SROM size, 1: 4k, 2: 16k */
+#define SROM_BLANK 0x04 /* depreciated in corerev 6 */
+#define SROM_OTP 0x80 /* OTP present */
+
+/* SBSDIO_CHIP_CTRL */
+#define SBSDIO_CHIP_CTRL_XTAL 0x01 /* or'd with onchip xtal_pu,
+ * 1: power on oscillator
+ * (for 4318 only)
+ */
+/* SBSDIO_WATERMARK */
+#define SBSDIO_WATERMARK_MASK 0x7f /* number of words - 1 for sd device
+ * to wait before sending data to host
+ */
+
+/* SBSDIO_DEVICE_CTL */
+#define SBSDIO_DEVCTL_SETBUSY 0x01 /* 1: device will assert busy signal when
+ * receiving CMD53
+ */
+#define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02 /* 1: assertion of sdio interrupt is
+ * synchronous to the sdio clock
+ */
+#define SBSDIO_DEVCTL_CA_INT_ONLY 0x04 /* 1: mask all interrupts to host
+ * except the chipActive (rev 8)
+ */
+#define SBSDIO_DEVCTL_PADS_ISO 0x08 /* 1: isolate internal sdio signals, put
+ * external pads in tri-state; requires
+ * sdio bus power cycle to clear (rev 9)
+ */
+#define SBSDIO_DEVCTL_SB_RST_CTL 0x30 /* Force SD->SB reset mapping (rev 11) */
+#define SBSDIO_DEVCTL_RST_CORECTL 0x00 /* Determined by CoreControl bit */
+#define SBSDIO_DEVCTL_RST_BPRESET 0x10 /* Force backplane reset */
+#define SBSDIO_DEVCTL_RST_NOBPRESET 0x20 /* Force no backplane reset */
+
+/* SBSDIO_FUNC1_CHIPCLKCSR */
+#define SBSDIO_FORCE_ALP 0x01 /* Force ALP request to backplane */
+#define SBSDIO_FORCE_HT 0x02 /* Force HT request to backplane */
+#define SBSDIO_FORCE_ILP 0x04 /* Force ILP request to backplane */
+#define SBSDIO_ALP_AVAIL_REQ 0x08 /* Make ALP ready (power up xtal) */
+#define SBSDIO_HT_AVAIL_REQ 0x10 /* Make HT ready (power up PLL) */
+#define SBSDIO_FORCE_HW_CLKREQ_OFF 0x20 /* Squelch clock requests from HW */
+#define SBSDIO_ALP_AVAIL 0x40 /* Status: ALP is ready */
+#define SBSDIO_HT_AVAIL 0x80 /* Status: HT is ready */
+/* In rev8, actual avail bits followed original docs */
+#define SBSDIO_Rev8_HT_AVAIL 0x40
+#define SBSDIO_Rev8_ALP_AVAIL 0x80
+
+#define SBSDIO_AVBITS (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL)
+#define SBSDIO_ALPAV(regval) ((regval) & SBSDIO_AVBITS)
+#define SBSDIO_HTAV(regval) (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS)
+#define SBSDIO_ALPONLY(regval) (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval))
+#define SBSDIO_CLKAV(regval, alponly) (SBSDIO_ALPAV(regval) && \
+ (alponly ? 1 : SBSDIO_HTAV(regval)))
+
+/* SBSDIO_FUNC1_SDIOPULLUP */
+#define SBSDIO_PULLUP_D0 0x01 /* Enable D0/MISO pullup */
+#define SBSDIO_PULLUP_D1 0x02 /* Enable D1/INT# pullup */
+#define SBSDIO_PULLUP_D2 0x04 /* Enable D2 pullup */
+#define SBSDIO_PULLUP_CMD 0x08 /* Enable CMD/MOSI pullup */
+#define SBSDIO_PULLUP_ALL 0x0f /* All valid bits */
+
+/* function 1 OCP space */
+#define SBSDIO_SB_OFT_ADDR_MASK 0x07FFF /* sb offset addr is <= 15 bits, 32k */
+#define SBSDIO_SB_OFT_ADDR_LIMIT 0x08000
+#define SBSDIO_SB_ACCESS_2_4B_FLAG 0x08000 /* with b15, maps to 32-bit SB access */
+
+/* some duplication with sbsdpcmdev.h here */
+/* valid bits in SBSDIO_FUNC1_SBADDRxxx regs */
+#define SBSDIO_SBADDRLOW_MASK 0x80 /* Valid bits in SBADDRLOW */
+#define SBSDIO_SBADDRMID_MASK 0xff /* Valid bits in SBADDRMID */
+#define SBSDIO_SBADDRHIGH_MASK 0xffU /* Valid bits in SBADDRHIGH */
+#define SBSDIO_SBWINDOW_MASK 0xffff8000 /* Address bits from SBADDR regs */
+
+/* direct(mapped) cis space */
+#define SBSDIO_CIS_BASE_COMMON 0x1000 /* MAPPED common CIS address */
+#define SBSDIO_CIS_SIZE_LIMIT 0x200 /* maximum bytes in one CIS */
+#define SBSDIO_OTP_CIS_SIZE_LIMIT 0x078 /* maximum bytes OTP CIS */
+
+#define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF /* cis offset addr is < 17 bits */
+
+#define SBSDIO_CIS_MANFID_TUPLE_LEN 6 /* manfid tuple length, include tuple,
+ * link bytes
+ */
+
+/* indirect cis access (in sprom) */
+#define SBSDIO_SPROM_CIS_OFFSET 0x8 /* 8 control bytes first, CIS starts from
+ * 8th byte
+ */
+
+#define SBSDIO_BYTEMODE_DATALEN_MAX 64 /* sdio byte mode: maximum length of one
+ * data command
+ */
+
+#define SBSDIO_CORE_ADDR_MASK 0x1FFFF /* sdio core function one address mask */
+
+/* corecontrol */
+#define CC_CISRDY (1 << 0) /* CIS Ready */
+#define CC_BPRESEN (1 << 1) /* CCCR RES signal */
+#define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
+#define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
+#define CC_XMTDATAAVAIL_MODE (1 << 4)
+#define CC_XMTDATAAVAIL_CTRL (1 << 5)
+
+/* corestatus */
+#define CS_PCMCIAMODE (1 << 0) /* Device Mode; 0=SDIO, 1=PCMCIA */
+#define CS_SMARTDEV (1 << 1) /* 1=smartDev enabled */
+#define CS_F2ENABLED (1 << 2) /* 1=host has enabled the device */
+
+#define PCMCIA_MES_PA_MASK 0x7fff /* PCMCIA Message Portal Address Mask */
+#define PCMCIA_MES_PM_MASK 0x7fff /* PCMCIA Message Portal Mask Mask */
+#define PCMCIA_WFBC_MASK 0xffff /* PCMCIA Write Frame Byte Count Mask */
+#define PCMCIA_UT_MASK 0x07ff /* PCMCIA Underflow Timer Mask */
+
+/* intstatus */
+#define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
+#define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
+#define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
+#define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
+#define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
+#define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
+#define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
+#define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
+#define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
+#define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
+#define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
+#define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
+#define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
+#define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
+#define I_PC (1 << 10) /* descriptor error */
+#define I_PD (1 << 11) /* data error */
+#define I_DE (1 << 12) /* Descriptor protocol Error */
+#define I_RU (1 << 13) /* Receive descriptor Underflow */
+#define I_RO (1 << 14) /* Receive fifo Overflow */
+#define I_XU (1 << 15) /* Transmit fifo Underflow */
+#define I_RI (1 << 16) /* Receive Interrupt */
+#define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
+#define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
+#define I_XI (1 << 24) /* Transmit Interrupt */
+#define I_RF_TERM (1 << 25) /* Read Frame Terminate */
+#define I_WF_TERM (1 << 26) /* Write Frame Terminate */
+#define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
+#define I_SBINT (1 << 28) /* sbintstatus Interrupt */
+#define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
+#define I_SRESET (1 << 30) /* CCCR RES interrupt */
+#define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
+#define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
+#define I_DMA (I_RI | I_XI | I_ERRORS)
+
+/* sbintstatus */
+#define I_SB_SERR (1 << 8) /* Backplane SError (write) */
+#define I_SB_RESPERR (1 << 9) /* Backplane Response Error (read) */
+#define I_SB_SPROMERR (1 << 10) /* Error accessing the sprom */
+
+/* sdioaccess */
+#define SDA_DATA_MASK 0x000000ff /* Read/Write Data Mask */
+#define SDA_ADDR_MASK 0x000fff00 /* Read/Write Address Mask */
+#define SDA_ADDR_SHIFT 8 /* Read/Write Address Shift */
+#define SDA_WRITE 0x01000000 /* Write bit */
+#define SDA_READ 0x00000000 /* Write bit cleared for Read */
+#define SDA_BUSY 0x80000000 /* Busy bit */
+
+/* sdioaccess-accessible register address spaces */
+#define SDA_CCCR_SPACE 0x000 /* CCCR register space */
+#define SDA_F1_FBR_SPACE 0x100 /* F1 FBR register space */
+#define SDA_F2_FBR_SPACE 0x200 /* F2 FBR register space */
+#define SDA_F1_REG_SPACE 0x300 /* F1 core-specific register space */
+
+/* SDA_F1_REG_SPACE sdioaccess-accessible F1 reg space register offsets */
+#define SDA_CHIPCONTROLDATA 0x006 /* ChipControlData */
+#define SDA_CHIPCONTROLENAB 0x007 /* ChipControlEnable */
+#define SDA_F2WATERMARK 0x008 /* Function 2 Watermark */
+#define SDA_DEVICECONTROL 0x009 /* DeviceControl */
+#define SDA_SBADDRLOW 0x00a /* SbAddrLow */
+#define SDA_SBADDRMID 0x00b /* SbAddrMid */
+#define SDA_SBADDRHIGH 0x00c /* SbAddrHigh */
+#define SDA_FRAMECTRL 0x00d /* FrameCtrl */
+#define SDA_CHIPCLOCKCSR 0x00e /* ChipClockCSR */
+#define SDA_SDIOPULLUP 0x00f /* SdioPullUp */
+#define SDA_SDIOWRFRAMEBCLOW 0x019 /* SdioWrFrameBCLow */
+#define SDA_SDIOWRFRAMEBCHIGH 0x01a /* SdioWrFrameBCHigh */
+#define SDA_SDIORDFRAMEBCLOW 0x01b /* SdioRdFrameBCLow */
+#define SDA_SDIORDFRAMEBCHIGH 0x01c /* SdioRdFrameBCHigh */
+
+/* SDA_F2WATERMARK */
+#define SDA_F2WATERMARK_MASK 0x7f /* F2Watermark Mask */
+
+/* SDA_SBADDRLOW */
+#define SDA_SBADDRLOW_MASK 0x80 /* SbAddrLow Mask */
+
+/* SDA_SBADDRMID */
+#define SDA_SBADDRMID_MASK 0xff /* SbAddrMid Mask */
+
+/* SDA_SBADDRHIGH */
+#define SDA_SBADDRHIGH_MASK 0xff /* SbAddrHigh Mask */
+
+/* SDA_FRAMECTRL */
+#define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
+#define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
+#define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
+#define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
+
+/* pcmciaframectrl */
+#define PFC_RF_TERM (1 << 0) /* Read Frame Terminate */
+#define PFC_WF_TERM (1 << 1) /* Write Frame Terminate */
+
+/* intrcvlazy */
+#define IRL_TO_MASK 0x00ffffff /* timeout */
+#define IRL_FC_MASK 0xff000000 /* frame count */
+#define IRL_FC_SHIFT 24 /* frame count */
+
+/* rx header flags */
+#define RXF_CRC 0x0001 /* CRC error detected */
+#define RXF_WOOS 0x0002 /* write frame out of sync */
+#define RXF_WF_TERM 0x0004 /* write frame terminated */
+#define RXF_ABORT 0x0008 /* write frame aborted */
+#define RXF_DISCARD (RXF_CRC | RXF_WOOS | RXF_WF_TERM | RXF_ABORT)
+
+/* HW frame tag */
+#define SDPCM_FRAMETAG_LEN 4 /* 2 bytes len, 2 bytes check val */
+
+/* cpp contortions to concatenate w/arg prescan */
+#ifndef PAD
+#define _PADLINE(line) pad ## line
+#define _XSTR(line) _PADLINE(line)
+#define PAD _XSTR(__LINE__)
+#endif /* PAD */
+
+/* core registers */
+struct sdpcmd_regs {
+ u32 corecontrol; /* 0x00, rev8 */
+ u32 corestatus; /* rev8 */
+ u32 PAD[1];
+ u32 biststatus; /* rev8 */
+
+ /* PCMCIA access */
+ u16 pcmciamesportaladdr; /* 0x010, rev8 */
+ u16 PAD[1];
+ u16 pcmciamesportalmask; /* rev8 */
+ u16 PAD[1];
+ u16 pcmciawrframebc; /* rev8 */
+ u16 PAD[1];
+ u16 pcmciaunderflowtimer; /* rev8 */
+ u16 PAD[1];
+
+ /* interrupt */
+ u32 intstatus; /* 0x020, rev8 */
+ u32 hostintmask; /* rev8 */
+ u32 intmask; /* rev8 */
+ u32 sbintstatus; /* rev8 */
+ u32 sbintmask; /* rev8 */
+ u32 funcintmask; /* rev4 */
+ u32 PAD[2];
+ u32 tosbmailbox; /* 0x040, rev8 */
+ u32 tohostmailbox; /* rev8 */
+ u32 tosbmailboxdata; /* rev8 */
+ u32 tohostmailboxdata; /* rev8 */
+
+ /* synchronized access to registers in SDIO clock domain */
+ u32 sdioaccess; /* 0x050, rev8 */
+ u32 PAD[3];
+
+ /* PCMCIA frame control */
+ u8 pcmciaframectrl; /* 0x060, rev8 */
+ u8 PAD[3];
+ u8 pcmciawatermark; /* rev8 */
+ u8 PAD[155];
+
+ /* interrupt batching control */
+ u32 intrcvlazy; /* 0x100, rev8 */
+ u32 PAD[3];
+
+ /* counters */
+ u32 cmd52rd; /* 0x110, rev8 */
+ u32 cmd52wr; /* rev8 */
+ u32 cmd53rd; /* rev8 */
+ u32 cmd53wr; /* rev8 */
+ u32 abort; /* rev8 */
+ u32 datacrcerror; /* rev8 */
+ u32 rdoutofsync; /* rev8 */
+ u32 wroutofsync; /* rev8 */
+ u32 writebusy; /* rev8 */
+ u32 readwait; /* rev8 */
+ u32 readterm; /* rev8 */
+ u32 writeterm; /* rev8 */
+ u32 PAD[40];
+ u32 clockctlstatus; /* rev8 */
+ u32 PAD[7];
+
+ u32 PAD[128]; /* DMA engines */
+
+ /* SDIO/PCMCIA CIS region */
+ char cis[512]; /* 0x400-0x5ff, rev6 */
+
+ /* PCMCIA function control registers */
+ char pcmciafcr[256]; /* 0x600-6ff, rev6 */
+ u16 PAD[55];
+
+ /* PCMCIA backplane access */
+ u16 backplanecsr; /* 0x76E, rev6 */
+ u16 backplaneaddr0; /* rev6 */
+ u16 backplaneaddr1; /* rev6 */
+ u16 backplaneaddr2; /* rev6 */
+ u16 backplaneaddr3; /* rev6 */
+ u16 backplanedata0; /* rev6 */
+ u16 backplanedata1; /* rev6 */
+ u16 backplanedata2; /* rev6 */
+ u16 backplanedata3; /* rev6 */
+ u16 PAD[31];
+
+ /* sprom "size" & "blank" info */
+ u16 spromstatus; /* 0x7BE, rev2 */
+ u32 PAD[464];
+
+ u16 PAD[0x80];
+};
+
+#endif /* _SBSDIO_H */
diff --git a/drivers/staging/brcm80211/include/bcmsdh.h b/drivers/staging/brcm80211/brcmfmac/sdio_host.h
index 3b57dc13b1ded..db19533a5c02e 100644
--- a/drivers/staging/brcm80211/include/bcmsdh.h
+++ b/drivers/staging/brcm80211/brcmfmac/sdio_host.h
@@ -14,8 +14,8 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#ifndef _bcmsdh_h_
-#define _bcmsdh_h_
+#ifndef _BRCM_SDH_H_
+#define _BRCM_SDH_H_
#include <linux/skbuff.h>
#define BCMSDH_ERROR_VAL 0x0001 /* Error */
@@ -38,6 +38,27 @@ extern const uint bcmsdh_msglevel;
#define BCMSDH_INFO(x)
#endif /* BCMDBG */
+#define SDIO_FUNC_0 0
+#define SDIO_FUNC_1 1
+#define SDIO_FUNC_2 2
+
+#define SDIOD_FBR_SIZE 0x100
+
+/* io_en */
+#define SDIO_FUNC_ENABLE_1 0x02
+#define SDIO_FUNC_ENABLE_2 0x04
+
+/* io_rdys */
+#define SDIO_FUNC_READY_1 0x02
+#define SDIO_FUNC_READY_2 0x04
+
+/* intr_status */
+#define INTR_STATUS_FUNC1 0x2
+#define INTR_STATUS_FUNC2 0x4
+
+/* Maximum number of I/O funcs */
+#define SDIOD_MAX_IOFUNCS 7
+
/* forward declarations */
typedef struct bcmsdh_info bcmsdh_info_t;
typedef void (*bcmsdh_cb_fn_t) (void *);
@@ -202,4 +223,4 @@ extern u32 bcmsdh_cur_sbwad(void *sdh);
/* Function to pass chipid and rev to lower layers for controlling pr's */
extern void bcmsdh_chipinfo(void *sdh, u32 chip, u32 chiprev);
-#endif /* _bcmsdh_h_ */
+#endif /* _BRCM_SDH_H_ */
diff --git a/drivers/staging/brcm80211/brcmfmac/sdioh.h b/drivers/staging/brcm80211/brcmfmac/sdioh.h
deleted file mode 100644
index f96aaf9cec747..0000000000000
--- a/drivers/staging/brcm80211/brcmfmac/sdioh.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _SDIOH_H
-#define _SDIOH_H
-
-#define SD_SysAddr 0x000
-#define SD_BlockSize 0x004
-#define SD_BlockCount 0x006
-#define SD_Arg0 0x008
-#define SD_Arg1 0x00A
-#define SD_TransferMode 0x00C
-#define SD_Command 0x00E
-#define SD_Response0 0x010
-#define SD_Response1 0x012
-#define SD_Response2 0x014
-#define SD_Response3 0x016
-#define SD_Response4 0x018
-#define SD_Response5 0x01A
-#define SD_Response6 0x01C
-#define SD_Response7 0x01E
-#define SD_BufferDataPort0 0x020
-#define SD_BufferDataPort1 0x022
-#define SD_PresentState 0x024
-#define SD_HostCntrl 0x028
-#define SD_PwrCntrl 0x029
-#define SD_BlockGapCntrl 0x02A
-#define SD_WakeupCntrl 0x02B
-#define SD_ClockCntrl 0x02C
-#define SD_TimeoutCntrl 0x02E
-#define SD_SoftwareReset 0x02F
-#define SD_IntrStatus 0x030
-#define SD_ErrorIntrStatus 0x032
-#define SD_IntrStatusEnable 0x034
-#define SD_ErrorIntrStatusEnable 0x036
-#define SD_IntrSignalEnable 0x038
-#define SD_ErrorIntrSignalEnable 0x03A
-#define SD_CMD12ErrorStatus 0x03C
-#define SD_Capabilities 0x040
-#define SD_Capabilities_Reserved 0x044
-#define SD_MaxCurCap 0x048
-#define SD_MaxCurCap_Reserved 0x04C
-#define SD_ADMA_SysAddr 0x58
-#define SD_SlotInterruptStatus 0x0FC
-#define SD_HostControllerVersion 0x0FE
-
-/* SD specific registers in PCI config space */
-#define SD_SlotInfo 0x40
-
-#endif /* _SDIOH_H */
diff --git a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c
index 1827b0bf9201e..0a7a9b2944fc8 100644
--- a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c
+++ b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c
@@ -16,15 +16,16 @@
#include <linux/kernel.h>
#include <linux/if_arp.h>
+#include <linux/sched.h>
-#include <bcmutils.h>
+#include <brcmu_utils.h>
+#include <defs.h>
+#include <brcmu_wifi.h>
#include <asm/uaccess.h>
#include <dngl_stats.h>
#include <dhd.h>
-#include <dhdioctl.h>
-#include <wlioctl.h>
#include <linux/kthread.h>
#include <linux/netdevice.h>
@@ -45,7 +46,7 @@ static struct sdio_func *cfg80211_sdio_func;
static struct wl_dev *wl_cfg80211_dev;
static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255};
-u32 wl_dbg_level = WL_DBG_ERR;
+u32 brcmf_dbg_level = WL_DBG_ERR;
#define WL_4329_FW_FILE "brcm/bcm4329-fullmac-4.bin"
#define WL_4329_NVRAM_FILE "brcm/bcm4329-fullmac-4.txt"
@@ -643,7 +644,7 @@ wl_dev_iovar_setbuf(struct net_device *dev, s8 * iovar, void *param,
{
s32 iolen;
- iolen = bcm_mkiovar(iovar, param, paramlen, bufptr, buflen);
+ iolen = brcmu_mkiovar(iovar, param, paramlen, bufptr, buflen);
BUG_ON(!iolen);
return wl_dev_ioctl(dev, WLC_SET_VAR, bufptr, iolen);
@@ -655,7 +656,7 @@ wl_dev_iovar_getbuf(struct net_device *dev, s8 * iovar, void *param,
{
s32 iolen;
- iolen = bcm_mkiovar(iovar, param, paramlen, bufptr, buflen);
+ iolen = brcmu_mkiovar(iovar, param, paramlen, bufptr, buflen);
BUG_ON(!iolen);
return wl_dev_ioctl(dev, WLC_GET_VAR, bufptr, buflen);
@@ -843,7 +844,8 @@ static s32 wl_dev_intvar_set(struct net_device *dev, s8 *name, s32 val)
s32 err = 0;
val = cpu_to_le32(val);
- len = bcm_mkiovar(name, (char *)(&val), sizeof(val), buf, sizeof(buf));
+ len = brcmu_mkiovar(name, (char *)(&val), sizeof(val), buf,
+ sizeof(buf));
BUG_ON(!len);
err = wl_dev_ioctl(dev, WLC_SET_VAR, buf, len);
@@ -865,7 +867,7 @@ wl_dev_intvar_get(struct net_device *dev, s8 *name, s32 *retval)
s32 err = 0;
len =
- bcm_mkiovar(name, (char *)(&data_null), 0, (char *)(&var),
+ brcmu_mkiovar(name, (char *)(&data_null), 0, (char *)(&var),
sizeof(var.buf));
BUG_ON(!len);
err = wl_dev_ioctl(dev, WLC_GET_VAR, &var, len);
@@ -1518,7 +1520,7 @@ wl_cfg80211_set_tx_power(struct wiphy *wiphy,
else
txpwrmw = (u16) dbm;
err = wl_dev_intvar_set(ndev, "qtxpower",
- (s32) (bcm_mw_to_qdbm(txpwrmw)));
+ (s32) (brcmu_mw_to_qdbm(txpwrmw)));
if (unlikely(err))
WL_ERR("qtxpower error (%d)\n", err);
wl->conf->tx_power = dbm;
@@ -1546,7 +1548,7 @@ static s32 wl_cfg80211_get_tx_power(struct wiphy *wiphy, s32 *dbm)
}
result = (u8) (txpwrdbm & ~WL_TXPWR_OVERRIDE);
- *dbm = (s32) bcm_qdbm_to_mw(result);
+ *dbm = (s32) brcmu_qdbm_to_mw(result);
done:
WL_TRACE("Exit\n");
@@ -2668,7 +2670,7 @@ wl_dev_bufvar_set(struct net_device *dev, s8 *name, s8 *buf, s32 len)
struct wl_priv *wl = ndev_to_wl(dev);
u32 buflen;
- buflen = bcm_mkiovar(name, buf, len, wl->ioctl_buf, WL_IOCTL_LEN_MAX);
+ buflen = brcmu_mkiovar(name, buf, len, wl->ioctl_buf, WL_IOCTL_LEN_MAX);
BUG_ON(!buflen);
return wl_dev_ioctl(dev, WLC_SET_VAR, wl->ioctl_buf, buflen);
@@ -2682,7 +2684,7 @@ wl_dev_bufvar_get(struct net_device *dev, s8 *name, s8 *buf,
u32 len;
s32 err = 0;
- len = bcm_mkiovar(name, NULL, 0, wl->ioctl_buf, WL_IOCTL_LEN_MAX);
+ len = brcmu_mkiovar(name, NULL, 0, wl->ioctl_buf, WL_IOCTL_LEN_MAX);
BUG_ON(!len);
err = wl_dev_ioctl(dev, WLC_GET_VAR, (void *)wl->ioctl_buf,
WL_IOCTL_LEN_MAX);
@@ -2800,7 +2802,7 @@ static s32 wl_update_bss_info(struct wl_priv *wl)
{
struct wl_bss_info *bi;
struct wlc_ssid *ssid;
- struct bcm_tlv *tim;
+ struct brcmu_tlv *tim;
u16 beacon_interval;
u8 dtim_period;
size_t ie_len;
@@ -2830,7 +2832,7 @@ static s32 wl_update_bss_info(struct wl_priv *wl)
ie_len = bi->ie_length;
beacon_interval = cpu_to_le16(bi->beacon_period);
- tim = bcm_parse_tlvs(ie, ie_len, WLAN_EID_TIM);
+ tim = brcmu_parse_tlvs(ie, ie_len, WLAN_EID_TIM);
if (tim)
dtim_period = tim->data[1];
else {
@@ -3681,7 +3683,7 @@ wl_dongle_glom(struct net_device *ndev, u32 glom, u32 dongle_align)
s32 err = 0;
/* Match Host and Dongle rx alignment */
- bcm_mkiovar("bus:txglomalign", (char *)&dongle_align, 4, iovbuf,
+ brcmu_mkiovar("bus:txglomalign", (char *)&dongle_align, 4, iovbuf,
sizeof(iovbuf));
err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
if (unlikely(err)) {
@@ -3689,7 +3691,7 @@ wl_dongle_glom(struct net_device *ndev, u32 glom, u32 dongle_align)
goto dongle_glom_out;
}
/* disable glom option per default */
- bcm_mkiovar("bus:txglom", (char *)&glom, 4, iovbuf, sizeof(iovbuf));
+ brcmu_mkiovar("bus:txglom", (char *)&glom, 4, iovbuf, sizeof(iovbuf));
err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
if (unlikely(err)) {
WL_ERR("txglom error (%d)\n", err);
@@ -3707,7 +3709,7 @@ wl_dongle_offload(struct net_device *ndev, s32 arpoe, s32 arp_ol)
s32 err = 0;
/* Set ARP offload */
- bcm_mkiovar("arpoe", (char *)&arpoe, 4, iovbuf, sizeof(iovbuf));
+ brcmu_mkiovar("arpoe", (char *)&arpoe, 4, iovbuf, sizeof(iovbuf));
err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
if (err) {
if (err == -EOPNOTSUPP)
@@ -3717,7 +3719,7 @@ wl_dongle_offload(struct net_device *ndev, s32 arpoe, s32 arp_ol)
goto dongle_offload_out;
}
- bcm_mkiovar("arp_ol", (char *)&arp_ol, 4, iovbuf, sizeof(iovbuf));
+ brcmu_mkiovar("arp_ol", (char *)&arp_ol, 4, iovbuf, sizeof(iovbuf));
err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
if (err) {
if (err == -EOPNOTSUPP)
@@ -3830,7 +3832,7 @@ static s32 wl_dongle_filter(struct net_device *ndev, u32 filter_mode)
}
/* set mode to allow pattern */
- bcm_mkiovar("pkt_filter_mode", (char *)&filter_mode, 4, iovbuf,
+ brcmu_mkiovar("pkt_filter_mode", (char *)&filter_mode, 4, iovbuf,
sizeof(iovbuf));
err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
if (err) {
@@ -3857,7 +3859,7 @@ static s32 wl_dongle_eventmsg(struct net_device *ndev)
WL_TRACE("Enter\n");
/* Setup event_msgs */
- bcm_mkiovar("event_msgs", eventmask, WL_EVENTING_MASK_LEN, iovbuf,
+ brcmu_mkiovar("event_msgs", eventmask, WL_EVENTING_MASK_LEN, iovbuf,
sizeof(iovbuf));
err = wl_dev_ioctl(ndev, WLC_GET_VAR, iovbuf, sizeof(iovbuf));
if (unlikely(err)) {
@@ -3886,7 +3888,7 @@ static s32 wl_dongle_eventmsg(struct net_device *ndev)
setbit(eventmask, WLC_E_JOIN_START);
setbit(eventmask, WLC_E_SCAN_COMPLETE);
- bcm_mkiovar("event_msgs", eventmask, WL_EVENTING_MASK_LEN, iovbuf,
+ brcmu_mkiovar("event_msgs", eventmask, WL_EVENTING_MASK_LEN, iovbuf,
sizeof(iovbuf));
err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
if (unlikely(err)) {
@@ -3912,7 +3914,7 @@ wl_dongle_roam(struct net_device *ndev, u32 roamvar, u32 bcn_timeout)
* off to report link down
*/
if (roamvar) {
- bcm_mkiovar("bcn_timeout", (char *)&bcn_timeout,
+ brcmu_mkiovar("bcn_timeout", (char *)&bcn_timeout,
sizeof(bcn_timeout), iovbuf, sizeof(iovbuf));
err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
if (unlikely(err)) {
@@ -3926,7 +3928,7 @@ wl_dongle_roam(struct net_device *ndev, u32 roamvar, u32 bcn_timeout)
* to take care of roaming
*/
WL_INFO("Internal Roaming = %s\n", roamvar ? "Off" : "On");
- bcm_mkiovar("roam_off", (char *)&roamvar,
+ brcmu_mkiovar("roam_off", (char *)&roamvar,
sizeof(roamvar), iovbuf, sizeof(iovbuf));
err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
if (unlikely(err)) {
diff --git a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h
index 996033cf9b09a..2469b906d739a 100644
--- a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h
+++ b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h
@@ -17,11 +17,6 @@
#ifndef _wl_cfg80211_h_
#define _wl_cfg80211_h_
-#include <linux/wireless.h>
-#include <linux/wireless.h>
-#include <net/cfg80211.h>
-#include <wlioctl.h>
-
struct wl_conf;
struct wl_iface;
struct wl_priv;
@@ -39,7 +34,7 @@ struct wl_ibss;
#define WL_ERR(fmt, args...) \
do { \
- if (wl_dbg_level & WL_DBG_ERR) { \
+ if (brcmf_dbg_level & WL_DBG_ERR) { \
if (net_ratelimit()) { \
printk(KERN_ERR "ERROR @%s : " fmt, \
__func__, ##args); \
@@ -50,7 +45,7 @@ do { \
#if (defined BCMDBG)
#define WL_INFO(fmt, args...) \
do { \
- if (wl_dbg_level & WL_DBG_INFO) { \
+ if (brcmf_dbg_level & WL_DBG_INFO) { \
if (net_ratelimit()) { \
printk(KERN_ERR "INFO @%s : " fmt, \
__func__, ##args); \
@@ -60,7 +55,7 @@ do { \
#define WL_TRACE(fmt, args...) \
do { \
- if (wl_dbg_level & WL_DBG_TRACE) { \
+ if (brcmf_dbg_level & WL_DBG_TRACE) { \
if (net_ratelimit()) { \
printk(KERN_ERR "TRACE @%s : " fmt, \
__func__, ##args); \
@@ -70,7 +65,7 @@ do { \
#define WL_SCAN(fmt, args...) \
do { \
- if (wl_dbg_level & WL_DBG_SCAN) { \
+ if (brcmf_dbg_level & WL_DBG_SCAN) { \
if (net_ratelimit()) { \
printk(KERN_ERR "SCAN @%s : " fmt, \
__func__, ##args); \
@@ -80,7 +75,7 @@ do { \
#define WL_CONN(fmt, args...) \
do { \
- if (wl_dbg_level & WL_DBG_CONN) { \
+ if (brcmf_dbg_level & WL_DBG_CONN) { \
if (net_ratelimit()) { \
printk(KERN_ERR "CONN @%s : " fmt, \
__func__, ##args); \
diff --git a/drivers/staging/brcm80211/brcmfmac/wl_iw.c b/drivers/staging/brcm80211/brcmfmac/wl_iw.c
index 15e1b05ca92d2..9e4b087eb91b7 100644
--- a/drivers/staging/brcm80211/brcmfmac/wl_iw.c
+++ b/drivers/staging/brcm80211/brcmfmac/wl_iw.c
@@ -16,25 +16,30 @@
#include <linux/kthread.h>
#include <linux/semaphore.h>
-#include <bcmdefs.h>
+#include <defs.h>
#include <linux/netdevice.h>
-#include <wlioctl.h>
+#include <linux/etherdevice.h>
+#include <linux/wireless.h>
-#include <bcmutils.h>
+#include <brcmu_utils.h>
+#include <brcmu_wifi.h>
#include <linux/if_arp.h>
#include <asm/uaccess.h>
#include <dngl_stats.h>
#include <dhd.h>
-#include <dhdioctl.h>
#include <linux/ieee80211.h>
-typedef const struct si_pub si_t;
-#include <wlioctl.h>
+
+struct si_pub;
#include <dngl_stats.h>
#include <dhd.h>
+#define WPA_OUI "\x00\x50\xF2"
+#define DOT11_MNG_RSN_ID 48
+#define DOT11_MNG_WPA_ID 221
+
#define WL_ERROR(fmt, args...) printk(fmt, ##args)
#define WL_TRACE(fmt, args...) no_printk(fmt, ##args)
#define WL_INFORM(fmt, args...) no_printk(fmt, ##args)
@@ -113,6 +118,24 @@ typedef struct iscan_info {
} iscan_info_t;
iscan_info_t *g_iscan;
+typedef enum sup_auth_status {
+ WLC_SUP_DISCONNECTED = 0,
+ WLC_SUP_CONNECTING,
+ WLC_SUP_IDREQUIRED,
+ WLC_SUP_AUTHENTICATING,
+ WLC_SUP_AUTHENTICATED,
+ WLC_SUP_KEYXCHANGE,
+ WLC_SUP_KEYED,
+ WLC_SUP_TIMEOUT,
+ WLC_SUP_LAST_BASIC_STATE,
+ WLC_SUP_KEYXCHANGE_WAIT_M1 = WLC_SUP_AUTHENTICATED,
+ WLC_SUP_KEYXCHANGE_PREP_M2 = WLC_SUP_KEYXCHANGE,
+ WLC_SUP_KEYXCHANGE_WAIT_M3 = WLC_SUP_LAST_BASIC_STATE,
+ WLC_SUP_KEYXCHANGE_PREP_M4,
+ WLC_SUP_KEYXCHANGE_WAIT_G1,
+ WLC_SUP_KEYXCHANGE_PREP_G2
+} sup_auth_status_t;
+
static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255};
/* Global ASSERT type flag */
@@ -205,7 +228,8 @@ static int dev_wlc_intvar_set(struct net_device *dev, char *name, int val)
uint len;
val = cpu_to_le32(val);
- len = bcm_mkiovar(name, (char *)(&val), sizeof(val), buf, sizeof(buf));
+ len = brcmu_mkiovar(name, (char *)(&val), sizeof(val), buf,
+ sizeof(buf));
ASSERT(len);
return dev_wlc_ioctl(dev, WLC_SET_VAR, buf, len);
@@ -219,7 +243,7 @@ dev_iw_iovar_setbuf(struct net_device *dev,
{
int iolen;
- iolen = bcm_mkiovar(iovar, param, paramlen, bufptr, buflen);
+ iolen = brcmu_mkiovar(iovar, param, paramlen, bufptr, buflen);
ASSERT(iolen);
if (iolen == 0)
@@ -235,7 +259,7 @@ dev_iw_iovar_getbuf(struct net_device *dev,
{
int iolen;
- iolen = bcm_mkiovar(iovar, param, paramlen, bufptr, buflen);
+ iolen = brcmu_mkiovar(iovar, param, paramlen, bufptr, buflen);
ASSERT(iolen);
return dev_wlc_ioctl(dev, WLC_GET_VAR, bufptr, buflen);
@@ -249,7 +273,7 @@ dev_wlc_bufvar_set(struct net_device *dev, char *name, char *buf, int len)
static char ioctlbuf[MAX_WLIW_IOCTL_LEN];
uint buflen;
- buflen = bcm_mkiovar(name, buf, len, ioctlbuf, sizeof(ioctlbuf));
+ buflen = brcmu_mkiovar(name, buf, len, ioctlbuf, sizeof(ioctlbuf));
ASSERT(buflen);
return dev_wlc_ioctl(dev, WLC_SET_VAR, ioctlbuf, buflen);
@@ -263,7 +287,7 @@ dev_wlc_bufvar_get(struct net_device *dev, char *name, char *buf, int buflen)
int error;
uint len;
- len = bcm_mkiovar(name, NULL, 0, ioctlbuf, sizeof(ioctlbuf));
+ len = brcmu_mkiovar(name, NULL, 0, ioctlbuf, sizeof(ioctlbuf));
ASSERT(len);
error =
dev_wlc_ioctl(dev, WLC_GET_VAR, (void *)ioctlbuf,
@@ -286,7 +310,7 @@ static int dev_wlc_intvar_get(struct net_device *dev, char *name, int *retval)
uint data_null;
len =
- bcm_mkiovar(name, (char *)(&data_null), 0, (char *)(&var),
+ brcmu_mkiovar(name, (char *)(&data_null), 0, (char *)(&var),
sizeof(var.buf));
ASSERT(len);
error = dev_wlc_ioctl(dev, WLC_GET_VAR, (void *)&var, len);
@@ -371,7 +395,7 @@ wl_iw_set_freq(struct net_device *dev,
if (fwrq->m > 4000 && fwrq->m < 5000)
sf = WF_CHAN_FACTOR_4_G;
- chan = bcm_mhz2channel(fwrq->m, sf);
+ chan = brcmu_mhz2channel(fwrq->m, sf);
}
chan = cpu_to_le32(chan);
@@ -1422,11 +1446,11 @@ wl_iw_handle_scanresults_ies(char **event_p, char *end,
event = *event_p;
if (bi->ie_length) {
- bcm_tlv_t *ie;
+ struct brcmu_tlv *ie;
u8 *ptr = ((u8 *) bi) + sizeof(wl_bss_info_t);
int ptr_len = bi->ie_length;
- ie = bcm_parse_tlvs(ptr, ptr_len, DOT11_MNG_RSN_ID);
+ ie = brcmu_parse_tlvs(ptr, ptr_len, DOT11_MNG_RSN_ID);
if (ie) {
iwe.cmd = IWEVGENIE;
iwe.u.data.length = ie->len + 2;
@@ -1436,7 +1460,8 @@ wl_iw_handle_scanresults_ies(char **event_p, char *end,
}
ptr = ((u8 *) bi) + sizeof(wl_bss_info_t);
- while ((ie = bcm_parse_tlvs(ptr, ptr_len, DOT11_MNG_WPA_ID))) {
+ while ((ie = brcmu_parse_tlvs(
+ ptr, ptr_len, DOT11_MNG_WPA_ID))) {
if (ie_is_wps_ie(((u8 **)&ie), &ptr, &ptr_len)) {
iwe.cmd = IWEVGENIE;
iwe.u.data.length = ie->len + 2;
@@ -1449,7 +1474,8 @@ wl_iw_handle_scanresults_ies(char **event_p, char *end,
ptr = ((u8 *) bi) + sizeof(wl_bss_info_t);
ptr_len = bi->ie_length;
- while ((ie = bcm_parse_tlvs(ptr, ptr_len, DOT11_MNG_WPA_ID))) {
+ while ((ie = brcmu_parse_tlvs(
+ ptr, ptr_len, DOT11_MNG_WPA_ID))) {
if (ie_is_wpa_ie(((u8 **)&ie), &ptr, &ptr_len)) {
iwe.cmd = IWEVGENIE;
iwe.u.data.length = ie->len + 2;
@@ -2174,8 +2200,8 @@ wl_iw_set_txpow(struct net_device *dev,
else
txpwrmw = (u16) vwrq->value;
- error =
- dev_wlc_intvar_set(dev, "qtxpower", (int)(bcm_mw_to_qdbm(txpwrmw)));
+ error = dev_wlc_intvar_set(dev, "qtxpower",
+ (int)(brcmu_mw_to_qdbm(txpwrmw)));
return error;
}
@@ -2199,7 +2225,7 @@ wl_iw_get_txpow(struct net_device *dev,
disable = le32_to_cpu(disable);
result = (u8) (txpwrdbm & ~WL_TXPWR_OVERRIDE);
- vwrq->value = (s32) bcm_qdbm_to_mw(result);
+ vwrq->value = (s32) brcmu_qdbm_to_mw(result);
vwrq->fixed = 0;
vwrq->disabled =
(disable & (WL_RADIO_SW_DISABLE | WL_RADIO_HW_DISABLE)) ? 1 : 0;
diff --git a/drivers/staging/brcm80211/brcmfmac/wl_iw.h b/drivers/staging/brcm80211/brcmfmac/wl_iw.h
index fe06174cee7d3..aa8902cd6b302 100644
--- a/drivers/staging/brcm80211/brcmfmac/wl_iw.h
+++ b/drivers/staging/brcm80211/brcmfmac/wl_iw.h
@@ -17,10 +17,6 @@
#ifndef _wl_iw_h_
#define _wl_iw_h_
-#include <linux/wireless.h>
-
-#include <wlioctl.h>
-
#define WL_SCAN_PARAMS_SSID_MAX 10
#define GET_SSID "SSID="
#define GET_CHANNEL "CH="
diff --git a/drivers/staging/brcm80211/brcmsmac/Makefile b/drivers/staging/brcm80211/brcmsmac/Makefile
index 8d75fe19ca9ae..1ea3e0c48f3e7 100644
--- a/drivers/staging/brcm80211/brcmsmac/Makefile
+++ b/drivers/staging/brcm80211/brcmsmac/Makefile
@@ -28,30 +28,29 @@ ccflags-y := \
-Idrivers/staging/brcm80211/include
BRCMSMAC_OFILES := \
- wl_mac80211.o \
- wl_ucode_loader.o \
- wlc_alloc.o \
- wlc_ampdu.o \
- wlc_antsel.o \
- wlc_bmac.o \
- wlc_channel.o \
- wlc_main.o \
- wlc_phy_shim.o \
- wlc_pmu.o \
- wlc_rate.o \
- wlc_stf.o \
+ mac80211_if.o \
+ ucode_loader.o \
+ alloc.o \
+ ampdu.o \
+ antsel.o \
+ bmac.o \
+ channel.o \
+ main.o \
+ phy_shim.o \
+ pmu.o \
+ rate.o \
+ stf.o \
aiutils.o \
- phy/wlc_phy_cmn.o \
- phy/wlc_phy_lcn.o \
- phy/wlc_phy_n.o \
- phy/wlc_phytbl_lcn.o \
- phy/wlc_phytbl_n.o \
- phy/wlc_phy_qmath.o \
- bcmotp.o \
- bcmsrom.o \
- hnddma.o \
- nicpci.o \
- nvram.o
+ phy/phy_cmn.o \
+ phy/phy_lcn.o \
+ phy/phy_n.o \
+ phy/phytbl_lcn.o \
+ phy/phytbl_n.o \
+ phy/phy_qmath.o \
+ otp.o \
+ srom.o \
+ dma.o \
+ nicpci.o
MODULEPFX := brcmsmac
diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.c b/drivers/staging/brcm80211/brcmsmac/aiutils.c
index a61185f70a7cd..fee89669c3927 100644
--- a/drivers/staging/brcm80211/brcmsmac/aiutils.c
+++ b/drivers/staging/brcm80211/brcmsmac/aiutils.c
@@ -17,32 +17,357 @@
#include <linux/delay.h>
#include <linux/kernel.h>
#include <linux/string.h>
-#include <bcmdefs.h>
+#include <defs.h>
+#include "types.h"
#include <linux/module.h>
#include <linux/pci.h>
-#include <bcmutils.h>
+#include <brcmu_utils.h>
#include <aiutils.h>
-#include <hndsoc.h>
-#include <sbchipc.h>
-#include <pcicfg.h>
-#include <bcmdevs.h>
+#include <soc.h>
+#include <chipcommon.h>
+#include <brcm_hw_ids.h>
/* ********** from siutils.c *********** */
-#include <pci_core.h>
-#include <pcie_core.h>
#include <nicpci.h>
-#include <bcmnvram.h>
-#include <bcmsrom.h>
-#include <wlc_pmu.h>
+#include "srom.h"
+#include <pmu.h>
+#include <scb.h>
+#include <pub.h>
+
+/* slow_clk_ctl */
+#define SCC_SS_MASK 0x00000007 /* slow clock source mask */
+#define SCC_SS_LPO 0x00000000 /* source of slow clock is LPO */
+#define SCC_SS_XTAL 0x00000001 /* source of slow clock is crystal */
+#define SCC_SS_PCI 0x00000002 /* source of slow clock is PCI */
+#define SCC_LF 0x00000200 /* LPOFreqSel, 1: 160Khz, 0: 32KHz */
+#define SCC_LP 0x00000400 /* LPOPowerDown, 1: LPO is disabled,
+ * 0: LPO is enabled
+ */
+#define SCC_FS 0x00000800 /* ForceSlowClk, 1: sb/cores running on slow clock,
+ * 0: power logic control
+ */
+#define SCC_IP 0x00001000 /* IgnorePllOffReq, 1/0: power logic ignores/honors
+ * PLL clock disable requests from core
+ */
+#define SCC_XC 0x00002000 /* XtalControlEn, 1/0: power logic does/doesn't
+ * disable crystal when appropriate
+ */
+#define SCC_XP 0x00004000 /* XtalPU (RO), 1/0: crystal running/disabled */
+#define SCC_CD_MASK 0xffff0000 /* ClockDivider (SlowClk = 1/(4+divisor)) */
+#define SCC_CD_SHIFT 16
+
+/* system_clk_ctl */
+#define SYCC_IE 0x00000001 /* ILPen: Enable Idle Low Power */
+#define SYCC_AE 0x00000002 /* ALPen: Enable Active Low Power */
+#define SYCC_FP 0x00000004 /* ForcePLLOn */
+#define SYCC_AR 0x00000008 /* Force ALP (or HT if ALPen is not set */
+#define SYCC_HR 0x00000010 /* Force HT */
+#define SYCC_CD_MASK 0xffff0000 /* ClkDiv (ILP = 1/(4 * (divisor + 1)) */
+#define SYCC_CD_SHIFT 16
+
+#define CST4329_SPROM_OTP_SEL_MASK 0x00000003
+#define CST4329_DEFCIS_SEL 0 /* OTP is powered up, use def. CIS, no SPROM */
+#define CST4329_SPROM_SEL 1 /* OTP is powered up, SPROM is present */
+#define CST4329_OTP_SEL 2 /* OTP is powered up, no SPROM */
+#define CST4329_OTP_PWRDN 3 /* OTP is powered down, SPROM is present */
+#define CST4329_SPI_SDIO_MODE_MASK 0x00000004
+#define CST4329_SPI_SDIO_MODE_SHIFT 2
+
+/* 43224 chip-specific ChipControl register bits */
+#define CCTRL43224_GPIO_TOGGLE 0x8000
+#define CCTRL_43224A0_12MA_LED_DRIVE 0x00F000F0 /* 12 mA drive strength */
+#define CCTRL_43224B0_12MA_LED_DRIVE 0xF0 /* 12 mA drive strength for later 43224s */
+
+/* 43236 Chip specific ChipStatus register bits */
+#define CST43236_SFLASH_MASK 0x00000040
+#define CST43236_OTP_MASK 0x00000080
+#define CST43236_HSIC_MASK 0x00000100 /* USB/HSIC */
+#define CST43236_BP_CLK 0x00000200 /* 120/96Mbps */
+#define CST43236_BOOT_MASK 0x00001800
+#define CST43236_BOOT_SHIFT 11
+#define CST43236_BOOT_FROM_SRAM 0 /* boot from SRAM, ARM in reset */
+#define CST43236_BOOT_FROM_ROM 1 /* boot from ROM */
+#define CST43236_BOOT_FROM_FLASH 2 /* boot from FLASH */
+#define CST43236_BOOT_FROM_INVALID 3
+
+/* 4331 chip-specific ChipControl register bits */
+#define CCTRL4331_BT_COEXIST (1<<0) /* 0 disable */
+#define CCTRL4331_SECI (1<<1) /* 0 SECI is disabled (JATG functional) */
+#define CCTRL4331_EXT_LNA (1<<2) /* 0 disable */
+#define CCTRL4331_SPROM_GPIO13_15 (1<<3) /* sprom/gpio13-15 mux */
+#define CCTRL4331_EXTPA_EN (1<<4) /* 0 ext pa disable, 1 ext pa enabled */
+#define CCTRL4331_GPIOCLK_ON_SPROMCS (1<<5) /* set drive out GPIO_CLK on sprom_cs pin */
+#define CCTRL4331_PCIE_MDIO_ON_SPROMCS (1<<6) /* use sprom_cs pin as PCIE mdio interface */
+#define CCTRL4331_EXTPA_ON_GPIO2_5 (1<<7) /* aband extpa will be at gpio2/5 and sprom_dout */
+#define CCTRL4331_OVR_PIPEAUXCLKEN (1<<8) /* override core control on pipe_AuxClkEnable */
+#define CCTRL4331_OVR_PIPEAUXPWRDOWN (1<<9) /* override core control on pipe_AuxPowerDown */
+#define CCTRL4331_PCIE_AUXCLKEN (1<<10) /* pcie_auxclkenable */
+#define CCTRL4331_PCIE_PIPE_PLLDOWN (1<<11) /* pcie_pipe_pllpowerdown */
+#define CCTRL4331_BT_SHD0_ON_GPIO4 (1<<16) /* enable bt_shd0 at gpio4 */
+#define CCTRL4331_BT_SHD1_ON_GPIO5 (1<<17) /* enable bt_shd1 at gpio5 */
+
+/* 4331 Chip specific ChipStatus register bits */
+#define CST4331_XTAL_FREQ 0x00000001 /* crystal frequency 20/40Mhz */
+#define CST4331_SPROM_PRESENT 0x00000002
+#define CST4331_OTP_PRESENT 0x00000004
+#define CST4331_LDO_RF 0x00000008
+#define CST4331_LDO_PAR 0x00000010
+
+/* 4319 chip-specific ChipStatus register bits */
+#define CST4319_SPI_CPULESSUSB 0x00000001
+#define CST4319_SPI_CLK_POL 0x00000002
+#define CST4319_SPI_CLK_PH 0x00000008
+#define CST4319_SPROM_OTP_SEL_MASK 0x000000c0 /* gpio [7:6], SDIO CIS selection */
+#define CST4319_SPROM_OTP_SEL_SHIFT 6
+#define CST4319_DEFCIS_SEL 0x00000000 /* use default CIS, OTP is powered up */
+#define CST4319_SPROM_SEL 0x00000040 /* use SPROM, OTP is powered up */
+#define CST4319_OTP_SEL 0x00000080 /* use OTP, OTP is powered up */
+#define CST4319_OTP_PWRDN 0x000000c0 /* use SPROM, OTP is powered down */
+#define CST4319_SDIO_USB_MODE 0x00000100 /* gpio [8], sdio/usb mode */
+#define CST4319_REMAP_SEL_MASK 0x00000600
+#define CST4319_ILPDIV_EN 0x00000800
+#define CST4319_XTAL_PD_POL 0x00001000
+#define CST4319_LPO_SEL 0x00002000
+#define CST4319_RES_INIT_MODE 0x0000c000
+#define CST4319_PALDO_EXTPNP 0x00010000 /* PALDO is configured with external PNP */
+#define CST4319_CBUCK_MODE_MASK 0x00060000
+#define CST4319_CBUCK_MODE_BURST 0x00020000
+#define CST4319_CBUCK_MODE_LPBURST 0x00060000
+#define CST4319_RCAL_VALID 0x01000000
+#define CST4319_RCAL_VALUE_MASK 0x3e000000
+#define CST4319_RCAL_VALUE_SHIFT 25
+
+/* 4336 chip-specific ChipStatus register bits */
+#define CST4336_SPI_MODE_MASK 0x00000001
+#define CST4336_SPROM_PRESENT 0x00000002
+#define CST4336_OTP_PRESENT 0x00000004
+#define CST4336_ARMREMAP_0 0x00000008
+#define CST4336_ILPDIV_EN_MASK 0x00000010
+#define CST4336_ILPDIV_EN_SHIFT 4
+#define CST4336_XTAL_PD_POL_MASK 0x00000020
+#define CST4336_XTAL_PD_POL_SHIFT 5
+#define CST4336_LPO_SEL_MASK 0x00000040
+#define CST4336_LPO_SEL_SHIFT 6
+#define CST4336_RES_INIT_MODE_MASK 0x00000180
+#define CST4336_RES_INIT_MODE_SHIFT 7
+#define CST4336_CBUCK_MODE_MASK 0x00000600
+#define CST4336_CBUCK_MODE_SHIFT 9
+
+/* 4313 chip-specific ChipStatus register bits */
+#define CST4313_SPROM_PRESENT 1
+#define CST4313_OTP_PRESENT 2
+#define CST4313_SPROM_OTP_SEL_MASK 0x00000002
+#define CST4313_SPROM_OTP_SEL_SHIFT 0
+
+/* 4313 Chip specific ChipControl register bits */
+#define CCTRL_4313_12MA_LED_DRIVE 0x00000007 /* 12 mA drive strengh for later 4313 */
#define BCM47162_DMP() ((sih->chip == BCM47162_CHIP_ID) && \
(sih->chiprev == 0) && \
(sii->coreid[sii->curidx] == MIPS74K_CORE_ID))
+/* Manufacturer Ids */
+#define MFGID_ARM 0x43b
+#define MFGID_BRCM 0x4bf
+#define MFGID_MIPS 0x4a7
+
+/* Enumeration ROM registers */
+#define ER_EROMENTRY 0x000
+#define ER_REMAPCONTROL 0xe00
+#define ER_REMAPSELECT 0xe04
+#define ER_MASTERSELECT 0xe10
+#define ER_ITCR 0xf00
+#define ER_ITIP 0xf04
+
+/* Erom entries */
+#define ER_TAG 0xe
+#define ER_TAG1 0x6
+#define ER_VALID 1
+#define ER_CI 0
+#define ER_MP 2
+#define ER_ADD 4
+#define ER_END 0xe
+#define ER_BAD 0xffffffff
+
+/* EROM CompIdentA */
+#define CIA_MFG_MASK 0xfff00000
+#define CIA_MFG_SHIFT 20
+#define CIA_CID_MASK 0x000fff00
+#define CIA_CID_SHIFT 8
+#define CIA_CCL_MASK 0x000000f0
+#define CIA_CCL_SHIFT 4
+
+/* EROM CompIdentB */
+#define CIB_REV_MASK 0xff000000
+#define CIB_REV_SHIFT 24
+#define CIB_NSW_MASK 0x00f80000
+#define CIB_NSW_SHIFT 19
+#define CIB_NMW_MASK 0x0007c000
+#define CIB_NMW_SHIFT 14
+#define CIB_NSP_MASK 0x00003e00
+#define CIB_NSP_SHIFT 9
+#define CIB_NMP_MASK 0x000001f0
+#define CIB_NMP_SHIFT 4
+
+/* EROM AddrDesc */
+#define AD_ADDR_MASK 0xfffff000
+#define AD_SP_MASK 0x00000f00
+#define AD_SP_SHIFT 8
+#define AD_ST_MASK 0x000000c0
+#define AD_ST_SHIFT 6
+#define AD_ST_SLAVE 0x00000000
+#define AD_ST_BRIDGE 0x00000040
+#define AD_ST_SWRAP 0x00000080
+#define AD_ST_MWRAP 0x000000c0
+#define AD_SZ_MASK 0x00000030
+#define AD_SZ_SHIFT 4
+#define AD_SZ_4K 0x00000000
+#define AD_SZ_8K 0x00000010
+#define AD_SZ_16K 0x00000020
+#define AD_SZ_SZD 0x00000030
+#define AD_AG32 0x00000008
+#define AD_ADDR_ALIGN 0x00000fff
+#define AD_SZ_BASE 0x00001000 /* 4KB */
+
+/* EROM SizeDesc */
+#define SD_SZ_MASK 0xfffff000
+#define SD_SG32 0x00000008
+#define SD_SZ_ALIGN 0x00000fff
+
+#define PCI_CFG_GPIO_SCS 0x10 /* PCI config space bit 4 for 4306c0 slow clock source */
+#define PCI_CFG_GPIO_XTAL 0x40 /* PCI config space GPIO 14 for Xtal power-up */
+#define PCI_CFG_GPIO_PLL 0x80 /* PCI config space GPIO 15 for PLL power-down */
+
+/* power control defines */
+#define PLL_DELAY 150 /* us pll on delay */
+#define FREF_DELAY 200 /* us fref change delay */
+#define XTAL_ON_DELAY 1000 /* us crystal power-on delay */
+
+/* resetctrl */
+#define AIRC_RESET 1
+
+typedef volatile struct _aidmp {
+ u32 oobselina30; /* 0x000 */
+ u32 oobselina74; /* 0x004 */
+ u32 PAD[6];
+ u32 oobselinb30; /* 0x020 */
+ u32 oobselinb74; /* 0x024 */
+ u32 PAD[6];
+ u32 oobselinc30; /* 0x040 */
+ u32 oobselinc74; /* 0x044 */
+ u32 PAD[6];
+ u32 oobselind30; /* 0x060 */
+ u32 oobselind74; /* 0x064 */
+ u32 PAD[38];
+ u32 oobselouta30; /* 0x100 */
+ u32 oobselouta74; /* 0x104 */
+ u32 PAD[6];
+ u32 oobseloutb30; /* 0x120 */
+ u32 oobseloutb74; /* 0x124 */
+ u32 PAD[6];
+ u32 oobseloutc30; /* 0x140 */
+ u32 oobseloutc74; /* 0x144 */
+ u32 PAD[6];
+ u32 oobseloutd30; /* 0x160 */
+ u32 oobseloutd74; /* 0x164 */
+ u32 PAD[38];
+ u32 oobsynca; /* 0x200 */
+ u32 oobseloutaen; /* 0x204 */
+ u32 PAD[6];
+ u32 oobsyncb; /* 0x220 */
+ u32 oobseloutben; /* 0x224 */
+ u32 PAD[6];
+ u32 oobsyncc; /* 0x240 */
+ u32 oobseloutcen; /* 0x244 */
+ u32 PAD[6];
+ u32 oobsyncd; /* 0x260 */
+ u32 oobseloutden; /* 0x264 */
+ u32 PAD[38];
+ u32 oobaextwidth; /* 0x300 */
+ u32 oobainwidth; /* 0x304 */
+ u32 oobaoutwidth; /* 0x308 */
+ u32 PAD[5];
+ u32 oobbextwidth; /* 0x320 */
+ u32 oobbinwidth; /* 0x324 */
+ u32 oobboutwidth; /* 0x328 */
+ u32 PAD[5];
+ u32 oobcextwidth; /* 0x340 */
+ u32 oobcinwidth; /* 0x344 */
+ u32 oobcoutwidth; /* 0x348 */
+ u32 PAD[5];
+ u32 oobdextwidth; /* 0x360 */
+ u32 oobdinwidth; /* 0x364 */
+ u32 oobdoutwidth; /* 0x368 */
+ u32 PAD[37];
+ u32 ioctrlset; /* 0x400 */
+ u32 ioctrlclear; /* 0x404 */
+ u32 ioctrl; /* 0x408 */
+ u32 PAD[61];
+ u32 iostatus; /* 0x500 */
+ u32 PAD[127];
+ u32 ioctrlwidth; /* 0x700 */
+ u32 iostatuswidth; /* 0x704 */
+ u32 PAD[62];
+ u32 resetctrl; /* 0x800 */
+ u32 resetstatus; /* 0x804 */
+ u32 resetreadid; /* 0x808 */
+ u32 resetwriteid; /* 0x80c */
+ u32 PAD[60];
+ u32 errlogctrl; /* 0x900 */
+ u32 errlogdone; /* 0x904 */
+ u32 errlogstatus; /* 0x908 */
+ u32 errlogaddrlo; /* 0x90c */
+ u32 errlogaddrhi; /* 0x910 */
+ u32 errlogid; /* 0x914 */
+ u32 errloguser; /* 0x918 */
+ u32 errlogflags; /* 0x91c */
+ u32 PAD[56];
+ u32 intstatus; /* 0xa00 */
+ u32 PAD[127];
+ u32 config; /* 0xe00 */
+ u32 PAD[63];
+ u32 itcr; /* 0xf00 */
+ u32 PAD[3];
+ u32 itipooba; /* 0xf10 */
+ u32 itipoobb; /* 0xf14 */
+ u32 itipoobc; /* 0xf18 */
+ u32 itipoobd; /* 0xf1c */
+ u32 PAD[4];
+ u32 itipoobaout; /* 0xf30 */
+ u32 itipoobbout; /* 0xf34 */
+ u32 itipoobcout; /* 0xf38 */
+ u32 itipoobdout; /* 0xf3c */
+ u32 PAD[4];
+ u32 itopooba; /* 0xf50 */
+ u32 itopoobb; /* 0xf54 */
+ u32 itopoobc; /* 0xf58 */
+ u32 itopoobd; /* 0xf5c */
+ u32 PAD[4];
+ u32 itopoobain; /* 0xf70 */
+ u32 itopoobbin; /* 0xf74 */
+ u32 itopoobcin; /* 0xf78 */
+ u32 itopoobdin; /* 0xf7c */
+ u32 PAD[4];
+ u32 itopreset; /* 0xf90 */
+ u32 PAD[15];
+ u32 peripherialid4; /* 0xfd0 */
+ u32 peripherialid5; /* 0xfd4 */
+ u32 peripherialid6; /* 0xfd8 */
+ u32 peripherialid7; /* 0xfdc */
+ u32 peripherialid0; /* 0xfe0 */
+ u32 peripherialid1; /* 0xfe4 */
+ u32 peripherialid2; /* 0xfe8 */
+ u32 peripherialid3; /* 0xfec */
+ u32 componentid0; /* 0xff0 */
+ u32 componentid1; /* 0xff4 */
+ u32 componentid2; /* 0xff8 */
+ u32 componentid3; /* 0xffc */
+} aidmp_t;
+
/* EROM parsing */
static u32
-get_erom_ent(si_t *sih, u32 **eromptr, u32 mask, u32 match)
+get_erom_ent(struct si_pub *sih, u32 **eromptr, u32 mask, u32 match)
{
u32 ent;
uint inv = 0, nom = 0;
@@ -77,7 +402,7 @@ get_erom_ent(si_t *sih, u32 **eromptr, u32 mask, u32 match)
}
static u32
-get_asd(si_t *sih, u32 **eromptr, uint sp, uint ad, uint st,
+get_asd(struct si_pub *sih, u32 **eromptr, uint sp, uint ad, uint st,
u32 *addrl, u32 *addrh, u32 *sizel, u32 *sizeh)
{
u32 asd, sz, szd;
@@ -116,7 +441,7 @@ static void ai_hwfixup(si_info_t *sii)
}
/* parse the enumeration rom to identify all cores */
-void ai_scan(si_t *sih, void *regs, uint devid)
+void ai_scan(struct si_pub *sih, void *regs, uint devid)
{
si_info_t *sii = SI_INFO(sih);
chipcregs_t *cc = (chipcregs_t *) regs;
@@ -319,7 +644,7 @@ void ai_scan(si_t *sih, void *regs, uint devid)
/* This function changes the logical "focus" to the indicated core.
* Return the current core's virtual address.
*/
-void *ai_setcoreidx(si_t *sih, uint coreidx)
+void *ai_setcoreidx(struct si_pub *sih, uint coreidx)
{
si_info_t *sii = SI_INFO(sih);
u32 addr = sii->coresba[coreidx];
@@ -368,13 +693,13 @@ void *ai_setcoreidx(si_t *sih, uint coreidx)
}
/* Return the number of address spaces in current core */
-int ai_numaddrspaces(si_t *sih)
+int ai_numaddrspaces(struct si_pub *sih)
{
return 2;
}
/* Return the address of the nth address space in the current core */
-u32 ai_addrspace(si_t *sih, uint asidx)
+u32 ai_addrspace(struct si_pub *sih, uint asidx)
{
si_info_t *sii;
uint cidx;
@@ -393,7 +718,7 @@ u32 ai_addrspace(si_t *sih, uint asidx)
}
/* Return the size of the nth address space in the current core */
-u32 ai_addrspacesize(si_t *sih, uint asidx)
+u32 ai_addrspacesize(struct si_pub *sih, uint asidx)
{
si_info_t *sii;
uint cidx;
@@ -411,7 +736,7 @@ u32 ai_addrspacesize(si_t *sih, uint asidx)
}
}
-uint ai_flag(si_t *sih)
+uint ai_flag(struct si_pub *sih)
{
si_info_t *sii;
aidmp_t *ai;
@@ -426,11 +751,11 @@ uint ai_flag(si_t *sih)
return R_REG(&ai->oobselouta30) & 0x1f;
}
-void ai_setint(si_t *sih, int siflag)
+void ai_setint(struct si_pub *sih, int siflag)
{
}
-uint ai_corevendor(si_t *sih)
+uint ai_corevendor(struct si_pub *sih)
{
si_info_t *sii;
u32 cia;
@@ -440,7 +765,7 @@ uint ai_corevendor(si_t *sih)
return (cia & CIA_MFG_MASK) >> CIA_MFG_SHIFT;
}
-uint ai_corerev(si_t *sih)
+uint ai_corerev(struct si_pub *sih)
{
si_info_t *sii;
u32 cib;
@@ -450,7 +775,7 @@ uint ai_corerev(si_t *sih)
return (cib & CIB_REV_MASK) >> CIB_REV_SHIFT;
}
-bool ai_iscoreup(si_t *sih)
+bool ai_iscoreup(struct si_pub *sih)
{
si_info_t *sii;
aidmp_t *ai;
@@ -463,7 +788,7 @@ bool ai_iscoreup(si_t *sih)
&& ((R_REG(&ai->resetctrl) & AIRC_RESET) == 0));
}
-void ai_core_cflags_wo(si_t *sih, u32 mask, u32 val)
+void ai_core_cflags_wo(struct si_pub *sih, u32 mask, u32 val)
{
si_info_t *sii;
aidmp_t *ai;
@@ -485,7 +810,7 @@ void ai_core_cflags_wo(si_t *sih, u32 mask, u32 val)
}
}
-u32 ai_core_cflags(si_t *sih, u32 mask, u32 val)
+u32 ai_core_cflags(struct si_pub *sih, u32 mask, u32 val)
{
si_info_t *sii;
aidmp_t *ai;
@@ -508,7 +833,7 @@ u32 ai_core_cflags(si_t *sih, u32 mask, u32 val)
return R_REG(&ai->ioctrl);
}
-u32 ai_core_sflags(si_t *sih, u32 mask, u32 val)
+u32 ai_core_sflags(struct si_pub *sih, u32 mask, u32 val)
{
si_info_t *sii;
aidmp_t *ai;
@@ -542,7 +867,8 @@ static bool ai_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype,
static void ai_nvram_process(si_info_t *sii, char *pvars);
/* dev path concatenation util */
-static char *ai_devpathvar(si_t *sih, char *var, int len, const char *name);
+static char *ai_devpathvar(struct si_pub *sih, char *var, int len,
+ const char *name);
static bool _ai_clkctl_cc(si_info_t *sii, uint mode);
static bool ai_ispcie(si_info_t *sii);
@@ -558,7 +884,7 @@ static u32 ai_gpioreservation;
* vars - pointer to a pointer area for "environment" variables
* varsz - pointer to int to return the size of the vars
*/
-si_t *ai_attach(uint devid, void *regs, uint bustype,
+struct si_pub *ai_attach(uint devid, void *regs, uint bustype,
void *sdh, char **vars, uint *varsz)
{
si_info_t *sii;
@@ -578,7 +904,7 @@ si_t *ai_attach(uint devid, void *regs, uint bustype,
sii->vars = vars ? *vars : NULL;
sii->varsz = varsz ? *varsz : 0;
- return (si_t *) sii;
+ return (struct si_pub *) sii;
}
/* global kernel resource */
@@ -859,9 +1185,6 @@ static si_info_t *ai_doattach(si_info_t *sii, uint devid,
udelay(10);
}
- /* Init nvram from flash if it exists */
- nvram_init();
-
/* Init nvram from sprom/otp if they exist */
if (srom_var_init
(&sii->pub, bustype, regs, vars, varsz)) {
@@ -950,13 +1273,13 @@ static si_info_t *ai_doattach(si_info_t *sii, uint devid,
}
/* may be called with core in reset */
-void ai_detach(si_t *sih)
+void ai_detach(struct si_pub *sih)
{
si_info_t *sii;
uint idx;
struct si_pub *si_local = NULL;
- bcopy(&sih, &si_local, sizeof(si_t **));
+ memcpy(&si_local, &sih, sizeof(struct si_pub **));
sii = SI_INFO(sih);
@@ -970,8 +1293,6 @@ void ai_detach(si_t *sih)
sii->regs[idx] = NULL;
}
- nvram_exit(); /* free up nvram buffers */
-
if (sih->bustype == PCI_BUS) {
if (sii->pch)
pcicore_deinit(sii->pch);
@@ -984,7 +1305,8 @@ void ai_detach(si_t *sih)
/* register driver interrupt disabling and restoring callback functions */
void
-ai_register_intr_callback(si_t *sih, void *intrsoff_fn, void *intrsrestore_fn,
+ai_register_intr_callback(struct si_pub *sih, void *intrsoff_fn,
+ void *intrsrestore_fn,
void *intrsenabled_fn, void *intr_arg)
{
si_info_t *sii;
@@ -1000,7 +1322,7 @@ ai_register_intr_callback(si_t *sih, void *intrsoff_fn, void *intrsrestore_fn,
sii->dev_coreid = sii->coreid[sii->curidx];
}
-void ai_deregister_intr_callback(si_t *sih)
+void ai_deregister_intr_callback(struct si_pub *sih)
{
si_info_t *sii;
@@ -1008,7 +1330,7 @@ void ai_deregister_intr_callback(si_t *sih)
sii->intrsoff_fn = NULL;
}
-uint ai_coreid(si_t *sih)
+uint ai_coreid(struct si_pub *sih)
{
si_info_t *sii;
@@ -1016,7 +1338,7 @@ uint ai_coreid(si_t *sih)
return sii->coreid[sii->curidx];
}
-uint ai_coreidx(si_t *sih)
+uint ai_coreidx(struct si_pub *sih)
{
si_info_t *sii;
@@ -1024,13 +1346,13 @@ uint ai_coreidx(si_t *sih)
return sii->curidx;
}
-bool ai_backplane64(si_t *sih)
+bool ai_backplane64(struct si_pub *sih)
{
return (sih->cccaps & CC_CAP_BKPLN64) != 0;
}
/* return index of coreid or BADIDX if not found */
-uint ai_findcoreidx(si_t *sih, uint coreid, uint coreunit)
+uint ai_findcoreidx(struct si_pub *sih, uint coreid, uint coreunit)
{
si_info_t *sii;
uint found;
@@ -1056,7 +1378,7 @@ uint ai_findcoreidx(si_t *sih, uint coreid, uint coreunit)
* Moreover, callers should keep interrupts off during switching
* out of and back to d11 core.
*/
-void *ai_setcore(si_t *sih, uint coreid, uint coreunit)
+void *ai_setcore(struct si_pub *sih, uint coreid, uint coreunit)
{
uint idx;
@@ -1068,7 +1390,8 @@ void *ai_setcore(si_t *sih, uint coreid, uint coreunit)
}
/* Turn off interrupt as required by ai_setcore, before switch core */
-void *ai_switch_core(si_t *sih, uint coreid, uint *origidx, uint *intr_val)
+void *ai_switch_core(struct si_pub *sih, uint coreid, uint *origidx,
+ uint *intr_val)
{
void *cc;
si_info_t *sii;
@@ -1093,7 +1416,7 @@ void *ai_switch_core(si_t *sih, uint coreid, uint *origidx, uint *intr_val)
}
/* restore coreidx and restore interrupt */
-void ai_restore_core(si_t *sih, uint coreid, uint intr_val)
+void ai_restore_core(struct si_pub *sih, uint coreid, uint intr_val)
{
si_info_t *sii;
@@ -1106,7 +1429,7 @@ void ai_restore_core(si_t *sih, uint coreid, uint intr_val)
INTR_RESTORE(sii, intr_val);
}
-void ai_write_wrapperreg(si_t *sih, u32 offset, u32 val)
+void ai_write_wrapperreg(struct si_pub *sih, u32 offset, u32 val)
{
si_info_t *sii = SI_INFO(sih);
u32 *w = (u32 *) sii->curwrap;
@@ -1124,7 +1447,8 @@ void ai_write_wrapperreg(si_t *sih, u32 offset, u32 val)
* Also, when using pci/pcie, we can optimize away the core switching for pci
* registers and (on newer pci cores) chipcommon registers.
*/
-uint ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val)
+uint ai_corereg(struct si_pub *sih, uint coreidx, uint regoff, uint mask,
+ uint val)
{
uint origidx = 0;
u32 *r = NULL;
@@ -1208,7 +1532,7 @@ uint ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val)
return w;
}
-void ai_core_disable(si_t *sih, u32 bits)
+void ai_core_disable(struct si_pub *sih, u32 bits)
{
si_info_t *sii;
u32 dummy;
@@ -1235,7 +1559,7 @@ void ai_core_disable(si_t *sih, u32 bits)
* bits - core specific bits that are set during and after reset sequence
* resetbits - core specific bits that are set only during reset sequence
*/
-void ai_core_reset(si_t *sih, u32 bits, u32 resetbits)
+void ai_core_reset(struct si_pub *sih, u32 bits, u32 resetbits)
{
si_info_t *sii;
aidmp_t *ai;
@@ -1352,7 +1676,7 @@ static void ai_clkctl_setdelay(si_info_t *sii, void *chipcregs)
}
/* initialize power control delay registers */
-void ai_clkctl_init(si_t *sih)
+void ai_clkctl_init(struct si_pub *sih)
{
si_info_t *sii;
uint origidx = 0;
@@ -1390,7 +1714,7 @@ void ai_clkctl_init(si_t *sih)
* return the value suitable for writing to the
* dot11 core FAST_PWRUP_DELAY register
*/
-u16 ai_clkctl_fast_pwrup_delay(si_t *sih)
+u16 ai_clkctl_fast_pwrup_delay(struct si_pub *sih)
{
si_info_t *sii;
uint origidx = 0;
@@ -1438,7 +1762,7 @@ u16 ai_clkctl_fast_pwrup_delay(si_t *sih)
}
/* turn primary xtal and/or pll off/on */
-int ai_clkctl_xtal(si_t *sih, uint what, bool on)
+int ai_clkctl_xtal(struct si_pub *sih, uint what, bool on)
{
si_info_t *sii;
u32 in, out, outen;
@@ -1515,7 +1839,7 @@ int ai_clkctl_xtal(si_t *sih, uint what, bool on)
* this is a wrapper over the next internal function
* to allow flexible policy settings for outside caller
*/
-bool ai_clkctl_cc(si_t *sih, uint mode)
+bool ai_clkctl_cc(struct si_pub *sih, uint mode)
{
si_info_t *sii;
@@ -1624,7 +1948,7 @@ static bool _ai_clkctl_cc(si_info_t *sii, uint mode)
}
/* Build device path. Support SI, PCI, and JTAG for now. */
-int ai_devpath(si_t *sih, char *path, int size)
+int ai_devpath(struct si_pub *sih, char *path, int size)
{
int slen;
@@ -1657,7 +1981,7 @@ int ai_devpath(si_t *sih, char *path, int size)
}
/* Get a variable, but only if it has a devpath prefix */
-char *ai_getdevpathvar(si_t *sih, const char *name)
+char *ai_getdevpathvar(struct si_pub *sih, const char *name)
{
char varname[SI_DEVPATH_BUFSZ + 32];
@@ -1667,7 +1991,7 @@ char *ai_getdevpathvar(si_t *sih, const char *name)
}
/* Get a variable, but only if it has a devpath prefix */
-int ai_getdevpathintvar(si_t *sih, const char *name)
+int ai_getdevpathintvar(struct si_pub *sih, const char *name)
{
#if defined(BCMBUSTYPE) && (BCMBUSTYPE == SI_BUS)
return getintvar(NULL, name);
@@ -1680,7 +2004,7 @@ int ai_getdevpathintvar(si_t *sih, const char *name)
#endif
}
-char *ai_getnvramflvar(si_t *sih, const char *name)
+char *ai_getnvramflvar(struct si_pub *sih, const char *name)
{
return getvar(NULL, name);
}
@@ -1690,7 +2014,8 @@ char *ai_getnvramflvar(si_t *sih, const char *name)
* len == 0 or var is NULL, var is still returned. On overflow, the
* first char will be set to '\0'.
*/
-static char *ai_devpathvar(si_t *sih, char *var, int len, const char *name)
+static char *ai_devpathvar(struct si_pub *sih, char *var, int len,
+ const char *name)
{
uint path_len;
@@ -1726,7 +2051,7 @@ static __used bool ai_ispcie(si_info_t *sii)
return true;
}
-bool ai_pci_war16165(si_t *sih)
+bool ai_pci_war16165(struct si_pub *sih)
{
si_info_t *sii;
@@ -1735,7 +2060,7 @@ bool ai_pci_war16165(si_t *sih)
return PCI(sii) && (sih->buscorerev <= 10);
}
-void ai_pci_up(si_t *sih)
+void ai_pci_up(struct si_pub *sih)
{
si_info_t *sii;
@@ -1754,7 +2079,7 @@ void ai_pci_up(si_t *sih)
}
/* Unconfigure and/or apply various WARs when system is going to sleep mode */
-void ai_pci_sleep(si_t *sih)
+void ai_pci_sleep(struct si_pub *sih)
{
si_info_t *sii;
@@ -1764,7 +2089,7 @@ void ai_pci_sleep(si_t *sih)
}
/* Unconfigure and/or apply various WARs when going down */
-void ai_pci_down(si_t *sih)
+void ai_pci_down(struct si_pub *sih)
{
si_info_t *sii;
@@ -1785,10 +2110,10 @@ void ai_pci_down(si_t *sih)
* Configure the pci core for pci client (NIC) action
* coremask is the bitvec of cores by index to be enabled.
*/
-void ai_pci_setup(si_t *sih, uint coremask)
+void ai_pci_setup(struct si_pub *sih, uint coremask)
{
si_info_t *sii;
- struct sbpciregs *pciregs = NULL;
+ void *regs = NULL;
u32 siflag = 0, w;
uint idx = 0;
@@ -1805,7 +2130,7 @@ void ai_pci_setup(si_t *sih, uint coremask)
siflag = ai_flag(sih);
/* switch over to pci core */
- pciregs = ai_setcoreidx(sih, sii->pub.buscoreidx);
+ regs = ai_setcoreidx(sih, sii->pub.buscoreidx);
}
/*
@@ -1823,16 +2148,7 @@ void ai_pci_setup(si_t *sih, uint coremask)
}
if (PCI(sii)) {
- OR_REG(&pciregs->sbtopci2,
- (SBTOPCI_PREF | SBTOPCI_BURST));
- if (sii->pub.buscorerev >= 11) {
- OR_REG(&pciregs->sbtopci2,
- SBTOPCI_RC_READMULTI);
- w = R_REG(&pciregs->clkrun);
- W_REG(&pciregs->clkrun,
- (w | PCI_CLKRUN_DSBL));
- w = R_REG(&pciregs->clkrun);
- }
+ pcicore_pci_setup(sii->pch, regs);
/* switch back to previous core */
ai_setcoreidx(sih, idx);
@@ -1843,13 +2159,10 @@ void ai_pci_setup(si_t *sih, uint coremask)
* Fixup SROMless PCI device's configuration.
* The current core may be changed upon return.
*/
-int ai_pci_fixcfg(si_t *sih)
+int ai_pci_fixcfg(struct si_pub *sih)
{
- uint origidx, pciidx;
- struct sbpciregs *pciregs = NULL;
- sbpcieregs_t *pcieregs = NULL;
+ uint origidx;
void *regs = NULL;
- u16 val16, *reg16 = NULL;
si_info_t *sii = SI_INFO(sih);
@@ -1858,23 +2171,8 @@ int ai_pci_fixcfg(si_t *sih)
origidx = ai_coreidx(&sii->pub);
/* check 'pi' is correct and fix it if not */
- if (sii->pub.buscoretype == PCIE_CORE_ID) {
- pcieregs = ai_setcore(&sii->pub, PCIE_CORE_ID, 0);
- regs = pcieregs;
- reg16 = &pcieregs->sprom[SRSH_PI_OFFSET];
- } else if (sii->pub.buscoretype == PCI_CORE_ID) {
- pciregs = ai_setcore(&sii->pub, PCI_CORE_ID, 0);
- regs = pciregs;
- reg16 = &pciregs->sprom[SRSH_PI_OFFSET];
- }
- pciidx = ai_coreidx(&sii->pub);
- val16 = R_REG(reg16);
- if (((val16 & SRSH_PI_MASK) >> SRSH_PI_SHIFT) != (u16) pciidx) {
- val16 =
- (u16) (pciidx << SRSH_PI_SHIFT) | (val16 &
- ~SRSH_PI_MASK);
- W_REG(reg16, val16);
- }
+ regs = ai_setcore(&sii->pub, sii->pub.buscoretype, 0);
+ pcicore_fixcfg(sii->pch, regs);
/* restore the original index */
ai_setcoreidx(&sii->pub, origidx);
@@ -1884,7 +2182,7 @@ int ai_pci_fixcfg(si_t *sih)
}
/* mask&set gpiocontrol bits */
-u32 ai_gpiocontrol(si_t *sih, u32 mask, u32 val, u8 priority)
+u32 ai_gpiocontrol(struct si_pub *sih, u32 mask, u32 val, u8 priority)
{
uint regoff;
@@ -1904,7 +2202,7 @@ u32 ai_gpiocontrol(si_t *sih, u32 mask, u32 val, u8 priority)
return ai_corereg(sih, SI_CC_IDX, regoff, mask, val);
}
-void ai_chipcontrl_epa4331(si_t *sih, bool on)
+void ai_chipcontrl_epa4331(struct si_pub *sih, bool on)
{
si_info_t *sii;
chipcregs_t *cc;
@@ -1938,7 +2236,7 @@ void ai_chipcontrl_epa4331(si_t *sih, bool on)
}
/* Enable BT-COEX & Ex-PA for 4313 */
-void ai_epa_4313war(si_t *sih)
+void ai_epa_4313war(struct si_pub *sih)
{
si_info_t *sii;
chipcregs_t *cc;
@@ -1957,7 +2255,7 @@ void ai_epa_4313war(si_t *sih)
}
/* check if the device is removed */
-bool ai_deviceremoved(si_t *sih)
+bool ai_deviceremoved(struct si_pub *sih)
{
u32 w;
si_info_t *sii;
@@ -1974,7 +2272,7 @@ bool ai_deviceremoved(si_t *sih)
return false;
}
-bool ai_is_sprom_available(si_t *sih)
+bool ai_is_sprom_available(struct si_pub *sih)
{
if (sih->ccrev >= 31) {
si_info_t *sii;
@@ -2011,7 +2309,7 @@ bool ai_is_sprom_available(si_t *sih)
}
}
-bool ai_is_otp_disabled(si_t *sih)
+bool ai_is_otp_disabled(struct si_pub *sih)
{
switch (sih->chip) {
case BCM4329_CHIP_ID:
@@ -2039,14 +2337,14 @@ bool ai_is_otp_disabled(si_t *sih)
}
}
-bool ai_is_otp_powered(si_t *sih)
+bool ai_is_otp_powered(struct si_pub *sih)
{
if (PMUCTL_ENAB(sih))
return si_pmu_is_otp_powered(sih);
return true;
}
-void ai_otp_power(si_t *sih, bool on)
+void ai_otp_power(struct si_pub *sih, bool on)
{
if (PMUCTL_ENAB(sih))
si_pmu_otp_power(sih, on);
diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.h b/drivers/staging/brcm80211/brcmsmac/aiutils.h
index b98099eaa621a..b007facbef1ff 100644
--- a/drivers/staging/brcm80211/brcmsmac/aiutils.h
+++ b/drivers/staging/brcm80211/brcmsmac/aiutils.h
@@ -14,18 +14,8 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#ifndef _aiutils_h_
-#define _aiutils_h_
-
-/* cpp contortions to concatenate w/arg prescan */
-#ifndef PAD
-#define _PADLINE(line) pad ## line
-#define _XSTR(line) _PADLINE(line)
-#define PAD _XSTR(__LINE__)
-#endif
-
-/* Include the soci specific files */
-#include <aidmp.h>
+#ifndef _BRCM_AIUTILS_H_
+#define _BRCM_AIUTILS_H_
/*
* SOC Interconnect Address Map.
@@ -158,9 +148,7 @@
* maps all unused address ranges
*/
-/* There are TWO constants on all HND chips: SI_ENUM_BASE above,
- * and chipcommon being the first core:
- */
+/* chipcommon being the first core: */
#define SI_CC_IDX 0
/* SOC Interconnect types (aka chip types) */
@@ -225,7 +213,70 @@
#define BISZ_BSSEND_IDX 6 /* 6: bss end */
#define BISZ_SIZE 7 /* descriptor size in 32-bit integers */
-#define SI_INFO(sih) (si_info_t *)sih
+#define CC_SROM_OTP 0x800 /* SROM/OTP address space */
+
+/* gpiotimerval */
+#define GPIO_ONTIME_SHIFT 16
+
+/* Fields in clkdiv */
+#define CLKD_OTP 0x000f0000
+#define CLKD_OTP_SHIFT 16
+
+/* When Srom support present, fields in sromcontrol */
+#define SRC_START 0x80000000
+#define SRC_BUSY 0x80000000
+#define SRC_OPCODE 0x60000000
+#define SRC_OP_READ 0x00000000
+#define SRC_OP_WRITE 0x20000000
+#define SRC_OP_WRDIS 0x40000000
+#define SRC_OP_WREN 0x60000000
+#define SRC_OTPSEL 0x00000010
+#define SRC_LOCK 0x00000008
+#define SRC_SIZE_MASK 0x00000006
+#define SRC_SIZE_1K 0x00000000
+#define SRC_SIZE_4K 0x00000002
+#define SRC_SIZE_16K 0x00000004
+#define SRC_SIZE_SHIFT 1
+#define SRC_PRESENT 0x00000001
+
+/* 4330 chip-specific ChipStatus register bits */
+#define CST4330_CHIPMODE_SDIOD(cs) (((cs) & 0x7) < 6) /* SDIO || gSPI */
+#define CST4330_CHIPMODE_USB20D(cs) (((cs) & 0x7) >= 6) /* USB || USBDA */
+#define CST4330_CHIPMODE_SDIO(cs) (((cs) & 0x4) == 0) /* SDIO */
+#define CST4330_CHIPMODE_GSPI(cs) (((cs) & 0x6) == 4) /* gSPI */
+#define CST4330_CHIPMODE_USB(cs) (((cs) & 0x7) == 6) /* USB packet-oriented */
+#define CST4330_CHIPMODE_USBDA(cs) (((cs) & 0x7) == 7) /* USB Direct Access */
+#define CST4330_OTP_PRESENT 0x00000010
+#define CST4330_LPO_AUTODET_EN 0x00000020
+#define CST4330_ARMREMAP_0 0x00000040
+#define CST4330_SPROM_PRESENT 0x00000080 /* takes priority over OTP if both set */
+#define CST4330_ILPDIV_EN 0x00000100
+#define CST4330_LPO_SEL 0x00000200
+#define CST4330_RES_INIT_MODE_SHIFT 10
+#define CST4330_RES_INIT_MODE_MASK 0x00000c00
+#define CST4330_CBUCK_MODE_SHIFT 12
+#define CST4330_CBUCK_MODE_MASK 0x00003000
+#define CST4330_CBUCK_POWER_OK 0x00004000
+#define CST4330_BB_PLL_LOCKED 0x00008000
+
+/* Package IDs */
+#define BCM4329_289PIN_PKG_ID 0 /* 4329 289-pin package id */
+#define BCM4329_182PIN_PKG_ID 1 /* 4329N 182-pin package id */
+#define BCM4717_PKG_ID 9 /* 4717 package id */
+#define BCM4718_PKG_ID 10 /* 4718 package id */
+#define HDLSIM_PKG_ID 14 /* HDL simulator package id */
+#define HWSIM_PKG_ID 15 /* Hardware simulator package id */
+#define BCM43224_FAB_SMIC 0xa /* the chip is manufactured by SMIC */
+
+/* these are router chips */
+#define BCM4716_CHIP_ID 0x4716 /* 4716 chipcommon chipid */
+#define BCM47162_CHIP_ID 47162 /* 47162 chipcommon chipid */
+#define BCM4748_CHIP_ID 0x4748 /* 4716 chipcommon chipid (OTP, RBBU) */
+#define BCM5356_CHIP_ID 0x5356 /* 5356 chipcommon chipid */
+#define BCM5357_CHIP_ID 0x5357 /* 5357 chipcommon chipid */
+
+
+#define SI_INFO(sih) ((si_info_t *)sih)
#define GOODCOREADDR(x, b) \
(((x) >= (b)) && ((x) < ((b) + SI_MAXCORES * SI_CORE_SIZE)) && \
@@ -315,13 +366,6 @@ struct si_pub {
};
/*
- * for HIGH_ONLY driver, the si_t must be writable to allow states sync from
- * BMAC to HIGH driver for monolithic driver, it is readonly to prevent accident
- * change
- */
-typedef const struct si_pub si_t;
-
-/*
* Many of the routines below take an 'sih' handle as their first arg.
* Allocate this by calling si_attach(). Free it by calling si_detach().
* At any one time, the sih is logically focused on one particular si core
@@ -453,94 +497,94 @@ typedef struct si_info {
} si_info_t;
/* AMBA Interconnect exported externs */
-extern void ai_scan(si_t *sih, void *regs, uint devid);
-
-extern uint ai_flag(si_t *sih);
-extern void ai_setint(si_t *sih, int siflag);
-extern uint ai_coreidx(si_t *sih);
-extern uint ai_corevendor(si_t *sih);
-extern uint ai_corerev(si_t *sih);
-extern bool ai_iscoreup(si_t *sih);
-extern void *ai_setcoreidx(si_t *sih, uint coreidx);
-extern u32 ai_core_cflags(si_t *sih, u32 mask, u32 val);
-extern void ai_core_cflags_wo(si_t *sih, u32 mask, u32 val);
-extern u32 ai_core_sflags(si_t *sih, u32 mask, u32 val);
-extern uint ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask,
+extern void ai_scan(struct si_pub *sih, void *regs, uint devid);
+
+extern uint ai_flag(struct si_pub *sih);
+extern void ai_setint(struct si_pub *sih, int siflag);
+extern uint ai_coreidx(struct si_pub *sih);
+extern uint ai_corevendor(struct si_pub *sih);
+extern uint ai_corerev(struct si_pub *sih);
+extern bool ai_iscoreup(struct si_pub *sih);
+extern void *ai_setcoreidx(struct si_pub *sih, uint coreidx);
+extern u32 ai_core_cflags(struct si_pub *sih, u32 mask, u32 val);
+extern void ai_core_cflags_wo(struct si_pub *sih, u32 mask, u32 val);
+extern u32 ai_core_sflags(struct si_pub *sih, u32 mask, u32 val);
+extern uint ai_corereg(struct si_pub *sih, uint coreidx, uint regoff, uint mask,
uint val);
-extern void ai_core_reset(si_t *sih, u32 bits, u32 resetbits);
-extern void ai_core_disable(si_t *sih, u32 bits);
-extern int ai_numaddrspaces(si_t *sih);
-extern u32 ai_addrspace(si_t *sih, uint asidx);
-extern u32 ai_addrspacesize(si_t *sih, uint asidx);
-extern void ai_write_wrap_reg(si_t *sih, u32 offset, u32 val);
+extern void ai_core_reset(struct si_pub *sih, u32 bits, u32 resetbits);
+extern void ai_core_disable(struct si_pub *sih, u32 bits);
+extern int ai_numaddrspaces(struct si_pub *sih);
+extern u32 ai_addrspace(struct si_pub *sih, uint asidx);
+extern u32 ai_addrspacesize(struct si_pub *sih, uint asidx);
+extern void ai_write_wrap_reg(struct si_pub *sih, u32 offset, u32 val);
/* === exported functions === */
-extern si_t *ai_attach(uint pcidev, void *regs, uint bustype,
+extern struct si_pub *ai_attach(uint pcidev, void *regs, uint bustype,
void *sdh, char **vars, uint *varsz);
-extern void ai_detach(si_t *sih);
-extern bool ai_pci_war16165(si_t *sih);
+extern void ai_detach(struct si_pub *sih);
+extern bool ai_pci_war16165(struct si_pub *sih);
-extern uint ai_coreid(si_t *sih);
-extern uint ai_corerev(si_t *sih);
-extern uint ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask,
+extern uint ai_coreid(struct si_pub *sih);
+extern uint ai_corerev(struct si_pub *sih);
+extern uint ai_corereg(struct si_pub *sih, uint coreidx, uint regoff, uint mask,
uint val);
-extern void ai_write_wrapperreg(si_t *sih, u32 offset, u32 val);
-extern u32 ai_core_cflags(si_t *sih, u32 mask, u32 val);
-extern u32 ai_core_sflags(si_t *sih, u32 mask, u32 val);
-extern bool ai_iscoreup(si_t *sih);
-extern uint ai_findcoreidx(si_t *sih, uint coreid, uint coreunit);
-extern void *ai_setcoreidx(si_t *sih, uint coreidx);
-extern void *ai_setcore(si_t *sih, uint coreid, uint coreunit);
-extern void *ai_switch_core(si_t *sih, uint coreid, uint *origidx,
+extern void ai_write_wrapperreg(struct si_pub *sih, u32 offset, u32 val);
+extern u32 ai_core_cflags(struct si_pub *sih, u32 mask, u32 val);
+extern u32 ai_core_sflags(struct si_pub *sih, u32 mask, u32 val);
+extern bool ai_iscoreup(struct si_pub *sih);
+extern uint ai_findcoreidx(struct si_pub *sih, uint coreid, uint coreunit);
+extern void *ai_setcoreidx(struct si_pub *sih, uint coreidx);
+extern void *ai_setcore(struct si_pub *sih, uint coreid, uint coreunit);
+extern void *ai_switch_core(struct si_pub *sih, uint coreid, uint *origidx,
uint *intr_val);
-extern void ai_restore_core(si_t *sih, uint coreid, uint intr_val);
-extern void ai_core_reset(si_t *sih, u32 bits, u32 resetbits);
-extern void ai_core_disable(si_t *sih, u32 bits);
-extern u32 ai_alp_clock(si_t *sih);
-extern u32 ai_ilp_clock(si_t *sih);
-extern void ai_pci_setup(si_t *sih, uint coremask);
-extern void ai_setint(si_t *sih, int siflag);
-extern bool ai_backplane64(si_t *sih);
-extern void ai_register_intr_callback(si_t *sih, void *intrsoff_fn,
+extern void ai_restore_core(struct si_pub *sih, uint coreid, uint intr_val);
+extern void ai_core_reset(struct si_pub *sih, u32 bits, u32 resetbits);
+extern void ai_core_disable(struct si_pub *sih, u32 bits);
+extern u32 ai_alp_clock(struct si_pub *sih);
+extern u32 ai_ilp_clock(struct si_pub *sih);
+extern void ai_pci_setup(struct si_pub *sih, uint coremask);
+extern void ai_setint(struct si_pub *sih, int siflag);
+extern bool ai_backplane64(struct si_pub *sih);
+extern void ai_register_intr_callback(struct si_pub *sih, void *intrsoff_fn,
void *intrsrestore_fn,
void *intrsenabled_fn, void *intr_arg);
-extern void ai_deregister_intr_callback(si_t *sih);
-extern void ai_clkctl_init(si_t *sih);
-extern u16 ai_clkctl_fast_pwrup_delay(si_t *sih);
-extern bool ai_clkctl_cc(si_t *sih, uint mode);
-extern int ai_clkctl_xtal(si_t *sih, uint what, bool on);
-extern bool ai_deviceremoved(si_t *sih);
-extern u32 ai_gpiocontrol(si_t *sih, u32 mask, u32 val,
+extern void ai_deregister_intr_callback(struct si_pub *sih);
+extern void ai_clkctl_init(struct si_pub *sih);
+extern u16 ai_clkctl_fast_pwrup_delay(struct si_pub *sih);
+extern bool ai_clkctl_cc(struct si_pub *sih, uint mode);
+extern int ai_clkctl_xtal(struct si_pub *sih, uint what, bool on);
+extern bool ai_deviceremoved(struct si_pub *sih);
+extern u32 ai_gpiocontrol(struct si_pub *sih, u32 mask, u32 val,
u8 priority);
/* OTP status */
-extern bool ai_is_otp_disabled(si_t *sih);
-extern bool ai_is_otp_powered(si_t *sih);
-extern void ai_otp_power(si_t *sih, bool on);
+extern bool ai_is_otp_disabled(struct si_pub *sih);
+extern bool ai_is_otp_powered(struct si_pub *sih);
+extern void ai_otp_power(struct si_pub *sih, bool on);
/* SPROM availability */
-extern bool ai_is_sprom_available(si_t *sih);
+extern bool ai_is_sprom_available(struct si_pub *sih);
/*
* Build device path. Path size must be >= SI_DEVPATH_BUFSZ.
* The returned path is NULL terminated and has trailing '/'.
* Return 0 on success, nonzero otherwise.
*/
-extern int ai_devpath(si_t *sih, char *path, int size);
+extern int ai_devpath(struct si_pub *sih, char *path, int size);
/* Read variable with prepending the devpath to the name */
-extern char *ai_getdevpathvar(si_t *sih, const char *name);
-extern int ai_getdevpathintvar(si_t *sih, const char *name);
+extern char *ai_getdevpathvar(struct si_pub *sih, const char *name);
+extern int ai_getdevpathintvar(struct si_pub *sih, const char *name);
-extern void ai_pci_sleep(si_t *sih);
-extern void ai_pci_down(si_t *sih);
-extern void ai_pci_up(si_t *sih);
-extern int ai_pci_fixcfg(si_t *sih);
+extern void ai_pci_sleep(struct si_pub *sih);
+extern void ai_pci_down(struct si_pub *sih);
+extern void ai_pci_up(struct si_pub *sih);
+extern int ai_pci_fixcfg(struct si_pub *sih);
-extern void ai_chipcontrl_epa4331(si_t *sih, bool on);
+extern void ai_chipcontrl_epa4331(struct si_pub *sih, bool on);
/* Enable Ex-PA for 4313 */
-extern void ai_epa_4313war(si_t *sih);
+extern void ai_epa_4313war(struct si_pub *sih);
-char *ai_getnvramflvar(si_t *sih, const char *name);
+char *ai_getnvramflvar(struct si_pub *sih, const char *name);
-#endif /* _aiutils_h_ */
+#endif /* _BRCM_AIUTILS_H_ */
diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c b/drivers/staging/brcm80211/brcmsmac/alloc.c
index 82c64cd4486fb..a884ae4e48bb6 100644
--- a/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c
+++ b/drivers/staging/brcm80211/brcmsmac/alloc.c
@@ -16,25 +16,20 @@
#include <linux/kernel.h>
#include <linux/types.h>
-#include <bcmdefs.h>
-#include <bcmutils.h>
+#include <defs.h>
+#include <brcmu_utils.h>
#include <aiutils.h>
-#include <wlioctl.h>
-#include <sbhnddma.h>
+#include "dma.h"
#include "d11.h"
-#include "wlc_types.h"
-#include "wlc_cfg.h"
-#include "wlc_scb.h"
-#include "wlc_pub.h"
-#include "wlc_key.h"
-#include "wlc_alloc.h"
-#include "wl_dbg.h"
-#include "wlc_rate.h"
-#include "wlc_bsscfg.h"
-#include "phy/wlc_phy_hal.h"
-#include "wlc_channel.h"
-#include "wlc_main.h"
+#include "types.h"
+#include "scb.h"
+#include "pub.h"
+#include "alloc.h"
+#include "rate.h"
+#include "phy/phy_hal.h"
+#include "channel.h"
+#include "main.h"
static struct wlc_bsscfg *wlc_bsscfg_malloc(uint unit);
static void wlc_bsscfg_mfree(struct wlc_bsscfg *cfg);
@@ -152,8 +147,6 @@ struct wlc_info *wlc_attach_malloc(uint unit, uint *err, uint devid)
goto fail;
}
- wlc->hwrxoff = WL_HWRXOFF;
-
/* allocate struct wlc_pub state structure */
wlc->pub = wlc_pub_malloc(unit, err, devid);
if (wlc->pub == NULL) {
@@ -206,14 +199,6 @@ struct wlc_info *wlc_attach_malloc(uint unit, uint *err, uint devid)
}
wlc_bsscfg_ID_assign(wlc, wlc->cfg);
- wlc->pkt_callback = kzalloc(sizeof(struct pkt_cb) *
- (wlc->pub->tunables->maxpktcb + 1),
- GFP_ATOMIC);
- if (wlc->pkt_callback == NULL) {
- *err = 1013;
- goto fail;
- }
-
wlc->wsec_def_keys[0] =
kzalloc(sizeof(wsec_key_t) * WLC_DEFAULT_KEYS, GFP_ATOMIC);
if (wlc->wsec_def_keys[0] == NULL) {
@@ -284,7 +269,6 @@ void wlc_detach_mfree(struct wlc_info *wlc)
wlc_pub_mfree(wlc->pub);
kfree(wlc->modulecb);
kfree(wlc->default_bss);
- kfree(wlc->pkt_callback);
kfree(wlc->wsec_def_keys[0]);
kfree(wlc->protection);
kfree(wlc->stf);
diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_alloc.h b/drivers/staging/brcm80211/brcmsmac/alloc.h
index 95f951eb2b2fe..95f951eb2b2fe 100644
--- a/drivers/staging/brcm80211/brcmsmac/wlc_alloc.h
+++ b/drivers/staging/brcm80211/brcmsmac/alloc.h
diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c b/drivers/staging/brcm80211/brcmsmac/ampdu.c
index 85ad700960569..7cf0018f58c5c 100644
--- a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c
+++ b/drivers/staging/brcm80211/brcmsmac/ampdu.c
@@ -16,27 +16,21 @@
#include <linux/kernel.h>
#include <net/mac80211.h>
-#include <bcmdefs.h>
-#include <bcmutils.h>
+#include <defs.h>
+#include <brcmu_utils.h>
#include <aiutils.h>
-#include <wlioctl.h>
-#include <sbhnddma.h>
-#include <hnddma.h>
+#include "dma.h"
#include <d11.h>
-#include "wlc_types.h"
-#include "wlc_cfg.h"
-#include "wlc_rate.h"
-#include "wlc_scb.h"
-#include "wlc_pub.h"
-#include "wlc_key.h"
-#include "phy/wlc_phy_hal.h"
-#include "wlc_antsel.h"
-#include "wl_export.h"
-#include "wl_dbg.h"
-#include "wlc_channel.h"
-#include "wlc_main.h"
-#include "wlc_ampdu.h"
+#include "types.h"
+#include "rate.h"
+#include "scb.h"
+#include "pub.h"
+#include "phy/phy_hal.h"
+#include "antsel.h"
+#include "channel.h"
+#include "main.h"
+#include "ampdu.h"
#define AMPDU_MAX_MPDU 32 /* max number of mpdus in an ampdu */
#define AMPDU_NUM_MPDU_LEGACY 16 /* max number of mpdus in an ampdu to a legacy */
@@ -499,10 +493,6 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi,
wlc_ampdu_agg(ampdu, scb, p, tid);
- if (wlc->block_datafifo) {
- wiphy_err(wiphy, "%s: Fifo blocked\n", __func__);
- return -EBUSY;
- }
rr_retry_limit = ampdu->rr_retry_limit_tid[tid];
ampdu_len = 0;
dma_len = 0;
@@ -598,7 +588,7 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi,
len = roundup(len, 4);
ampdu_len += (len + (ndelim + 1) * AMPDU_DELIMITER_LEN);
- dma_len += (u16) bcm_pkttotlen(p);
+ dma_len += (u16) brcmu_pkttotlen(p);
BCMMSG(wlc->wiphy, "wl%d: ampdu_len %d"
" seg_cnt %d null delim %d\n",
@@ -693,8 +683,8 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi,
if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) &&
((u8) (p->priority) == tid)) {
- plen =
- bcm_pkttotlen(p) + AMPDU_MAX_MPDU_OVERHEAD;
+ plen = brcmu_pkttotlen(p) +
+ AMPDU_MAX_MPDU_OVERHEAD;
plen = max(scb_ampdu->min_len, plen);
if ((plen + ampdu_len) > maxlen) {
@@ -711,7 +701,7 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi,
p = NULL;
continue;
}
- p = bcm_pktq_pdeq(&qi->q, prec);
+ p = brcmu_pktq_pdeq(&qi->q, prec);
} else {
p = NULL;
}
@@ -871,7 +861,7 @@ wlc_ampdu_dotxstatus(struct ampdu_info *ampdu, struct scb *scb,
tx_info = IEEE80211_SKB_CB(p);
txh = (d11txh_t *) p->data;
mcl = le16_to_cpu(txh->MacTxControlLow);
- bcm_pkt_buf_free_skb(p);
+ brcmu_pkt_buf_free_skb(p);
/* break out if last packet of ampdu */
if (((mcl & TXC_AMPDU_MASK) >> TXC_AMPDU_SHIFT) ==
TXC_AMPDU_LAST)
@@ -1000,7 +990,7 @@ wlc_ampdu_dotxstatus_complete(struct ampdu_info *ampdu, struct scb *scb,
txs->phyerr);
if (WL_ERROR_ON()) {
- bcm_prpkt("txpkt (AMPDU)", p);
+ brcmu_prpkt("txpkt (AMPDU)", p);
wlc_print_txdesc((d11txh_t *) p->data);
}
wlc_print_txstatus(txs);
@@ -1246,7 +1236,7 @@ void wlc_ampdu_flush(struct wlc_info *wlc,
ampdu_pars.sta = sta;
ampdu_pars.tid = tid;
for (prec = 0; prec < pq->num_prec; prec++) {
- bcm_pktq_pflush(pq, prec, true, cb_del_ampdu_pkt,
+ brcmu_pktq_pflush(pq, prec, true, cb_del_ampdu_pkt,
(void *)&ampdu_pars);
}
wlc_inval_dma_pkts(wlc->hw, sta, dma_cb_fn_ampdu);
diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.h b/drivers/staging/brcm80211/brcmsmac/ampdu.h
index 63d403b036f46..df7d7d9693488 100644
--- a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.h
+++ b/drivers/staging/brcm80211/brcmsmac/ampdu.h
@@ -14,8 +14,8 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#ifndef _wlc_ampdu_h_
-#define _wlc_ampdu_h_
+#ifndef _BRCM_AMPDU_H_
+#define _BRCM_AMPDU_H_
extern struct ampdu_info *wlc_ampdu_attach(struct wlc_info *wlc);
extern void wlc_ampdu_detach(struct ampdu_info *ampdu);
@@ -26,4 +26,4 @@ extern void wlc_ampdu_dotxstatus(struct ampdu_info *ampdu, struct scb *scb,
extern void wlc_ampdu_macaddr_upd(struct wlc_info *wlc);
extern void wlc_ampdu_shm_upd(struct ampdu_info *ampdu);
-#endif /* _wlc_ampdu_h_ */
+#endif /* _BRCM_AMPDU_H_ */
diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c b/drivers/staging/brcm80211/brcmsmac/antsel.c
index 111ef32b7ac44..f967c592cae70 100644
--- a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c
+++ b/drivers/staging/brcm80211/brcmsmac/antsel.c
@@ -14,33 +14,32 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#include <wlc_cfg.h>
-
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
-#include <bcmdefs.h>
-#include <bcmutils.h>
-#include <bcmnvram.h>
+#include <defs.h>
+#include <brcmu_utils.h>
#include <aiutils.h>
-#include <bcmdevs.h>
-#include <sbhnddma.h>
-#include <wlioctl.h>
+#include <brcm_hw_ids.h>
+#include "dma.h"
#include "d11.h"
-#include "wlc_rate.h"
-#include "wlc_key.h"
-#include "wlc_scb.h"
-#include "wlc_pub.h"
-#include "wl_dbg.h"
-#include "phy/wlc_phy_hal.h"
-#include "wlc_bmac.h"
-#include "wlc_channel.h"
-#include "wlc_main.h"
-#include "wl_export.h"
-#include "wlc_phy_shim.h"
-#include "wlc_antsel.h"
+#include "rate.h"
+#include "scb.h"
+#include "pub.h"
+#include "phy/phy_hal.h"
+#include "bmac.h"
+#include "channel.h"
+#include "main.h"
+#include "antsel.h"
+
+#define ANT_SELCFG_AUTO 0x80 /* bit indicates antenna sel AUTO */
+#define ANT_SELCFG_MASK 0x33 /* antenna configuration mask */
+#define ANT_SELCFG_TX_UNICAST 0 /* unicast tx antenna configuration */
+#define ANT_SELCFG_RX_UNICAST 1 /* unicast rx antenna configuration */
+#define ANT_SELCFG_TX_DEF 2 /* default tx antenna configuration */
+#define ANT_SELCFG_RX_DEF 3 /* default rx antenna configuration */
/* useful macros */
#define WLC_ANTSEL_11N_0(ant) ((((ant) & ANT_SELCFG_MASK) >> 4) & 0xf)
diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.h b/drivers/staging/brcm80211/brcmsmac/antsel.h
index 2470c73fc4edd..c1b9cef980c6d 100644
--- a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.h
+++ b/drivers/staging/brcm80211/brcmsmac/antsel.h
@@ -14,8 +14,8 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#ifndef _wlc_antsel_h_
-#define _wlc_antsel_h_
+#ifndef _BRCM_ANTSEL_H_
+#define _BRCM_ANTSEL_H_
extern struct antsel_info *wlc_antsel_attach(struct wlc_info *wlc);
extern void wlc_antsel_detach(struct antsel_info *asi);
@@ -26,4 +26,4 @@ extern void wlc_antsel_antcfg_get(struct antsel_info *asi, bool usedef,
u8 *fbantcfg);
extern u8 wlc_antsel_antsel2id(struct antsel_info *asi, u16 antsel);
-#endif /* _wlc_antsel_h_ */
+#endif /* _BRCM_ANTSEL_H_ */
diff --git a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c
deleted file mode 100644
index bbfc642043636..0000000000000
--- a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c
+++ /dev/null
@@ -1,714 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/etherdevice.h>
-#include <bcmdefs.h>
-#include <linux/module.h>
-#include <linux/pci.h>
-#include <stdarg.h>
-#include <bcmutils.h>
-#include <hndsoc.h>
-#include <sbchipc.h>
-#include <bcmdevs.h>
-#include <pcicfg.h>
-#include <aiutils.h>
-#include <bcmsrom.h>
-#include <bcmsrom_tbl.h>
-
-#include <bcmnvram.h>
-#include <bcmotp.h>
-
-#define SROM_OFFSET(sih) ((sih->ccrev > 31) ? \
- (((sih->cccaps & CC_CAP_SROM) == 0) ? NULL : \
- ((u8 *)curmap + PCI_16KB0_CCREGS_OFFSET + CC_SROM_OTP)) : \
- ((u8 *)curmap + PCI_BAR0_SPROM_OFFSET))
-
-#if defined(BCMDBG)
-#define WRITE_ENABLE_DELAY 500 /* 500 ms after write enable/disable toggle */
-#define WRITE_WORD_DELAY 20 /* 20 ms between each word write */
-#endif
-
-typedef struct varbuf {
- char *base; /* pointer to buffer base */
- char *buf; /* pointer to current position */
- unsigned int size; /* current (residual) size in bytes */
-} varbuf_t;
-extern char *_vars;
-extern uint _varsz;
-
-static int initvars_srom_si(si_t *sih, void *curmap, char **vars, uint *count);
-static void _initvars_srom_pci(u8 sromrev, u16 *srom, uint off, varbuf_t *b);
-static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count);
-static int initvars_flash_si(si_t *sih, char **vars, uint *count);
-static int sprom_read_pci(si_t *sih, u16 *sprom,
- uint wordoff, u16 *buf, uint nwords, bool check_crc);
-#if defined(BCMNVRAMR)
-static int otp_read_pci(si_t *sih, u16 *buf, uint bufsz);
-#endif
-static u16 srom_cc_cmd(si_t *sih, void *ccregs, u32 cmd,
- uint wordoff, u16 data);
-
-static int initvars_table(char *start, char *end,
- char **vars, uint *count);
-static int initvars_flash(si_t *sih, char **vp,
- uint len);
-
-/* Initialization of varbuf structure */
-static void varbuf_init(varbuf_t *b, char *buf, uint size)
-{
- b->size = size;
- b->base = b->buf = buf;
-}
-
-/* append a null terminated var=value string */
-static int varbuf_append(varbuf_t *b, const char *fmt, ...)
-{
- va_list ap;
- int r;
- size_t len;
- char *s;
-
- if (b->size < 2)
- return 0;
-
- va_start(ap, fmt);
- r = vsnprintf(b->buf, b->size, fmt, ap);
- va_end(ap);
-
- /* C99 snprintf behavior returns r >= size on overflow,
- * others return -1 on overflow.
- * All return -1 on format error.
- * We need to leave room for 2 null terminations, one for the current var
- * string, and one for final null of the var table. So check that the
- * strlen written, r, leaves room for 2 chars.
- */
- if ((r == -1) || (r > (int)(b->size - 2))) {
- b->size = 0;
- return 0;
- }
-
- /* Remove any earlier occurrence of the same variable */
- s = strchr(b->buf, '=');
- if (s != NULL) {
- len = (size_t) (s - b->buf);
- for (s = b->base; s < b->buf;) {
- if ((memcmp(s, b->buf, len) == 0) && s[len] == '=') {
- len = strlen(s) + 1;
- memmove(s, (s + len),
- ((b->buf + r + 1) - (s + len)));
- b->buf -= len;
- b->size += (unsigned int)len;
- break;
- }
-
- while (*s++)
- ;
- }
- }
-
- /* skip over this string's null termination */
- r++;
- b->size -= r;
- b->buf += r;
-
- return r;
-}
-
-/*
- * Initialize local vars from the right source for this platform.
- * Return 0 on success, nonzero on error.
- */
-int srom_var_init(si_t *sih, uint bustype, void *curmap,
- char **vars, uint *count)
-{
- uint len;
-
- len = 0;
-
- if (vars == NULL || count == NULL)
- return 0;
-
- *vars = NULL;
- *count = 0;
-
- switch (bustype) {
- case SI_BUS:
- case JTAG_BUS:
- return initvars_srom_si(sih, curmap, vars, count);
-
- case PCI_BUS:
- if (curmap == NULL)
- return -1;
-
- return initvars_srom_pci(sih, curmap, vars, count);
-
- default:
- break;
- }
- return -1;
-}
-
-/* In chips with chipcommon rev 32 and later, the srom is in chipcommon,
- * not in the bus cores.
- */
-static u16
-srom_cc_cmd(si_t *sih, void *ccregs, u32 cmd,
- uint wordoff, u16 data)
-{
- chipcregs_t *cc = (chipcregs_t *) ccregs;
- uint wait_cnt = 1000;
-
- if ((cmd == SRC_OP_READ) || (cmd == SRC_OP_WRITE)) {
- W_REG(&cc->sromaddress, wordoff * 2);
- if (cmd == SRC_OP_WRITE)
- W_REG(&cc->sromdata, data);
- }
-
- W_REG(&cc->sromcontrol, SRC_START | cmd);
-
- while (wait_cnt--) {
- if ((R_REG(&cc->sromcontrol) & SRC_BUSY) == 0)
- break;
- }
-
- if (!wait_cnt) {
- return 0xffff;
- }
- if (cmd == SRC_OP_READ)
- return (u16) R_REG(&cc->sromdata);
- else
- return 0xffff;
-}
-
-static inline void ltoh16_buf(u16 *buf, unsigned int size)
-{
- for (size /= 2; size; size--)
- *(buf + size) = le16_to_cpu(*(buf + size));
-}
-
-static inline void htol16_buf(u16 *buf, unsigned int size)
-{
- for (size /= 2; size; size--)
- *(buf + size) = cpu_to_le16(*(buf + size));
-}
-
-/*
- * Read in and validate sprom.
- * Return 0 on success, nonzero on error.
- */
-static int
-sprom_read_pci(si_t *sih, u16 *sprom, uint wordoff,
- u16 *buf, uint nwords, bool check_crc)
-{
- int err = 0;
- uint i;
- void *ccregs = NULL;
-
- /* read the sprom */
- for (i = 0; i < nwords; i++) {
-
- if (sih->ccrev > 31 && ISSIM_ENAB(sih)) {
- /* use indirect since direct is too slow on QT */
- if ((sih->cccaps & CC_CAP_SROM) == 0)
- return 1;
-
- ccregs = (void *)((u8 *) sprom - CC_SROM_OTP);
- buf[i] =
- srom_cc_cmd(sih, ccregs, SRC_OP_READ,
- wordoff + i, 0);
-
- } else {
- if (ISSIM_ENAB(sih))
- buf[i] = R_REG(&sprom[wordoff + i]);
-
- buf[i] = R_REG(&sprom[wordoff + i]);
- }
-
- }
-
- /* bypass crc checking for simulation to allow srom hack */
- if (ISSIM_ENAB(sih))
- return err;
-
- if (check_crc) {
-
- if (buf[0] == 0xffff) {
- /* The hardware thinks that an srom that starts with 0xffff
- * is blank, regardless of the rest of the content, so declare
- * it bad.
- */
- return 1;
- }
-
- /* fixup the endianness so crc8 will pass */
- htol16_buf(buf, nwords * 2);
- if (bcm_crc8((u8 *) buf, nwords * 2, CRC8_INIT_VALUE) !=
- CRC8_GOOD_VALUE) {
- /* DBG only pci always read srom4 first, then srom8/9 */
- err = 1;
- }
- /* now correct the endianness of the byte array */
- ltoh16_buf(buf, nwords * 2);
- }
- return err;
-}
-
-#if defined(BCMNVRAMR)
-static int otp_read_pci(si_t *sih, u16 *buf, uint bufsz)
-{
- u8 *otp;
- uint sz = OTP_SZ_MAX / 2; /* size in words */
- int err = 0;
-
- otp = kzalloc(OTP_SZ_MAX, GFP_ATOMIC);
- if (otp == NULL) {
- return -EBADE;
- }
-
- err = otp_read_region(sih, OTP_HW_RGN, (u16 *) otp, &sz);
-
- memcpy(buf, otp, bufsz);
-
- kfree(otp);
-
- /* Check CRC */
- if (buf[0] == 0xffff) {
- /* The hardware thinks that an srom that starts with 0xffff
- * is blank, regardless of the rest of the content, so declare
- * it bad.
- */
- return 1;
- }
-
- /* fixup the endianness so crc8 will pass */
- htol16_buf(buf, bufsz);
- if (bcm_crc8((u8 *) buf, SROM4_WORDS * 2, CRC8_INIT_VALUE) !=
- CRC8_GOOD_VALUE) {
- err = 1;
- }
- /* now correct the endianness of the byte array */
- ltoh16_buf(buf, bufsz);
-
- return err;
-}
-#endif /* defined(BCMNVRAMR) */
-/*
-* Create variable table from memory.
-* Return 0 on success, nonzero on error.
-*/
-static int initvars_table(char *start, char *end,
- char **vars, uint *count)
-{
- int c = (int)(end - start);
-
- /* do it only when there is more than just the null string */
- if (c > 1) {
- char *vp = kmalloc(c, GFP_ATOMIC);
- if (!vp)
- return -ENOMEM;
- memcpy(vp, start, c);
- *vars = vp;
- *count = c;
- } else {
- *vars = NULL;
- *count = 0;
- }
-
- return 0;
-}
-
-/*
- * Find variables with <devpath> from flash. 'base' points to the beginning
- * of the table upon enter and to the end of the table upon exit when success.
- * Return 0 on success, nonzero on error.
- */
-static int initvars_flash(si_t *sih, char **base, uint len)
-{
- char *vp = *base;
- char *flash;
- int err;
- char *s;
- uint l, dl, copy_len;
- char devpath[SI_DEVPATH_BUFSZ];
-
- /* allocate memory and read in flash */
- flash = kmalloc(NVRAM_SPACE, GFP_ATOMIC);
- if (!flash)
- return -ENOMEM;
- err = nvram_getall(flash, NVRAM_SPACE);
- if (err)
- goto exit;
-
- ai_devpath(sih, devpath, sizeof(devpath));
-
- /* grab vars with the <devpath> prefix in name */
- dl = strlen(devpath);
- for (s = flash; s && *s; s += l + 1) {
- l = strlen(s);
-
- /* skip non-matching variable */
- if (strncmp(s, devpath, dl))
- continue;
-
- /* is there enough room to copy? */
- copy_len = l - dl + 1;
- if (len < copy_len) {
- err = -EOVERFLOW;
- goto exit;
- }
-
- /* no prefix, just the name=value */
- strncpy(vp, &s[dl], copy_len);
- vp += copy_len;
- len -= copy_len;
- }
-
- /* add null string as terminator */
- if (len < 1) {
- err = -EOVERFLOW;
- goto exit;
- }
- *vp++ = '\0';
-
- *base = vp;
-
- exit: kfree(flash);
- return err;
-}
-
-/*
- * Initialize nonvolatile variable table from flash.
- * Return 0 on success, nonzero on error.
- */
-static int initvars_flash_si(si_t *sih, char **vars, uint *count)
-{
- char *vp, *base;
- int err;
-
- base = vp = kmalloc(MAXSZ_NVRAM_VARS, GFP_ATOMIC);
- if (!vp)
- return -ENOMEM;
-
- err = initvars_flash(sih, &vp, MAXSZ_NVRAM_VARS);
- if (err == 0)
- err = initvars_table(base, vp, vars, count);
-
- kfree(base);
-
- return err;
-}
-
-/* Parse SROM and create name=value pairs. 'srom' points to
- * the SROM word array. 'off' specifies the offset of the
- * first word 'srom' points to, which should be either 0 or
- * SROM3_SWRG_OFF (full SROM or software region).
- */
-
-static uint mask_shift(u16 mask)
-{
- uint i;
- for (i = 0; i < (sizeof(mask) << 3); i++) {
- if (mask & (1 << i))
- return i;
- }
- return 0;
-}
-
-static uint mask_width(u16 mask)
-{
- int i;
- for (i = (sizeof(mask) << 3) - 1; i >= 0; i--) {
- if (mask & (1 << i))
- return (uint) (i - mask_shift(mask) + 1);
- }
- return 0;
-}
-
-static void _initvars_srom_pci(u8 sromrev, u16 *srom, uint off, varbuf_t *b)
-{
- u16 w;
- u32 val;
- const sromvar_t *srv;
- uint width;
- uint flags;
- u32 sr = (1 << sromrev);
-
- varbuf_append(b, "sromrev=%d", sromrev);
-
- for (srv = pci_sromvars; srv->name != NULL; srv++) {
- const char *name;
-
- if ((srv->revmask & sr) == 0)
- continue;
-
- if (srv->off < off)
- continue;
-
- flags = srv->flags;
- name = srv->name;
-
- /* This entry is for mfgc only. Don't generate param for it, */
- if (flags & SRFL_NOVAR)
- continue;
-
- if (flags & SRFL_ETHADDR) {
- u8 ea[ETH_ALEN];
-
- ea[0] = (srom[srv->off - off] >> 8) & 0xff;
- ea[1] = srom[srv->off - off] & 0xff;
- ea[2] = (srom[srv->off + 1 - off] >> 8) & 0xff;
- ea[3] = srom[srv->off + 1 - off] & 0xff;
- ea[4] = (srom[srv->off + 2 - off] >> 8) & 0xff;
- ea[5] = srom[srv->off + 2 - off] & 0xff;
-
- varbuf_append(b, "%s=%pM", name, ea);
- } else {
- w = srom[srv->off - off];
- val = (w & srv->mask) >> mask_shift(srv->mask);
- width = mask_width(srv->mask);
-
- while (srv->flags & SRFL_MORE) {
- srv++;
- if (srv->off == 0 || srv->off < off)
- continue;
-
- w = srom[srv->off - off];
- val +=
- ((w & srv->mask) >> mask_shift(srv->
- mask)) <<
- width;
- width += mask_width(srv->mask);
- }
-
- if ((flags & SRFL_NOFFS)
- && ((int)val == (1 << width) - 1))
- continue;
-
- if (flags & SRFL_CCODE) {
- if (val == 0)
- varbuf_append(b, "ccode=");
- else
- varbuf_append(b, "ccode=%c%c",
- (val >> 8), (val & 0xff));
- }
- /* LED Powersave duty cycle has to be scaled:
- *(oncount >> 24) (offcount >> 8)
- */
- else if (flags & SRFL_LEDDC) {
- u32 w32 = (((val >> 8) & 0xff) << 24) | /* oncount */
- (((val & 0xff)) << 8); /* offcount */
- varbuf_append(b, "leddc=%d", w32);
- } else if (flags & SRFL_PRHEX)
- varbuf_append(b, "%s=0x%x", name, val);
- else if ((flags & SRFL_PRSIGN)
- && (val & (1 << (width - 1))))
- varbuf_append(b, "%s=%d", name,
- (int)(val | (~0 << width)));
- else
- varbuf_append(b, "%s=%u", name, val);
- }
- }
-
- if (sromrev >= 4) {
- /* Do per-path variables */
- uint p, pb, psz;
-
- if (sromrev >= 8) {
- pb = SROM8_PATH0;
- psz = SROM8_PATH1 - SROM8_PATH0;
- } else {
- pb = SROM4_PATH0;
- psz = SROM4_PATH1 - SROM4_PATH0;
- }
-
- for (p = 0; p < MAX_PATH_SROM; p++) {
- for (srv = perpath_pci_sromvars; srv->name != NULL;
- srv++) {
- if ((srv->revmask & sr) == 0)
- continue;
-
- if (pb + srv->off < off)
- continue;
-
- /* This entry is for mfgc only. Don't generate param for it, */
- if (srv->flags & SRFL_NOVAR)
- continue;
-
- w = srom[pb + srv->off - off];
- val = (w & srv->mask) >> mask_shift(srv->mask);
- width = mask_width(srv->mask);
-
- /* Cheating: no per-path var is more than 1 word */
-
- if ((srv->flags & SRFL_NOFFS)
- && ((int)val == (1 << width) - 1))
- continue;
-
- if (srv->flags & SRFL_PRHEX)
- varbuf_append(b, "%s%d=0x%x", srv->name,
- p, val);
- else
- varbuf_append(b, "%s%d=%d", srv->name,
- p, val);
- }
- pb += psz;
- }
- }
-}
-
-/*
- * Initialize nonvolatile variable table from sprom.
- * Return 0 on success, nonzero on error.
- */
-static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count)
-{
- u16 *srom, *sromwindow;
- u8 sromrev = 0;
- u32 sr;
- varbuf_t b;
- char *vp, *base = NULL;
- bool flash = false;
- int err = 0;
-
- /*
- * Apply CRC over SROM content regardless SROM is present or not,
- * and use variable <devpath>sromrev's existence in flash to decide
- * if we should return an error when CRC fails or read SROM variables
- * from flash.
- */
- srom = kmalloc(SROM_MAX, GFP_ATOMIC);
- if (!srom)
- return -2;
-
- sromwindow = (u16 *) SROM_OFFSET(sih);
- if (ai_is_sprom_available(sih)) {
- err =
- sprom_read_pci(sih, sromwindow, 0, srom, SROM_WORDS,
- true);
-
- if ((srom[SROM4_SIGN] == SROM4_SIGNATURE) ||
- (((sih->buscoretype == PCIE_CORE_ID)
- && (sih->buscorerev >= 6))
- || ((sih->buscoretype == PCI_CORE_ID)
- && (sih->buscorerev >= 0xe)))) {
- /* sromrev >= 4, read more */
- err =
- sprom_read_pci(sih, sromwindow, 0, srom,
- SROM4_WORDS, true);
- sromrev = srom[SROM4_CRCREV] & 0xff;
- } else if (err == 0) {
- /* srom is good and is rev < 4 */
- /* top word of sprom contains version and crc8 */
- sromrev = srom[SROM_CRCREV] & 0xff;
- /* bcm4401 sroms misprogrammed */
- if (sromrev == 0x10)
- sromrev = 1;
- }
- }
-#if defined(BCMNVRAMR)
- /* Use OTP if SPROM not available */
- else {
- err = otp_read_pci(sih, srom, SROM_MAX);
- if (err == 0)
- /* OTP only contain SROM rev8/rev9 for now */
- sromrev = srom[SROM4_CRCREV] & 0xff;
- else
- err = 1;
- }
-#else
- else
- err = 1;
-#endif
-
- /*
- * We want internal/wltest driver to come up with default
- * sromvars so we can program a blank SPROM/OTP.
- */
- if (err) {
- char *value;
- u32 val;
- val = 0;
-
- value = ai_getdevpathvar(sih, "sromrev");
- if (value) {
- sromrev = (u8) simple_strtoul(value, NULL, 0);
- flash = true;
- goto varscont;
- }
-
- value = ai_getnvramflvar(sih, "sromrev");
- if (value) {
- err = 0;
- goto errout;
- }
-
- {
- err = -1;
- goto errout;
- }
- }
-
- varscont:
- /* Bitmask for the sromrev */
- sr = 1 << sromrev;
-
- /* srom version check: Current valid versions: 1, 2, 3, 4, 5, 8, 9 */
- if ((sr & 0x33e) == 0) {
- err = -2;
- goto errout;
- }
-
- base = vp = kmalloc(MAXSZ_NVRAM_VARS, GFP_ATOMIC);
- if (!vp) {
- err = -2;
- goto errout;
- }
-
- /* read variables from flash */
- if (flash) {
- err = initvars_flash(sih, &vp, MAXSZ_NVRAM_VARS);
- if (err)
- goto errout;
- goto varsdone;
- }
-
- varbuf_init(&b, base, MAXSZ_NVRAM_VARS);
-
- /* parse SROM into name=value pairs. */
- _initvars_srom_pci(sromrev, srom, 0, &b);
-
- /* final nullbyte terminator */
- vp = b.buf;
- *vp++ = '\0';
-
- varsdone:
- err = initvars_table(base, vp, vars, count);
-
- errout:
- if (base)
- kfree(base);
-
- kfree(srom);
- return err;
-}
-
-
-static int initvars_srom_si(si_t *sih, void *curmap, char **vars, uint *varsz)
-{
- /* Search flash nvram section for srom variables */
- return initvars_flash_si(sih, vars, varsz);
-}
diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c b/drivers/staging/brcm80211/brcmsmac/bmac.c
index 4534926106134..417cf544de3f3 100644
--- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c
+++ b/drivers/staging/brcm80211/brcmsmac/bmac.c
@@ -21,41 +21,31 @@
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
-#include <proto/802.11.h>
-#include <bcmdefs.h>
-#include <bcmdevs.h>
-#include <bcmwifi.h>
+#include <defs.h>
+#include <brcm_hw_ids.h>
+#include <brcmu_wifi.h>
#include <aiutils.h>
-#include <bcmsrom.h>
-#include <bcmotp.h>
-#include <bcmutils.h>
-#include <bcmnvram.h>
-#include <wlioctl.h>
-#include <sbconfig.h>
-#include <sbchipc.h>
-#include <pcicfg.h>
-#include <sbhnddma.h>
-#include <hnddma.h>
-
-#include "wlc_types.h"
-#include "wlc_pmu.h"
+#include "srom.h"
+#include "otp.h"
+#include <brcmu_utils.h>
+#include <chipcommon.h>
+#include <nicpci.h>
+#include "dma.h"
+
+#include "types.h"
+#include "pmu.h"
#include "d11.h"
-#include "wlc_cfg.h"
-#include "wlc_rate.h"
-#include "wlc_scb.h"
-#include "wlc_pub.h"
-#include "wlc_key.h"
-#include "wlc_phy_shim.h"
-#include "phy/wlc_phy_hal.h"
-#include "wlc_channel.h"
-#include "wlc_main.h"
-#include "wl_export.h"
-#include "wl_ucode.h"
-#include "wlc_antsel.h"
-#include "pcie_core.h"
-#include "wlc_alloc.h"
-#include "wl_dbg.h"
-#include "wlc_bmac.h"
+#include "rate.h"
+#include "scb.h"
+#include "pub.h"
+#include "phy/phy_hal.h"
+#include "channel.h"
+#include "main.h"
+#include "ucode_loader.h"
+#include "antsel.h"
+#include "alloc.h"
+#include "bmac.h"
+#include "mac80211_if.h"
#define TIMER_INTERVAL_WATCHDOG_BMAC 1000 /* watchdog timer, in unit of ms */
@@ -78,6 +68,9 @@
(void *)&(wlc_hw->regs->fifo64regs[fifonum].dmaxmt) : \
(void *)&(wlc_hw->regs->fifo64regs[fifonum].dmarcv))
+#define APHY_SLOT_TIME 9
+#define BPHY_SLOT_TIME 20
+
/*
* The following table lists the buffer memory allocated to xmt fifos in HW.
* the size is in units of 256bytes(one block), total size is HW dependent
@@ -241,7 +234,7 @@ static u32 WLBANDINITFN(wlc_setband_inact) (struct wlc_info *wlc, uint bandunit)
WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0);
/* disable interrupts */
- macintmask = wl_intrsoff(wlc->wl);
+ macintmask = brcms_intrsoff(wlc->wl);
/* radio off */
wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
@@ -318,7 +311,7 @@ bool wlc_dpc(struct wlc_info *wlc, bool bounded)
if (DEVICEREMOVED(wlc)) {
wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
__func__);
- wl_down(wlc->wl);
+ brcms_down(wlc->wl);
return false;
}
@@ -333,7 +326,7 @@ bool wlc_dpc(struct wlc_info *wlc, bool bounded)
/* BCN template is available */
/* ZZZ: Use AP_ACTIVE ? */
- if (AP_ENAB(wlc->pub) && (!APSTA_ENAB(wlc->pub) || wlc->aps_associated)
+ if (AP_ENAB(wlc->pub) && (!APSTA_ENAB(wlc->pub))
&& (macintstatus & MI_BCNTPL)) {
wlc_update_beacon(wlc);
}
@@ -389,7 +382,7 @@ bool wlc_dpc(struct wlc_info *wlc, bool bounded)
__func__, wlc_hw->sih->chip,
wlc_hw->sih->chiprev);
/* big hammer */
- wl_init(wlc->wl);
+ brcms_init(wlc->wl);
}
/* gptimer timeout */
@@ -400,7 +393,7 @@ bool wlc_dpc(struct wlc_info *wlc, bool bounded)
if (macintstatus & MI_RFDISABLE) {
BCMMSG(wlc->wiphy, "wl%d: BMAC Detected a change on the"
" RF Disable Input\n", wlc_hw->unit);
- wl_rfkill_set_hw_state(wlc->wl);
+ brcms_rfkill_set_hw_state(wlc->wl);
}
/* send any enq'd tx packets. Just makes sure to jump start tx */
@@ -411,7 +404,7 @@ bool wlc_dpc(struct wlc_info *wlc, bool bounded)
return wlc->macintstatus != 0;
fatal:
- wl_init(wlc->wl);
+ brcms_init(wlc->wl);
return wlc->macintstatus != 0;
}
@@ -529,7 +522,7 @@ static bool wlc_bmac_attach_dmapio(struct wlc_info *wlc, uint j, bool wme)
NULL), DMAREG(wlc_hw, DMA_RX, 0),
(wme ? tune->ntxd : 0), tune->nrxd,
tune->rxbufsz, -1, tune->nrxbufpost,
- WL_HWRXOFF, &wl_msg_level);
+ WL_HWRXOFF, &brcm_msg_level);
dma_attach_err |= (NULL == wlc_hw->di[0]);
/*
@@ -541,7 +534,7 @@ static bool wlc_bmac_attach_dmapio(struct wlc_info *wlc, uint j, bool wme)
wlc_hw->di[1] = dma_attach(name, wlc_hw->sih,
DMAREG(wlc_hw, DMA_TX, 1), NULL,
tune->ntxd, 0, 0, -1, 0, 0,
- &wl_msg_level);
+ &brcm_msg_level);
dma_attach_err |= (NULL == wlc_hw->di[1]);
/*
@@ -552,7 +545,7 @@ static bool wlc_bmac_attach_dmapio(struct wlc_info *wlc, uint j, bool wme)
wlc_hw->di[2] = dma_attach(name, wlc_hw->sih,
DMAREG(wlc_hw, DMA_TX, 2), NULL,
tune->ntxd, 0, 0, -1, 0, 0,
- &wl_msg_level);
+ &brcm_msg_level);
dma_attach_err |= (NULL == wlc_hw->di[2]);
/*
* FIFO 3
@@ -562,7 +555,7 @@ static bool wlc_bmac_attach_dmapio(struct wlc_info *wlc, uint j, bool wme)
wlc_hw->di[3] = dma_attach(name, wlc_hw->sih,
DMAREG(wlc_hw, DMA_TX, 3),
NULL, tune->ntxd, 0, 0, -1,
- 0, 0, &wl_msg_level);
+ 0, 0, &brcm_msg_level);
dma_attach_err |= (NULL == wlc_hw->di[3]);
/* Cleaner to leave this as if with AP defined */
@@ -743,7 +736,8 @@ int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, uint unit,
wlc->war16165 = true;
/* check device id(srom, nvram etc.) to set bands */
- if (wlc_hw->deviceid == BCM43224_D11N_ID) {
+ if (wlc_hw->deviceid == BCM43224_D11N_ID ||
+ wlc_hw->deviceid == BCM43224_D11N_ID_VEN1) {
/* Dualband boards */
wlc_hw->_nbands = 2;
} else
@@ -925,7 +919,7 @@ int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, uint unit,
err = 21;
goto fail;
}
- bcm_ether_atoe(macaddr, wlc_hw->etheraddr);
+ brcmu_ether_atoe(macaddr, wlc_hw->etheraddr);
if (is_broadcast_ether_addr(wlc_hw->etheraddr) ||
is_zero_ether_addr(wlc_hw->etheraddr)) {
wiphy_err(wiphy, "wl%d: wlc_bmac_attach: bad macaddr %s\n",
@@ -1052,7 +1046,7 @@ wlc_bmac_init(struct wlc_hw_info *wlc_hw, chanspec_t chanspec,
wlc_clkctl_clk(wlc_hw, CLK_FAST);
/* disable interrupts */
- macintmask = wl_intrsoff(wlc->wl);
+ macintmask = brcms_intrsoff(wlc->wl);
/* set up the specified band and chanspec */
wlc_setxband(wlc_hw, CHSPEC_WLCBANDUNIT(chanspec));
@@ -1072,7 +1066,7 @@ wlc_bmac_init(struct wlc_hw_info *wlc_hw, chanspec_t chanspec,
wlc_bmac_bsinit(wlc, chanspec);
/* restore macintmask */
- wl_intrsrestore(wlc->wl, macintmask);
+ brcms_intrsrestore(wlc->wl, macintmask);
/* seed wake_override with WLC_WAKE_OVERRIDE_MACSUSPEND since the mac is suspended
* and wlc_enable_mac() will clear this override bit.
@@ -1142,7 +1136,7 @@ int wlc_bmac_up_finish(struct wlc_hw_info *wlc_hw)
/* FULLY enable dynamic power control and d11 core interrupt */
wlc_clkctl_clk(wlc_hw, CLK_DYNAMIC);
- wl_intrson(wlc_hw->wlc->wl);
+ brcms_intrson(wlc_hw->wlc->wl);
return 0;
}
@@ -1163,7 +1157,7 @@ int wlc_bmac_down_prep(struct wlc_hw_info *wlc_hw)
wlc_hw->wlc->macintmask = 0;
else {
/* now disable interrupts */
- wl_intrsoff(wlc_hw->wlc->wl);
+ brcms_intrsoff(wlc_hw->wlc->wl);
/* ensure we're running on the pll clock again */
wlc_clkctl_clk(wlc_hw, CLK_FAST);
@@ -1203,7 +1197,7 @@ int wlc_bmac_down_finish(struct wlc_hw_info *wlc_hw)
if (R_REG(&wlc_hw->regs->maccontrol) &
MCTL_EN_MAC)
wlc_suspend_mac_and_wait(wlc_hw->wlc);
- callbacks += wl_reset(wlc_hw->wlc->wl);
+ callbacks += brcms_reset(wlc_hw->wlc->wl);
wlc_coredisable(wlc_hw);
}
@@ -1887,7 +1881,7 @@ WLBANDINITFN(wlc_bmac_setband) (struct wlc_hw_info *wlc_hw, uint bandunit,
wlc->macintstatus = MI_DMAINT;
/* restore macintmask */
- wl_intrsrestore(wlc->wl, macintmask);
+ brcms_intrsrestore(wlc->wl, macintmask);
/* ucode should still be suspended.. */
WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0);
@@ -2065,7 +2059,7 @@ void wlc_bmac_hw_up(struct wlc_hw_info *wlc_hw)
static bool wlc_dma_rxreset(struct wlc_hw_info *wlc_hw, uint fifo)
{
- struct hnddma_pub *di = wlc_hw->di[fifo];
+ struct dma_pub *di = wlc_hw->di[fifo];
return dma_rxreset(di);
}
@@ -2685,7 +2679,7 @@ static u32 wlc_wlintrsoff(struct wlc_info *wlc)
if (!wlc->hw->up)
return 0;
- return wl_intrsoff(wlc->wl);
+ return brcms_intrsoff(wlc->wl);
}
static void wlc_wlintrsrestore(struct wlc_info *wlc, u32 macintmask)
@@ -2693,7 +2687,7 @@ static void wlc_wlintrsrestore(struct wlc_info *wlc, u32 macintmask)
if (!wlc->hw->up)
return;
- wl_intrsrestore(wlc->wl, macintmask);
+ brcms_intrsrestore(wlc->wl, macintmask);
}
u32 wlc_intrsoff(struct wlc_info *wlc)
@@ -3067,7 +3061,7 @@ void wlc_suspend_mac_and_wait(struct wlc_info *wlc)
if (mc == 0xffffffff) {
wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
__func__);
- wl_down(wlc->wl);
+ brcms_down(wlc->wl);
return;
}
WARN_ON(mc & MCTL_PSM_JMP_0);
@@ -3078,7 +3072,7 @@ void wlc_suspend_mac_and_wait(struct wlc_info *wlc)
if (mi == 0xffffffff) {
wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
__func__);
- wl_down(wlc->wl);
+ brcms_down(wlc->wl);
return;
}
WARN_ON(mi & MI_MACSSPNDD);
@@ -3103,7 +3097,7 @@ void wlc_suspend_mac_and_wait(struct wlc_info *wlc)
if (mc == 0xffffffff) {
wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
__func__);
- wl_down(wlc->wl);
+ brcms_down(wlc->wl);
return;
}
WARN_ON(mc & MCTL_PSM_JMP_0);
@@ -3418,7 +3412,7 @@ static void wlc_flushqueues(struct wlc_info *wlc)
/* free any posted tx packets */
for (i = 0; i < NFIFO; i++)
if (wlc_hw->di[i]) {
- dma_txreclaim(wlc_hw->di[i], HNDDMA_RANGE_ALL);
+ dma_txreclaim(wlc_hw->di[i], DMA_RANGE_ALL);
TXPKTPENDCLR(wlc, i);
BCMMSG(wlc->wiphy, "pktpend fifo %d clrd\n", i);
}
diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.h b/drivers/staging/brcm80211/brcmsmac/bmac.h
index a5dccc273ac5a..af8af69fc1e96 100644
--- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.h
+++ b/drivers/staging/brcm80211/brcmsmac/bmac.h
@@ -13,19 +13,8 @@
* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#ifndef _wlc_bmac_h_
-#define _wlc_bmac_h_
-
-/* XXXXX this interface is under wlc.c by design
- * http://hwnbu-twiki.broadcom.com/bin/view/Mwgroup/WlBmacDesign
- *
- * high driver files(e.g. wlc_ampdu.c etc)
- * wlc.h/wlc.c
- * wlc_bmac.h/wlc_bmac.c
- *
- * So don't include this in files other than wlc.c, wlc_bmac* wl_rte.c(dongle port) and wl_phy.c
- * create wrappers in wlc.c if needed
- */
+#ifndef _BRCM_BOTTOM_MAC_H_
+#define _BRCM_BOTTOM_MAC_H_
/* dup state between BMAC(struct wlc_hw_info) and HIGH(struct wlc_info)
driver */
@@ -175,4 +164,4 @@ extern void wlc_bmac_hw_up(struct wlc_hw_info *wlc_hw);
extern u16 wlc_bmac_rate_shm_offset(struct wlc_hw_info *wlc_hw, u8 rate);
extern void wlc_bmac_antsel_set(struct wlc_hw_info *wlc_hw, u32 antsel_avail);
-#endif /* _wlc_bmac_h_ */
+#endif /* _BRCM_BOTTOM_MAC_H_ */
diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_channel.c b/drivers/staging/brcm80211/brcmsmac/channel.c
index a3a2bf9b4f12f..9583140b0ff60 100644
--- a/drivers/staging/brcm80211/brcmsmac/wlc_channel.c
+++ b/drivers/staging/brcm80211/brcmsmac/channel.c
@@ -19,26 +19,21 @@
#include <linux/module.h>
#include <linux/pci.h>
-#include <bcmdefs.h>
-#include <bcmutils.h>
-#include <bcmnvram.h>
+#include <defs.h>
+#include <brcmu_utils.h>
#include <aiutils.h>
-#include <sbhnddma.h>
-#include <wlioctl.h>
+#include "dma.h"
-#include "wlc_types.h"
+#include "types.h"
#include "d11.h"
-#include "wlc_cfg.h"
-#include "wlc_scb.h"
-#include "wlc_pub.h"
-#include "wlc_key.h"
-#include "phy/wlc_phy_hal.h"
-#include "wlc_bmac.h"
-#include "wlc_rate.h"
-#include "wlc_channel.h"
-#include "wlc_main.h"
-#include "wlc_stf.h"
-#include "wl_dbg.h"
+#include "scb.h"
+#include "pub.h"
+#include "phy/phy_hal.h"
+#include "bmac.h"
+#include "rate.h"
+#include "channel.h"
+#include "main.h"
+#include "stf.h"
#define VALID_CHANNEL20_DB(wlc, val) wlc_valid_channel20_db((wlc)->cmi, val)
#define VALID_CHANNEL20_IN_BAND(wlc, bandunit, val) \
@@ -1496,7 +1491,7 @@ wlc_valid_chanspec_ext(wlc_cm_info_t *wlc_cm, chanspec_t chspec, bool dualband)
u8 channel = CHSPEC_CHANNEL(chspec);
/* check the chanspec */
- if (bcm_chspec_malformed(chspec)) {
+ if (brcmu_chspec_malformed(chspec)) {
wiphy_err(wlc->wiphy, "wl%d: malformed chanspec 0x%x\n",
wlc->pub->unit, chspec);
return false;
diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_channel.h b/drivers/staging/brcm80211/brcmsmac/channel.h
index b8dec5b39d850..30178390b5d60 100644
--- a/drivers/staging/brcm80211/brcmsmac/wlc_channel.h
+++ b/drivers/staging/brcm80211/brcmsmac/channel.h
@@ -14,11 +14,12 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#ifndef _WLC_CHANNEL_H_
-#define _WLC_CHANNEL_H_
+#ifndef _BRCM_CHANNEL_H_
+#define _BRCM_CHANNEL_H_
#define WLC_TXPWR_DB_FACTOR 4 /* conversion for phy txpwr cacluations that use .25 dB units */
+
struct wlc_info;
/* maxpwr mapping to 5GHz band channels:
@@ -50,6 +51,12 @@ struct wlc_info;
#define WLC_MAXPWR_TBL_SIZE 6 /* max of BAND_5G_PWR_LVLS and 6 for 2.4 GHz */
#define WLC_MAXPWR_MIMO_TBL_SIZE 14 /* max of BAND_5G_PWR_LVLS and 14 for 2.4 GHz */
+#define NBANDS(wlc) ((wlc)->pub->_nbands)
+#define NBANDS_PUB(pub) ((pub)->_nbands)
+#define NBANDS_HW(hw) ((hw)->_nbands)
+
+#define IS_SINGLEBAND_5G(device) 0
+
/* locale channel and power info. */
typedef struct {
u32 valid_channels;
diff --git a/drivers/staging/brcm80211/brcmsmac/d11.h b/drivers/staging/brcm80211/brcmsmac/d11.h
index d91e4189a3e87..855f1d341e1de 100644
--- a/drivers/staging/brcm80211/brcmsmac/d11.h
+++ b/drivers/staging/brcm80211/brcmsmac/d11.h
@@ -14,23 +14,10 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#ifndef _D11_H
-#define _D11_H
+#ifndef _BRCM_D11_H_
+#define _BRCM_D11_H_
-#include <sbconfig.h>
-
-#ifndef WL_RSSI_ANT_MAX
-#define WL_RSSI_ANT_MAX 4 /* max possible rx antennas */
-#elif WL_RSSI_ANT_MAX != 4
-#error "WL_RSSI_ANT_MAX does not match"
-#endif
-
-/* cpp contortions to concatenate w/arg prescan */
-#ifndef PAD
-#define _PADLINE(line) pad ## line
-#define _XSTR(line) _PADLINE(line)
-#define PAD _XSTR(__LINE__)
-#endif
+#include <linux/ieee80211.h>
#define BCN_TMPL_LEN 512 /* length of the BCN template area */
@@ -56,6 +43,12 @@
#define TX_DATA_FIFO TX_AC_BE_FIFO
#define TX_CTL_FIFO TX_AC_VO_FIFO
+#ifndef WL_RSSI_ANT_MAX
+#define WL_RSSI_ANT_MAX 4 /* max possible rx antennas */
+#elif WL_RSSI_ANT_MAX != 4
+#error "WL_RSSI_ANT_MAX does not match"
+#endif
+
typedef volatile struct {
u32 intstatus;
u32 intmask;
@@ -112,8 +105,6 @@ typedef volatile struct {
/*
* Host Interface Registers
- * - primed from hnd_cores/dot11mac/systemC/registers/ihr.h
- * - but definitely not complete
*/
typedef volatile struct _d11regs {
/* Device Control ("semi-standard host registers") */
@@ -439,9 +430,6 @@ typedef volatile struct _d11regs {
/* SHM *//* 0x800 - 0xEFE */
u16 PAD[0x380]; /* 0x800 - 0xEFE */
-
- /* SB configuration registers: 0xF00 */
- sbconfig_t sbconfig; /* sb config regs occupy top 256 bytes */
} d11regs_t;
#define PIHR_BASE 0x0400 /* byte address of packed IHR region */
@@ -1770,4 +1758,21 @@ typedef struct macstat {
#define SHM_BYT_CNT 0x2 /* IHR location */
#define MAX_BYT_CNT 0x600 /* Maximum frame len */
-#endif /* _D11_H */
+typedef struct d11cnt {
+ u32 txfrag;
+ u32 txmulti;
+ u32 txfail;
+ u32 txretry;
+ u32 txretrie;
+ u32 rxdup;
+ u32 txrts;
+ u32 txnocts;
+ u32 txnoack;
+ u32 rxfrag;
+ u32 rxmulti;
+ u32 rxcrc;
+ u32 txfrmsnt;
+ u32 rxundec;
+} d11cnt_t;
+
+#endif /* _BRCM_D11_H_ */
diff --git a/drivers/staging/brcm80211/brcmsmac/hnddma.c b/drivers/staging/brcm80211/brcmsmac/dma.c
index f607315f8143c..ce023249dd7c5 100644
--- a/drivers/staging/brcm80211/brcmsmac/hnddma.c
+++ b/drivers/staging/brcm80211/brcmsmac/dma.c
@@ -18,22 +18,148 @@
#include <linux/string.h>
#include <linux/netdevice.h>
#include <linux/pci.h>
-#include <bcmdefs.h>
-#include <bcmdevs.h>
-#include <hndsoc.h>
-#include <bcmutils.h>
+#include <defs.h>
+#include <brcm_hw_ids.h>
+#include <soc.h>
+#include <brcmu_utils.h>
#include <aiutils.h>
-#include <sbhnddma.h>
-#include <hnddma.h>
+#include "types.h"
+#include "dma.h"
#if defined(__mips__)
#include <asm/addrspace.h>
#endif
-#ifdef BRCM_FULLMAC
-#error "hnddma.c shouldn't be needed for FULLMAC"
-#endif
+/*
+ * Each descriptor ring must be 8kB aligned, and fit within a contiguous 8kB physical address.
+ */
+#define D64RINGALIGN_BITS 13
+#define D64MAXRINGSZ (1 << D64RINGALIGN_BITS)
+#define D64RINGALIGN (1 << D64RINGALIGN_BITS)
+
+#define D64MAXDD (D64MAXRINGSZ / sizeof (dma64dd_t))
+
+/* transmit channel control */
+#define D64_XC_XE 0x00000001 /* transmit enable */
+#define D64_XC_SE 0x00000002 /* transmit suspend request */
+#define D64_XC_LE 0x00000004 /* loopback enable */
+#define D64_XC_FL 0x00000010 /* flush request */
+#define D64_XC_PD 0x00000800 /* parity check disable */
+#define D64_XC_AE 0x00030000 /* address extension bits */
+#define D64_XC_AE_SHIFT 16
+
+/* transmit descriptor table pointer */
+#define D64_XP_LD_MASK 0x00000fff /* last valid descriptor */
+
+/* transmit channel status */
+#define D64_XS0_CD_MASK 0x00001fff /* current descriptor pointer */
+#define D64_XS0_XS_MASK 0xf0000000 /* transmit state */
+#define D64_XS0_XS_SHIFT 28
+#define D64_XS0_XS_DISABLED 0x00000000 /* disabled */
+#define D64_XS0_XS_ACTIVE 0x10000000 /* active */
+#define D64_XS0_XS_IDLE 0x20000000 /* idle wait */
+#define D64_XS0_XS_STOPPED 0x30000000 /* stopped */
+#define D64_XS0_XS_SUSP 0x40000000 /* suspend pending */
+
+#define D64_XS1_AD_MASK 0x00001fff /* active descriptor */
+#define D64_XS1_XE_MASK 0xf0000000 /* transmit errors */
+#define D64_XS1_XE_SHIFT 28
+#define D64_XS1_XE_NOERR 0x00000000 /* no error */
+#define D64_XS1_XE_DPE 0x10000000 /* descriptor protocol error */
+#define D64_XS1_XE_DFU 0x20000000 /* data fifo underrun */
+#define D64_XS1_XE_DTE 0x30000000 /* data transfer error */
+#define D64_XS1_XE_DESRE 0x40000000 /* descriptor read error */
+#define D64_XS1_XE_COREE 0x50000000 /* core error */
+
+/* receive channel control */
+#define D64_RC_RE 0x00000001 /* receive enable */
+#define D64_RC_RO_MASK 0x000000fe /* receive frame offset */
+#define D64_RC_RO_SHIFT 1
+#define D64_RC_FM 0x00000100 /* direct fifo receive (pio) mode */
+#define D64_RC_SH 0x00000200 /* separate rx header descriptor enable */
+#define D64_RC_OC 0x00000400 /* overflow continue */
+#define D64_RC_PD 0x00000800 /* parity check disable */
+#define D64_RC_AE 0x00030000 /* address extension bits */
+#define D64_RC_AE_SHIFT 16
+
+/* flags for dma controller */
+#define DMA_CTRL_PEN (1 << 0) /* partity enable */
+#define DMA_CTRL_ROC (1 << 1) /* rx overflow continue */
+#define DMA_CTRL_RXMULTI (1 << 2) /* allow rx scatter to multiple descriptors */
+#define DMA_CTRL_UNFRAMED (1 << 3) /* Unframed Rx/Tx data */
+
+/* receive descriptor table pointer */
+#define D64_RP_LD_MASK 0x00000fff /* last valid descriptor */
+
+/* receive channel status */
+#define D64_RS0_CD_MASK 0x00001fff /* current descriptor pointer */
+#define D64_RS0_RS_MASK 0xf0000000 /* receive state */
+#define D64_RS0_RS_SHIFT 28
+#define D64_RS0_RS_DISABLED 0x00000000 /* disabled */
+#define D64_RS0_RS_ACTIVE 0x10000000 /* active */
+#define D64_RS0_RS_IDLE 0x20000000 /* idle wait */
+#define D64_RS0_RS_STOPPED 0x30000000 /* stopped */
+#define D64_RS0_RS_SUSP 0x40000000 /* suspend pending */
+
+#define D64_RS1_AD_MASK 0x0001ffff /* active descriptor */
+#define D64_RS1_RE_MASK 0xf0000000 /* receive errors */
+#define D64_RS1_RE_SHIFT 28
+#define D64_RS1_RE_NOERR 0x00000000 /* no error */
+#define D64_RS1_RE_DPO 0x10000000 /* descriptor protocol error */
+#define D64_RS1_RE_DFU 0x20000000 /* data fifo overflow */
+#define D64_RS1_RE_DTE 0x30000000 /* data transfer error */
+#define D64_RS1_RE_DESRE 0x40000000 /* descriptor read error */
+#define D64_RS1_RE_COREE 0x50000000 /* core error */
+
+/* fifoaddr */
+#define D64_FA_OFF_MASK 0xffff /* offset */
+#define D64_FA_SEL_MASK 0xf0000 /* select */
+#define D64_FA_SEL_SHIFT 16
+#define D64_FA_SEL_XDD 0x00000 /* transmit dma data */
+#define D64_FA_SEL_XDP 0x10000 /* transmit dma pointers */
+#define D64_FA_SEL_RDD 0x40000 /* receive dma data */
+#define D64_FA_SEL_RDP 0x50000 /* receive dma pointers */
+#define D64_FA_SEL_XFD 0x80000 /* transmit fifo data */
+#define D64_FA_SEL_XFP 0x90000 /* transmit fifo pointers */
+#define D64_FA_SEL_RFD 0xc0000 /* receive fifo data */
+#define D64_FA_SEL_RFP 0xd0000 /* receive fifo pointers */
+#define D64_FA_SEL_RSD 0xe0000 /* receive frame status data */
+#define D64_FA_SEL_RSP 0xf0000 /* receive frame status pointers */
+
+/* descriptor control flags 1 */
+#define D64_CTRL_COREFLAGS 0x0ff00000 /* core specific flags */
+#define D64_CTRL1_EOT ((u32)1 << 28) /* end of descriptor table */
+#define D64_CTRL1_IOC ((u32)1 << 29) /* interrupt on completion */
+#define D64_CTRL1_EOF ((u32)1 << 30) /* end of frame */
+#define D64_CTRL1_SOF ((u32)1 << 31) /* start of frame */
+
+/* descriptor control flags 2 */
+#define D64_CTRL2_BC_MASK 0x00007fff /* buffer byte count. real data len must <= 16KB */
+#define D64_CTRL2_AE 0x00030000 /* address extension bits */
+#define D64_CTRL2_AE_SHIFT 16
+#define D64_CTRL2_PARITY 0x00040000 /* parity bit */
+
+/* control flags in the range [27:20] are core-specific and not defined here */
+#define D64_CTRL_CORE_MASK 0x0ff00000
+
+#define D64_RX_FRM_STS_LEN 0x0000ffff /* frame length mask */
+#define D64_RX_FRM_STS_OVFL 0x00800000 /* RxOverFlow */
+#define D64_RX_FRM_STS_DSCRCNT 0x0f000000 /* no. of descriptors used - 1 */
+#define D64_RX_FRM_STS_DATATYPE 0xf0000000 /* core-dependent data type */
+
+#define DMADDRWIDTH_30 30 /* 30-bit addressing capability */
+#define DMADDRWIDTH_32 32 /* 32-bit addressing capability */
+#define DMADDRWIDTH_63 63 /* 64-bit addressing capability */
+#define DMADDRWIDTH_64 64 /* 64-bit addressing capability */
+
+/* packet headroom necessary to accommodate the largest header in the system, (i.e TXOFF).
+ * By doing, we avoid the need to allocate an extra buffer for the header when bridging to WL.
+ * There is a compile time check in wlc.c which ensure that this value is at least as big
+ * as TXOFF. This value is used in dma_rxfill (dma.c).
+ */
+
+#define BCMEXTRAHDROOM 172
/* debug/trace */
#ifdef BCMDBG
@@ -58,6 +184,15 @@
#define DMA_NONE(args)
+typedef unsigned long dmaaddr_t;
+#define PHYSADDRHI(_pa) (0)
+#define PHYSADDRHISET(_pa, _val)
+#define PHYSADDRLO(_pa) ((_pa))
+#define PHYSADDRLOSET(_pa, _val) \
+ do { \
+ (_pa) = (_val); \
+ } while (0)
+
#define d64txregs dregs.d64_u.txregs_64
#define d64rxregs dregs.d64_u.rxregs_64
#define txd64 dregs.d64_u.txd_64
@@ -73,9 +208,33 @@ static uint dma_msg_level;
#define R_SM(r) (*(r))
#define W_SM(r, v) (*(r) = (v))
+/* One physical DMA segment */
+typedef struct {
+ dmaaddr_t addr;
+ u32 length;
+} dma_seg_t;
+
+typedef struct {
+ void *oshdmah; /* Opaque handle for OSL to store its information */
+ uint origsize; /* Size of the virtual packet */
+ uint nsegs;
+ dma_seg_t segs[MAX_DMA_SEGS];
+} dma_seg_map_t;
+
+/*
+ * DMA Descriptor
+ * Descriptors are only read by the hardware, never written back.
+ */
+typedef volatile struct {
+ u32 ctrl1; /* misc control bits & bufcount */
+ u32 ctrl2; /* buffer count and address extension */
+ u32 addrlow; /* memory address of the date buffer, bits 31:0 */
+ u32 addrhigh; /* memory address of the date buffer, bits 63:32 */
+} dma64dd_t;
+
/* dma engine software state */
typedef struct dma_info {
- struct hnddma_pub hnddma; /* exported structure */
+ struct dma_pub dma; /* exported structure */
uint *msg_level; /* message level pointer */
char name[MAXNAMEL]; /* callers name for diag msgs */
@@ -99,7 +258,7 @@ typedef struct dma_info {
u16 txin; /* index of next descriptor to reclaim */
u16 txout; /* index of next descriptor to post */
void **txp; /* pointer to parallel array of pointers to packets */
- hnddma_seg_map_t *txp_dmah; /* DMA MAP meta-data handle */
+ dma_seg_map_t *txp_dmah; /* DMA MAP meta-data handle */
dmaaddr_t txdpa; /* Aligned physical address of descriptor ring */
dmaaddr_t txdpaorig; /* Original physical address of descriptor ring */
u16 txdalign; /* #bytes added to alloc'd mem to align txd */
@@ -113,7 +272,7 @@ typedef struct dma_info {
u16 rxin; /* index of next descriptor to reclaim */
u16 rxout; /* index of next descriptor to post */
void **rxp; /* pointer to parallel array of pointers to packets */
- hnddma_seg_map_t *rxp_dmah; /* DMA MAP meta-data handle */
+ dma_seg_map_t *rxp_dmah; /* DMA MAP meta-data handle */
dmaaddr_t rxdpa; /* Aligned physical address of descriptor ring */
dmaaddr_t rxdpaorig; /* Original physical address of descriptor ring */
u16 rxdalign; /* #bytes added to alloc'd mem to align rxd */
@@ -274,7 +433,7 @@ const di_fcn_t dma64proc = {
39
};
-struct hnddma_pub *dma_attach(char *name, si_t *sih,
+struct dma_pub *dma_attach(char *name, struct si_pub *sih,
void *dmaregstx, void *dmaregsrx, uint ntxd,
uint nrxd, uint rxbufsize, int rxextheadroom,
uint nrxpost, uint rxoffset, uint *msg_level)
@@ -299,20 +458,20 @@ struct hnddma_pub *dma_attach(char *name, si_t *sih,
/* init dma reg pointer */
di->d64txregs = (dma64regs_t *) dmaregstx;
di->d64rxregs = (dma64regs_t *) dmaregsrx;
- di->hnddma.di_fn = (const di_fcn_t *)&dma64proc;
+ di->dma.di_fn = (const di_fcn_t *)&dma64proc;
/* Default flags (which can be changed by the driver calling dma_ctrlflags
* before enable): For backwards compatibility both Rx Overflow Continue
* and Parity are DISABLED.
* supports it.
*/
- di->hnddma.di_fn->ctrlflags(&di->hnddma, DMA_CTRL_ROC | DMA_CTRL_PEN,
- 0);
+ di->dma.di_fn->ctrlflags(&di->dma, DMA_CTRL_ROC | DMA_CTRL_PEN,
+ 0);
DMA_TRACE(("%s: dma_attach: %s flags 0x%x ntxd %d nrxd %d "
"rxbufsize %d rxextheadroom %d nrxpost %d rxoffset %d "
"dmaregstx %p dmaregsrx %p\n", name, "DMA64",
- di->hnddma.dmactrlflags, ntxd, nrxd, rxbufsize,
+ di->dma.dmactrlflags, ntxd, nrxd, rxbufsize,
rxextheadroom, nrxpost, rxoffset, dmaregstx, dmaregsrx));
/* make a private copy of our callers name */
@@ -427,21 +586,21 @@ struct hnddma_pub *dma_attach(char *name, si_t *sih,
/* allocate DMA mapping vectors */
if (DMASGLIST_ENAB) {
if (ntxd) {
- size = ntxd * sizeof(hnddma_seg_map_t);
+ size = ntxd * sizeof(dma_seg_map_t);
di->txp_dmah = kzalloc(size, GFP_ATOMIC);
if (di->txp_dmah == NULL)
goto fail;
}
if (nrxd) {
- size = nrxd * sizeof(hnddma_seg_map_t);
+ size = nrxd * sizeof(dma_seg_map_t);
di->rxp_dmah = kzalloc(size, GFP_ATOMIC);
if (di->rxp_dmah == NULL)
goto fail;
}
}
- return (struct hnddma_pub *) di;
+ return (struct dma_pub *) di;
fail:
_dma_detach(di);
@@ -497,7 +656,7 @@ dma64_dd_upd(dma_info_t *di, dma64dd_t *ddring, dmaaddr_t pa, uint outidx,
W_SM(&ddring[outidx].ctrl1, BUS_SWAP32(*flags));
W_SM(&ddring[outidx].ctrl2, BUS_SWAP32(ctrl2));
}
- if (di->hnddma.dmactrlflags & DMA_CTRL_PEN) {
+ if (di->dma.dmactrlflags & DMA_CTRL_PEN) {
if (DMA64_DD_PARITY(&ddring[outidx])) {
W_SM(&ddring[outidx].ctrl2,
BUS_SWAP32(ctrl2 | D64_CTRL2_PARITY));
@@ -678,7 +837,7 @@ static void _dma_rxinit(dma_info_t *di)
static void _dma_rxenable(dma_info_t *di)
{
- uint dmactrlflags = di->hnddma.dmactrlflags;
+ uint dmactrlflags = di->dma.dmactrlflags;
u32 control;
DMA_TRACE(("%s: dma_rxenable\n", di->name));
@@ -760,11 +919,11 @@ static void *_dma_rx(dma_info_t *di)
}
#endif /* BCMDBG */
- if ((di->hnddma.dmactrlflags & DMA_CTRL_RXMULTI) == 0) {
+ if ((di->dma.dmactrlflags & DMA_CTRL_RXMULTI) == 0) {
DMA_ERROR(("%s: dma_rx: bad frame length (%d)\n",
di->name, len));
- bcm_pkt_buf_free_skb(head);
- di->hnddma.rxgiants++;
+ brcmu_pkt_buf_free_skb(head);
+ di->dma.rxgiants++;
goto next_frame;
}
}
@@ -811,7 +970,7 @@ static bool _dma_rxfill(dma_info_t *di)
size to be allocated
*/
- p = bcm_pkt_buf_get_skb(di->rxbufsize + extra_offset);
+ p = brcmu_pkt_buf_get_skb(di->rxbufsize + extra_offset);
if (p == NULL) {
DMA_ERROR(("%s: dma_rxfill: out of rxbufs\n",
@@ -821,7 +980,7 @@ static bool _dma_rxfill(dma_info_t *di)
di->name));
ring_empty = true;
}
- di->hnddma.rxnobuf++;
+ di->dma.rxnobuf++;
break;
}
/* reserve an extra headroom, if applicable */
@@ -835,7 +994,7 @@ static bool _dma_rxfill(dma_info_t *di)
if (DMASGLIST_ENAB)
memset(&di->rxp_dmah[rxout], 0,
- sizeof(hnddma_seg_map_t));
+ sizeof(dma_seg_map_t));
pa = pci_map_single(di->pbus, p->data,
di->rxbufsize, PCI_DMA_FROMDEVICE);
@@ -909,7 +1068,7 @@ static void _dma_rxreclaim(dma_info_t *di)
DMA_TRACE(("%s: dma_rxreclaim\n", di->name));
while ((p = _dma_getnextrxp(di, true)))
- bcm_pkt_buf_free_skb(p);
+ brcmu_pkt_buf_free_skb(p);
}
static void *_dma_getnextrxp(dma_info_t *di, bool forceall)
@@ -922,12 +1081,12 @@ static void *_dma_getnextrxp(dma_info_t *di, bool forceall)
static void _dma_txblock(dma_info_t *di)
{
- di->hnddma.txavail = 0;
+ di->dma.txavail = 0;
}
static void _dma_txunblock(dma_info_t *di)
{
- di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1;
+ di->dma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1;
}
static uint _dma_txactive(dma_info_t *di)
@@ -968,14 +1127,14 @@ static uint _dma_rxactive(dma_info_t *di)
static void _dma_counterreset(dma_info_t *di)
{
/* reset all software counter */
- di->hnddma.rxgiants = 0;
- di->hnddma.rxnobuf = 0;
- di->hnddma.txnobuf = 0;
+ di->dma.rxgiants = 0;
+ di->dma.rxnobuf = 0;
+ di->dma.txnobuf = 0;
}
static uint _dma_ctrlflags(dma_info_t *di, uint mask, uint flags)
{
- uint dmactrlflags = di->hnddma.dmactrlflags;
+ uint dmactrlflags = di->dma.dmactrlflags;
if (di == NULL) {
DMA_ERROR(("%s: _dma_ctrlflags: NULL dma handle\n", di->name));
@@ -1004,7 +1163,7 @@ static uint _dma_ctrlflags(dma_info_t *di, uint mask, uint flags)
}
}
- di->hnddma.dmactrlflags = dmactrlflags;
+ di->dma.dmactrlflags = dmactrlflags;
return dmactrlflags;
}
@@ -1013,7 +1172,7 @@ static uint _dma_ctrlflags(dma_info_t *di, uint mask, uint flags)
static unsigned long _dma_getvar(dma_info_t *di, const char *name)
{
if (!strcmp(name, "&txavail"))
- return (unsigned long)&(di->hnddma.txavail);
+ return (unsigned long)&(di->dma.txavail);
return 0;
}
@@ -1069,7 +1228,7 @@ static void dma64_txinit(dma_info_t *di)
return;
di->txin = di->txout = 0;
- di->hnddma.txavail = di->ntxd - 1;
+ di->dma.txavail = di->ntxd - 1;
/* clear tx descriptor ring */
memset((void *)di->txd64, '\0', (di->ntxd * sizeof(dma64dd_t)));
@@ -1080,7 +1239,7 @@ static void dma64_txinit(dma_info_t *di)
if (!di->aligndesc_4k)
_dma_ddtable_init(di, DMA_TX, di->txdpa);
- if ((di->hnddma.dmactrlflags & DMA_CTRL_PEN) == 0)
+ if ((di->dma.dmactrlflags & DMA_CTRL_PEN) == 0)
control |= D64_XC_PD;
OR_REG(&di->d64txregs->control, control);
@@ -1132,9 +1291,9 @@ static void dma64_txreclaim(dma_info_t *di, txd_range_t range)
void *p;
DMA_TRACE(("%s: dma_txreclaim %s\n", di->name,
- (range == HNDDMA_RANGE_ALL) ? "all" :
+ (range == DMA_RANGE_ALL) ? "all" :
((range ==
- HNDDMA_RANGE_TRANSMITTED) ? "transmitted" :
+ DMA_RANGE_TRANSMITTED) ? "transmitted" :
"transferred")));
if (di->txin == di->txout)
@@ -1142,8 +1301,8 @@ static void dma64_txreclaim(dma_info_t *di, txd_range_t range)
while ((p = dma64_getnexttxp(di, range))) {
/* For unframed data, we don't have any packets to free */
- if (!(di->hnddma.dmactrlflags & DMA_CTRL_UNFRAMED))
- bcm_pkt_buf_free_skb(p);
+ if (!(di->dma.dmactrlflags & DMA_CTRL_UNFRAMED))
+ brcmu_pkt_buf_free_skb(p);
}
}
@@ -1316,7 +1475,7 @@ static void *dma64_getpos(dma_info_t *di, bool direction)
/* TX of unframed data
*
* Adds a DMA ring descriptor for the data pointed to by "buf".
- * This is for DMA of a buffer of data and is unlike other hnddma TX functions
+ * This is for DMA of a buffer of data and is unlike other dma TX functions
* that take a pointer to a "packet"
* Each call to this is results in a single descriptor being added for "len" bytes of
* data starting at "buf", it doesn't handle chained buffers.
@@ -1359,14 +1518,14 @@ static int dma64_txunframed(dma_info_t *di, void *buf, uint len, bool commit)
}
/* tx flow control */
- di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1;
+ di->dma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1;
return 0;
outoftxd:
DMA_ERROR(("%s: %s: out of txds !!!\n", di->name, __func__));
- di->hnddma.txavail = 0;
- di->hnddma.txnobuf++;
+ di->dma.txavail = 0;
+ di->dma.txnobuf++;
return -1;
}
@@ -1394,7 +1553,7 @@ static int dma64_txfast(dma_info_t *di, struct sk_buff *p0,
*/
for (p = p0; p; p = next) {
uint nsegs, j;
- hnddma_seg_map_t *map;
+ dma_seg_map_t *map;
data = p->data;
len = p->len;
@@ -1410,7 +1569,7 @@ static int dma64_txfast(dma_info_t *di, struct sk_buff *p0,
/* get physical address of buffer start */
if (DMASGLIST_ENAB)
memset(&di->txp_dmah[txout], 0,
- sizeof(hnddma_seg_map_t));
+ sizeof(dma_seg_map_t));
pa = pci_map_single(di->pbus, data, len, PCI_DMA_TODEVICE);
@@ -1474,26 +1633,26 @@ static int dma64_txfast(dma_info_t *di, struct sk_buff *p0,
di->xmtptrbase + I2B(txout, dma64dd_t));
/* tx flow control */
- di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1;
+ di->dma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1;
return 0;
outoftxd:
DMA_ERROR(("%s: dma_txfast: out of txds !!!\n", di->name));
- bcm_pkt_buf_free_skb(p0);
- di->hnddma.txavail = 0;
- di->hnddma.txnobuf++;
+ brcmu_pkt_buf_free_skb(p0);
+ di->dma.txavail = 0;
+ di->dma.txnobuf++;
return -1;
}
/*
* Reclaim next completed txd (txds if using chained buffers) in the range
* specified and return associated packet.
- * If range is HNDDMA_RANGE_TRANSMITTED, reclaim descriptors that have be
+ * If range is DMA_RANGE_TRANSMITTED, reclaim descriptors that have be
* transmitted as noted by the hardware "CurrDescr" pointer.
- * If range is HNDDMA_RANGE_TRANSFERED, reclaim descriptors that have be
+ * If range is DMA_RANGE_TRANSFERED, reclaim descriptors that have be
* transferred by the DMA as noted by the hardware "ActiveDescr" pointer.
- * If range is HNDDMA_RANGE_ALL, reclaim all txd(s) posted to the ring and
+ * If range is DMA_RANGE_ALL, reclaim all txd(s) posted to the ring and
* return associated packet regardless of the value of hardware pointers.
*/
static void *dma64_getnexttxp(dma_info_t *di, txd_range_t range)
@@ -1503,9 +1662,9 @@ static void *dma64_getnexttxp(dma_info_t *di, txd_range_t range)
void *txp;
DMA_TRACE(("%s: dma_getnexttxp %s\n", di->name,
- (range == HNDDMA_RANGE_ALL) ? "all" :
+ (range == DMA_RANGE_ALL) ? "all" :
((range ==
- HNDDMA_RANGE_TRANSMITTED) ? "transmitted" :
+ DMA_RANGE_TRANSMITTED) ? "transmitted" :
"transferred")));
if (di->ntxd == 0)
@@ -1514,7 +1673,7 @@ static void *dma64_getnexttxp(dma_info_t *di, txd_range_t range)
txp = NULL;
start = di->txin;
- if (range == HNDDMA_RANGE_ALL)
+ if (range == DMA_RANGE_ALL)
end = di->txout;
else {
dma64regs_t *dregs = di->d64txregs;
@@ -1525,7 +1684,7 @@ static void *dma64_getnexttxp(dma_info_t *di, txd_range_t range)
D64_XS0_CD_MASK) -
di->xmtptrbase) & D64_XS0_CD_MASK, dma64dd_t));
- if (range == HNDDMA_RANGE_TRANSFERED) {
+ if (range == DMA_RANGE_TRANSFERED) {
active_desc =
(u16) (R_REG(&dregs->status1) &
D64_XS1_AD_MASK);
@@ -1542,7 +1701,7 @@ static void *dma64_getnexttxp(dma_info_t *di, txd_range_t range)
for (i = start; i != end && !txp; i = NEXTTXD(i)) {
dmaaddr_t pa;
- hnddma_seg_map_t *map = NULL;
+ dma_seg_map_t *map = NULL;
uint size, j, nsegs;
PHYSADDRLOSET(pa,
@@ -1579,7 +1738,7 @@ static void *dma64_getnexttxp(dma_info_t *di, txd_range_t range)
di->txin = i;
/* tx flow control */
- di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1;
+ di->dma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1;
return txp;
@@ -1696,8 +1855,8 @@ static void dma64_txrotate(dma_info_t *di)
/* Move the map */
if (DMASGLIST_ENAB) {
memcpy(&di->txp_dmah[new], &di->txp_dmah[old],
- sizeof(hnddma_seg_map_t));
- memset(&di->txp_dmah[old], 0, sizeof(hnddma_seg_map_t));
+ sizeof(dma_seg_map_t));
+ memset(&di->txp_dmah[old], 0, sizeof(dma_seg_map_t));
}
di->txp[old] = NULL;
@@ -1706,14 +1865,14 @@ static void dma64_txrotate(dma_info_t *di)
/* update txin and txout */
di->txin = ad;
di->txout = TXD(di->txout + rot);
- di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1;
+ di->dma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1;
/* kick the chip */
W_REG(&di->d64txregs->ptr,
di->xmtptrbase + I2B(di->txout, dma64dd_t));
}
-uint dma_addrwidth(si_t *sih, void *dmaregs)
+uint dma_addrwidth(struct si_pub *sih, void *dmaregs)
{
/* Perform 64-bit checks only if we want to advertise 64-bit (> 32bit) capability) */
/* DMA engine is 64-bit capable */
@@ -1736,7 +1895,7 @@ uint dma_addrwidth(si_t *sih, void *dmaregs)
* engine. This function calls a caller-supplied function for each packet in
* the caller specified dma chain.
*/
-void dma_walk_packets(struct hnddma_pub *dmah, void (*callback_fnc)
+void dma_walk_packets(struct dma_pub *dmah, void (*callback_fnc)
(void *pkt, void *arg_a), void *arg_a)
{
dma_info_t *di = (dma_info_t *) dmah;
diff --git a/drivers/staging/brcm80211/include/hnddma.h b/drivers/staging/brcm80211/brcmsmac/dma.h
index fbbcb9b5ae622..70c9ad6c49523 100644
--- a/drivers/staging/brcm80211/include/hnddma.h
+++ b/drivers/staging/brcm80211/brcmsmac/dma.h
@@ -14,13 +14,42 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#ifndef _hnddma_h_
-#define _hnddma_h_
+#ifndef _BRCM_DMA_H_
+#define _BRCM_DMA_H_
-#ifndef _hnddma_pub_
-#define _hnddma_pub_
-struct hnddma_pub;
-#endif /* _hnddma_pub_ */
+#include "types.h" /* forward structure declarations */
+
+#ifndef _dma_pub_
+#define _dma_pub_
+struct dma_pub;
+#endif /* _dma_pub_ */
+
+/* DMA structure:
+ * support two DMA engines: 32 bits address or 64 bit addressing
+ * basic DMA register set is per channel(transmit or receive)
+ * a pair of channels is defined for convenience
+ */
+
+/* 32 bits addressing */
+
+typedef volatile struct { /* diag access */
+ u32 fifoaddr; /* diag address */
+ u32 fifodatalow; /* low 32bits of data */
+ u32 fifodatahigh; /* high 32bits of data */
+ u32 pad; /* reserved */
+} dma32diag_t;
+
+/* 64 bits addressing */
+
+/* dma registers per channel(xmt or rcv) */
+typedef volatile struct {
+ u32 control; /* enable, et al */
+ u32 ptr; /* last descriptor posted to chip */
+ u32 addrlow; /* descriptor ring base address low 32-bits (8K aligned) */
+ u32 addrhigh; /* descriptor ring base address bits 63:32 (8K aligned) */
+ u32 status0; /* current descriptor, xmt state */
+ u32 status1; /* active descriptor, xmt error */
+} dma64regs_t;
/* map/unmap direction */
#define DMA_TX 1 /* TX direction for DMA */
@@ -29,60 +58,60 @@ struct hnddma_pub;
/* range param for dma_getnexttxp() and dma_txreclaim */
typedef enum txd_range {
- HNDDMA_RANGE_ALL = 1,
- HNDDMA_RANGE_TRANSMITTED,
- HNDDMA_RANGE_TRANSFERED
+ DMA_RANGE_ALL = 1,
+ DMA_RANGE_TRANSMITTED,
+ DMA_RANGE_TRANSFERED
} txd_range_t;
/* dma function type */
-typedef void (*di_detach_t) (struct hnddma_pub *dmah);
-typedef bool(*di_txreset_t) (struct hnddma_pub *dmah);
-typedef bool(*di_rxreset_t) (struct hnddma_pub *dmah);
-typedef bool(*di_rxidle_t) (struct hnddma_pub *dmah);
-typedef void (*di_txinit_t) (struct hnddma_pub *dmah);
-typedef bool(*di_txenabled_t) (struct hnddma_pub *dmah);
-typedef void (*di_rxinit_t) (struct hnddma_pub *dmah);
-typedef void (*di_txsuspend_t) (struct hnddma_pub *dmah);
-typedef void (*di_txresume_t) (struct hnddma_pub *dmah);
-typedef bool(*di_txsuspended_t) (struct hnddma_pub *dmah);
-typedef bool(*di_txsuspendedidle_t) (struct hnddma_pub *dmah);
-typedef int (*di_txfast_t) (struct hnddma_pub *dmah, struct sk_buff *p,
+typedef void (*di_detach_t) (struct dma_pub *dmah);
+typedef bool(*di_txreset_t) (struct dma_pub *dmah);
+typedef bool(*di_rxreset_t) (struct dma_pub *dmah);
+typedef bool(*di_rxidle_t) (struct dma_pub *dmah);
+typedef void (*di_txinit_t) (struct dma_pub *dmah);
+typedef bool(*di_txenabled_t) (struct dma_pub *dmah);
+typedef void (*di_rxinit_t) (struct dma_pub *dmah);
+typedef void (*di_txsuspend_t) (struct dma_pub *dmah);
+typedef void (*di_txresume_t) (struct dma_pub *dmah);
+typedef bool(*di_txsuspended_t) (struct dma_pub *dmah);
+typedef bool(*di_txsuspendedidle_t) (struct dma_pub *dmah);
+typedef int (*di_txfast_t) (struct dma_pub *dmah, struct sk_buff *p,
bool commit);
-typedef int (*di_txunframed_t) (struct hnddma_pub *dmah, void *p, uint len,
+typedef int (*di_txunframed_t) (struct dma_pub *dmah, void *p, uint len,
bool commit);
-typedef void *(*di_getpos_t) (struct hnddma_pub *di, bool direction);
-typedef void (*di_fifoloopbackenable_t) (struct hnddma_pub *dmah);
-typedef bool(*di_txstopped_t) (struct hnddma_pub *dmah);
-typedef bool(*di_rxstopped_t) (struct hnddma_pub *dmah);
-typedef bool(*di_rxenable_t) (struct hnddma_pub *dmah);
-typedef bool(*di_rxenabled_t) (struct hnddma_pub *dmah);
-typedef void *(*di_rx_t) (struct hnddma_pub *dmah);
-typedef bool(*di_rxfill_t) (struct hnddma_pub *dmah);
-typedef void (*di_txreclaim_t) (struct hnddma_pub *dmah, txd_range_t range);
-typedef void (*di_rxreclaim_t) (struct hnddma_pub *dmah);
-typedef unsigned long (*di_getvar_t) (struct hnddma_pub *dmah,
+typedef void *(*di_getpos_t) (struct dma_pub *di, bool direction);
+typedef void (*di_fifoloopbackenable_t) (struct dma_pub *dmah);
+typedef bool(*di_txstopped_t) (struct dma_pub *dmah);
+typedef bool(*di_rxstopped_t) (struct dma_pub *dmah);
+typedef bool(*di_rxenable_t) (struct dma_pub *dmah);
+typedef bool(*di_rxenabled_t) (struct dma_pub *dmah);
+typedef void *(*di_rx_t) (struct dma_pub *dmah);
+typedef bool(*di_rxfill_t) (struct dma_pub *dmah);
+typedef void (*di_txreclaim_t) (struct dma_pub *dmah, txd_range_t range);
+typedef void (*di_rxreclaim_t) (struct dma_pub *dmah);
+typedef unsigned long (*di_getvar_t) (struct dma_pub *dmah,
const char *name);
-typedef void *(*di_getnexttxp_t) (struct hnddma_pub *dmah, txd_range_t range);
-typedef void *(*di_getnextrxp_t) (struct hnddma_pub *dmah, bool forceall);
-typedef void *(*di_peeknexttxp_t) (struct hnddma_pub *dmah);
-typedef void *(*di_peeknextrxp_t) (struct hnddma_pub *dmah);
-typedef void (*di_rxparam_get_t) (struct hnddma_pub *dmah, u16 *rxoffset,
+typedef void *(*di_getnexttxp_t) (struct dma_pub *dmah, txd_range_t range);
+typedef void *(*di_getnextrxp_t) (struct dma_pub *dmah, bool forceall);
+typedef void *(*di_peeknexttxp_t) (struct dma_pub *dmah);
+typedef void *(*di_peeknextrxp_t) (struct dma_pub *dmah);
+typedef void (*di_rxparam_get_t) (struct dma_pub *dmah, u16 *rxoffset,
u16 *rxbufsize);
-typedef void (*di_txblock_t) (struct hnddma_pub *dmah);
-typedef void (*di_txunblock_t) (struct hnddma_pub *dmah);
-typedef uint(*di_txactive_t) (struct hnddma_pub *dmah);
-typedef void (*di_txrotate_t) (struct hnddma_pub *dmah);
-typedef void (*di_counterreset_t) (struct hnddma_pub *dmah);
-typedef uint(*di_ctrlflags_t) (struct hnddma_pub *dmah, uint mask, uint flags);
-typedef char *(*di_dump_t) (struct hnddma_pub *dmah, struct bcmstrbuf *b,
+typedef void (*di_txblock_t) (struct dma_pub *dmah);
+typedef void (*di_txunblock_t) (struct dma_pub *dmah);
+typedef uint(*di_txactive_t) (struct dma_pub *dmah);
+typedef void (*di_txrotate_t) (struct dma_pub *dmah);
+typedef void (*di_counterreset_t) (struct dma_pub *dmah);
+typedef uint(*di_ctrlflags_t) (struct dma_pub *dmah, uint mask, uint flags);
+typedef char *(*di_dump_t) (struct dma_pub *dmah, struct brcmu_strbuf *b,
bool dumpring);
-typedef char *(*di_dumptx_t) (struct hnddma_pub *dmah, struct bcmstrbuf *b,
+typedef char *(*di_dumptx_t) (struct dma_pub *dmah, struct brcmu_strbuf *b,
bool dumpring);
-typedef char *(*di_dumprx_t) (struct hnddma_pub *dmah, struct bcmstrbuf *b,
+typedef char *(*di_dumprx_t) (struct dma_pub *dmah, struct brcmu_strbuf *b,
bool dumpring);
-typedef uint(*di_rxactive_t) (struct hnddma_pub *dmah);
-typedef uint(*di_txpending_t) (struct hnddma_pub *dmah);
-typedef uint(*di_txcommitted_t) (struct hnddma_pub *dmah);
+typedef uint(*di_rxactive_t) (struct dma_pub *dmah);
+typedef uint(*di_txpending_t) (struct dma_pub *dmah);
+typedef uint(*di_txcommitted_t) (struct dma_pub *dmah);
/* dma opsvec */
typedef struct di_fcn_s {
@@ -136,7 +165,7 @@ typedef struct di_fcn_s {
* Exported data structure (read-only)
*/
/* export structure */
-struct hnddma_pub {
+struct dma_pub {
const di_fcn_t *di_fn; /* DMA function pointers */
uint txavail; /* # free tx descriptors */
uint dmactrlflags; /* dma control flags */
@@ -148,7 +177,7 @@ struct hnddma_pub {
uint txnobuf; /* tx out of dma descriptors */
};
-extern struct hnddma_pub *dma_attach(char *name, si_t *sih,
+extern struct dma_pub *dma_attach(char *name, struct si_pub *sih,
void *dmaregstx, void *dmaregsrx, uint ntxd,
uint nrxd, uint rxbufsize, int rxextheadroom,
uint nrxpost, uint rxoffset, uint *msg_level);
@@ -201,8 +230,8 @@ extern const di_fcn_t dma64proc;
* SB attach provides ability to probe backplane and dma core capabilities
* This info is needed by DMA_ALLOC_CONSISTENT in dma attach
*/
-extern uint dma_addrwidth(si_t *sih, void *dmaregs);
-void dma_walk_packets(struct hnddma_pub *dmah, void (*callback_fnc)
+extern uint dma_addrwidth(struct si_pub *sih, void *dmaregs);
+void dma_walk_packets(struct dma_pub *dmah, void (*callback_fnc)
(void *pkt, void *arg_a), void *arg_a);
/*
@@ -223,4 +252,4 @@ static inline void dma_spin_for_len(uint len, struct sk_buff *head)
#endif /* defined(__mips__) */
}
-#endif /* _hnddma_h_ */
+#endif /* _BRCM_DMA_H_ */
diff --git a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c b/drivers/staging/brcm80211/brcmsmac/mac80211_if.c
index 6c6236c969b70..78f8348cb726e 100644
--- a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c
+++ b/drivers/staging/brcm80211/brcmsmac/mac80211_if.c
@@ -25,34 +25,45 @@
#include <linux/sched.h>
#include <linux/firmware.h>
#include <net/mac80211.h>
+#include <defs.h>
+#include <brcmu_wifi.h>
+#include <brcmu_utils.h>
+#include <nicpci.h>
+#include "dma.h"
-#include <proto/802.11.h>
-#include <bcmdefs.h>
-#include <bcmwifi.h>
-#include <bcmutils.h>
-#include <bcmnvram.h>
-#include <pcicfg.h>
-#include <wlioctl.h>
-#include <sbhnddma.h>
-
-#include "phy/wlc_phy_int.h"
+#include "phy/phy_int.h"
#include "d11.h"
-#include "wlc_types.h"
-#include "wlc_cfg.h"
-#include "phy/phy_version.h"
-#include "wlc_key.h"
-#include "wlc_channel.h"
-#include "wlc_scb.h"
-#include "wlc_pub.h"
-#include "wl_dbg.h"
-#include "wl_export.h"
-#include "wl_ucode.h"
-#include "wl_mac80211.h"
+#include "types.h"
+#include "channel.h"
+#include "scb.h"
+#include "pub.h"
+#include "ucode_loader.h"
+#include "mac80211_if.h"
#define N_TX_QUEUES 4 /* #tx queues on mac80211<->driver interface */
-static void wl_timer(unsigned long data);
-static void _wl_timer(struct wl_timer *t);
+#define LOCK(wl) spin_lock_bh(&(wl)->lock)
+#define UNLOCK(wl) spin_unlock_bh(&(wl)->lock)
+
+/* locking from inside brcms_isr */
+#define ISR_LOCK(wl, flags)\
+ do {\
+ spin_lock(&(wl)->isr_lock);\
+ (void)(flags); } \
+ while (0)
+
+#define ISR_UNLOCK(wl, flags)\
+ do {\
+ spin_unlock(&(wl)->isr_lock);\
+ (void)(flags); } \
+ while (0)
+
+/* locking under LOCK() to synchronize with brcms_isr */
+#define INT_LOCK(wl, flags) spin_lock_irqsave(&(wl)->isr_lock, flags)
+#define INT_UNLOCK(wl, flags) spin_unlock_irqrestore(&(wl)->isr_lock, flags)
+
+static void brcms_timer(unsigned long data);
+static void _brcms_timer(struct brcms_timer *t);
static int ieee_hw_init(struct ieee80211_hw *hw);
@@ -69,22 +80,20 @@ static int wl_linux_watchdog(void *ctx);
FIF_OTHER_BSS | \
FIF_BCN_PRBRESP_PROMISC)
-static int wl_found;
+static int n_adapters_found;
-#define WL_DEV_IF(dev) ((struct wl_if *)netdev_priv(dev))
-#define WL_INFO(dev) ((struct wl_info *)(WL_DEV_IF(dev)->wl))
-static int wl_request_fw(struct wl_info *wl, struct pci_dev *pdev);
-static void wl_release_fw(struct wl_info *wl);
+static int brcms_request_fw(struct brcms_info *wl, struct pci_dev *pdev);
+static void brcms_release_fw(struct brcms_info *wl);
/* local prototypes */
-static void wl_dpc(unsigned long data);
-static irqreturn_t wl_isr(int irq, void *dev_id);
+static void brcms_dpc(unsigned long data);
+static irqreturn_t brcms_isr(int irq, void *dev_id);
-static int __devinit wl_pci_probe(struct pci_dev *pdev,
+static int __devinit brcms_pci_probe(struct pci_dev *pdev,
const struct pci_device_id *ent);
-static void wl_remove(struct pci_dev *pdev);
-static void wl_free(struct wl_info *wl);
-static void wl_set_basic_rate(struct wl_rateset *rs, u16 rate, bool is_br);
+static void brcms_remove(struct pci_dev *pdev);
+static void brcms_free(struct brcms_info *wl);
+static void brcms_set_basic_rate(struct wl_rateset *rs, u16 rate, bool is_br);
MODULE_AUTHOR("Broadcom Corporation");
MODULE_DESCRIPTION("Broadcom 802.11n wireless LAN driver.");
@@ -92,14 +101,16 @@ MODULE_SUPPORTED_DEVICE("Broadcom 802.11n WLAN cards");
MODULE_LICENSE("Dual BSD/GPL");
/* recognized PCI IDs */
-static struct pci_device_id wl_id_table[] = {
+static DEFINE_PCI_DEVICE_TABLE(brcms_pci_id_table) = {
{PCI_VENDOR_ID_BROADCOM, 0x4357, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* 43225 2G */
{PCI_VENDOR_ID_BROADCOM, 0x4353, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* 43224 DUAL */
{PCI_VENDOR_ID_BROADCOM, 0x4727, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* 4313 DUAL */
+ /* 43224 Ven */
+ {PCI_VENDOR_ID_BROADCOM, 0x0576, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
{0}
};
-MODULE_DEVICE_TABLE(pci, wl_id_table);
+MODULE_DEVICE_TABLE(pci, brcms_pci_id_table);
#ifdef BCMDBG
static int msglevel = 0xdeadbeef;
@@ -112,51 +123,52 @@ module_param(phymsglevel, int, 0);
#define WL_TO_HW(wl) (wl->pub->ieee_hw)
/* MAC80211 callback functions */
-static int wl_ops_start(struct ieee80211_hw *hw);
-static void wl_ops_stop(struct ieee80211_hw *hw);
-static int wl_ops_add_interface(struct ieee80211_hw *hw,
+static int brcms_ops_start(struct ieee80211_hw *hw);
+static void brcms_ops_stop(struct ieee80211_hw *hw);
+static int brcms_ops_add_interface(struct ieee80211_hw *hw,
struct ieee80211_vif *vif);
-static void wl_ops_remove_interface(struct ieee80211_hw *hw,
+static void brcms_ops_remove_interface(struct ieee80211_hw *hw,
struct ieee80211_vif *vif);
-static int wl_ops_config(struct ieee80211_hw *hw, u32 changed);
-static void wl_ops_bss_info_changed(struct ieee80211_hw *hw,
+static int brcms_ops_config(struct ieee80211_hw *hw, u32 changed);
+static void brcms_ops_bss_info_changed(struct ieee80211_hw *hw,
struct ieee80211_vif *vif,
struct ieee80211_bss_conf *info,
u32 changed);
-static void wl_ops_configure_filter(struct ieee80211_hw *hw,
+static void brcms_ops_configure_filter(struct ieee80211_hw *hw,
unsigned int changed_flags,
unsigned int *total_flags, u64 multicast);
-static int wl_ops_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta,
+static int brcms_ops_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta,
bool set);
-static void wl_ops_sw_scan_start(struct ieee80211_hw *hw);
-static void wl_ops_sw_scan_complete(struct ieee80211_hw *hw);
-static void wl_ops_set_tsf(struct ieee80211_hw *hw, u64 tsf);
-static int wl_ops_get_stats(struct ieee80211_hw *hw,
+static void brcms_ops_sw_scan_start(struct ieee80211_hw *hw);
+static void brcms_ops_sw_scan_complete(struct ieee80211_hw *hw);
+static void brcms_ops_set_tsf(struct ieee80211_hw *hw, u64 tsf);
+static int brcms_ops_get_stats(struct ieee80211_hw *hw,
struct ieee80211_low_level_stats *stats);
-static void wl_ops_sta_notify(struct ieee80211_hw *hw,
+static void brcms_ops_sta_notify(struct ieee80211_hw *hw,
struct ieee80211_vif *vif,
enum sta_notify_cmd cmd,
struct ieee80211_sta *sta);
-static int wl_ops_conf_tx(struct ieee80211_hw *hw, u16 queue,
+static int brcms_ops_conf_tx(struct ieee80211_hw *hw, u16 queue,
const struct ieee80211_tx_queue_params *params);
-static u64 wl_ops_get_tsf(struct ieee80211_hw *hw);
-static int wl_ops_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
+static u64 brcms_ops_get_tsf(struct ieee80211_hw *hw);
+static int brcms_ops_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
struct ieee80211_sta *sta);
-static int wl_ops_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
- struct ieee80211_sta *sta);
-static int wl_ops_ampdu_action(struct ieee80211_hw *hw,
+static int brcms_ops_sta_remove(struct ieee80211_hw *hw,
+ struct ieee80211_vif *vif,
+ struct ieee80211_sta *sta);
+static int brcms_ops_ampdu_action(struct ieee80211_hw *hw,
struct ieee80211_vif *vif,
enum ieee80211_ampdu_mlme_action action,
struct ieee80211_sta *sta, u16 tid, u16 *ssn,
u8 buf_size);
-static void wl_ops_rfkill_poll(struct ieee80211_hw *hw);
-static void wl_ops_flush(struct ieee80211_hw *hw, bool drop);
+static void brcms_ops_rfkill_poll(struct ieee80211_hw *hw);
+static void brcms_ops_flush(struct ieee80211_hw *hw, bool drop);
-static void wl_ops_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
+static void brcms_ops_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
{
- struct wl_info *wl = hw->priv;
+ struct brcms_info *wl = hw->priv;
- WL_LOCK(wl);
+ LOCK(wl);
if (!wl->pub->up) {
wiphy_err(wl->wiphy, "ops->tx called while down\n");
kfree_skb(skb);
@@ -164,36 +176,36 @@ static void wl_ops_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
}
wlc_sendpkt_mac80211(wl->wlc, skb, hw);
done:
- WL_UNLOCK(wl);
+ UNLOCK(wl);
}
-static int wl_ops_start(struct ieee80211_hw *hw)
+static int brcms_ops_start(struct ieee80211_hw *hw)
{
- struct wl_info *wl = hw->priv;
+ struct brcms_info *wl = hw->priv;
bool blocked;
/*
struct ieee80211_channel *curchan = hw->conf.channel;
*/
ieee80211_wake_queues(hw);
- WL_LOCK(wl);
- blocked = wl_rfkill_set_hw_state(wl);
- WL_UNLOCK(wl);
+ LOCK(wl);
+ blocked = brcms_rfkill_set_hw_state(wl);
+ UNLOCK(wl);
if (!blocked)
wiphy_rfkill_stop_polling(wl->pub->ieee_hw->wiphy);
return 0;
}
-static void wl_ops_stop(struct ieee80211_hw *hw)
+static void brcms_ops_stop(struct ieee80211_hw *hw)
{
ieee80211_stop_queues(hw);
}
static int
-wl_ops_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
+brcms_ops_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
{
- struct wl_info *wl;
+ struct brcms_info *wl;
int err;
/* Just STA for now */
@@ -208,28 +220,28 @@ wl_ops_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
}
wl = HW_TO_WL(hw);
- WL_LOCK(wl);
- err = wl_up(wl);
- WL_UNLOCK(wl);
+ LOCK(wl);
+ err = brcms_up(wl);
+ UNLOCK(wl);
if (err != 0) {
- wiphy_err(hw->wiphy, "%s: wl_up() returned %d\n", __func__,
+ wiphy_err(hw->wiphy, "%s: brcms_up() returned %d\n", __func__,
err);
}
return err;
}
static void
-wl_ops_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
+brcms_ops_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
{
- struct wl_info *wl;
+ struct brcms_info *wl;
wl = HW_TO_WL(hw);
/* put driver in down state */
- WL_LOCK(wl);
- wl_down(wl);
- WL_UNLOCK(wl);
+ LOCK(wl);
+ brcms_down(wl);
+ UNLOCK(wl);
}
/*
@@ -239,7 +251,7 @@ static int
ieee_set_channel(struct ieee80211_hw *hw, struct ieee80211_channel *chan,
enum nl80211_channel_type type)
{
- struct wl_info *wl = HW_TO_WL(hw);
+ struct brcms_info *wl = HW_TO_WL(hw);
int err = 0;
switch (type) {
@@ -260,24 +272,24 @@ ieee_set_channel(struct ieee80211_hw *hw, struct ieee80211_channel *chan,
return err;
}
-static int wl_ops_config(struct ieee80211_hw *hw, u32 changed)
+static int brcms_ops_config(struct ieee80211_hw *hw, u32 changed)
{
struct ieee80211_conf *conf = &hw->conf;
- struct wl_info *wl = HW_TO_WL(hw);
+ struct brcms_info *wl = HW_TO_WL(hw);
int err = 0;
int new_int;
struct wiphy *wiphy = hw->wiphy;
- WL_LOCK(wl);
+ LOCK(wl);
if (changed & IEEE80211_CONF_CHANGE_LISTEN_INTERVAL) {
- if (wlc_iovar_setint
- (wl->wlc, "bcn_li_bcn", conf->listen_interval)) {
+ if (wlc_set_par(wl->wlc, IOV_BCN_LI_BCN, conf->listen_interval)
+ < 0) {
wiphy_err(wiphy, "%s: Error setting listen_interval\n",
__func__);
err = -EIO;
goto config_out;
}
- wlc_iovar_getint(wl->wlc, "bcn_li_bcn", &new_int);
+ wlc_get_par(wl->wlc, IOV_BCN_LI_BCN, &new_int);
}
if (changed & IEEE80211_CONF_CHANGE_MONITOR)
wiphy_err(wiphy, "%s: change monitor mode: %s (implement)\n",
@@ -289,14 +301,14 @@ static int wl_ops_config(struct ieee80211_hw *hw, u32 changed)
"true" : "false");
if (changed & IEEE80211_CONF_CHANGE_POWER) {
- if (wlc_iovar_setint
- (wl->wlc, "qtxpower", conf->power_level * 4)) {
+ if (wlc_set_par(wl->wlc, IOV_QTXPOWER, conf->power_level * 4)
+ < 0) {
wiphy_err(wiphy, "%s: Error setting power_level\n",
__func__);
err = -EIO;
goto config_out;
}
- wlc_iovar_getint(wl->wlc, "qtxpower", &new_int);
+ wlc_get_par(wl->wlc, IOV_QTXPOWER, &new_int);
if (new_int != (conf->power_level * 4))
wiphy_err(wiphy, "%s: Power level req != actual, %d %d"
"\n", __func__, conf->power_level * 4,
@@ -322,16 +334,16 @@ static int wl_ops_config(struct ieee80211_hw *hw, u32 changed)
}
config_out:
- WL_UNLOCK(wl);
+ UNLOCK(wl);
return err;
}
static void
-wl_ops_bss_info_changed(struct ieee80211_hw *hw,
+brcms_ops_bss_info_changed(struct ieee80211_hw *hw,
struct ieee80211_vif *vif,
struct ieee80211_bss_conf *info, u32 changed)
{
- struct wl_info *wl = HW_TO_WL(hw);
+ struct brcms_info *wl = HW_TO_WL(hw);
struct wiphy *wiphy = hw->wiphy;
int val;
@@ -341,9 +353,9 @@ wl_ops_bss_info_changed(struct ieee80211_hw *hw,
*/
wiphy_err(wiphy, "%s: %s: %sassociated\n", KBUILD_MODNAME,
__func__, info->assoc ? "" : "dis");
- WL_LOCK(wl);
+ LOCK(wl);
wlc_associate_upd(wl->wlc, info->assoc);
- WL_UNLOCK(wl);
+ UNLOCK(wl);
}
if (changed & BSS_CHANGED_ERP_SLOT) {
/* slot timing changed */
@@ -351,23 +363,23 @@ wl_ops_bss_info_changed(struct ieee80211_hw *hw,
val = 1;
else
val = 0;
- WL_LOCK(wl);
+ LOCK(wl);
wlc_set(wl->wlc, WLC_SET_SHORTSLOT_OVERRIDE, val);
- WL_UNLOCK(wl);
+ UNLOCK(wl);
}
if (changed & BSS_CHANGED_HT) {
/* 802.11n parameters changed */
u16 mode = info->ht_operation_mode;
- WL_LOCK(wl);
+ LOCK(wl);
wlc_protection_upd(wl->wlc, WLC_PROT_N_CFG,
mode & IEEE80211_HT_OP_MODE_PROTECTION);
wlc_protection_upd(wl->wlc, WLC_PROT_N_NONGF,
mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
wlc_protection_upd(wl->wlc, WLC_PROT_N_OBSS,
mode & IEEE80211_HT_OP_MODE_NON_HT_STA_PRSNT);
- WL_UNLOCK(wl);
+ UNLOCK(wl);
}
if (changed & BSS_CHANGED_BASIC_RATES) {
struct ieee80211_supported_band *bi;
@@ -377,10 +389,10 @@ wl_ops_bss_info_changed(struct ieee80211_hw *hw,
int error;
/* retrieve the current rates */
- WL_LOCK(wl);
+ LOCK(wl);
error = wlc_ioctl(wl->wlc, WLC_GET_CURR_RATESET,
&rs, sizeof(rs), NULL);
- WL_UNLOCK(wl);
+ UNLOCK(wl);
if (error) {
wiphy_err(wiphy, "%s: retrieve rateset failed: %d\n",
__func__, error);
@@ -393,27 +405,27 @@ wl_ops_bss_info_changed(struct ieee80211_hw *hw,
rate = (bi->bitrates[i].bitrate << 1) / 10;
/* set/clear basic rate flag */
- wl_set_basic_rate(&rs, rate, br_mask & 1);
+ brcms_set_basic_rate(&rs, rate, br_mask & 1);
br_mask >>= 1;
}
/* update the rate set */
- WL_LOCK(wl);
+ LOCK(wl);
wlc_ioctl(wl->wlc, WLC_SET_RATESET, &rs, sizeof(rs), NULL);
- WL_UNLOCK(wl);
+ UNLOCK(wl);
}
if (changed & BSS_CHANGED_BEACON_INT) {
/* Beacon interval changed */
- WL_LOCK(wl);
+ LOCK(wl);
wlc_set(wl->wlc, WLC_SET_BCNPRD, info->beacon_int);
- WL_UNLOCK(wl);
+ UNLOCK(wl);
}
if (changed & BSS_CHANGED_BSSID) {
/* BSSID changed, for whatever reason (IBSS and managed mode) */
- WL_LOCK(wl);
+ LOCK(wl);
wlc_set_addrmatch(wl->wlc, RCM_BSSID_OFFSET,
info->bssid);
- WL_UNLOCK(wl);
+ UNLOCK(wl);
}
if (changed & BSS_CHANGED_BEACON) {
/* Beacon data changed, retrieve new beacon (beaconing modes) */
@@ -458,11 +470,11 @@ wl_ops_bss_info_changed(struct ieee80211_hw *hw,
}
static void
-wl_ops_configure_filter(struct ieee80211_hw *hw,
+brcms_ops_configure_filter(struct ieee80211_hw *hw,
unsigned int changed_flags,
unsigned int *total_flags, u64 multicast)
{
- struct wl_info *wl = hw->priv;
+ struct brcms_info *wl = hw->priv;
struct wiphy *wiphy = hw->wiphy;
changed_flags &= MAC_FILTERS;
@@ -480,7 +492,7 @@ wl_ops_configure_filter(struct ieee80211_hw *hw,
if (changed_flags & FIF_OTHER_BSS)
wiphy_err(wiphy, "FIF_OTHER_BSS\n");
if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
- WL_LOCK(wl);
+ LOCK(wl);
if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
wl->pub->mac80211_state |= MAC80211_PROMISC_BCNS;
wlc_mac_bcn_promisc_change(wl->wlc, 1);
@@ -488,60 +500,60 @@ wl_ops_configure_filter(struct ieee80211_hw *hw,
wlc_mac_bcn_promisc_change(wl->wlc, 0);
wl->pub->mac80211_state &= ~MAC80211_PROMISC_BCNS;
}
- WL_UNLOCK(wl);
+ UNLOCK(wl);
}
return;
}
static int
-wl_ops_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, bool set)
+brcms_ops_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, bool set)
{
return 0;
}
-static void wl_ops_sw_scan_start(struct ieee80211_hw *hw)
+static void brcms_ops_sw_scan_start(struct ieee80211_hw *hw)
{
- struct wl_info *wl = hw->priv;
- WL_LOCK(wl);
+ struct brcms_info *wl = hw->priv;
+ LOCK(wl);
wlc_scan_start(wl->wlc);
- WL_UNLOCK(wl);
+ UNLOCK(wl);
return;
}
-static void wl_ops_sw_scan_complete(struct ieee80211_hw *hw)
+static void brcms_ops_sw_scan_complete(struct ieee80211_hw *hw)
{
- struct wl_info *wl = hw->priv;
- WL_LOCK(wl);
+ struct brcms_info *wl = hw->priv;
+ LOCK(wl);
wlc_scan_stop(wl->wlc);
- WL_UNLOCK(wl);
+ UNLOCK(wl);
return;
}
-static void wl_ops_set_tsf(struct ieee80211_hw *hw, u64 tsf)
+static void brcms_ops_set_tsf(struct ieee80211_hw *hw, u64 tsf)
{
wiphy_err(hw->wiphy, "%s: Enter\n", __func__);
return;
}
static int
-wl_ops_get_stats(struct ieee80211_hw *hw,
+brcms_ops_get_stats(struct ieee80211_hw *hw,
struct ieee80211_low_level_stats *stats)
{
- struct wl_info *wl = hw->priv;
+ struct brcms_info *wl = hw->priv;
struct wl_cnt *cnt;
- WL_LOCK(wl);
+ LOCK(wl);
cnt = wl->pub->_cnt;
stats->dot11ACKFailureCount = 0;
stats->dot11RTSFailureCount = 0;
stats->dot11FCSErrorCount = 0;
stats->dot11RTSSuccessCount = 0;
- WL_UNLOCK(wl);
+ UNLOCK(wl);
return 0;
}
static void
-wl_ops_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
+brcms_ops_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
enum sta_notify_cmd cmd, struct ieee80211_sta *sta)
{
switch (cmd) {
@@ -554,32 +566,32 @@ wl_ops_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
}
static int
-wl_ops_conf_tx(struct ieee80211_hw *hw, u16 queue,
+brcms_ops_conf_tx(struct ieee80211_hw *hw, u16 queue,
const struct ieee80211_tx_queue_params *params)
{
- struct wl_info *wl = hw->priv;
+ struct brcms_info *wl = hw->priv;
- WL_LOCK(wl);
+ LOCK(wl);
wlc_wme_setparams(wl->wlc, queue, params, true);
- WL_UNLOCK(wl);
+ UNLOCK(wl);
return 0;
}
-static u64 wl_ops_get_tsf(struct ieee80211_hw *hw)
+static u64 brcms_ops_get_tsf(struct ieee80211_hw *hw)
{
wiphy_err(hw->wiphy, "%s: Enter\n", __func__);
return 0;
}
static int
-wl_ops_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
+brcms_ops_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
struct ieee80211_sta *sta)
{
struct scb *scb;
int i;
- struct wl_info *wl = hw->priv;
+ struct brcms_info *wl = hw->priv;
/* Init the scb */
scb = (struct scb *)sta->drv_priv;
@@ -593,7 +605,7 @@ wl_ops_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
wl->pub->global_ampdu = &(scb->scb_ampdu);
wl->pub->global_ampdu->scb = scb;
wl->pub->global_ampdu->max_pdu = 16;
- bcm_pktq_init(&scb->scb_ampdu.txq, AMPDU_MAX_SCB_TID,
+ brcmu_pktq_init(&scb->scb_ampdu.txq, AMPDU_MAX_SCB_TID,
AMPDU_MAX_SCB_TID * PKTQ_LEN_DEFAULT);
sta->ht_cap.ht_supported = true;
@@ -608,21 +620,21 @@ wl_ops_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
}
static int
-wl_ops_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
+brcms_ops_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
struct ieee80211_sta *sta)
{
return 0;
}
static int
-wl_ops_ampdu_action(struct ieee80211_hw *hw,
+brcms_ops_ampdu_action(struct ieee80211_hw *hw,
struct ieee80211_vif *vif,
enum ieee80211_ampdu_mlme_action action,
struct ieee80211_sta *sta, u16 tid, u16 *ssn,
u8 buf_size)
{
struct scb *scb = (struct scb *)sta->drv_priv;
- struct wl_info *wl = hw->priv;
+ struct brcms_info *wl = hw->priv;
int status;
if (WARN_ON(scb->magic != SCB_MAGIC))
@@ -633,9 +645,9 @@ wl_ops_ampdu_action(struct ieee80211_hw *hw,
case IEEE80211_AMPDU_RX_STOP:
break;
case IEEE80211_AMPDU_TX_START:
- WL_LOCK(wl);
+ LOCK(wl);
status = wlc_aggregatable(wl->wlc, tid);
- WL_UNLOCK(wl);
+ UNLOCK(wl);
if (!status) {
wiphy_err(wl->wiphy, "START: tid %d is not agg\'able\n",
tid);
@@ -647,9 +659,9 @@ wl_ops_ampdu_action(struct ieee80211_hw *hw,
break;
case IEEE80211_AMPDU_TX_STOP:
- WL_LOCK(wl);
+ LOCK(wl);
wlc_ampdu_flush(wl->wlc, sta, tid);
- WL_UNLOCK(wl);
+ UNLOCK(wl);
ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
break;
case IEEE80211_AMPDU_TX_OPERATIONAL:
@@ -664,58 +676,58 @@ wl_ops_ampdu_action(struct ieee80211_hw *hw,
return 0;
}
-static void wl_ops_rfkill_poll(struct ieee80211_hw *hw)
+static void brcms_ops_rfkill_poll(struct ieee80211_hw *hw)
{
- struct wl_info *wl = HW_TO_WL(hw);
+ struct brcms_info *wl = HW_TO_WL(hw);
bool blocked;
- WL_LOCK(wl);
+ LOCK(wl);
blocked = wlc_check_radio_disabled(wl->wlc);
- WL_UNLOCK(wl);
+ UNLOCK(wl);
wiphy_rfkill_set_hw_state(wl->pub->ieee_hw->wiphy, blocked);
}
-static void wl_ops_flush(struct ieee80211_hw *hw, bool drop)
+static void brcms_ops_flush(struct ieee80211_hw *hw, bool drop)
{
- struct wl_info *wl = HW_TO_WL(hw);
+ struct brcms_info *wl = HW_TO_WL(hw);
no_printk("%s: drop = %s\n", __func__, drop ? "true" : "false");
/* wait for packet queue and dma fifos to run empty */
- WL_LOCK(wl);
+ LOCK(wl);
wlc_wait_for_tx_completion(wl->wlc, drop);
- WL_UNLOCK(wl);
+ UNLOCK(wl);
}
-static const struct ieee80211_ops wl_ops = {
- .tx = wl_ops_tx,
- .start = wl_ops_start,
- .stop = wl_ops_stop,
- .add_interface = wl_ops_add_interface,
- .remove_interface = wl_ops_remove_interface,
- .config = wl_ops_config,
- .bss_info_changed = wl_ops_bss_info_changed,
- .configure_filter = wl_ops_configure_filter,
- .set_tim = wl_ops_set_tim,
- .sw_scan_start = wl_ops_sw_scan_start,
- .sw_scan_complete = wl_ops_sw_scan_complete,
- .set_tsf = wl_ops_set_tsf,
- .get_stats = wl_ops_get_stats,
- .sta_notify = wl_ops_sta_notify,
- .conf_tx = wl_ops_conf_tx,
- .get_tsf = wl_ops_get_tsf,
- .sta_add = wl_ops_sta_add,
- .sta_remove = wl_ops_sta_remove,
- .ampdu_action = wl_ops_ampdu_action,
- .rfkill_poll = wl_ops_rfkill_poll,
- .flush = wl_ops_flush,
+static const struct ieee80211_ops brcms_ops = {
+ .tx = brcms_ops_tx,
+ .start = brcms_ops_start,
+ .stop = brcms_ops_stop,
+ .add_interface = brcms_ops_add_interface,
+ .remove_interface = brcms_ops_remove_interface,
+ .config = brcms_ops_config,
+ .bss_info_changed = brcms_ops_bss_info_changed,
+ .configure_filter = brcms_ops_configure_filter,
+ .set_tim = brcms_ops_set_tim,
+ .sw_scan_start = brcms_ops_sw_scan_start,
+ .sw_scan_complete = brcms_ops_sw_scan_complete,
+ .set_tsf = brcms_ops_set_tsf,
+ .get_stats = brcms_ops_get_stats,
+ .sta_notify = brcms_ops_sta_notify,
+ .conf_tx = brcms_ops_conf_tx,
+ .get_tsf = brcms_ops_get_tsf,
+ .sta_add = brcms_ops_sta_add,
+ .sta_remove = brcms_ops_sta_remove,
+ .ampdu_action = brcms_ops_ampdu_action,
+ .rfkill_poll = brcms_ops_rfkill_poll,
+ .flush = brcms_ops_flush,
};
/*
- * is called in wl_pci_probe() context, therefore no locking required.
+ * is called in brcms_pci_probe() context, therefore no locking required.
*/
-static int wl_set_hint(struct wl_info *wl, char *abbrev)
+static int brcms_set_hint(struct brcms_info *wl, char *abbrev)
{
return regulatory_hint(wl->pub->ieee_hw->wiphy, abbrev);
}
@@ -726,25 +738,25 @@ static int wl_set_hint(struct wl_info *wl, char *abbrev)
* Attach to the WL device identified by vendor and device parameters.
* regs is a host accessible memory address pointing to WL device registers.
*
- * wl_attach is not defined as static because in the case where no bus
+ * brcms_attach is not defined as static because in the case where no bus
* is defined, wl_attach will never be called, and thus, gcc will issue
* a warning that this function is defined but not used if we declare
* it as static.
*
*
- * is called in wl_pci_probe() context, therefore no locking required.
+ * is called in brcms_pci_probe() context, therefore no locking required.
*/
-static struct wl_info *wl_attach(u16 vendor, u16 device, unsigned long regs,
+static struct brcms_info *brcms_attach(u16 vendor, u16 device,
+ unsigned long regs,
uint bustype, void *btparam, uint irq)
{
- struct wl_info *wl = NULL;
+ struct brcms_info *wl = NULL;
int unit, err;
-
unsigned long base_addr;
struct ieee80211_hw *hw;
u8 perm[ETH_ALEN];
- unit = wl_found;
+ unit = n_adapters_found;
err = 0;
if (unit < 0) {
@@ -762,15 +774,13 @@ static struct wl_info *wl_attach(u16 vendor, u16 device, unsigned long regs,
atomic_set(&wl->callbacks, 0);
/* setup the bottom half handler */
- tasklet_init(&wl->tasklet, wl_dpc, (unsigned long) wl);
+ tasklet_init(&wl->tasklet, brcms_dpc, (unsigned long) wl);
base_addr = regs;
- if (bustype == PCI_BUS) {
- wl->piomode = false;
- } else if (bustype == RPC_BUS) {
+ if (bustype == PCI_BUS || bustype == RPC_BUS) {
/* Do nothing */
} else {
bustype = PCI_BUS;
@@ -787,18 +797,18 @@ static struct wl_info *wl_attach(u16 vendor, u16 device, unsigned long regs,
spin_lock_init(&wl->isr_lock);
/* prepare ucode */
- if (wl_request_fw(wl, (struct pci_dev *)btparam) < 0) {
+ if (brcms_request_fw(wl, (struct pci_dev *)btparam) < 0) {
wiphy_err(wl->wiphy, "%s: Failed to find firmware usually in "
"%s\n", KBUILD_MODNAME, "/lib/firmware/brcm");
- wl_release_fw(wl);
- wl_remove((struct pci_dev *)btparam);
+ brcms_release_fw(wl);
+ brcms_remove((struct pci_dev *)btparam);
return NULL;
}
/* common load-time initialization */
- wl->wlc = wlc_attach((void *)wl, vendor, device, unit, wl->piomode,
+ wl->wlc = wlc_attach((void *)wl, vendor, device, unit, false,
wl->regsva, wl->bcm_bustype, btparam, &err);
- wl_release_fw(wl);
+ brcms_release_fw(wl);
if (!wl->wlc) {
wiphy_err(wl->wiphy, "%s: wlc_attach() failed with code %d\n",
KBUILD_MODNAME, err);
@@ -808,21 +818,20 @@ static struct wl_info *wl_attach(u16 vendor, u16 device, unsigned long regs,
wl->pub->ieee_hw = hw;
- if (wlc_iovar_setint(wl->wlc, "mpc", 0)) {
+ if (wlc_set_par(wl->wlc, IOV_MPC, 0) < 0) {
wiphy_err(wl->wiphy, "wl%d: Error setting MPC variable to 0\n",
unit);
}
/* register our interrupt handler */
- if (request_irq(irq, wl_isr, IRQF_SHARED, KBUILD_MODNAME, wl)) {
+ if (request_irq(irq, brcms_isr, IRQF_SHARED, KBUILD_MODNAME, wl)) {
wiphy_err(wl->wiphy, "wl%d: request_irq() failed\n", unit);
goto fail;
}
wl->irq = irq;
/* register module */
- wlc_module_register(wl->pub, NULL, "linux", wl, NULL, wl_linux_watchdog,
- NULL);
+ wlc_module_register(wl->pub, "linux", wl, wl_linux_watchdog, NULL);
if (ieee_hw_init(hw)) {
wiphy_err(wl->wiphy, "wl%d: %s: ieee_hw_init failed!\n", unit,
@@ -842,19 +851,19 @@ static struct wl_info *wl_attach(u16 vendor, u16 device, unsigned long regs,
}
if (wl->pub->srom_ccode[0])
- err = wl_set_hint(wl, wl->pub->srom_ccode);
+ err = brcms_set_hint(wl, wl->pub->srom_ccode);
else
- err = wl_set_hint(wl, "US");
+ err = brcms_set_hint(wl, "US");
if (err) {
wiphy_err(wl->wiphy, "%s: regulatory_hint failed, status %d\n",
__func__, err);
}
- wl_found++;
+ n_adapters_found++;
return wl;
fail:
- wl_free(wl);
+ brcms_free(wl);
return NULL;
}
@@ -869,7 +878,7 @@ fail:
.max_power = 19, \
}
-static struct ieee80211_channel wl_2ghz_chantable[] = {
+static struct ieee80211_channel brcms_2ghz_chantable[] = {
CHAN2GHZ(1, 2412, IEEE80211_CHAN_NO_HT40MINUS),
CHAN2GHZ(2, 2417, IEEE80211_CHAN_NO_HT40MINUS),
CHAN2GHZ(3, 2422, IEEE80211_CHAN_NO_HT40MINUS),
@@ -901,7 +910,7 @@ static struct ieee80211_channel wl_2ghz_chantable[] = {
.max_power = 21, \
}
-static struct ieee80211_channel wl_5ghz_nphy_chantable[] = {
+static struct ieee80211_channel brcms_5ghz_nphy_chantable[] = {
/* UNII-1 */
CHAN5GHZ(36, IEEE80211_CHAN_NO_HT40MINUS),
CHAN5GHZ(40, IEEE80211_CHAN_NO_HT40PLUS),
@@ -969,7 +978,7 @@ static struct ieee80211_channel wl_5ghz_nphy_chantable[] = {
.hw_value = (rate100m / 5), \
}
-static struct ieee80211_rate wl_legacy_ratetable[] = {
+static struct ieee80211_rate legacy_ratetable[] = {
RATE(10, 0),
RATE(20, IEEE80211_RATE_SHORT_PREAMBLE),
RATE(55, IEEE80211_RATE_SHORT_PREAMBLE),
@@ -984,12 +993,12 @@ static struct ieee80211_rate wl_legacy_ratetable[] = {
RATE(540, 0),
};
-static struct ieee80211_supported_band wl_band_2GHz_nphy = {
+static struct ieee80211_supported_band brcms_band_2GHz_nphy = {
.band = IEEE80211_BAND_2GHZ,
- .channels = wl_2ghz_chantable,
- .n_channels = ARRAY_SIZE(wl_2ghz_chantable),
- .bitrates = wl_legacy_ratetable,
- .n_bitrates = ARRAY_SIZE(wl_legacy_ratetable),
+ .channels = brcms_2ghz_chantable,
+ .n_channels = ARRAY_SIZE(brcms_2ghz_chantable),
+ .bitrates = legacy_ratetable,
+ .n_bitrates = ARRAY_SIZE(legacy_ratetable),
.ht_cap = {
/* from include/linux/ieee80211.h */
.cap = IEEE80211_HT_CAP_GRN_FLD |
@@ -1006,12 +1015,12 @@ static struct ieee80211_supported_band wl_band_2GHz_nphy = {
}
};
-static struct ieee80211_supported_band wl_band_5GHz_nphy = {
+static struct ieee80211_supported_band brcms_band_5GHz_nphy = {
.band = IEEE80211_BAND_5GHZ,
- .channels = wl_5ghz_nphy_chantable,
- .n_channels = ARRAY_SIZE(wl_5ghz_nphy_chantable),
- .bitrates = wl_legacy_ratetable + 4,
- .n_bitrates = ARRAY_SIZE(wl_legacy_ratetable) - 4,
+ .channels = brcms_5ghz_nphy_chantable,
+ .n_channels = ARRAY_SIZE(brcms_5ghz_nphy_chantable),
+ .bitrates = legacy_ratetable + 4,
+ .n_bitrates = ARRAY_SIZE(legacy_ratetable) - 4,
.ht_cap = {
/* use IEEE80211_HT_CAP_* from include/linux/ieee80211.h */
.cap = IEEE80211_HT_CAP_GRN_FLD | IEEE80211_HT_CAP_SGI_20 | IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_40MHZ_INTOLERANT, /* No 40 mhz yet */
@@ -1027,11 +1036,11 @@ static struct ieee80211_supported_band wl_band_5GHz_nphy = {
};
/*
- * is called in wl_pci_probe() context, therefore no locking required.
+ * is called in brcms_pci_probe() context, therefore no locking required.
*/
static int ieee_hw_rate_init(struct ieee80211_hw *hw)
{
- struct wl_info *wl = HW_TO_WL(hw);
+ struct brcms_info *wl = HW_TO_WL(hw);
int has_5g;
char phy_list[4];
@@ -1047,10 +1056,10 @@ static int ieee_hw_rate_init(struct ieee80211_hw *hw)
if (phy_list[0] == 'n' || phy_list[0] == 'c') {
if (phy_list[0] == 'c') {
/* Single stream */
- wl_band_2GHz_nphy.ht_cap.mcs.rx_mask[1] = 0;
- wl_band_2GHz_nphy.ht_cap.mcs.rx_highest = 72;
+ brcms_band_2GHz_nphy.ht_cap.mcs.rx_mask[1] = 0;
+ brcms_band_2GHz_nphy.ht_cap.mcs.rx_highest = 72;
}
- hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &wl_band_2GHz_nphy;
+ hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &brcms_band_2GHz_nphy;
} else {
return -EPERM;
}
@@ -1060,7 +1069,7 @@ static int ieee_hw_rate_init(struct ieee80211_hw *hw)
has_5g++;
if (phy_list[0] == 'n' || phy_list[0] == 'c') {
hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
- &wl_band_5GHz_nphy;
+ &brcms_band_5GHz_nphy;
} else {
return -EPERM;
}
@@ -1069,7 +1078,7 @@ static int ieee_hw_rate_init(struct ieee80211_hw *hw)
}
/*
- * is called in wl_pci_probe() context, therefore no locking required.
+ * is called in brcms_pci_probe() context, therefore no locking required.
*/
static int ieee_hw_init(struct ieee80211_hw *hw)
{
@@ -1100,15 +1109,15 @@ static int ieee_hw_init(struct ieee80211_hw *hw)
* determines if a device is a WL device, and if so, attaches it.
*
* This function determines if a device pointed to by pdev is a WL device,
- * and if so, performs a wl_attach() on it.
+ * and if so, performs a brcms_attach() on it.
*
* Perimeter lock is initialized in the course of this function.
*/
static int __devinit
-wl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
+brcms_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
{
int rc;
- struct wl_info *wl;
+ struct brcms_info *wl;
struct ieee80211_hw *hw;
u32 val;
@@ -1117,7 +1126,8 @@ wl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
PCI_FUNC(pdev->devfn), pdev->irq);
if ((pdev->vendor != PCI_VENDOR_ID_BROADCOM) ||
- (((pdev->device & 0xff00) != 0x4300) &&
+ ((pdev->device != 0x0576) &&
+ ((pdev->device & 0xff00) != 0x4300) &&
((pdev->device & 0xff00) != 0x4700) &&
((pdev->device < 43000) || (pdev->device > 43999))))
return -ENODEV;
@@ -1135,7 +1145,7 @@ wl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
if ((val & 0x0000ff00) != 0)
pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
- hw = ieee80211_alloc_hw(sizeof(struct wl_info), &wl_ops);
+ hw = ieee80211_alloc_hw(sizeof(struct brcms_info), &brcms_ops);
if (!hw) {
pr_err("%s: ieee80211_alloc_hw failed\n", __func__);
return -ENOMEM;
@@ -1147,43 +1157,44 @@ wl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
memset(hw->priv, 0, sizeof(*wl));
- wl = wl_attach(pdev->vendor, pdev->device, pci_resource_start(pdev, 0),
- PCI_BUS, pdev, pdev->irq);
+ wl = brcms_attach(pdev->vendor, pdev->device,
+ pci_resource_start(pdev, 0), PCI_BUS, pdev,
+ pdev->irq);
if (!wl) {
- pr_err("%s: %s: wl_attach failed!\n", KBUILD_MODNAME,
+ pr_err("%s: %s: brcms_attach failed!\n", KBUILD_MODNAME,
__func__);
return -ENODEV;
}
return 0;
}
-static int wl_suspend(struct pci_dev *pdev, pm_message_t state)
+static int brcms_suspend(struct pci_dev *pdev, pm_message_t state)
{
- struct wl_info *wl;
+ struct brcms_info *wl;
struct ieee80211_hw *hw;
hw = pci_get_drvdata(pdev);
wl = HW_TO_WL(hw);
if (!wl) {
wiphy_err(wl->wiphy,
- "wl_suspend: pci_get_drvdata failed\n");
+ "brcms_suspend: pci_get_drvdata failed\n");
return -ENODEV;
}
/* only need to flag hw is down for proper resume */
- WL_LOCK(wl);
+ LOCK(wl);
wl->pub->hw_up = false;
- WL_UNLOCK(wl);
+ UNLOCK(wl);
pci_save_state(pdev);
pci_disable_device(pdev);
return pci_set_power_state(pdev, PCI_D3hot);
}
-static int wl_resume(struct pci_dev *pdev)
+static int brcms_resume(struct pci_dev *pdev)
{
- struct wl_info *wl;
+ struct brcms_info *wl;
struct ieee80211_hw *hw;
int err = 0;
u32 val;
@@ -1192,7 +1203,7 @@ static int wl_resume(struct pci_dev *pdev)
wl = HW_TO_WL(hw);
if (!wl) {
wiphy_err(wl->wiphy,
- "wl: wl_resume: pci_get_drvdata failed\n");
+ "wl: brcms_resume: pci_get_drvdata failed\n");
return -ENODEV;
}
@@ -1214,97 +1225,80 @@ static int wl_resume(struct pci_dev *pdev)
/*
* done. driver will be put in up state
- * in wl_ops_add_interface() call.
+ * in brcms_ops_add_interface() call.
*/
return err;
}
/*
-* called from both kernel as from wl_*()
+* called from both kernel as from this kernel module.
* precondition: perimeter lock is not acquired.
*/
-static void wl_remove(struct pci_dev *pdev)
+static void brcms_remove(struct pci_dev *pdev)
{
- struct wl_info *wl;
+ struct brcms_info *wl;
struct ieee80211_hw *hw;
int status;
hw = pci_get_drvdata(pdev);
wl = HW_TO_WL(hw);
if (!wl) {
- pr_err("wl: wl_remove: pci_get_drvdata failed\n");
+ pr_err("wl: brcms_remove: pci_get_drvdata failed\n");
return;
}
- WL_LOCK(wl);
+ LOCK(wl);
status = wlc_chipmatch(pdev->vendor, pdev->device);
- WL_UNLOCK(wl);
+ UNLOCK(wl);
if (!status) {
- wiphy_err(wl->wiphy, "wl: wl_remove: wlc_chipmatch failed\n");
+ wiphy_err(wl->wiphy, "wl: brcms_remove: wlc_chipmatch "
+ "failed\n");
return;
}
if (wl->wlc) {
wiphy_rfkill_set_hw_state(wl->pub->ieee_hw->wiphy, false);
wiphy_rfkill_stop_polling(wl->pub->ieee_hw->wiphy);
ieee80211_unregister_hw(hw);
- WL_LOCK(wl);
- wl_down(wl);
- WL_UNLOCK(wl);
+ LOCK(wl);
+ brcms_down(wl);
+ UNLOCK(wl);
}
pci_disable_device(pdev);
- wl_free(wl);
+ brcms_free(wl);
pci_set_drvdata(pdev, NULL);
ieee80211_free_hw(hw);
}
-static struct pci_driver wl_pci_driver = {
+static struct pci_driver brcms_pci_driver = {
.name = KBUILD_MODNAME,
- .probe = wl_pci_probe,
- .suspend = wl_suspend,
- .resume = wl_resume,
- .remove = __devexit_p(wl_remove),
- .id_table = wl_id_table,
+ .probe = brcms_pci_probe,
+ .suspend = brcms_suspend,
+ .resume = brcms_resume,
+ .remove = __devexit_p(brcms_remove),
+ .id_table = brcms_pci_id_table,
};
/**
* This is the main entry point for the WL driver.
*
* This function determines if a device pointed to by pdev is a WL device,
- * and if so, performs a wl_attach() on it.
+ * and if so, performs a brcms_attach() on it.
*
*/
-static int __init wl_module_init(void)
+static int __init brcms_module_init(void)
{
int error = -ENODEV;
#ifdef BCMDBG
if (msglevel != 0xdeadbeef)
- wl_msg_level = msglevel;
- else {
- char *var = getvar(NULL, "wl_msglevel");
- if (var) {
- unsigned long value;
-
- (void)strict_strtoul(var, 0, &value);
- wl_msg_level = value;
- }
- }
+ brcm_msg_level = msglevel;
if (phymsglevel != 0xdeadbeef)
phyhal_msg_level = phymsglevel;
- else {
- char *var = getvar(NULL, "phy_msglevel");
- if (var) {
- unsigned long value;
-
- (void)strict_strtoul(var, 0, &value);
- phyhal_msg_level = value;
- }
- }
#endif /* BCMDBG */
- error = pci_register_driver(&wl_pci_driver);
+ error = pci_register_driver(&brcms_pci_driver);
if (!error)
return 0;
@@ -1320,14 +1314,14 @@ static int __init wl_module_init(void)
* system.
*
*/
-static void __exit wl_module_exit(void)
+static void __exit brcms_module_exit(void)
{
- pci_unregister_driver(&wl_pci_driver);
+ pci_unregister_driver(&brcms_pci_driver);
}
-module_init(wl_module_init);
-module_exit(wl_module_exit);
+module_init(brcms_module_init);
+module_exit(brcms_module_exit);
/**
* This function frees the WL per-device resources.
@@ -1338,13 +1332,13 @@ module_exit(wl_module_exit);
* precondition: can both be called locked and unlocked
*
*/
-static void wl_free(struct wl_info *wl)
+static void brcms_free(struct brcms_info *wl)
{
- struct wl_timer *t, *next;
+ struct brcms_timer *t, *next;
/* free ucode data */
if (wl->fw.fw_cnt)
- wl_ucode_data_free();
+ brcms_ucode_data_free();
if (wl->irq)
free_irq(wl->irq, wl);
@@ -1389,7 +1383,7 @@ static void wl_free(struct wl_info *wl)
}
/* flags the given rate in rateset as requested */
-static void wl_set_basic_rate(struct wl_rateset *rs, u16 rate, bool is_br)
+static void brcms_set_basic_rate(struct wl_rateset *rs, u16 rate, bool is_br)
{
u32 i;
@@ -1408,8 +1402,8 @@ static void wl_set_basic_rate(struct wl_rateset *rs, u16 rate, bool is_br)
/*
* precondition: perimeter lock has been acquired
*/
-void wl_txflowcontrol(struct wl_info *wl, struct wl_if *wlif, bool state,
- int prio)
+void brcms_txflowcontrol(struct brcms_info *wl, struct brcms_if *wlif,
+ bool state, int prio)
{
wiphy_err(wl->wiphy, "Shouldn't be here %s\n", __func__);
}
@@ -1417,10 +1411,10 @@ void wl_txflowcontrol(struct wl_info *wl, struct wl_if *wlif, bool state,
/*
* precondition: perimeter lock has been acquired
*/
-void wl_init(struct wl_info *wl)
+void brcms_init(struct brcms_info *wl)
{
BCMMSG(WL_TO_HW(wl)->wiphy, "wl%d\n", wl->pub->unit);
- wl_reset(wl);
+ brcms_reset(wl);
wlc_init(wl->wlc);
}
@@ -1428,7 +1422,7 @@ void wl_init(struct wl_info *wl)
/*
* precondition: perimeter lock has been acquired
*/
-uint wl_reset(struct wl_info *wl)
+uint brcms_reset(struct brcms_info *wl)
{
BCMMSG(WL_TO_HW(wl)->wiphy, "wl%d\n", wl->pub->unit);
wlc_reset(wl->wlc);
@@ -1443,7 +1437,7 @@ uint wl_reset(struct wl_info *wl)
* These are interrupt on/off entry points. Disable interrupts
* during interrupt state transition.
*/
-void wl_intrson(struct wl_info *wl)
+void brcms_intrson(struct brcms_info *wl)
{
unsigned long flags;
@@ -1455,12 +1449,12 @@ void wl_intrson(struct wl_info *wl)
/*
* precondition: perimeter lock has been acquired
*/
-bool wl_alloc_dma_resources(struct wl_info *wl, uint addrwidth)
+bool wl_alloc_dma_resources(struct brcms_info *wl, uint addrwidth)
{
return true;
}
-u32 wl_intrsoff(struct wl_info *wl)
+u32 brcms_intrsoff(struct brcms_info *wl)
{
unsigned long flags;
u32 status;
@@ -1471,7 +1465,7 @@ u32 wl_intrsoff(struct wl_info *wl)
return status;
}
-void wl_intrsrestore(struct wl_info *wl, u32 macintmask)
+void brcms_intrsrestore(struct brcms_info *wl, u32 macintmask)
{
unsigned long flags;
@@ -1483,7 +1477,7 @@ void wl_intrsrestore(struct wl_info *wl, u32 macintmask)
/*
* precondition: perimeter lock has been acquired
*/
-int wl_up(struct wl_info *wl)
+int brcms_up(struct brcms_info *wl)
{
int error = 0;
@@ -1498,7 +1492,7 @@ int wl_up(struct wl_info *wl)
/*
* precondition: perimeter lock has been acquired
*/
-void wl_down(struct wl_info *wl)
+void brcms_down(struct brcms_info *wl)
{
uint callbacks, ret_val = 0;
@@ -1507,25 +1501,25 @@ void wl_down(struct wl_info *wl)
callbacks = atomic_read(&wl->callbacks) - ret_val;
/* wait for down callbacks to complete */
- WL_UNLOCK(wl);
+ UNLOCK(wl);
/* For HIGH_only driver, it's important to actually schedule other work,
* not just spin wait since everything runs at schedule level
*/
SPINWAIT((atomic_read(&wl->callbacks) > callbacks), 100 * 1000);
- WL_LOCK(wl);
+ LOCK(wl);
}
-static irqreturn_t wl_isr(int irq, void *dev_id)
+static irqreturn_t brcms_isr(int irq, void *dev_id)
{
- struct wl_info *wl;
+ struct brcms_info *wl;
bool ours, wantdpc;
unsigned long flags;
- wl = (struct wl_info *) dev_id;
+ wl = (struct brcms_info *) dev_id;
- WL_ISRLOCK(wl, flags);
+ ISR_LOCK(wl, flags);
/* call common first level interrupt handler */
ours = wlc_isr(wl->wlc, &wantdpc);
@@ -1539,18 +1533,18 @@ static irqreturn_t wl_isr(int irq, void *dev_id)
}
}
- WL_ISRUNLOCK(wl, flags);
+ ISR_UNLOCK(wl, flags);
return IRQ_RETVAL(ours);
}
-static void wl_dpc(unsigned long data)
+static void brcms_dpc(unsigned long data)
{
- struct wl_info *wl;
+ struct brcms_info *wl;
- wl = (struct wl_info *) data;
+ wl = (struct brcms_info *) data;
- WL_LOCK(wl);
+ LOCK(wl);
/* call the common second level interrupt handler */
if (wl->pub->up) {
@@ -1574,27 +1568,27 @@ static void wl_dpc(unsigned long data)
tasklet_schedule(&wl->tasklet);
else {
/* re-enable interrupts */
- wl_intrson(wl);
+ brcms_intrson(wl);
}
done:
- WL_UNLOCK(wl);
+ UNLOCK(wl);
}
/*
* is called by the kernel from software irq context
*/
-static void wl_timer(unsigned long data)
+static void brcms_timer(unsigned long data)
{
- _wl_timer((struct wl_timer *) data);
+ _brcms_timer((struct brcms_timer *) data);
}
/*
* precondition: perimeter lock is not acquired
*/
-static void _wl_timer(struct wl_timer *t)
+static void _brcms_timer(struct brcms_timer *t)
{
- WL_LOCK(t->wl);
+ LOCK(t->wl);
if (t->set) {
if (t->periodic) {
@@ -1610,7 +1604,7 @@ static void _wl_timer(struct wl_timer *t)
atomic_dec(&t->wl->callbacks);
- WL_UNLOCK(t->wl);
+ UNLOCK(t->wl);
}
/*
@@ -1619,21 +1613,22 @@ static void _wl_timer(struct wl_timer *t)
*
* precondition: perimeter lock has been acquired
*/
-struct wl_timer *wl_init_timer(struct wl_info *wl, void (*fn) (void *arg),
- void *arg, const char *name)
+struct brcms_timer *brcms_init_timer(struct brcms_info *wl,
+ void (*fn) (void *arg),
+ void *arg, const char *name)
{
- struct wl_timer *t;
+ struct brcms_timer *t;
- t = kzalloc(sizeof(struct wl_timer), GFP_ATOMIC);
+ t = kzalloc(sizeof(struct brcms_timer), GFP_ATOMIC);
if (!t) {
- wiphy_err(wl->wiphy, "wl%d: wl_init_timer: out of memory\n",
+ wiphy_err(wl->wiphy, "wl%d: brcms_init_timer: out of memory\n",
wl->pub->unit);
return 0;
}
init_timer(&t->timer);
t->timer.data = (unsigned long) t;
- t->timer.function = wl_timer;
+ t->timer.function = brcms_timer;
t->wl = wl;
t->fn = fn;
t->arg = arg;
@@ -1654,7 +1649,8 @@ struct wl_timer *wl_init_timer(struct wl_info *wl, void (*fn) (void *arg),
*
* precondition: perimeter lock has been acquired
*/
-void wl_add_timer(struct wl_info *wl, struct wl_timer *t, uint ms, int periodic)
+void brcms_add_timer(struct brcms_info *wl, struct brcms_timer *t, uint ms,
+ int periodic)
{
#ifdef BCMDBG
if (t->set) {
@@ -1676,7 +1672,7 @@ void wl_add_timer(struct wl_info *wl, struct wl_timer *t, uint ms, int periodic)
*
* precondition: perimeter lock has been acquired
*/
-bool wl_del_timer(struct wl_info *wl, struct wl_timer *t)
+bool brcms_del_timer(struct brcms_info *wl, struct brcms_timer *t)
{
if (t->set) {
t->set = false;
@@ -1692,12 +1688,12 @@ bool wl_del_timer(struct wl_info *wl, struct wl_timer *t)
/*
* precondition: perimeter lock has been acquired
*/
-void wl_free_timer(struct wl_info *wl, struct wl_timer *t)
+void brcms_free_timer(struct brcms_info *wl, struct brcms_timer *t)
{
- struct wl_timer *tmp;
+ struct brcms_timer *tmp;
/* delete the timer in case it is active */
- wl_del_timer(wl, t);
+ brcms_del_timer(wl, t);
if (wl->timers == t) {
wl->timers = wl->timers->next;
@@ -1734,13 +1730,13 @@ static int wl_linux_watchdog(void *ctx)
return 0;
}
-struct wl_fw_hdr {
+struct firmware_hdr {
u32 offset;
u32 len;
u32 idx;
};
-char *wl_firmwares[WL_MAX_FW] = {
+char *brcms_firmwares[MAX_FW_IMAGES] = {
"brcm/bcm43xx",
NULL
};
@@ -1748,13 +1744,13 @@ char *wl_firmwares[WL_MAX_FW] = {
/*
* precondition: perimeter lock has been acquired
*/
-int wl_ucode_init_buf(struct wl_info *wl, void **pbuf, u32 idx)
+int brcms_ucode_init_buf(struct brcms_info *wl, void **pbuf, u32 idx)
{
int i, entry;
const u8 *pdata;
- struct wl_fw_hdr *hdr;
+ struct firmware_hdr *hdr;
for (i = 0; i < wl->fw.fw_cnt; i++) {
- hdr = (struct wl_fw_hdr *)wl->fw.fw_hdr[i]->data;
+ hdr = (struct firmware_hdr *)wl->fw.fw_hdr[i]->data;
for (entry = 0; entry < wl->fw.hdr_num_entries[i];
entry++, hdr++) {
if (hdr->idx == idx) {
@@ -1778,16 +1774,16 @@ fail:
}
/*
- * Precondition: Since this function is called in wl_pci_probe() context,
+ * Precondition: Since this function is called in brcms_pci_probe() context,
* no locking is required.
*/
-int wl_ucode_init_uint(struct wl_info *wl, u32 *data, u32 idx)
+int brcms_ucode_init_uint(struct brcms_info *wl, u32 *data, u32 idx)
{
int i, entry;
const u8 *pdata;
- struct wl_fw_hdr *hdr;
+ struct firmware_hdr *hdr;
for (i = 0; i < wl->fw.fw_cnt; i++) {
- hdr = (struct wl_fw_hdr *)wl->fw.fw_hdr[i]->data;
+ hdr = (struct firmware_hdr *)wl->fw.fw_hdr[i]->data;
for (entry = 0; entry < wl->fw.hdr_num_entries[i];
entry++, hdr++) {
if (hdr->idx == idx) {
@@ -1807,21 +1803,21 @@ int wl_ucode_init_uint(struct wl_info *wl, u32 *data, u32 idx)
}
/*
- * Precondition: Since this function is called in wl_pci_probe() context,
+ * Precondition: Since this function is called in brcms_pci_probe() context,
* no locking is required.
*/
-static int wl_request_fw(struct wl_info *wl, struct pci_dev *pdev)
+static int brcms_request_fw(struct brcms_info *wl, struct pci_dev *pdev)
{
int status;
struct device *device = &pdev->dev;
char fw_name[100];
int i;
- memset((void *)&wl->fw, 0, sizeof(struct wl_firmware));
- for (i = 0; i < WL_MAX_FW; i++) {
- if (wl_firmwares[i] == NULL)
+ memset((void *)&wl->fw, 0, sizeof(struct brcms_firmware));
+ for (i = 0; i < MAX_FW_IMAGES; i++) {
+ if (brcms_firmwares[i] == NULL)
break;
- sprintf(fw_name, "%s-%d.fw", wl_firmwares[i],
+ sprintf(fw_name, "%s-%d.fw", brcms_firmwares[i],
UCODE_LOADER_API_VER);
status = request_firmware(&wl->fw.fw_bin[i], fw_name, device);
if (status) {
@@ -1829,7 +1825,7 @@ static int wl_request_fw(struct wl_info *wl, struct pci_dev *pdev)
KBUILD_MODNAME, fw_name);
return status;
}
- sprintf(fw_name, "%s_hdr-%d.fw", wl_firmwares[i],
+ sprintf(fw_name, "%s_hdr-%d.fw", brcms_firmwares[i],
UCODE_LOADER_API_VER);
status = request_firmware(&wl->fw.fw_hdr[i], fw_name, device);
if (status) {
@@ -1838,28 +1834,28 @@ static int wl_request_fw(struct wl_info *wl, struct pci_dev *pdev)
return status;
}
wl->fw.hdr_num_entries[i] =
- wl->fw.fw_hdr[i]->size / (sizeof(struct wl_fw_hdr));
+ wl->fw.fw_hdr[i]->size / (sizeof(struct firmware_hdr));
}
wl->fw.fw_cnt = i;
- return wl_ucode_data_init(wl);
+ return brcms_ucode_data_init(wl);
}
/*
* precondition: can both be called locked and unlocked
*/
-void wl_ucode_free_buf(void *p)
+void brcms_ucode_free_buf(void *p)
{
kfree(p);
}
/*
- * Precondition: Since this function is called in wl_pci_probe() context,
+ * Precondition: Since this function is called in brcms_pci_probe() context,
* no locking is required.
*/
-static void wl_release_fw(struct wl_info *wl)
+static void brcms_release_fw(struct brcms_info *wl)
{
int i;
- for (i = 0; i < WL_MAX_FW; i++) {
+ for (i = 0; i < MAX_FW_IMAGES; i++) {
release_firmware(wl->fw.fw_bin[i]);
release_firmware(wl->fw.fw_hdr[i]);
}
@@ -1869,18 +1865,18 @@ static void wl_release_fw(struct wl_info *wl)
/*
* checks validity of all firmware images loaded from user space
*
- * Precondition: Since this function is called in wl_pci_probe() context,
+ * Precondition: Since this function is called in brcms_pci_probe() context,
* no locking is required.
*/
-int wl_check_firmwares(struct wl_info *wl)
+int brcms_check_firmwares(struct brcms_info *wl)
{
int i;
int entry;
int rc = 0;
const struct firmware *fw;
const struct firmware *fw_hdr;
- struct wl_fw_hdr *ucode_hdr;
- for (i = 0; i < WL_MAX_FW && rc == 0; i++) {
+ struct firmware_hdr *ucode_hdr;
+ for (i = 0; i < MAX_FW_IMAGES && rc == 0; i++) {
fw = wl->fw.fw_bin[i];
fw_hdr = wl->fw.fw_hdr[i];
if (fw == NULL && fw_hdr == NULL) {
@@ -1889,10 +1885,10 @@ int wl_check_firmwares(struct wl_info *wl)
wiphy_err(wl->wiphy, "%s: invalid bin/hdr fw\n",
__func__);
rc = -EBADF;
- } else if (fw_hdr->size % sizeof(struct wl_fw_hdr)) {
+ } else if (fw_hdr->size % sizeof(struct firmware_hdr)) {
wiphy_err(wl->wiphy, "%s: non integral fw hdr file "
"size %zu/%zu\n", __func__, fw_hdr->size,
- sizeof(struct wl_fw_hdr));
+ sizeof(struct firmware_hdr));
rc = -EBADF;
} else if (fw->size < MIN_FW_SIZE || fw->size > MAX_FW_SIZE) {
wiphy_err(wl->wiphy, "%s: out of bounds fw file size "
@@ -1900,7 +1896,7 @@ int wl_check_firmwares(struct wl_info *wl)
rc = -EBADF;
} else {
/* check if ucode section overruns firmware image */
- ucode_hdr = (struct wl_fw_hdr *)fw_hdr->data;
+ ucode_hdr = (struct firmware_hdr *)fw_hdr->data;
for (entry = 0; entry < wl->fw.hdr_num_entries[i] &&
!rc; entry++, ucode_hdr++) {
if (ucode_hdr->offset + ucode_hdr->len >
@@ -1924,24 +1920,24 @@ int wl_check_firmwares(struct wl_info *wl)
/*
* precondition: perimeter lock has been acquired
*/
-bool wl_rfkill_set_hw_state(struct wl_info *wl)
+bool brcms_rfkill_set_hw_state(struct brcms_info *wl)
{
bool blocked = wlc_check_radio_disabled(wl->wlc);
- WL_UNLOCK(wl);
+ UNLOCK(wl);
wiphy_rfkill_set_hw_state(wl->pub->ieee_hw->wiphy, blocked);
if (blocked)
wiphy_rfkill_start_polling(wl->pub->ieee_hw->wiphy);
- WL_LOCK(wl);
+ LOCK(wl);
return blocked;
}
/*
* precondition: perimeter lock has been acquired
*/
-void wl_msleep(struct wl_info *wl, uint ms)
+void brcms_msleep(struct brcms_info *wl, uint ms)
{
- WL_UNLOCK(wl);
+ UNLOCK(wl);
msleep(ms);
- WL_LOCK(wl);
+ LOCK(wl);
}
diff --git a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.h b/drivers/staging/brcm80211/brcmsmac/mac80211_if.h
index e703d8bb94d60..c56707a45ac7a 100644
--- a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.h
+++ b/drivers/staging/brcm80211/brcmsmac/mac80211_if.h
@@ -14,41 +14,45 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#ifndef _wl_mac80211_h_
-#define _wl_mac80211_h_
+#ifndef _BRCM_MAC80211_IF_H_
+#define _BRCM_MAC80211_IF_H_
+
+/* softmac ioctl definitions */
+#define WLC_SET_SHORTSLOT_OVERRIDE 146
+
/* BMAC Note: High-only driver is no longer working in softirq context as it needs to block and
* sleep so perimeter lock has to be a semaphore instead of spinlock. This requires timers to be
* submitted to workqueue instead of being on kernel timer
*/
-struct wl_timer {
+struct brcms_timer {
struct timer_list timer;
- struct wl_info *wl;
+ struct brcms_info *wl;
void (*fn) (void *);
void *arg; /* argument to fn */
uint ms;
bool periodic;
bool set;
- struct wl_timer *next;
+ struct brcms_timer *next;
#ifdef BCMDBG
char *name; /* Description of the timer */
#endif
};
-struct wl_if {
+struct brcms_if {
uint subunit; /* WDS/BSS unit */
struct pci_dev *pci_dev;
};
-#define WL_MAX_FW 4
-struct wl_firmware {
+#define MAX_FW_IMAGES 4
+struct brcms_firmware {
u32 fw_cnt;
- const struct firmware *fw_bin[WL_MAX_FW];
- const struct firmware *fw_hdr[WL_MAX_FW];
- u32 hdr_num_entries[WL_MAX_FW];
+ const struct firmware *fw_bin[MAX_FW_IMAGES];
+ const struct firmware *fw_hdr[MAX_FW_IMAGES];
+ u32 hdr_num_entries[MAX_FW_IMAGES];
};
-struct wl_info {
+struct brcms_info {
struct wlc_pub *pub; /* pointer to public wlc state */
void *wlc; /* pointer to private common os-independent data */
u32 magic;
@@ -57,29 +61,49 @@ struct wl_info {
spinlock_t lock; /* per-device perimeter lock */
spinlock_t isr_lock; /* per-device ISR synchronization lock */
+
+ /* bus type and regsva for unmap in brcms_free() */
uint bcm_bustype; /* bus type */
- bool piomode; /* set from insmod argument */
void *regsva; /* opaque chip registers virtual address */
+
+ /* timer related fields */
atomic_t callbacks; /* # outstanding callback functions */
- struct wl_timer *timers; /* timer cleanup queue */
+ struct brcms_timer *timers; /* timer cleanup queue */
+
struct tasklet_struct tasklet; /* dpc tasklet */
bool resched; /* dpc needs to be and is rescheduled */
#ifdef LINUXSTA_PS
u32 pci_psstate[16]; /* pci ps-state save/restore */
#endif
- struct wl_firmware fw;
+ struct brcms_firmware fw;
struct wiphy *wiphy;
};
-#define WL_LOCK(wl) spin_lock_bh(&(wl)->lock)
-#define WL_UNLOCK(wl) spin_unlock_bh(&(wl)->lock)
-
-/* locking from inside wl_isr */
-#define WL_ISRLOCK(wl, flags) do {spin_lock(&(wl)->isr_lock); (void)(flags); } while (0)
-#define WL_ISRUNLOCK(wl, flags) do {spin_unlock(&(wl)->isr_lock); (void)(flags); } while (0)
+/* misc callbacks */
+struct brcms_info;
+struct brcms_if;
+struct wlc_if;
+extern void brcms_init(struct brcms_info *wl);
+extern uint brcms_reset(struct brcms_info *wl);
+extern void brcms_intrson(struct brcms_info *wl);
+extern u32 brcms_intrsoff(struct brcms_info *wl);
+extern void brcms_intrsrestore(struct brcms_info *wl, u32 macintmask);
+extern int brcms_up(struct brcms_info *wl);
+extern void brcms_down(struct brcms_info *wl);
+extern void brcms_txflowcontrol(struct brcms_info *wl, struct brcms_if *wlif,
+ bool state, int prio);
+extern bool wl_alloc_dma_resources(struct brcms_info *wl, uint dmaddrwidth);
+extern bool brcms_rfkill_set_hw_state(struct brcms_info *wl);
-/* locking under WL_LOCK() to synchronize with wl_isr */
-#define INT_LOCK(wl, flags) spin_lock_irqsave(&(wl)->isr_lock, flags)
-#define INT_UNLOCK(wl, flags) spin_unlock_irqrestore(&(wl)->isr_lock, flags)
+/* timer functions */
+struct brcms_timer;
+extern struct brcms_timer *brcms_init_timer(struct brcms_info *wl,
+ void (*fn) (void *arg), void *arg,
+ const char *name);
+extern void brcms_free_timer(struct brcms_info *wl, struct brcms_timer *timer);
+extern void brcms_add_timer(struct brcms_info *wl, struct brcms_timer *timer,
+ uint ms, int periodic);
+extern bool brcms_del_timer(struct brcms_info *wl, struct brcms_timer *timer);
+extern void brcms_msleep(struct brcms_info *wl, uint ms);
-#endif /* _wl_mac80211_h_ */
+#endif /* _BRCM_MAC80211_IF_H_ */
diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.c b/drivers/staging/brcm80211/brcmsmac/main.c
index 4b4a31eff90c9..3613900cf2917 100644
--- a/drivers/staging/brcm80211/brcmsmac/wlc_main.c
+++ b/drivers/staging/brcm80211/brcmsmac/main.c
@@ -19,41 +19,30 @@
#include <linux/pci_ids.h>
#include <net/mac80211.h>
-#include <bcmdefs.h>
-#include <bcmdevs.h>
-#include <bcmutils.h>
-#include <bcmwifi.h>
-#include <bcmnvram.h>
+#include <defs.h>
+#include <brcm_hw_ids.h>
+#include <brcmu_utils.h>
+#include <brcmu_wifi.h>
#include <aiutils.h>
-#include <pcicfg.h>
-#include <bcmsrom.h>
-#include <wlioctl.h>
-#include <sbhnddma.h>
-#include <hnddma.h>
+#include "srom.h"
+#include "dma.h"
-#include "wlc_pmu.h"
+#include "pmu.h"
#include "d11.h"
-#include "wlc_types.h"
-#include "wlc_cfg.h"
-#include "wlc_rate.h"
-#include "wlc_scb.h"
-#include "wlc_pub.h"
-#include "wlc_key.h"
-#include "wlc_bsscfg.h"
-#include "phy/wlc_phy_hal.h"
-#include "wlc_channel.h"
-#include "wlc_main.h"
-#include "wlc_bmac.h"
-#include "wlc_phy_hal.h"
-#include "wlc_phy_shim.h"
-#include "wlc_antsel.h"
-#include "wlc_stf.h"
-#include "wlc_ampdu.h"
-#include "wl_export.h"
-#include "wlc_alloc.h"
-#include "wl_dbg.h"
-
-#include "wl_mac80211.h"
+#include "types.h"
+#include "rate.h"
+#include "scb.h"
+#include "pub.h"
+#include "phy/phy_hal.h"
+#include "channel.h"
+#include "main.h"
+#include "bmac.h"
+#include "phy_hal.h"
+#include "antsel.h"
+#include "stf.h"
+#include "ampdu.h"
+#include "alloc.h"
+#include "mac80211_if.h"
/*
* WPA(2) definitions
@@ -71,7 +60,6 @@
#define ALLPRIO -1
/*
- * buffer length needed for wlc_format_ssid
* 32 SSID chars, max of 4 chars for each SSID char "\xFF", plus NULL.
*/
#define SSID_FMT_BUF_LEN ((4 * IEEE80211_MAX_SSID_LEN) + 1)
@@ -94,6 +82,94 @@
#define TBTT_ALIGN_LEEWAY_US 100 /* min leeway before first TBTT in us */
+/* Software feature flag defines used by wlfeatureflag */
+#define WL_SWFL_NOHWRADIO 0x0004
+#define WL_SWFL_FLOWCONTROL 0x0008 /* Enable backpressure to OS stack */
+#define WL_SWFL_WLBSSSORT 0x0010 /* Per-port supports sorting of BSS */
+
+/* n-mode support capability */
+/* 2x2 includes both 1x1 & 2x2 devices
+ * reserved #define 2 for future when we want to separate 1x1 & 2x2 and
+ * control it independently
+ */
+#define WL_11N_2x2 1
+#define WL_11N_3x3 3
+#define WL_11N_4x4 4
+
+/* define 11n feature disable flags */
+#define WLFEATURE_DISABLE_11N 0x00000001
+#define WLFEATURE_DISABLE_11N_STBC_TX 0x00000002
+#define WLFEATURE_DISABLE_11N_STBC_RX 0x00000004
+#define WLFEATURE_DISABLE_11N_SGI_TX 0x00000008
+#define WLFEATURE_DISABLE_11N_SGI_RX 0x00000010
+#define WLFEATURE_DISABLE_11N_AMPDU_TX 0x00000020
+#define WLFEATURE_DISABLE_11N_AMPDU_RX 0x00000040
+#define WLFEATURE_DISABLE_11N_GF 0x00000080
+
+#define EDCF_ACI_MASK 0x60
+#define EDCF_ACI_SHIFT 5
+#define EDCF_ECWMIN_MASK 0x0f
+#define EDCF_ECWMAX_SHIFT 4
+#define EDCF_AIFSN_MASK 0x0f
+#define EDCF_AIFSN_MAX 15
+#define EDCF_ECWMAX_MASK 0xf0
+
+#define EDCF_AC_BE_TXOP_STA 0x0000
+#define EDCF_AC_BK_TXOP_STA 0x0000
+#define EDCF_AC_VO_ACI_STA 0x62
+#define EDCF_AC_VO_ECW_STA 0x32
+#define EDCF_AC_VI_ACI_STA 0x42
+#define EDCF_AC_VI_ECW_STA 0x43
+#define EDCF_AC_BK_ECW_STA 0xA4
+#define EDCF_AC_VI_TXOP_STA 0x005e
+#define EDCF_AC_VO_TXOP_STA 0x002f
+#define EDCF_AC_BE_ACI_STA 0x03
+#define EDCF_AC_BE_ECW_STA 0xA4
+#define EDCF_AC_BK_ACI_STA 0x27
+#define EDCF_AC_VO_TXOP_AP 0x002f
+
+#define EDCF_TXOP2USEC(txop) ((txop) << 5)
+#define EDCF_ECW2CW(exp) ((1 << (exp)) - 1)
+
+#define APHY_SYMBOL_TIME 4
+#define APHY_PREAMBLE_TIME 16
+#define APHY_SIGNAL_TIME 4
+#define APHY_SIFS_TIME 16
+#define APHY_SERVICE_NBITS 16
+#define APHY_TAIL_NBITS 6
+#define BPHY_SIFS_TIME 10
+#define BPHY_PLCP_SHORT_TIME 96
+
+#define PREN_PREAMBLE 24
+#define PREN_MM_EXT 12
+#define PREN_PREAMBLE_EXT 4
+
+#define DOT11_MAC_HDR_LEN 24
+#define DOT11_ACK_LEN 10
+#define DOT11_BA_LEN 4
+#define DOT11_OFDM_SIGNAL_EXTENSION 6
+#define DOT11_MIN_FRAG_LEN 256
+#define DOT11_RTS_LEN 16
+#define DOT11_CTS_LEN 10
+#define DOT11_BA_BITMAP_LEN 128
+#define DOT11_MIN_BEACON_PERIOD 1
+#define DOT11_MAX_BEACON_PERIOD 0xFFFF
+#define DOT11_MAXNUMFRAGS 16
+#define DOT11_MAX_FRAG_LEN 2346
+
+#define BPHY_PLCP_TIME 192
+#define RIFS_11N_TIME 2
+
+#define WME_VER 1
+#define WME_SUBTYPE_PARAM_IE 1
+#define WME_TYPE 2
+#define WME_OUI "\x00\x50\xf2"
+
+#define AC_BE 0
+#define AC_BK 1
+#define AC_VI 2
+#define AC_VO 3
+
/*
* driver maintains internal 'tick'(wlc->pub->now) which increments in 1s OS timer(soft
* watchdog) it is not a wall clock and won't increment when driver is in "down" state
@@ -101,10 +177,6 @@
* calibration and scb update
*/
-/* watchdog trigger mode: OSL timer or TBTT */
-#define WLC_WATCHDOG_TBTT(wlc) \
- (wlc->stas_associated > 0 && wlc->PM != PM_OFF && wlc->pub->align_wd_tbtt)
-
/* To inform the ucode of the last mcast frame posted so that it can clear moredata bit */
#define BCMCFID(wlc, fid) wlc_bmac_write_shm((wlc)->hw, M_BCMC_FID, (fid))
@@ -112,11 +184,11 @@
(!AP_ENAB(wlc->pub)) && (wlc->war16165))
/* debug/trace */
-uint wl_msg_level =
+uint brcm_msg_level =
#if defined(BCMDBG)
- WL_ERROR_VAL;
+ LOG_ERROR_VAL;
#else
- 0;
+ 0;
#endif /* BCMDBG */
/* Find basic rate for a given rate */
@@ -139,28 +211,6 @@ uint wl_msg_level =
static struct wlc_info *wlc_info_dbg = (struct wlc_info *) (NULL);
#endif
-/* IOVar table */
-
-/* Parameter IDs, for use only internally to wlc -- in the wlc_iovars
- * table and by the wlc_doiovar() function. No ordering is imposed:
- * the table is keyed by name, and the function uses a switch.
- */
-enum {
- IOV_MPC = 1,
- IOV_RTSTHRESH,
- IOV_QTXPOWER,
- IOV_BCN_LI_BCN, /* Beacon listen interval in # of beacons */
- IOV_LAST /* In case of a need to check max ID number */
-};
-
-const bcm_iovar_t wlc_iovars[] = {
- {"mpc", IOV_MPC, (0), IOVT_BOOL, 0},
- {"rtsthresh", IOV_RTSTHRESH, (IOVF_WHL), IOVT_UINT16, 0},
- {"qtxpower", IOV_QTXPOWER, (IOVF_WHL), IOVT_UINT32, 0},
- {"bcn_li_bcn", IOV_BCN_LI_BCN, (0), IOVT_UINT8, 0},
- {NULL, 0, 0, 0, 0}
-};
-
const u8 prio2fifo[NUMPRIO] = {
TX_AC_BE_FIFO, /* 0 BE AC_BE Best Effort */
TX_AC_BK_FIFO, /* 1 BK AC_BK Background */
@@ -186,6 +236,18 @@ const u8 prio2fifo[NUMPRIO] = {
#define _WLC_PREC_VO 12 /* Vo - Voice */
#define _WLC_PREC_NC 14 /* NC - Network Control */
+#define MAXMACLIST 64 /* max # source MAC matches */
+#define BCN_TEMPLATE_COUNT 2
+
+#define WLC_BSSCFG_HW_BCN 0x20 /* The BSS is generating beacons in HW */
+
+#define HWBCN_ENAB(cfg) (((cfg)->flags & WLC_BSSCFG_HW_BCN) != 0)
+#define HWPRB_ENAB(cfg) (((cfg)->flags & WLC_BSSCFG_HW_PRB) != 0)
+
+#define MBSS_BCN_ENAB(cfg) 0
+#define MBSS_PRB_ENAB(cfg) 0
+#define SOFTBCN_ENAB(pub) (0)
+
/* 802.1D Priority to precedence queue mapping */
const u8 wlc_prio2prec_map[] = {
_WLC_PREC_BE, /* 0 BE - Best-effort */
@@ -198,6 +260,22 @@ const u8 wlc_prio2prec_map[] = {
_WLC_PREC_NC, /* 7 NC - Network Control */
};
+/* Check if a particular BSS config is AP or STA */
+#define BSSCFG_AP(cfg) (0)
+#define BSSCFG_STA(cfg) (1)
+#define BSSCFG_IBSS(cfg) (!(cfg)->BSS)
+
+/* Iterator for "associated" STA bss configs:
+ (struct wlc_info *wlc, int idx, struct wlc_bsscfg *cfg) */
+#define FOREACH_AS_STA(wlc, idx, cfg) \
+ for (idx = 0; (int) idx < WLC_MAXBSSCFG; idx++) \
+ if ((cfg = (wlc)->bsscfg[idx]) && BSSCFG_STA(cfg) && cfg->associated)
+
+/* As above for all non-NULL BSS configs */
+#define FOREACH_BSS(wlc, idx, cfg) \
+ for (idx = 0; (int) idx < WLC_MAXBSSCFG; idx++) \
+ if ((cfg = (wlc)->bsscfg[idx]))
+
/* Sanity check for tx_prec_map and fifo synchup
* Either there are some packets pending for the fifo, else if fifo is empty then
* all the corresponding precmap bits should be set
@@ -256,8 +334,6 @@ static void wlc_watchdog(void *arg);
static void wlc_watchdog_by_timer(void *arg);
static u16 wlc_rate_shm_offset(struct wlc_info *wlc, u8 rate);
static int wlc_set_rateset(struct wlc_info *wlc, wlc_rateset_t *rs_arg);
-static int wlc_iovar_rangecheck(struct wlc_info *wlc, u32 val,
- const bcm_iovar_t *vi);
static u8 wlc_local_constraint_qdbm(struct wlc_info *wlc);
/* send and receive */
@@ -323,14 +399,12 @@ bool wlc_ps_allowed(struct wlc_info *wlc)
struct wlc_bsscfg *cfg;
/* disallow PS when one of the following global conditions meets */
- if (!wlc->pub->associated || !wlc->PMenabled || wlc->PM_override)
+ if (!wlc->pub->associated)
return false;
/* disallow PS when one of these meets when not scanning */
- if (!wlc->PMblocked) {
- if (AP_ACTIVE(wlc) || wlc->monitor)
- return false;
- }
+ if (AP_ACTIVE(wlc) || wlc->monitor)
+ return false;
FOREACH_AS_STA(wlc, idx, cfg) {
/* disallow PS when one of the following bsscfg specific conditions meets */
@@ -348,8 +422,6 @@ void wlc_reset(struct wlc_info *wlc)
{
BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
- wlc->check_for_unaligned_tbtt = false;
-
/* slurp up hw mac counters before core reset */
wlc_statsupd(wlc);
@@ -358,15 +430,13 @@ void wlc_reset(struct wlc_info *wlc)
sizeof(macstat_t));
wlc_bmac_reset(wlc->hw);
- wlc->txretried = 0;
-
}
void wlc_fatal_error(struct wlc_info *wlc)
{
wiphy_err(wlc->wiphy, "wl%d: fatal error, reinitializing\n",
wlc->pub->unit);
- wl_init(wlc->wl);
+ brcms_init(wlc->wl);
}
/* Return the channel the driver should initialize during wlc_init.
@@ -415,15 +485,8 @@ void wlc_init(struct wlc_info *wlc)
wlc_bmac_init(wlc->hw, chanspec, mute);
- wlc->seckeys = wlc_bmac_read_shm(wlc->hw, M_SECRXKEYS_PTR) * 2;
- if (wlc->machwcap & MCAP_TKIPMIC)
- wlc->tkmickeys =
- wlc_bmac_read_shm(wlc->hw, M_TKMICKEYS_PTR) * 2;
-
/* update beacon listen interval */
wlc_bcn_li_upd(wlc);
- wlc->bcn_wait_prd =
- (u8) (wlc_bmac_read_shm(wlc->hw, M_NOSLPZNATDTIM) >> 10);
/* the world is new again, so is our reported rate */
wlc_reprate_init(wlc);
@@ -457,8 +520,6 @@ void wlc_init(struct wlc_info *wlc)
}
}
- wlc_key_hw_init_all(wlc);
-
wlc_bandinit_ordered(wlc, chanspec);
wlc_init_scb(wlc, &global_scb);
@@ -550,7 +611,7 @@ void wlc_mac_promisc(struct wlc_info *wlc)
* Note: APs get all BSS traffic without the need to set the MCTL_PROMISC bit
* since all BSS data traffic is directed at the AP
*/
- if (PROMISC_ENAB(wlc->pub) && !AP_ENAB(wlc->pub) && !wlc->wet)
+ if (PROMISC_ENAB(wlc->pub) && !AP_ENAB(wlc->pub))
promisc_bits |= MCTL_PROMISC;
/* monitor mode needs both MCTL_PROMISC and MCTL_KEEPCONTROL
@@ -664,8 +725,8 @@ static u8 wlc_local_constraint_qdbm(struct wlc_info *wlc)
local = WLC_TXPWR_MAX;
if (wlc->pub->associated &&
- (bcm_chspec_ctlchan(wlc->chanspec) ==
- bcm_chspec_ctlchan(wlc->home_chanspec))) {
+ (brcmu_chspec_ctlchan(wlc->chanspec) ==
+ brcmu_chspec_ctlchan(wlc->home_chanspec))) {
/* get the local power constraint if we are on the AP's
* channel [802.11h, 7.3.2.13]
@@ -774,224 +835,6 @@ void wlc_set_chanspec(struct wlc_info *wlc, chanspec_t chanspec)
wlc_ucode_mac_upd(wlc);
}
-#if defined(BCMDBG)
-static int wlc_get_current_txpwr(struct wlc_info *wlc, void *pwr, uint len)
-{
- txpwr_limits_t txpwr;
- tx_power_t power;
- tx_power_legacy_t *old_power = NULL;
- int r, c;
- uint qdbm;
- bool override;
-
- if (len == sizeof(tx_power_legacy_t))
- old_power = (tx_power_legacy_t *) pwr;
- else if (len < sizeof(tx_power_t))
- return -EOVERFLOW;
-
- memset(&power, 0, sizeof(tx_power_t));
-
- power.chanspec = WLC_BAND_PI_RADIO_CHANSPEC;
- if (wlc->pub->associated)
- power.local_chanspec = wlc->home_chanspec;
-
- /* Return the user target tx power limits for the various rates. Note wlc_phy.c's
- * public interface only implements getting and setting a single value for all of
- * rates, so we need to fill the array ourselves.
- */
- wlc_phy_txpower_get(wlc->band->pi, &qdbm, &override);
- for (r = 0; r < WL_TX_POWER_RATES; r++) {
- power.user_limit[r] = (u8) qdbm;
- }
-
- power.local_max = wlc->txpwr_local_max * WLC_TXPWR_DB_FACTOR;
- power.local_constraint =
- wlc->txpwr_local_constraint * WLC_TXPWR_DB_FACTOR;
-
- power.antgain[0] = wlc->bandstate[BAND_2G_INDEX]->antgain;
- power.antgain[1] = wlc->bandstate[BAND_5G_INDEX]->antgain;
-
- wlc_channel_reg_limits(wlc->cmi, power.chanspec, &txpwr);
-
-#if WL_TX_POWER_CCK_NUM != WLC_NUM_RATES_CCK
-#error "WL_TX_POWER_CCK_NUM != WLC_NUM_RATES_CCK"
-#endif
-
- /* CCK tx power limits */
- for (c = 0, r = WL_TX_POWER_CCK_FIRST; c < WL_TX_POWER_CCK_NUM;
- c++, r++)
- power.reg_limit[r] = txpwr.cck[c];
-
-#if WL_TX_POWER_OFDM_NUM != WLC_NUM_RATES_OFDM
-#error "WL_TX_POWER_OFDM_NUM != WLC_NUM_RATES_OFDM"
-#endif
-
- /* 20 MHz OFDM SISO tx power limits */
- for (c = 0, r = WL_TX_POWER_OFDM_FIRST; c < WL_TX_POWER_OFDM_NUM;
- c++, r++)
- power.reg_limit[r] = txpwr.ofdm[c];
-
- if (WLC_PHY_11N_CAP(wlc->band)) {
-
- /* 20 MHz OFDM CDD tx power limits */
- for (c = 0, r = WL_TX_POWER_OFDM20_CDD_FIRST;
- c < WL_TX_POWER_OFDM_NUM; c++, r++)
- power.reg_limit[r] = txpwr.ofdm_cdd[c];
-
- /* 40 MHz OFDM SISO tx power limits */
- for (c = 0, r = WL_TX_POWER_OFDM40_SISO_FIRST;
- c < WL_TX_POWER_OFDM_NUM; c++, r++)
- power.reg_limit[r] = txpwr.ofdm_40_siso[c];
-
- /* 40 MHz OFDM CDD tx power limits */
- for (c = 0, r = WL_TX_POWER_OFDM40_CDD_FIRST;
- c < WL_TX_POWER_OFDM_NUM; c++, r++)
- power.reg_limit[r] = txpwr.ofdm_40_cdd[c];
-
-#if WL_TX_POWER_MCS_1_STREAM_NUM != WLC_NUM_RATES_MCS_1_STREAM
-#error "WL_TX_POWER_MCS_1_STREAM_NUM != WLC_NUM_RATES_MCS_1_STREAM"
-#endif
-
- /* 20MHz MCS0-7 SISO tx power limits */
- for (c = 0, r = WL_TX_POWER_MCS20_SISO_FIRST;
- c < WLC_NUM_RATES_MCS_1_STREAM; c++, r++)
- power.reg_limit[r] = txpwr.mcs_20_siso[c];
-
- /* 20MHz MCS0-7 CDD tx power limits */
- for (c = 0, r = WL_TX_POWER_MCS20_CDD_FIRST;
- c < WLC_NUM_RATES_MCS_1_STREAM; c++, r++)
- power.reg_limit[r] = txpwr.mcs_20_cdd[c];
-
- /* 20MHz MCS0-7 STBC tx power limits */
- for (c = 0, r = WL_TX_POWER_MCS20_STBC_FIRST;
- c < WLC_NUM_RATES_MCS_1_STREAM; c++, r++)
- power.reg_limit[r] = txpwr.mcs_20_stbc[c];
-
- /* 40MHz MCS0-7 SISO tx power limits */
- for (c = 0, r = WL_TX_POWER_MCS40_SISO_FIRST;
- c < WLC_NUM_RATES_MCS_1_STREAM; c++, r++)
- power.reg_limit[r] = txpwr.mcs_40_siso[c];
-
- /* 40MHz MCS0-7 CDD tx power limits */
- for (c = 0, r = WL_TX_POWER_MCS40_CDD_FIRST;
- c < WLC_NUM_RATES_MCS_1_STREAM; c++, r++)
- power.reg_limit[r] = txpwr.mcs_40_cdd[c];
-
- /* 40MHz MCS0-7 STBC tx power limits */
- for (c = 0, r = WL_TX_POWER_MCS40_STBC_FIRST;
- c < WLC_NUM_RATES_MCS_1_STREAM; c++, r++)
- power.reg_limit[r] = txpwr.mcs_40_stbc[c];
-
-#if WL_TX_POWER_MCS_2_STREAM_NUM != WLC_NUM_RATES_MCS_2_STREAM
-#error "WL_TX_POWER_MCS_2_STREAM_NUM != WLC_NUM_RATES_MCS_2_STREAM"
-#endif
-
- /* 20MHz MCS8-15 SDM tx power limits */
- for (c = 0, r = WL_TX_POWER_MCS20_SDM_FIRST;
- c < WLC_NUM_RATES_MCS_2_STREAM; c++, r++)
- power.reg_limit[r] = txpwr.mcs_20_mimo[c];
-
- /* 40MHz MCS8-15 SDM tx power limits */
- for (c = 0, r = WL_TX_POWER_MCS40_SDM_FIRST;
- c < WLC_NUM_RATES_MCS_2_STREAM; c++, r++)
- power.reg_limit[r] = txpwr.mcs_40_mimo[c];
-
- /* MCS 32 */
- power.reg_limit[WL_TX_POWER_MCS_32] = txpwr.mcs32;
- }
-
- wlc_phy_txpower_get_current(wlc->band->pi, &power,
- CHSPEC_CHANNEL(power.chanspec));
-
- /* copy the tx_power_t struct to the return buffer,
- * or convert to a tx_power_legacy_t struct
- */
- if (!old_power) {
- memcpy(pwr, &power, sizeof(tx_power_t));
- } else {
- int band_idx = CHSPEC_IS2G(power.chanspec) ? 0 : 1;
-
- memset(old_power, 0, sizeof(tx_power_legacy_t));
-
- old_power->txpwr_local_max = power.local_max;
- old_power->txpwr_local_constraint = power.local_constraint;
- if (CHSPEC_IS2G(power.chanspec)) {
- old_power->txpwr_chan_reg_max = txpwr.cck[0];
- old_power->txpwr_est_Pout[band_idx] =
- power.est_Pout_cck;
- old_power->txpwr_est_Pout_gofdm = power.est_Pout[0];
- } else {
- old_power->txpwr_chan_reg_max = txpwr.ofdm[0];
- old_power->txpwr_est_Pout[band_idx] = power.est_Pout[0];
- }
- old_power->txpwr_antgain[0] = power.antgain[0];
- old_power->txpwr_antgain[1] = power.antgain[1];
-
- for (r = 0; r < NUM_PWRCTRL_RATES; r++) {
- old_power->txpwr_band_max[r] = power.user_limit[r];
- old_power->txpwr_limit[r] = power.reg_limit[r];
- old_power->txpwr_target[band_idx][r] = power.target[r];
- if (CHSPEC_IS2G(power.chanspec))
- old_power->txpwr_bphy_cck_max[r] =
- power.board_limit[r];
- else
- old_power->txpwr_aphy_max[r] =
- power.board_limit[r];
- }
- }
-
- return 0;
-}
-#endif /* defined(BCMDBG) */
-
-static u32 wlc_watchdog_backup_bi(struct wlc_info *wlc)
-{
- u32 bi;
- bi = 2 * wlc->cfg->current_bss->dtim_period *
- wlc->cfg->current_bss->beacon_period;
- if (wlc->bcn_li_dtim)
- bi *= wlc->bcn_li_dtim;
- else if (wlc->bcn_li_bcn)
- /* recalculate bi based on bcn_li_bcn */
- bi = 2 * wlc->bcn_li_bcn * wlc->cfg->current_bss->beacon_period;
-
- if (bi < 2 * TIMER_INTERVAL_WATCHDOG)
- bi = 2 * TIMER_INTERVAL_WATCHDOG;
- return bi;
-}
-
-/* Change to run the watchdog either from a periodic timer or from tbtt handler.
- * Call watchdog from tbtt handler if tbtt is true, watchdog timer otherwise.
- */
-void wlc_watchdog_upd(struct wlc_info *wlc, bool tbtt)
-{
- /* make sure changing watchdog driver is allowed */
- if (!wlc->pub->up || !wlc->pub->align_wd_tbtt)
- return;
- if (!tbtt && wlc->WDarmed) {
- wl_del_timer(wlc->wl, wlc->wdtimer);
- wlc->WDarmed = false;
- }
-
- /* stop watchdog timer and use tbtt interrupt to drive watchdog */
- if (tbtt && wlc->WDarmed) {
- wl_del_timer(wlc->wl, wlc->wdtimer);
- wlc->WDarmed = false;
- wlc->WDlast = OSL_SYSUPTIME();
- }
- /* arm watchdog timer and drive the watchdog there */
- else if (!tbtt && !wlc->WDarmed) {
- wl_add_timer(wlc->wl, wlc->wdtimer, TIMER_INTERVAL_WATCHDOG,
- true);
- wlc->WDarmed = true;
- }
- if (tbtt && !wlc->WDarmed) {
- wl_add_timer(wlc->wl, wlc->wdtimer, wlc_watchdog_backup_bi(wlc),
- true);
- wlc->WDarmed = true;
- }
-}
-
ratespec_t wlc_lowest_basic_rspec(struct wlc_info *wlc, wlc_rateset_t *rs)
{
ratespec_t lowest_basic_rspec;
@@ -1218,7 +1061,6 @@ static void WLBANDINITFN(wlc_setband) (struct wlc_info *wlc, uint bandunit)
return;
/* wait for at least one beacon before entering sleeping state */
- wlc->PMawakebcn = true;
FOREACH_AS_STA(wlc, idx, cfg)
cfg->PMawakebcn = true;
wlc_set_ps_ctrl(wlc);
@@ -1266,8 +1108,6 @@ void wlc_wme_setparams(struct wlc_info *wlc, u16 aci,
return;
}
- wlc->wme_admctl = 0;
-
do {
memset((char *)&acp_shm, 0, sizeof(shm_acparams_t));
/* fill in shm ac params struct */
@@ -1339,10 +1179,6 @@ void wlc_edcf_setparams(struct wlc_info *wlc, bool suspend)
for (i_ac = 0; i_ac < AC_COUNT; i_ac++, edcf_acp++) {
/* find out which ac this set of params applies to */
aci = (edcf_acp->ACI & EDCF_ACI_MASK) >> EDCF_ACI_SHIFT;
- /* set the admission control policy for this AC */
- if (edcf_acp->ACI & EDCF_ACM_MASK) {
- wlc->wme_admctl |= 1 << aci;
- }
/* fill in shm ac params struct */
params->txop = edcf_acp->TXOP;
@@ -1371,7 +1207,7 @@ void wlc_edcf_setparams(struct wlc_info *wlc, bool suspend)
bool wlc_timers_init(struct wlc_info *wlc, int unit)
{
- wlc->wdtimer = wl_init_timer(wlc->wl, wlc_watchdog_by_timer,
+ wlc->wdtimer = brcms_init_timer(wlc->wl, wlc_watchdog_by_timer,
wlc, "watchdog");
if (!wlc->wdtimer) {
wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for wdtimer "
@@ -1379,7 +1215,7 @@ bool wlc_timers_init(struct wlc_info *wlc, int unit)
goto fail;
}
- wlc->radio_timer = wl_init_timer(wlc->wl, wlc_radio_timer,
+ wlc->radio_timer = brcms_init_timer(wlc->wl, wlc_radio_timer,
wlc, "radio");
if (!wlc->radio_timer) {
wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for radio_timer "
@@ -1403,25 +1239,13 @@ void wlc_info_init(struct wlc_info *wlc, int unit)
/* Assume the device is there until proven otherwise */
wlc->device_present = true;
- /* set default power output percentage to 100 percent */
- wlc->txpwr_percent = 100;
-
/* Save our copy of the chanspec */
wlc->chanspec = CH20MHZ_CHSPEC(1);
- /* initialize CCK preamble mode to unassociated state */
- wlc->shortpreamble = false;
-
- wlc->legacy_probe = true;
-
/* various 802.11g modes */
wlc->shortslot = false;
wlc->shortslot_override = WLC_SHORTSLOT_AUTO;
- wlc->barker_overlap_control = true;
- wlc->barker_preamble = WLC_BARKER_SHORT_ALLOWED;
- wlc->txburst_limit_override = AUTO;
-
wlc_protection_upd(wlc, WLC_PROT_G_OVR, WLC_PROTECTION_AUTO);
wlc_protection_upd(wlc, WLC_PROT_G_SPEC, false);
@@ -1454,30 +1278,6 @@ void wlc_info_init(struct wlc_info *wlc, int unit)
wlc->SRL = RETRY_SHORT_DEF;
wlc->LRL = RETRY_LONG_DEF;
- /* init PM state */
- wlc->PM = PM_OFF; /* User's setting of PM mode through IOCTL */
- wlc->PM_override = false; /* Prevents from going to PM if our AP is 'ill' */
- wlc->PMenabled = false; /* Current PM state */
- wlc->PMpending = false; /* Tracks whether STA indicated PM in the last attempt */
- wlc->PMblocked = false; /* To allow blocking going into PM during RM and scans */
-
- /* In WMM Auto mode, PM is allowed if association is a UAPSD association */
- wlc->WME_PM_blocked = false;
-
- /* Init wme queuing method */
- wlc->wme_prec_queuing = false;
-
- /* Overrides for the core to stay awake under zillion conditions Look for STAY_AWAKE */
- wlc->wake = false;
- /* Are we waiting for a response to PS-Poll that we sent */
- wlc->PSpoll = false;
-
- /* APSD defaults */
- wlc->wme_apsd = true;
- wlc->apsd_sta_usp = false;
- wlc->apsd_trigger_timeout = 0; /* disable the trigger timer */
- wlc->apsd_trigger_ac = AC_BITMAP_ALL;
-
/* Set flag to indicate that hw keys should be used when available. */
wlc->wsec_swkeys = false;
@@ -1487,8 +1287,6 @@ void wlc_info_init(struct wlc_info *wlc, int unit)
wlc->wsec_keys[i]->idx = (u8) i;
}
- wlc->_regulatory_domain = false; /* 802.11d */
-
/* WME QoS mode is Auto by default */
wlc->pub->_wme = AUTO;
@@ -1498,14 +1296,10 @@ void wlc_info_init(struct wlc_info *wlc, int unit)
wlc->pub->_ampdu = AMPDU_AGG_HOST;
wlc->pub->bcmerror = 0;
- wlc->ibss_allowed = true;
- wlc->ibss_coalesce_allowed = true;
wlc->pub->_coex = ON;
/* initialize mpc delay */
wlc->mpc_delay_off = wlc->mpc_dlycnt = WLC_MPC_MIN_DELAYCNT;
-
- wlc->pr80838_war = true;
}
static bool wlc_state_bmac_sync(struct wlc_info *wlc)
@@ -1564,7 +1358,7 @@ struct wlc_pub *wlc_pub(void *wlc)
/*
* The common driver entry routine. Error codes should be unique
*/
-void *wlc_attach(struct wl_info *wl, u16 vendor, u16 device, uint unit,
+void *wlc_attach(struct brcms_info *wl, u16 vendor, u16 device, uint unit,
bool piomode, void *regsva, uint bustype, void *btparam,
uint *perr)
{
@@ -1589,11 +1383,8 @@ void *wlc_attach(struct wl_info *wl, u16 vendor, u16 device, uint unit,
wlc->core = wlc->corestate;
wlc->wl = wl;
pub->unit = unit;
- wlc->btparam = btparam;
pub->_piomode = piomode;
wlc->bandinit_pending = false;
- /* By default restrict TKIP associations from 11n STA's */
- wlc->ht_wsec_restriction = WLC_HT_TKIP_RESTRICT;
/* populate struct wlc_info with default values */
wlc_info_init(wlc, unit);
@@ -1604,10 +1395,6 @@ void *wlc_attach(struct wl_info *wl, u16 vendor, u16 device, uint unit,
/* 11n_disable nvram */
n_disabled = getintvar(pub->vars, "11n_disable");
- /* register a module (to handle iovars) */
- wlc_module_register(wlc->pub, wlc_iovars, "wlc_iovars", wlc,
- wlc_doiovar, NULL, NULL);
-
/*
* low level attach steps(all hw accesses go
* inside, no more in rest of the attach)
@@ -1762,9 +1549,6 @@ void *wlc_attach(struct wl_info *wl, u16 vendor, u16 device, uint unit,
wlc->cck_40txbw = AUTO;
wlc_update_mimo_band_bwcap(wlc, WLC_N_BW_20IN2G_40IN5G);
- /* Enable setting the RIFS Mode bit by default in HT Info IE */
- wlc->rifs_advert = AUTO;
-
/* Set default values of SGI */
if (WLC_SGI_CAP_PHY(wlc)) {
wlc_ht_update_sgi_rx(wlc, (WLC_N_SGI_20 | WLC_N_SGI_40));
@@ -1904,11 +1688,11 @@ static void wlc_timers_deinit(struct wlc_info *wlc)
{
/* free timer state */
if (wlc->wdtimer) {
- wl_free_timer(wlc->wl, wlc->wdtimer);
+ brcms_free_timer(wlc->wl, wlc->wdtimer);
wlc->wdtimer = NULL;
}
if (wlc->radio_timer) {
- wl_free_timer(wlc->wl, wlc->radio_timer);
+ brcms_free_timer(wlc->wl, wlc->radio_timer);
wlc->radio_timer = NULL;
}
}
@@ -1957,28 +1741,6 @@ uint wlc_detach(struct wlc_info *wlc)
wlc_detach_module(wlc);
- /* free other state */
-
-
-#ifdef BCMDBG
- kfree(wlc->country_ie_override);
- wlc->country_ie_override = NULL;
-#endif /* BCMDBG */
-
- {
- /* free dumpcb list */
- struct dumpcb_s *prev, *ptr;
- prev = ptr = wlc->dumpcb_head;
- while (ptr) {
- ptr = prev->next;
- kfree(prev);
- prev = ptr;
- }
- wlc->dumpcb_head = NULL;
- }
-
- /* Detach from iovar manager */
- wlc_module_unregister(wlc->pub, "wlc_iovars", wlc);
while (wlc->tx_queues != NULL)
wlc_txq_free(wlc, wlc->tx_queues);
@@ -1995,9 +1757,6 @@ void wlc_ap_upd(struct wlc_info *wlc)
else
wlc->PLCPHdr_override = WLC_PLCP_SHORT; /* STA-BSS; short capable */
- /* disable vlan_mode on AP since some legacy STAs cannot rx tagged pkts */
- wlc->vlan_mode = AP_ENAB(wlc->pub) ? OFF : AUTO;
-
/* fixup mpc */
wlc->mpc = true;
}
@@ -2119,7 +1878,7 @@ void wlc_radio_disable(struct wlc_info *wlc)
}
wlc_radio_monitor_start(wlc);
- wl_down(wlc->wl);
+ brcms_down(wlc->wl);
}
static void wlc_radio_enable(struct wlc_info *wlc)
@@ -2130,9 +1889,7 @@ static void wlc_radio_enable(struct wlc_info *wlc)
if (DEVICEREMOVED(wlc))
return;
- if (!wlc->down_override) { /* imposed by wl down/out ioctl */
- wl_up(wlc->wl);
- }
+ brcms_up(wlc->wl);
}
/* periodical query hw radio button while driver is "down" */
@@ -2143,7 +1900,7 @@ static void wlc_radio_timer(void *arg)
if (DEVICEREMOVED(wlc)) {
wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
__func__);
- wl_down(wlc->wl);
+ brcms_down(wlc->wl);
return;
}
@@ -2163,7 +1920,8 @@ static bool wlc_radio_monitor_start(struct wlc_info *wlc)
wlc->radio_monitor = true;
wlc_pllreq(wlc, true, WLC_PLLREQ_RADIO_MON);
- wl_add_timer(wlc->wl, wlc->radio_timer, TIMER_INTERVAL_RADIOCHK, true);
+ brcms_add_timer(wlc->wl, wlc->radio_timer, TIMER_INTERVAL_RADIOCHK,
+ true);
return true;
}
@@ -2174,19 +1932,12 @@ bool wlc_radio_monitor_stop(struct wlc_info *wlc)
wlc->radio_monitor = false;
wlc_pllreq(wlc, false, WLC_PLLREQ_RADIO_MON);
- return wl_del_timer(wlc->wl, wlc->radio_timer);
+ return brcms_del_timer(wlc->wl, wlc->radio_timer);
}
static void wlc_watchdog_by_timer(void *arg)
{
- struct wlc_info *wlc = (struct wlc_info *) arg;
wlc_watchdog(arg);
- if (WLC_WATCHDOG_TBTT(wlc)) {
- /* set to normal osl watchdog period */
- wl_del_timer(wlc->wl, wlc->wdtimer);
- wl_add_timer(wlc->wl, wlc->wdtimer, TIMER_INTERVAL_WATCHDOG,
- true);
- }
}
/* common watchdog code */
@@ -2204,7 +1955,7 @@ static void wlc_watchdog(void *arg)
if (DEVICEREMOVED(wlc)) {
wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
__func__);
- wl_down(wlc->wl);
+ brcms_down(wlc->wl);
return;
}
@@ -2339,7 +2090,7 @@ int wlc_up(struct wlc_info *wlc)
wlc_mhf(wlc, MHF2, MHF2_PCISLOWCLKWAR, MHF2_PCISLOWCLKWAR,
WLC_BAND_ALL);
- wl_init(wlc->wl);
+ brcms_init(wlc->wl);
wlc->pub->up = true;
if (wlc->bandinit_pending) {
@@ -2359,7 +2110,7 @@ int wlc_up(struct wlc_info *wlc)
wlc_wme_retries_write(wlc);
/* start one second watchdog timer */
- wl_add_timer(wlc->wl, wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, true);
+ brcms_add_timer(wlc->wl, wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, true);
wlc->WDarmed = true;
/* ensure antenna config is up to date */
@@ -2437,7 +2188,7 @@ uint wlc_down(struct wlc_info *wlc)
/* cancel the watchdog timer */
if (wlc->WDarmed) {
- if (!wl_del_timer(wlc->wl, wlc->wdtimer))
+ if (!brcms_del_timer(wlc->wl, wlc->wdtimer))
callbacks++;
wlc->WDarmed = false;
}
@@ -2453,7 +2204,7 @@ uint wlc_down(struct wlc_info *wlc)
/* flush tx queues */
for (qi = wlc->tx_queues; qi != NULL; qi = qi->next) {
- bcm_pktq_flush(&qi->q, true, NULL, NULL);
+ brcmu_pktq_flush(&qi->q, true, NULL, NULL);
}
callbacks += wlc_bmac_down_finish(wlc->hw);
@@ -2475,7 +2226,6 @@ int wlc_set_gmode(struct wlc_info *wlc, u8 gmode, bool config)
s8 shortslot = WLC_SHORTSLOT_AUTO; /* Advertise and use shortslot (-1/0/1 Auto/Off/On) */
bool shortslot_restrict = false; /* Restrict association to stations that support shortslot
*/
- bool ignore_bcns = true; /* Ignore legacy beacons on the same channel */
bool ofdm_basic = false; /* Make 6, 12, and 24 basic rates */
int preamble = WLC_PLCP_LONG; /* Advertise and use short preambles (-1/0/1 Auto/Off/On) */
bool preamble_restrict = false; /* Restrict association to stations that support short
@@ -2571,8 +2321,6 @@ int wlc_set_gmode(struct wlc_info *wlc, u8 gmode, bool config)
band->gmode = gmode;
- wlc->ignore_bcns = ignore_bcns;
-
wlc->shortslot_override = shortslot;
if (AP_ENAB(wlc->pub)) {
@@ -2781,11 +2529,9 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len,
bool bool_val;
int bcmerror;
d11regs_t *regs;
- uint i;
struct scb *nextscb;
bool ta_ok;
uint band;
- rw_reg_t *r;
struct wlc_bsscfg *bsscfg;
wlc_bss_info_t *current_bss;
@@ -2797,13 +2543,12 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len,
nextscb = NULL;
ta_ok = false;
band = 0;
- r = NULL;
/* If the device is turned off, then it's not "removed" */
if (!wlc->pub->hw_off && DEVICEREMOVED(wlc)) {
wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
__func__);
- wl_down(wlc->wl);
+ brcms_down(wlc->wl);
return -EBADE;
}
@@ -2821,61 +2566,15 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len,
bcmerror = 0;
regs = wlc->regs;
- /* A few commands don't need any arguments; all the others do. */
- switch (cmd) {
- case WLC_UP:
- case WLC_OUT:
- case WLC_DOWN:
- case WLC_DISASSOC:
- case WLC_RESTART:
- case WLC_REBOOT:
- case WLC_START_CHANNEL_QA:
- case WLC_INIT:
- break;
-
- default:
- if ((arg == NULL) || (len <= 0)) {
- wiphy_err(wlc->wiphy, "wl%d: %s: Command %d needs "
- "arguments\n",
- wlc->pub->unit, __func__, cmd);
- bcmerror = -EINVAL;
- goto done;
- }
+ if ((arg == NULL) || (len <= 0)) {
+ wiphy_err(wlc->wiphy, "wl%d: %s: Command %d needs arguments\n",
+ wlc->pub->unit, __func__, cmd);
+ bcmerror = -EINVAL;
+ goto done;
}
switch (cmd) {
-#if defined(BCMDBG)
- case WLC_GET_MSGLEVEL:
- *pval = wl_msg_level;
- break;
-
- case WLC_SET_MSGLEVEL:
- wl_msg_level = val;
- break;
-#endif
-
- case WLC_GET_INSTANCE:
- *pval = wlc->pub->unit;
- break;
-
- case WLC_GET_CHANNEL:{
- channel_info_t *ci = (channel_info_t *) arg;
-
- if (len <= (int)sizeof(ci)) {
- bcmerror = EOVERFLOW;
- goto done;
- }
-
- ci->hw_channel =
- CHSPEC_CHANNEL(WLC_BAND_PI_RADIO_CHANSPEC);
- ci->target_channel =
- CHSPEC_CHANNEL(wlc->default_bss->chanspec);
- ci->scan_channel = 0;
-
- break;
- }
-
case WLC_SET_CHANNEL:{
chanspec_t chspec = CH20MHZ_CHSPEC(val);
@@ -2909,273 +2608,6 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len,
break;
}
-#if defined(BCMDBG)
- case WLC_GET_UCFLAGS:
- if (!wlc->pub->up) {
- bcmerror = -ENOLINK;
- break;
- }
-
- /* optional band is stored in the second integer of incoming buffer */
- band =
- (len <
- (int)(2 * sizeof(int))) ? WLC_BAND_AUTO : ((int *)arg)[1];
-
- /* bcmerror checking */
- bcmerror = wlc_iocregchk(wlc, band);
- if (bcmerror)
- break;
-
- if (val >= MHFMAX) {
- bcmerror = -EINVAL;
- break;
- }
-
- *pval = wlc_bmac_mhf_get(wlc->hw, (u8) val, WLC_BAND_AUTO);
- break;
-
- case WLC_SET_UCFLAGS:
- if (!wlc->pub->up) {
- bcmerror = -ENOLINK;
- break;
- }
-
- /* optional band is stored in the second integer of incoming buffer */
- band =
- (len <
- (int)(2 * sizeof(int))) ? WLC_BAND_AUTO : ((int *)arg)[1];
-
- /* bcmerror checking */
- bcmerror = wlc_iocregchk(wlc, band);
- if (bcmerror)
- break;
-
- i = (u16) val;
- if (i >= MHFMAX) {
- bcmerror = -EINVAL;
- break;
- }
-
- wlc_mhf(wlc, (u8) i, 0xffff, (u16) (val >> NBITS(u16)),
- WLC_BAND_AUTO);
- break;
-
- case WLC_GET_SHMEM:
- ta_ok = true;
-
- /* optional band is stored in the second integer of incoming buffer */
- band =
- (len <
- (int)(2 * sizeof(int))) ? WLC_BAND_AUTO : ((int *)arg)[1];
-
- /* bcmerror checking */
- bcmerror = wlc_iocregchk(wlc, band);
- if (bcmerror)
- break;
-
- if (val & 1) {
- bcmerror = -EINVAL;
- break;
- }
-
- *pval = wlc_read_shm(wlc, (u16) val);
- break;
-
- case WLC_SET_SHMEM:
- ta_ok = true;
-
- /* optional band is stored in the second integer of incoming buffer */
- band =
- (len <
- (int)(2 * sizeof(int))) ? WLC_BAND_AUTO : ((int *)arg)[1];
-
- /* bcmerror checking */
- bcmerror = wlc_iocregchk(wlc, band);
- if (bcmerror)
- break;
-
- if (val & 1) {
- bcmerror = -EINVAL;
- break;
- }
-
- wlc_write_shm(wlc, (u16) val,
- (u16) (val >> NBITS(u16)));
- break;
-
- case WLC_R_REG: /* MAC registers */
- ta_ok = true;
- r = (rw_reg_t *) arg;
- band = WLC_BAND_AUTO;
-
- if (len < (int)(sizeof(rw_reg_t) - sizeof(uint))) {
- bcmerror = -EOVERFLOW;
- break;
- }
-
- if (len >= (int)sizeof(rw_reg_t))
- band = r->band;
-
- /* bcmerror checking */
- bcmerror = wlc_iocregchk(wlc, band);
- if (bcmerror)
- break;
-
- if ((r->byteoff + r->size) > sizeof(d11regs_t)) {
- bcmerror = -EINVAL;
- break;
- }
- if (r->size == sizeof(u32))
- r->val =
- R_REG((u32 *)((unsigned char *)(unsigned long)regs +
- r->byteoff));
- else if (r->size == sizeof(u16))
- r->val =
- R_REG((u16 *)((unsigned char *)(unsigned long)regs +
- r->byteoff));
- else
- bcmerror = -EINVAL;
- break;
-
- case WLC_W_REG:
- ta_ok = true;
- r = (rw_reg_t *) arg;
- band = WLC_BAND_AUTO;
-
- if (len < (int)(sizeof(rw_reg_t) - sizeof(uint))) {
- bcmerror = -EOVERFLOW;
- break;
- }
-
- if (len >= (int)sizeof(rw_reg_t))
- band = r->band;
-
- /* bcmerror checking */
- bcmerror = wlc_iocregchk(wlc, band);
- if (bcmerror)
- break;
-
- if (r->byteoff + r->size > sizeof(d11regs_t)) {
- bcmerror = -EINVAL;
- break;
- }
- if (r->size == sizeof(u32))
- W_REG((u32 *)((unsigned char *)(unsigned long) regs +
- r->byteoff), r->val);
- else if (r->size == sizeof(u16))
- W_REG((u16 *)((unsigned char *)(unsigned long) regs +
- r->byteoff), r->val);
- else
- bcmerror = -EINVAL;
- break;
-#endif /* BCMDBG */
-
- case WLC_GET_TXANT:
- *pval = wlc->stf->txant;
- break;
-
- case WLC_SET_TXANT:
- bcmerror = wlc_stf_ant_txant_validate(wlc, (s8) val);
- if (bcmerror < 0)
- break;
-
- wlc->stf->txant = (s8) val;
-
- /* if down, we are done */
- if (!wlc->pub->up)
- break;
-
- wlc_suspend_mac_and_wait(wlc);
-
- wlc_stf_phy_txant_upd(wlc);
- wlc_beacon_phytxctl_txant_upd(wlc, wlc->bcn_rspec);
-
- wlc_enable_mac(wlc);
-
- break;
-
- case WLC_GET_ANTDIV:{
- u8 phy_antdiv;
-
- /* return configured value if core is down */
- if (!wlc->pub->up) {
- *pval = wlc->stf->ant_rx_ovr;
-
- } else {
- if (wlc_phy_ant_rxdiv_get
- (wlc->band->pi, &phy_antdiv))
- *pval = (int)phy_antdiv;
- else
- *pval = (int)wlc->stf->ant_rx_ovr;
- }
-
- break;
- }
- case WLC_SET_ANTDIV:
- /* values are -1=driver default, 0=force0, 1=force1, 2=start1, 3=start0 */
- if ((val < -1) || (val > 3)) {
- bcmerror = -EINVAL;
- break;
- }
-
- if (val == -1)
- val = ANT_RX_DIV_DEF;
-
- wlc->stf->ant_rx_ovr = (u8) val;
- wlc_phy_ant_rxdiv_set(wlc->band->pi, (u8) val);
- break;
-
- case WLC_GET_RX_ANT:{ /* get latest used rx antenna */
- u16 rxstatus;
-
- if (!wlc->pub->up) {
- bcmerror = -ENOLINK;
- break;
- }
-
- rxstatus = R_REG(&wlc->regs->phyrxstatus0);
- if (rxstatus == 0xdead || rxstatus == (u16) -1) {
- bcmerror = -EBADE;
- break;
- }
- *pval = (rxstatus & PRXS0_RXANT_UPSUBBAND) ? 1 : 0;
- break;
- }
-
-#if defined(BCMDBG)
- case WLC_GET_UCANTDIV:
- if (!wlc->clk) {
- bcmerror = -EIO;
- break;
- }
-
- *pval =
- (wlc_bmac_mhf_get(wlc->hw, MHF1, WLC_BAND_AUTO) &
- MHF1_ANTDIV);
- break;
-
- case WLC_SET_UCANTDIV:{
- if (!wlc->pub->up) {
- bcmerror = -ENOLINK;
- break;
- }
-
- /* if multiband, band must be locked */
- if (IS_MBAND_UNLOCKED(wlc)) {
- bcmerror = -ENOMEDIUM;
- break;
- }
-
- wlc_mhf(wlc, MHF1, MHF1_ANTDIV,
- (val ? MHF1_ANTDIV : 0), WLC_BAND_AUTO);
- break;
- }
-#endif /* defined(BCMDBG) */
-
- case WLC_GET_SRL:
- *pval = wlc->SRL;
- break;
-
case WLC_SET_SRL:
if (val >= 1 && val <= RETRY_SHORT_MAX) {
int ac;
@@ -3191,10 +2623,6 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len,
bcmerror = -EINVAL;
break;
- case WLC_GET_LRL:
- *pval = wlc->LRL;
- break;
-
case WLC_SET_LRL:
if (val >= 1 && val <= 255) {
int ac;
@@ -3210,159 +2638,6 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len,
bcmerror = -EINVAL;
break;
- case WLC_GET_CWMIN:
- *pval = wlc->band->CWmin;
- break;
-
- case WLC_SET_CWMIN:
- if (!wlc->clk) {
- bcmerror = -EIO;
- break;
- }
-
- if (val >= 1 && val <= 255) {
- wlc_set_cwmin(wlc, (u16) val);
- } else
- bcmerror = -EINVAL;
- break;
-
- case WLC_GET_CWMAX:
- *pval = wlc->band->CWmax;
- break;
-
- case WLC_SET_CWMAX:
- if (!wlc->clk) {
- bcmerror = -EIO;
- break;
- }
-
- if (val >= 255 && val <= 2047) {
- wlc_set_cwmax(wlc, (u16) val);
- } else
- bcmerror = -EINVAL;
- break;
-
- case WLC_GET_RADIO: /* use mask if don't want to expose some internal bits */
- *pval = wlc->pub->radio_disabled;
- break;
-
- case WLC_SET_RADIO:{ /* 32 bits input, higher 16 bits are mask, lower 16 bits are value to
- * set
- */
- u16 radiomask, radioval;
- uint validbits =
- WL_RADIO_SW_DISABLE | WL_RADIO_HW_DISABLE;
- mbool new = 0;
-
- radiomask = (val & 0xffff0000) >> 16;
- radioval = val & 0x0000ffff;
-
- if ((radiomask == 0) || (radiomask & ~validbits)
- || (radioval & ~validbits)
- || ((radioval & ~radiomask) != 0)) {
- wiphy_err(wlc->wiphy, "SET_RADIO with wrong "
- "bits 0x%x\n", val);
- bcmerror = -EINVAL;
- break;
- }
-
- new =
- (wlc->pub->radio_disabled & ~radiomask) | radioval;
- wlc->pub->radio_disabled = new;
-
- wlc_radio_hwdisable_upd(wlc);
- wlc_radio_upd(wlc);
- break;
- }
-
- case WLC_GET_PHYTYPE:
- *pval = WLC_PHYTYPE(wlc->band->phytype);
- break;
-
-#if defined(BCMDBG)
- case WLC_GET_KEY:
- if ((val >= 0) && (val < WLC_MAX_WSEC_KEYS(wlc))) {
- wl_wsec_key_t key;
-
- wsec_key_t *src_key = wlc->wsec_keys[val];
-
- if (len < (int)sizeof(key)) {
- bcmerror = -EOVERFLOW;
- break;
- }
-
- memset((char *)&key, 0, sizeof(key));
- if (src_key) {
- key.index = src_key->id;
- key.len = src_key->len;
- memcpy(key.data, src_key->data, key.len);
- key.algo = src_key->algo;
- if (WSEC_SOFTKEY(wlc, src_key, bsscfg))
- key.flags |= WL_SOFT_KEY;
- if (src_key->flags & WSEC_PRIMARY_KEY)
- key.flags |= WL_PRIMARY_KEY;
-
- memcpy(key.ea, src_key->ea, ETH_ALEN);
- }
-
- memcpy(arg, &key, sizeof(key));
- } else
- bcmerror = -EINVAL;
- break;
-#endif /* defined(BCMDBG) */
-
- case WLC_SET_KEY:
- bcmerror =
- wlc_iovar_op(wlc, "wsec_key", NULL, 0, arg, len, IOV_SET,
- wlcif);
- break;
-
- case WLC_GET_KEY_SEQ:{
- wsec_key_t *key;
-
- if (len < DOT11_WPA_KEY_RSC_LEN) {
- bcmerror = -EOVERFLOW;
- break;
- }
-
- /* Return the key's tx iv as an EAPOL sequence counter.
- * This will be used to supply the RSC value to a supplicant.
- * The format is 8 bytes, with least significant in seq[0].
- */
-
- key = WSEC_KEY(wlc, val);
- if ((val >= 0) && (val < WLC_MAX_WSEC_KEYS(wlc)) &&
- (key != NULL)) {
- u8 seq[DOT11_WPA_KEY_RSC_LEN];
- u16 lo;
- u32 hi;
- /* group keys in WPA-NONE (IBSS only, AES and TKIP) use a global TXIV */
- if ((bsscfg->WPA_auth & WPA_AUTH_NONE) &&
- is_zero_ether_addr(key->ea)) {
- lo = bsscfg->wpa_none_txiv.lo;
- hi = bsscfg->wpa_none_txiv.hi;
- } else {
- lo = key->txiv.lo;
- hi = key->txiv.hi;
- }
-
- /* format the buffer, low to high */
- seq[0] = lo & 0xff;
- seq[1] = (lo >> 8) & 0xff;
- seq[2] = hi & 0xff;
- seq[3] = (hi >> 8) & 0xff;
- seq[4] = (hi >> 16) & 0xff;
- seq[5] = (hi >> 24) & 0xff;
- seq[6] = 0;
- seq[7] = 0;
-
- memcpy(arg, seq, sizeof(seq));
- } else {
- bcmerror = -EINVAL;
- }
- break;
- }
-
case WLC_GET_CURR_RATESET:{
wl_rateset_t *ret_rs = (wl_rateset_t *) arg;
wlc_rateset_t *rs;
@@ -3383,24 +2658,6 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len,
break;
}
- case WLC_GET_RATESET:{
- wlc_rateset_t rs;
- wl_rateset_t *ret_rs = (wl_rateset_t *) arg;
-
- memset(&rs, 0, sizeof(wlc_rateset_t));
- wlc_default_rateset(wlc, (wlc_rateset_t *) &rs);
-
- if (len < (int)(rs.count + sizeof(rs.count))) {
- bcmerror = -EOVERFLOW;
- break;
- }
-
- /* Copy only legacy rateset section */
- ret_rs->count = rs.count;
- memcpy(&ret_rs->rates, &rs.rates, rs.count);
- break;
- }
-
case WLC_SET_RATESET:{
wlc_rateset_t rs;
wl_rateset_t *in_rs = (wl_rateset_t *) arg;
@@ -3441,13 +2698,6 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len,
break;
}
- case WLC_GET_BCNPRD:
- if (BSSCFG_STA(bsscfg) && bsscfg->BSS && bsscfg->associated)
- *pval = current_bss->beacon_period;
- else
- *pval = wlc->default_bss->beacon_period;
- break;
-
case WLC_SET_BCNPRD:
/* range [1, 0xffff] */
if (val >= DOT11_MIN_BEACON_PERIOD
@@ -3457,124 +2707,6 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len,
bcmerror = -EINVAL;
break;
- case WLC_GET_DTIMPRD:
- if (BSSCFG_STA(bsscfg) && bsscfg->BSS && bsscfg->associated)
- *pval = current_bss->dtim_period;
- else
- *pval = wlc->default_bss->dtim_period;
- break;
-
- case WLC_SET_DTIMPRD:
- /* range [1, 0xff] */
- if (val >= DOT11_MIN_DTIM_PERIOD
- && val <= DOT11_MAX_DTIM_PERIOD) {
- wlc->default_bss->dtim_period = (u8) val;
- } else
- bcmerror = -EINVAL;
- break;
-
-#ifdef SUPPORT_PS
- case WLC_GET_PM:
- *pval = wlc->PM;
- break;
-
- case WLC_SET_PM:
- if ((val >= PM_OFF) && (val <= PM_MAX)) {
- wlc->PM = (u8) val;
- if (wlc->pub->up) {
- }
- /* Change watchdog driver to align watchdog with tbtt if possible */
- wlc_watchdog_upd(wlc, PS_ALLOWED(wlc));
- } else
- bcmerror = -EBADE;
- break;
-#endif /* SUPPORT_PS */
-
-#ifdef SUPPORT_PS
-#ifdef BCMDBG
- case WLC_GET_WAKE:
- if (AP_ENAB(wlc->pub)) {
- bcmerror = -BCME_NOTSTA;
- break;
- }
- *pval = wlc->wake;
- break;
-
- case WLC_SET_WAKE:
- if (AP_ENAB(wlc->pub)) {
- bcmerror = -BCME_NOTSTA;
- break;
- }
-
- wlc->wake = val ? true : false;
-
- /* if down, we're done */
- if (!wlc->pub->up)
- break;
-
- /* apply to the mac */
- wlc_set_ps_ctrl(wlc);
- break;
-#endif /* BCMDBG */
-#endif /* SUPPORT_PS */
-
- case WLC_GET_REVINFO:
- bcmerror = wlc_get_revision_info(wlc, arg, (uint) len);
- break;
-
- case WLC_GET_AP:
- *pval = (int)AP_ENAB(wlc->pub);
- break;
-
- case WLC_GET_ATIM:
- if (bsscfg->associated)
- *pval = (int)current_bss->atim_window;
- else
- *pval = (int)wlc->default_bss->atim_window;
- break;
-
- case WLC_SET_ATIM:
- wlc->default_bss->atim_window = (u32) val;
- break;
-
-#ifdef SUPPORT_HWKEY
- case WLC_GET_WSEC:
- bcmerror =
- wlc_iovar_op(wlc, "wsec", NULL, 0, arg, len, IOV_GET,
- wlcif);
- break;
-
- case WLC_SET_WSEC:
- bcmerror =
- wlc_iovar_op(wlc, "wsec", NULL, 0, arg, len, IOV_SET,
- wlcif);
- break;
-
- case WLC_GET_WPA_AUTH:
- *pval = (int)bsscfg->WPA_auth;
- break;
-
- case WLC_SET_WPA_AUTH:
- /* change of WPA_Auth modifies the PS_ALLOWED state */
- if (BSSCFG_STA(bsscfg)) {
- bsscfg->WPA_auth = (u16) val;
- } else
- bsscfg->WPA_auth = (u16) val;
- break;
-#endif /* SUPPORT_HWKEY */
-
- case WLC_GET_BANDLIST:
- /* count of number of bands, followed by each band type */
- *pval++ = NBANDS(wlc);
- *pval++ = wlc->band->bandtype;
- if (NBANDS(wlc) > 1)
- *pval++ = wlc->bandstate[OTHERBANDUNIT(wlc)]->bandtype;
- break;
-
- case WLC_GET_BAND:
- *pval = wlc->bandlocked ? wlc->band->bandtype : WLC_BAND_AUTO;
- break;
-
case WLC_GET_PHYLIST:
{
unsigned char *cp = arg;
@@ -3594,14 +2726,6 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len,
break;
}
- case WLC_GET_SHORTSLOT:
- *pval = wlc->shortslot;
- break;
-
- case WLC_GET_SHORTSLOT_OVERRIDE:
- *pval = wlc->shortslot_override;
- break;
-
case WLC_SET_SHORTSLOT_OVERRIDE:
if ((val != WLC_SHORTSLOT_AUTO) &&
(val != WLC_SHORTSLOT_OFF) && (val != WLC_SHORTSLOT_ON)) {
@@ -3635,256 +2759,6 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len,
break;
- case WLC_GET_LEGACY_ERP:
- *pval = wlc->include_legacy_erp;
- break;
-
- case WLC_SET_LEGACY_ERP:
- if (wlc->include_legacy_erp == bool_val)
- break;
-
- wlc->include_legacy_erp = bool_val;
-
- if (AP_ENAB(wlc->pub) && wlc->clk) {
- wlc_update_beacon(wlc);
- wlc_update_probe_resp(wlc, true);
- }
- break;
-
- case WLC_GET_GMODE:
- if (wlc->band->bandtype == WLC_BAND_2G)
- *pval = wlc->band->gmode;
- else if (NBANDS(wlc) > 1)
- *pval = wlc->bandstate[OTHERBANDUNIT(wlc)]->gmode;
- break;
-
- case WLC_SET_GMODE:
- if (!wlc->pub->associated)
- bcmerror = wlc_set_gmode(wlc, (u8) val, true);
- else {
- bcmerror = -EISCONN;
- break;
- }
- break;
-
- case WLC_GET_GMODE_PROTECTION:
- *pval = wlc->protection->_g;
- break;
-
- case WLC_GET_PROTECTION_CONTROL:
- *pval = wlc->protection->overlap;
- break;
-
- case WLC_SET_PROTECTION_CONTROL:
- if ((val != WLC_PROTECTION_CTL_OFF) &&
- (val != WLC_PROTECTION_CTL_LOCAL) &&
- (val != WLC_PROTECTION_CTL_OVERLAP)) {
- bcmerror = -EINVAL;
- break;
- }
-
- wlc_protection_upd(wlc, WLC_PROT_OVERLAP, (s8) val);
-
- /* Current g_protection will sync up to the specified control alg in watchdog
- * if the driver is up and associated.
- * If the driver is down or not associated, the control setting has no effect.
- */
- break;
-
- case WLC_GET_GMODE_PROTECTION_OVERRIDE:
- *pval = wlc->protection->g_override;
- break;
-
- case WLC_SET_GMODE_PROTECTION_OVERRIDE:
- if ((val != WLC_PROTECTION_AUTO) &&
- (val != WLC_PROTECTION_OFF) && (val != WLC_PROTECTION_ON)) {
- bcmerror = -EINVAL;
- break;
- }
-
- wlc_protection_upd(wlc, WLC_PROT_G_OVR, (s8) val);
-
- break;
-
- case WLC_SET_SUP_RATESET_OVERRIDE:{
- wlc_rateset_t rs, new;
-
- /* copyin */
- if (len < (int)sizeof(wlc_rateset_t)) {
- bcmerror = -EOVERFLOW;
- break;
- }
- memcpy(&rs, arg, sizeof(wlc_rateset_t));
-
- /* check for bad count value */
- if (rs.count > WLC_NUMRATES) {
- bcmerror = -EINVAL;
- break;
- }
-
- /* this command is only appropriate for gmode operation */
- if (!(wlc->band->gmode ||
- ((NBANDS(wlc) > 1)
- && wlc->bandstate[OTHERBANDUNIT(wlc)]->gmode))) {
- /* gmode only command when not in gmode */
- bcmerror = -EINVAL;
- break;
- }
-
- /* check for an empty rateset to clear the override */
- if (rs.count == 0) {
- memset(&wlc->sup_rates_override, 0,
- sizeof(wlc_rateset_t));
- break;
- }
-
- /*
- * validate rateset by comparing pre and
- * post sorted against 11g hw rates
- */
- wlc_rateset_filter(&rs, &new, false,
- WLC_RATES_CCK_OFDM, WLC_RATE_MASK,
- BSS_N_ENAB(wlc, bsscfg));
- wlc_rate_hwrs_filter_sort_validate(&new,
- &cck_ofdm_rates,
- false,
- wlc->stf->txstreams);
- if (rs.count != new.count) {
- bcmerror = -EINVAL;
- break;
- }
-
- /* apply new rateset to the override */
- memcpy(&wlc->sup_rates_override, &new,
- sizeof(wlc_rateset_t));
-
- /* update bcn and probe resp if needed */
- if (wlc->pub->up && AP_ENAB(wlc->pub)
- && wlc->pub->associated) {
- wlc_update_beacon(wlc);
- wlc_update_probe_resp(wlc, true);
- }
- break;
- }
-
- case WLC_GET_SUP_RATESET_OVERRIDE:
- /* this command is only appropriate for gmode operation */
- if (!(wlc->band->gmode ||
- ((NBANDS(wlc) > 1)
- && wlc->bandstate[OTHERBANDUNIT(wlc)]->gmode))) {
- /* gmode only command when not in gmode */
- bcmerror = -EINVAL;
- break;
- }
- if (len < (int)sizeof(wlc_rateset_t)) {
- bcmerror = -EOVERFLOW;
- break;
- }
- memcpy(arg, &wlc->sup_rates_override, sizeof(wlc_rateset_t));
-
- break;
-
- case WLC_GET_PRB_RESP_TIMEOUT:
- *pval = wlc->prb_resp_timeout;
- break;
-
- case WLC_SET_PRB_RESP_TIMEOUT:
- if (wlc->pub->up) {
- bcmerror = -EISCONN;
- break;
- }
- if (val < 0 || val >= 0xFFFF) {
- bcmerror = -EINVAL; /* bad value */
- break;
- }
- wlc->prb_resp_timeout = (u16) val;
- break;
-
- case WLC_GET_KEY_PRIMARY:{
- wsec_key_t *key;
-
- /* treat the 'val' parm as the key id */
- key = WSEC_BSS_DEFAULT_KEY(bsscfg);
- if (key != NULL) {
- *pval = key->id == val ? true : false;
- } else {
- bcmerror = -EINVAL;
- }
- break;
- }
-
- case WLC_SET_KEY_PRIMARY:{
- wsec_key_t *key, *old_key;
-
- bcmerror = -EINVAL;
-
- /* treat the 'val' parm as the key id */
- for (i = 0; i < WSEC_MAX_DEFAULT_KEYS; i++) {
- key = bsscfg->bss_def_keys[i];
- if (key != NULL && key->id == val) {
- old_key = WSEC_BSS_DEFAULT_KEY(bsscfg);
- if (old_key != NULL)
- old_key->flags &=
- ~WSEC_PRIMARY_KEY;
- key->flags |= WSEC_PRIMARY_KEY;
- bsscfg->wsec_index = i;
- bcmerror = 0;
- }
- }
- break;
- }
-
-#ifdef BCMDBG
- case WLC_INIT:
- wl_init(wlc->wl);
- break;
-#endif
-
- case WLC_SET_VAR:
- case WLC_GET_VAR:{
- char *name;
- /* validate the name value */
- name = (char *)arg;
- for (i = 0; i < (uint) len && *name != '\0';
- i++, name++)
- ;
-
- if (i == (uint) len) {
- bcmerror = -EOVERFLOW;
- break;
- }
- i++; /* include the null in the string length */
-
- if (cmd == WLC_GET_VAR) {
- bcmerror =
- wlc_iovar_op(wlc, arg,
- (void *)((s8 *) arg + i),
- len - i, arg, len, IOV_GET,
- wlcif);
- } else
- bcmerror =
- wlc_iovar_op(wlc, arg, NULL, 0,
- (void *)((s8 *) arg + i),
- len - i, IOV_SET, wlcif);
-
- break;
- }
-
- case WLC_SET_WSEC_PMK:
- bcmerror = -ENOTSUPP;
- break;
-
-#if defined(BCMDBG)
- case WLC_CURRENT_PWR:
- if (!wlc->pub->up)
- bcmerror = -ENOLINK;
- else
- bcmerror = wlc_get_current_txpwr(wlc, arg, len);
- break;
-#endif
-
- case WLC_LAST:
- wiphy_err(wlc->wiphy, "%s: WLC_LAST\n", __func__);
}
done:
@@ -3894,70 +2768,11 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len,
return bcmerror;
}
-#if defined(BCMDBG)
-/* consolidated register access ioctl error checking */
-int wlc_iocregchk(struct wlc_info *wlc, uint band)
-{
- /* if band is specified, it must be the current band */
- if ((band != WLC_BAND_AUTO) && (band != (uint) wlc->band->bandtype))
- return -EINVAL;
-
- /* if multiband and band is not specified, band must be locked */
- if ((band == WLC_BAND_AUTO) && IS_MBAND_UNLOCKED(wlc))
- return -ENOMEDIUM;
-
- /* must have core clocks */
- if (!wlc->clk)
- return -EIO;
-
- return 0;
-}
-#endif /* defined(BCMDBG) */
-
-/* Look up the given var name in the given table */
-static const bcm_iovar_t *wlc_iovar_lookup(const bcm_iovar_t *table,
- const char *name)
-{
- const bcm_iovar_t *vi;
- const char *lookup_name;
-
- /* skip any ':' delimited option prefixes */
- lookup_name = strrchr(name, ':');
- if (lookup_name != NULL)
- lookup_name++;
- else
- lookup_name = name;
-
- for (vi = table; vi->name; vi++) {
- if (!strcmp(vi->name, lookup_name))
- return vi;
- }
- /* ran to end of table */
-
- return NULL; /* var name not found */
-}
-
-/* simplified integer get interface for common WLC_GET_VAR ioctl handler */
-int wlc_iovar_getint(struct wlc_info *wlc, const char *name, int *arg)
-{
- return wlc_iovar_op(wlc, name, NULL, 0, arg, sizeof(s32), IOV_GET,
- NULL);
-}
-
-/* simplified integer set interface for common WLC_SET_VAR ioctl handler */
-int wlc_iovar_setint(struct wlc_info *wlc, const char *name, int arg)
-{
- return wlc_iovar_op(wlc, name, NULL, 0, (void *)&arg, sizeof(arg),
- IOV_SET, NULL);
-}
-
/*
- * register iovar table, watchdog and down handlers.
- * calling function must keep 'iovars' until wlc_module_unregister is called.
- * 'iovar' must have the last entry's name field being NULL as terminator.
+ * register watchdog and down handlers.
*/
-int wlc_module_register(struct wlc_pub *pub, const bcm_iovar_t *iovars,
- const char *name, void *hdl, iovar_fn_t i_fn,
+int wlc_module_register(struct wlc_pub *pub,
+ const char *name, void *hdl,
watchdog_fn_t w_fn, down_fn_t d_fn)
{
struct wlc_info *wlc = (struct wlc_info *) pub->wlc;
@@ -3968,9 +2783,7 @@ int wlc_module_register(struct wlc_pub *pub, const bcm_iovar_t *iovars,
if (wlc->modulecb[i].name[0] == '\0') {
strncpy(wlc->modulecb[i].name, name,
sizeof(wlc->modulecb[i].name) - 1);
- wlc->modulecb[i].iovars = iovars;
wlc->modulecb[i].hdl = hdl;
- wlc->modulecb[i].iovar_fn = i_fn;
wlc->modulecb[i].watchdog_fn = w_fn;
wlc->modulecb[i].down_fn = d_fn;
return 0;
@@ -4015,295 +2828,6 @@ static void wlc_wme_retries_write(struct wlc_info *wlc)
}
}
-/* Get or set an iovar. The params/p_len pair specifies any additional
- * qualifying parameters (e.g. an "element index") for a get, while the
- * arg/len pair is the buffer for the value to be set or retrieved.
- * Operation (get/set) is specified by the last argument.
- * interface context provided by wlcif
- *
- * All pointers may point into the same buffer.
- */
-int
-wlc_iovar_op(struct wlc_info *wlc, const char *name,
- void *params, int p_len, void *arg, int len,
- bool set, struct wlc_if *wlcif)
-{
- int err = 0;
- int val_size;
- const bcm_iovar_t *vi = NULL;
- u32 actionid;
- int i;
-
- if (!set && (len == sizeof(int)) &&
- !(IS_ALIGNED((unsigned long)(arg), (uint) sizeof(int)))) {
- wiphy_err(wlc->wiphy, "wl%d: %s unaligned get ptr for %s\n",
- wlc->pub->unit, __func__, name);
- return -ENOTSUPP;
- }
-
- /* find the given iovar name */
- for (i = 0; i < WLC_MAXMODULES; i++) {
- if (!wlc->modulecb[i].iovars)
- continue;
- vi = wlc_iovar_lookup(wlc->modulecb[i].iovars, name);
- if (vi)
- break;
- }
- /* iovar name not found */
- if (i >= WLC_MAXMODULES) {
- return -ENOTSUPP;
- }
-
- /* set up 'params' pointer in case this is a set command so that
- * the convenience int and bool code can be common to set and get
- */
- if (params == NULL) {
- params = arg;
- p_len = len;
- }
-
- if (vi->type == IOVT_VOID)
- val_size = 0;
- else if (vi->type == IOVT_BUFFER)
- val_size = len;
- else
- /* all other types are integer sized */
- val_size = sizeof(int);
-
- actionid = set ? IOV_SVAL(vi->varid) : IOV_GVAL(vi->varid);
-
- /* Do the actual parameter implementation */
- err = wlc->modulecb[i].iovar_fn(wlc->modulecb[i].hdl, vi, actionid,
- name, params, p_len, arg, len, val_size,
- wlcif);
- return err;
-}
-
-int
-wlc_iovar_check(struct wlc_pub *pub, const bcm_iovar_t *vi, void *arg, int len,
- bool set)
-{
- struct wlc_info *wlc = (struct wlc_info *) pub->wlc;
- int err = 0;
- s32 int_val = 0;
-
- /* check generic condition flags */
- if (set) {
- if (((vi->flags & IOVF_SET_DOWN) && wlc->pub->up) ||
- ((vi->flags & IOVF_SET_UP) && !wlc->pub->up)) {
- err = (wlc->pub->up ? -EISCONN : -ENOLINK);
- } else if ((vi->flags & IOVF_SET_BAND)
- && IS_MBAND_UNLOCKED(wlc)) {
- err = -ENOMEDIUM;
- } else if ((vi->flags & IOVF_SET_CLK) && !wlc->clk) {
- err = -EIO;
- }
- } else {
- if (((vi->flags & IOVF_GET_DOWN) && wlc->pub->up) ||
- ((vi->flags & IOVF_GET_UP) && !wlc->pub->up)) {
- err = (wlc->pub->up ? -EISCONN : -ENOLINK);
- } else if ((vi->flags & IOVF_GET_BAND)
- && IS_MBAND_UNLOCKED(wlc)) {
- err = -ENOMEDIUM;
- } else if ((vi->flags & IOVF_GET_CLK) && !wlc->clk) {
- err = -EIO;
- }
- }
-
- if (err)
- goto exit;
-
- /* length check on io buf */
- err = bcm_iovar_lencheck(vi, arg, len, set);
- if (err)
- goto exit;
-
- /* On set, check value ranges for integer types */
- if (set) {
- switch (vi->type) {
- case IOVT_BOOL:
- case IOVT_INT8:
- case IOVT_INT16:
- case IOVT_INT32:
- case IOVT_UINT8:
- case IOVT_UINT16:
- case IOVT_UINT32:
- memcpy(&int_val, arg, sizeof(int));
- err = wlc_iovar_rangecheck(wlc, int_val, vi);
- break;
- }
- }
- exit:
- return err;
-}
-
-/* handler for iovar table wlc_iovars */
-/*
- * IMPLEMENTATION NOTE: In order to avoid checking for get/set in each
- * iovar case, the switch statement maps the iovar id into separate get
- * and set values. If you add a new iovar to the switch you MUST use
- * IOV_GVAL and/or IOV_SVAL in the case labels to avoid conflict with
- * another case.
- * Please use params for additional qualifying parameters.
- */
-int
-wlc_doiovar(void *hdl, const bcm_iovar_t *vi, u32 actionid,
- const char *name, void *params, uint p_len, void *arg, int len,
- int val_size, struct wlc_if *wlcif)
-{
- struct wlc_info *wlc = hdl;
- struct wlc_bsscfg *bsscfg;
- int err = 0;
- s32 int_val = 0;
- s32 int_val2 = 0;
- s32 *ret_int_ptr;
- bool bool_val;
- bool bool_val2;
- wlc_bss_info_t *current_bss;
-
- BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
-
- bsscfg = NULL;
- current_bss = NULL;
-
- err = wlc_iovar_check(wlc->pub, vi, arg, len, IOV_ISSET(actionid));
- if (err != 0)
- return err;
-
- /* convenience int and bool vals for first 8 bytes of buffer */
- if (p_len >= (int)sizeof(int_val))
- memcpy(&int_val, params, sizeof(int_val));
-
- if (p_len >= (int)sizeof(int_val) * 2)
- memcpy(&int_val2,
- (void *)((unsigned long)params + sizeof(int_val)),
- sizeof(int_val));
-
- /* convenience int ptr for 4-byte gets (requires int aligned arg) */
- ret_int_ptr = (s32 *) arg;
-
- bool_val = (int_val != 0) ? true : false;
- bool_val2 = (int_val2 != 0) ? true : false;
-
- BCMMSG(wlc->wiphy, "wl%d: id %d\n", wlc->pub->unit, IOV_ID(actionid));
- /* Do the actual parameter implementation */
- switch (actionid) {
- case IOV_SVAL(IOV_RTSTHRESH):
- wlc->RTSThresh = int_val;
- break;
-
- case IOV_GVAL(IOV_QTXPOWER):{
- uint qdbm;
- bool override;
-
- err = wlc_phy_txpower_get(wlc->band->pi, &qdbm,
- &override);
- if (err != 0)
- return err;
-
- /* Return qdbm units */
- *ret_int_ptr =
- qdbm | (override ? WL_TXPWR_OVERRIDE : 0);
- break;
- }
-
- /* As long as override is false, this only sets the *user* targets.
- User can twiddle this all he wants with no harm.
- wlc_phy_txpower_set() explicitly sets override to false if
- not internal or test.
- */
- case IOV_SVAL(IOV_QTXPOWER):{
- u8 qdbm;
- bool override;
-
- /* Remove override bit and clip to max qdbm value */
- qdbm = (u8)min_t(u32, (int_val & ~WL_TXPWR_OVERRIDE), 0xff);
- /* Extract override setting */
- override = (int_val & WL_TXPWR_OVERRIDE) ? true : false;
- err =
- wlc_phy_txpower_set(wlc->band->pi, qdbm, override);
- break;
- }
-
- case IOV_GVAL(IOV_MPC):
- *ret_int_ptr = (s32) wlc->mpc;
- break;
-
- case IOV_SVAL(IOV_MPC):
- wlc->mpc = bool_val;
- wlc_radio_mpc_upd(wlc);
-
- break;
-
- case IOV_GVAL(IOV_BCN_LI_BCN):
- *ret_int_ptr = wlc->bcn_li_bcn;
- break;
-
- case IOV_SVAL(IOV_BCN_LI_BCN):
- wlc->bcn_li_bcn = (u8) int_val;
- if (wlc->pub->up)
- wlc_bcn_li_upd(wlc);
- break;
-
- default:
- wiphy_err(wlc->wiphy, "wl%d: %s: unsupported\n",
- wlc->pub->unit, __func__);
- err = -ENOTSUPP;
- break;
- }
-
- goto exit; /* avoid unused label warning */
-
- exit:
- return err;
-}
-
-static int
-wlc_iovar_rangecheck(struct wlc_info *wlc, u32 val, const bcm_iovar_t *vi)
-{
- int err = 0;
- u32 min_val = 0;
- u32 max_val = 0;
-
- /* Only ranged integers are checked */
- switch (vi->type) {
- case IOVT_INT32:
- max_val |= 0x7fffffff;
- /* fall through */
- case IOVT_INT16:
- max_val |= 0x00007fff;
- /* fall through */
- case IOVT_INT8:
- max_val |= 0x0000007f;
- min_val = ~max_val;
- if (vi->flags & IOVF_NTRL)
- min_val = 1;
- else if (vi->flags & IOVF_WHL)
- min_val = 0;
- /* Signed values are checked against max_val and min_val */
- if ((s32) val < (s32) min_val
- || (s32) val > (s32) max_val)
- err = -EINVAL;
- break;
-
- case IOVT_UINT32:
- max_val |= 0xffffffff;
- /* fall through */
- case IOVT_UINT16:
- max_val |= 0x0000ffff;
- /* fall through */
- case IOVT_UINT8:
- max_val |= 0x000000ff;
- if (vi->flags & IOVF_NTRL)
- min_val = 1;
- if ((val < min_val) || (val > max_val))
- err = -EINVAL;
- break;
- }
-
- return err;
-}
-
#ifdef BCMDBG
static const char *supr_reason[] = {
"None", "PMQ Entry", "Flush request",
@@ -4416,9 +2940,10 @@ bool wlc_chipmatch(u16 vendor, u16 device)
return false;
}
+ if (device == BCM43224_D11N_ID_VEN1)
+ return true;
if ((device == BCM43224_D11N_ID) || (device == BCM43225_D11N2G_ID))
return true;
-
if (device == BCM4313_D11N2G_ID)
return true;
if ((device == BCM43236_D11N_ID) || (device == BCM43236_D11N2G_ID))
@@ -4481,16 +3006,16 @@ void wlc_print_txdesc(d11txh_t *txh)
printk(KERN_DEBUG "XtraFrameTypes: %04x ", xtraft);
printk(KERN_DEBUG "\n");
- bcm_format_hex(hexbuf, iv, sizeof(txh->IV));
+ brcmu_format_hex(hexbuf, iv, sizeof(txh->IV));
printk(KERN_DEBUG "SecIV: %s\n", hexbuf);
- bcm_format_hex(hexbuf, ra, sizeof(txh->TxFrameRA));
+ brcmu_format_hex(hexbuf, ra, sizeof(txh->TxFrameRA));
printk(KERN_DEBUG "RA: %s\n", hexbuf);
printk(KERN_DEBUG "Fb FES Time: %04x ", tfestfb);
- bcm_format_hex(hexbuf, rtspfb, sizeof(txh->RTSPLCPFallback));
+ brcmu_format_hex(hexbuf, rtspfb, sizeof(txh->RTSPLCPFallback));
printk(KERN_DEBUG "RTS PLCP: %s ", hexbuf);
printk(KERN_DEBUG "RTS DUR: %04x ", rtsdfb);
- bcm_format_hex(hexbuf, fragpfb, sizeof(txh->FragPLCPFallback));
+ brcmu_format_hex(hexbuf, fragpfb, sizeof(txh->FragPLCPFallback));
printk(KERN_DEBUG "PLCP: %s ", hexbuf);
printk(KERN_DEBUG "DUR: %04x", fragdfb);
printk(KERN_DEBUG "\n");
@@ -4506,9 +3031,9 @@ void wlc_print_txdesc(d11txh_t *txh)
printk(KERN_DEBUG "MaxAggbyte_fb: %04x\n", mabyte_f);
printk(KERN_DEBUG "MinByte: %04x\n", mmbyte);
- bcm_format_hex(hexbuf, rtsph, sizeof(txh->RTSPhyHeader));
+ brcmu_format_hex(hexbuf, rtsph, sizeof(txh->RTSPhyHeader));
printk(KERN_DEBUG "RTS PLCP: %s ", hexbuf);
- bcm_format_hex(hexbuf, (u8 *) &rts, sizeof(txh->rts_frame));
+ brcmu_format_hex(hexbuf, (u8 *) &rts, sizeof(txh->rts_frame));
printk(KERN_DEBUG "RTS Frame: %s", hexbuf);
printk(KERN_DEBUG "\n");
}
@@ -4526,7 +3051,7 @@ void wlc_print_rxh(d11rxhdr_t *rxh)
u16 macstatus2 = rxh->RxStatus2;
char flagstr[64];
char lenbuf[20];
- static const bcm_bit_desc_t macstat_flags[] = {
+ static const struct brcmu_bit_desc macstat_flags[] = {
{RXS_FCSERR, "FCSErr"},
{RXS_RESPFRAMETX, "Reply"},
{RXS_PBPRES, "PADDING"},
@@ -4539,7 +3064,7 @@ void wlc_print_rxh(d11rxhdr_t *rxh)
printk(KERN_DEBUG "Raw RxDesc:\n");
print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, rxh, sizeof(d11rxhdr_t));
- bcm_format_flags(macstat_flags, macstatus1, flagstr, 64);
+ brcmu_format_flags(macstat_flags, macstatus1, flagstr, 64);
snprintf(lenbuf, sizeof(lenbuf), "0x%x", len);
@@ -4554,32 +3079,6 @@ void wlc_print_rxh(d11rxhdr_t *rxh)
}
#endif /* defined(BCMDBG) */
-#if defined(BCMDBG)
-int wlc_format_ssid(char *buf, const unsigned char ssid[], uint ssid_len)
-{
- uint i, c;
- char *p = buf;
- char *endp = buf + SSID_FMT_BUF_LEN;
-
- if (ssid_len > IEEE80211_MAX_SSID_LEN)
- ssid_len = IEEE80211_MAX_SSID_LEN;
-
- for (i = 0; i < ssid_len; i++) {
- c = (uint) ssid[i];
- if (c == '\\') {
- *p++ = '\\';
- *p++ = '\\';
- } else if (isprint((unsigned char) c)) {
- *p++ = (char)c;
- } else {
- p += snprintf(p, (endp - p), "\\x%02X", c);
- }
- }
- *p = '\0';
- return (int)(p - buf);
-}
-#endif /* defined(BCMDBG) */
-
static u16 wlc_rate_shm_offset(struct wlc_info *wlc, u8 rate)
{
return wlc_bmac_rate_shm_offset(wlc->hw, rate);
@@ -4613,7 +3112,7 @@ wlc_prec_enq_head(struct wlc_info *wlc, struct pktq *q, struct sk_buff *pkt,
if (pktq_pfull(q, prec))
eprec = prec;
else if (pktq_full(q)) {
- p = bcm_pktq_peek_tail(q, &eprec);
+ p = brcmu_pktq_peek_tail(q, &eprec);
if (eprec > prec) {
wiphy_err(wlc->wiphy, "%s: Failing: eprec %d > prec %d"
"\n", __func__, eprec, prec);
@@ -4635,16 +3134,16 @@ wlc_prec_enq_head(struct wlc_info *wlc, struct pktq *q, struct sk_buff *pkt,
}
/* Evict packet according to discard policy */
- p = discard_oldest ? bcm_pktq_pdeq(q, eprec) :
- bcm_pktq_pdeq_tail(q, eprec);
- bcm_pkt_buf_free_skb(p);
+ p = discard_oldest ? brcmu_pktq_pdeq(q, eprec) :
+ brcmu_pktq_pdeq_tail(q, eprec);
+ brcmu_pkt_buf_free_skb(p);
}
/* Enqueue */
if (head)
- p = bcm_pktq_penq_head(q, prec, pkt);
+ p = brcmu_pktq_penq_head(q, prec, pkt);
else
- p = bcm_pktq_penq(q, prec, pkt);
+ p = brcmu_pktq_penq(q, prec, pkt);
return true;
}
@@ -4669,7 +3168,7 @@ void wlc_txq_enq(void *ctx, struct scb *scb, struct sk_buff *sdu,
* XXX we might hit this condtion in case
* packet flooding from mac80211 stack
*/
- bcm_pkt_buf_free_skb(sdu);
+ brcmu_pkt_buf_free_skb(sdu);
}
/* Check if flow control needs to be turned on after enqueuing the packet
@@ -4733,7 +3232,7 @@ void wlc_send_q(struct wlc_info *wlc)
/* Send all the enq'd pkts that we can.
* Dequeue packets with precedence with empty HW fifo only
*/
- while (prec_map && (pkt[0] = bcm_pktq_mdeq(q, prec_map, &prec))) {
+ while (prec_map && (pkt[0] = brcmu_pktq_mdeq(q, prec_map, &prec))) {
tx_info = IEEE80211_SKB_CB(pkt[0]);
if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
err = wlc_sendampdu(wlc->ampdu, qi, pkt, prec);
@@ -4748,7 +3247,7 @@ void wlc_send_q(struct wlc_info *wlc)
}
if (err == -EBUSY) {
- bcm_pktq_penq_head(q, prec, pkt[0]);
+ brcmu_pktq_penq_head(q, prec, pkt[0]);
/* If send failed due to any other reason than a change in
* HW FIFO condition, quit. Otherwise, read the new prec_map!
*/
@@ -5171,7 +3670,7 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw,
qos = ieee80211_is_data_qos(h->frame_control);
/* compute length of frame in bytes for use in PLCP computations */
- len = bcm_pkttotlen(p);
+ len = brcmu_pkttotlen(p);
phylen = len + FCS_LEN;
/* If WEP enabled, add room in phylen for the additional bytes of
@@ -5763,29 +4262,6 @@ void wlc_tbtt(struct wlc_info *wlc, d11regs_t *regs)
{
struct wlc_bsscfg *cfg = wlc->cfg;
- if (BSSCFG_STA(cfg)) {
- /* run watchdog here if the watchdog timer is not armed */
- if (WLC_WATCHDOG_TBTT(wlc)) {
- u32 cur, delta;
- if (wlc->WDarmed) {
- wl_del_timer(wlc->wl, wlc->wdtimer);
- wlc->WDarmed = false;
- }
-
- cur = OSL_SYSUPTIME();
- delta = cur > wlc->WDlast ? cur - wlc->WDlast :
- (u32) ~0 - wlc->WDlast + cur + 1;
- if (delta >= TIMER_INTERVAL_WATCHDOG) {
- wlc_watchdog((void *)wlc);
- wlc->WDlast = cur;
- }
-
- wl_add_timer(wlc->wl, wlc->wdtimer,
- wlc_watchdog_backup_bi(wlc), true);
- wlc->WDarmed = true;
- }
- }
-
if (!cfg->BSS) {
/* DirFrmQ is now valid...defer setting until end of ATIM window */
wlc->qvalid |= MCMD_DIRFRMQVAL;
@@ -5926,7 +4402,7 @@ wlc_dotxstatus(struct wlc_info *wlc, tx_status_t *txs, u32 frm_tx2)
tx_info->flags |= IEEE80211_TX_STAT_ACK;
}
- totlen = bcm_pkttotlen(p);
+ totlen = brcmu_pkttotlen(p);
free_pdu = true;
wlc_txfifo_complete(wlc, queue, 1);
@@ -5934,7 +4410,6 @@ wlc_dotxstatus(struct wlc_info *wlc, tx_status_t *txs, u32 frm_tx2)
if (lastframe) {
p->next = NULL;
p->prev = NULL;
- wlc->txretried = 0;
/* remove PLCP & Broadcom tx descriptor header */
skb_pull(p, D11_PHY_HDR_LEN);
skb_pull(p, D11_TXH_LEN);
@@ -5948,7 +4423,7 @@ wlc_dotxstatus(struct wlc_info *wlc, tx_status_t *txs, u32 frm_tx2)
fatal:
if (p)
- bcm_pkt_buf_free_skb(p);
+ brcmu_pkt_buf_free_skb(p);
return true;
@@ -5964,15 +4439,9 @@ wlc_txfifo_complete(struct wlc_info *wlc, uint fifo, s8 txpktpend)
/* There is more room; mark precedences related to this FIFO sendable */
WLC_TX_FIFO_ENAB(wlc, fifo);
- if (!TXPKTPENDTOT(wlc)) {
- if (wlc->block_datafifo & DATA_BLOCK_TX_SUPR)
- wlc_bsscfg_tx_check(wlc);
- }
-
/* Clear MHF2_TXBCMC_NOW flag if BCMC fifo has drained */
if (AP_ENAB(wlc->pub) &&
- wlc->bcmcfifo_drain && !TXPKTPENDGET(wlc, TX_BCMC_FIFO)) {
- wlc->bcmcfifo_drain = false;
+ !TXPKTPENDGET(wlc, TX_BCMC_FIFO)) {
wlc_mhf(wlc, MHF2, MHF2_TXBCMC_NOW, 0, WLC_BAND_AUTO);
}
@@ -6178,7 +4647,7 @@ void wlc_recv(struct wlc_info *wlc, struct sk_buff *p)
rxh = (d11rxhdr_t *) (p->data);
/* strip off rxhdr */
- skb_pull(p, wlc->hwrxoff);
+ skb_pull(p, WL_HWRXOFF);
/* fixup rx header endianness */
rxh->RxFrameSize = le16_to_cpu(rxh->RxFrameSize);
@@ -6252,7 +4721,7 @@ void wlc_recv(struct wlc_info *wlc, struct sk_buff *p)
return;
toss:
- bcm_pkt_buf_free_skb(p);
+ brcmu_pkt_buf_free_skb(p);
}
/* calculate frame duration for Mixed-mode L-SIG spoofing, return
@@ -6690,8 +5159,6 @@ static void wlc_update_mimo_band_bwcap(struct wlc_info *wlc, u8 bwcap)
band->mimo_cap_40 = false;
}
}
-
- wlc->mimo_band_bwcap = bwcap;
}
void wlc_mod_prb_rsp_rate_table(struct wlc_info *wlc, uint frame_len)
@@ -6985,43 +5452,6 @@ void wlc_bsscfg_reprate_init(struct wlc_bsscfg *bsscfg)
memset((char *)bsscfg->txrspec, 0, sizeof(bsscfg->txrspec));
}
-/* Retrieve a consolidated set of revision information,
- * typically for the WLC_GET_REVINFO ioctl
- */
-int wlc_get_revision_info(struct wlc_info *wlc, void *buf, uint len)
-{
- wlc_rev_info_t *rinfo = (wlc_rev_info_t *) buf;
-
- if (len < WL_REV_INFO_LEGACY_LENGTH)
- return -EOVERFLOW;
-
- rinfo->vendorid = wlc->vendorid;
- rinfo->deviceid = wlc->deviceid;
- rinfo->radiorev = (wlc->band->radiorev << IDCODE_REV_SHIFT) |
- (wlc->band->radioid << IDCODE_ID_SHIFT);
- rinfo->chiprev = wlc->pub->sih->chiprev;
- rinfo->corerev = wlc->pub->corerev;
- rinfo->boardid = wlc->pub->sih->boardtype;
- rinfo->boardvendor = wlc->pub->sih->boardvendor;
- rinfo->boardrev = wlc->pub->boardrev;
- rinfo->ucoderev = wlc->ucode_rev;
- rinfo->driverrev = EPI_VERSION_NUM;
- rinfo->bus = wlc->pub->sih->bustype;
- rinfo->chipnum = wlc->pub->sih->chip;
-
- if (len >= (offsetof(wlc_rev_info_t, chippkg))) {
- rinfo->phytype = wlc->band->phytype;
- rinfo->phyrev = wlc->band->phyrev;
- rinfo->anarev = 0; /* obsolete stuff, suppress */
- }
-
- if (len >= sizeof(*rinfo)) {
- rinfo->chippkg = wlc->pub->sih->chippkg;
- }
-
- return 0;
-}
-
void wlc_default_rateset(struct wlc_info *wlc, wlc_rateset_t *rs)
{
wlc_rateset_default(rs, NULL, wlc->band->phytype, wlc->band->bandtype,
@@ -7273,20 +5703,6 @@ wlc_set_addrmatch(struct wlc_info *wlc, int match_reg_offset,
memcpy(wlc->cfg->BSSID, addr, ETH_ALEN);
}
-void wlc_set_cwmin(struct wlc_info *wlc, u16 newmin)
-{
- wlc->band->CWmin = newmin;
- wlc_bmac_set_cwmin(wlc->hw, newmin);
-}
-
-void wlc_set_cwmax(struct wlc_info *wlc, u16 newmax)
-{
- wlc->band->CWmax = newmax;
- wlc_bmac_set_cwmax(wlc->hw, newmax);
-}
-
-/* Search mem rw utilities */
-
void wlc_pllreq(struct wlc_info *wlc, bool set, mbool req_bit)
{
wlc_bmac_pllreq(wlc->hw, set, req_bit);
@@ -7415,12 +5831,15 @@ static void
wlc_txflowcontrol_signal(struct wlc_info *wlc, struct wlc_txq_info *qi, bool on,
int prio)
{
+#ifdef NON_FUNCTIONAL
+ /* wlcif_list is never filled so this function is not functional */
struct wlc_if *wlcif;
for (wlcif = wlc->wlcif_list; wlcif != NULL; wlcif = wlcif->next) {
if (wlcif->qi == qi && wlcif->flags & WLC_IF_LINKED)
- wl_txflowcontrol(wlc->wl, wlcif->wlif, on, prio);
+ brcms_txflowcontrol(wlc->wl, wlcif->wlif, on, prio);
}
+#endif
}
static struct wlc_txq_info *wlc_txq_alloc(struct wlc_info *wlc)
@@ -7435,7 +5854,7 @@ static struct wlc_txq_info *wlc_txq_alloc(struct wlc_info *wlc)
* leave PS mode. The watermark for flowcontrol to OS packets
* will remain the same
*/
- bcm_pktq_init(&qi->q, WLC_PREC_COUNT,
+ brcmu_pktq_init(&qi->q, WLC_PREC_COUNT,
(2 * wlc->pub->tunables->datahiwat) + PKTQ_LEN_DEFAULT
+ wlc->pub->psq_pkts_total);
@@ -7501,7 +5920,7 @@ void wlc_inval_dma_pkts(struct wlc_hw_info *hw,
struct ieee80211_sta *sta,
void (*dma_callback_fn))
{
- struct hnddma_pub *dmah;
+ struct dma_pub *dmah;
int i;
for (i = 0; i < NFIFO; i++) {
dmah = hw->di[i];
@@ -7519,11 +5938,122 @@ void wlc_wait_for_tx_completion(struct wlc_info *wlc, bool drop)
{
/* flush packet queue when requested */
if (drop)
- bcm_pktq_flush(&wlc->pkt_queue->q, false, NULL, NULL);
+ brcmu_pktq_flush(&wlc->pkt_queue->q, false, NULL, NULL);
/* wait for queue and DMA fifos to run dry */
while (!pktq_empty(&wlc->pkt_queue->q) ||
TXPKTPENDTOT(wlc) > 0) {
- wl_msleep(wlc->wl, 1);
+ brcms_msleep(wlc->wl, 1);
}
}
+
+int wlc_set_par(struct wlc_info *wlc, enum wlc_par_id par_id, int int_val)
+{
+ int err = 0;
+
+ switch (par_id) {
+ case IOV_BCN_LI_BCN:
+ wlc->bcn_li_bcn = (u8) int_val;
+ if (wlc->pub->up)
+ wlc_bcn_li_upd(wlc);
+ break;
+ /* As long as override is false, this only sets the *user*
+ targets. User can twiddle this all he wants with no harm.
+ wlc_phy_txpower_set() explicitly sets override to false if
+ not internal or test.
+ */
+ case IOV_QTXPOWER:{
+ u8 qdbm;
+ bool override;
+
+ /* Remove override bit and clip to max qdbm value */
+ qdbm = (u8)min_t(u32, (int_val & ~WL_TXPWR_OVERRIDE), 0xff);
+ /* Extract override setting */
+ override = (int_val & WL_TXPWR_OVERRIDE) ? true : false;
+ err =
+ wlc_phy_txpower_set(wlc->band->pi, qdbm, override);
+ break;
+ }
+ case IOV_MPC:
+ wlc->mpc = (bool)int_val;
+ wlc_radio_mpc_upd(wlc);
+ break;
+ default:
+ err = -ENOTSUPP;
+ }
+ return err;
+}
+
+int wlc_get_par(struct wlc_info *wlc, enum wlc_par_id par_id, int *ret_int_ptr)
+{
+ int err = 0;
+
+ switch (par_id) {
+ case IOV_BCN_LI_BCN:
+ *ret_int_ptr = wlc->bcn_li_bcn;
+ break;
+ case IOV_QTXPOWER: {
+ uint qdbm;
+ bool override;
+
+ err = wlc_phy_txpower_get(wlc->band->pi, &qdbm,
+ &override);
+ if (err != 0)
+ return err;
+
+ /* Return qdbm units */
+ *ret_int_ptr =
+ qdbm | (override ? WL_TXPWR_OVERRIDE : 0);
+ break;
+ }
+ case IOV_MPC:
+ *ret_int_ptr = (s32) wlc->mpc;
+ break;
+ default:
+ err = -ENOTSUPP;
+ }
+ return err;
+}
+
+/*
+ * Search the name=value vars for a specific one and return its value.
+ * Returns NULL if not found.
+ */
+char *getvar(char *vars, const char *name)
+{
+ char *s;
+ int len;
+
+ if (!name)
+ return NULL;
+
+ len = strlen(name);
+ if (len == 0)
+ return NULL;
+
+ /* first look in vars[] */
+ for (s = vars; s && *s;) {
+ if ((memcmp(s, name, len) == 0) && (s[len] == '='))
+ return &s[len + 1];
+
+ while (*s++)
+ ;
+ }
+ /* nothing found */
+ return NULL;
+}
+
+/*
+ * Search the vars for a specific one and return its value as
+ * an integer. Returns 0 if not found.
+ */
+int getintvar(char *vars, const char *name)
+{
+ char *val;
+
+ val = getvar(vars, name);
+ if (val == NULL)
+ return 0;
+
+ return simple_strtoul(val, NULL, 0);
+}
diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.h b/drivers/staging/brcm80211/brcmsmac/main.h
index fb48dfcb97d52..c41205a5ce446 100644
--- a/drivers/staging/brcm80211/brcmsmac/wlc_main.h
+++ b/drivers/staging/brcm80211/brcmsmac/main.h
@@ -14,8 +14,8 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#ifndef _wlc_h_
-#define _wlc_h_
+#ifndef _BRCM_MAIN_H_
+#define _BRCM_MAIN_H_
#define MA_WINDOW_SZ 8 /* moving average window size */
#define WL_HWRXOFF 38 /* chip rx buffer offset */
@@ -23,7 +23,19 @@
#define MAXCOREREV 28 /* max # supported core revisions (0 .. MAXCOREREV - 1) */
#define WLC_MAXMODULES 22 /* max # wlc_module_register() calls */
-#define WLC_BITSCNT(x) bcm_bitcount((u8 *)&(x), sizeof(u8))
+#define SEQNUM_SHIFT 4
+#define AMPDU_DELIMITER_LEN 4
+#define SEQNUM_MAX 0x1000
+
+#define APHY_CWMIN 15
+#define PHY_CWMAX 1023
+
+#define EDCF_AIFSN_MIN 1
+#define FRAGNUM_MASK 0xF
+
+#define NTXRATE 64 /* # tx MPDUs rate is reported for */
+
+#define WLC_BITSCNT(x) brcmu_bitcount((u8 *)&(x), sizeof(u8))
/* Maximum wait time for a MAC suspend */
#define WLC_MAX_MAC_SUSPEND 83000 /* uS: 83mS is max packet time (64KB ampdu @ 6Mbps) */
@@ -35,6 +47,26 @@
/* transmit buffer max headroom for protocol headers */
#define TXOFF (D11_TXH_LEN + D11_PHY_HDR_LEN)
+#define AC_COUNT 4
+
+/* Macros for doing definition and get/set of bitfields
+ * Usage example, e.g. a three-bit field (bits 4-6):
+ * #define <NAME>_M BITFIELD_MASK(3)
+ * #define <NAME>_S 4
+ * ...
+ * regval = R_REG(osh, &regs->regfoo);
+ * field = GFIELD(regval, <NAME>);
+ * regval = SFIELD(regval, <NAME>, 1);
+ * W_REG(osh, &regs->regfoo, regval);
+ */
+#define BITFIELD_MASK(width) \
+ (((unsigned)1 << (width)) - 1)
+#define GFIELD(val, field) \
+ (((val) >> field ## _S) & field ## _M)
+#define SFIELD(val, field, bits) \
+ (((val) & (~(field ## _M << field ## _S))) | \
+ ((unsigned)(bits) << field ## _S))
+
/* For managing scan result lists */
struct wlc_bss_list {
uint count;
@@ -136,7 +168,7 @@ extern const u8 prio2fifo[];
#define MAXTXFRAMEBURST 8 /* vanilla xpress mode: max frames/burst */
#define MAXFRAMEBURST_TXOP 10000 /* Frameburst TXOP in usec */
-/* Per-AC retry limit register definitions; uses bcmdefs.h bitfield macros */
+/* Per-AC retry limit register definitions; uses defs.h bitfield macros */
#define EDCF_SHORT_S 0
#define EDCF_SFB_S 4
#define EDCF_LONG_S 8
@@ -146,6 +178,8 @@ extern const u8 prio2fifo[];
#define EDCF_LONG_M BITFIELD_MASK(4)
#define EDCF_LFB_M BITFIELD_MASK(4)
+#define NFIFO 6 /* # tx/rx fifopairs */
+
#define WLC_WME_RETRY_SHORT_GET(wlc, ac) GFIELD(wlc->wme_retries[ac], EDCF_SHORT)
#define WLC_WME_RETRY_SFB_GET(wlc, ac) GFIELD(wlc->wme_retries[ac], EDCF_SFB)
#define WLC_WME_RETRY_LONG_GET(wlc, ac) GFIELD(wlc->wme_retries[ac], EDCF_LONG)
@@ -208,19 +242,6 @@ struct wlc_protection {
s8 nongf_override; /* override for use of GF protection */
s8 n_pam_override; /* override for preamble: MM or GF */
bool n_obss; /* indicated OBSS Non-HT STA present */
-
- uint longpre_detect_timeout; /* #sec until long preamble bcns gone */
- uint barker_detect_timeout; /* #sec until bcns signaling Barker long preamble */
- /* only is gone */
- uint ofdm_ibss_timeout; /* #sec until ofdm IBSS beacons gone */
- uint ofdm_ovlp_timeout; /* #sec until ofdm overlapping BSS bcns gone */
- uint nonerp_ibss_timeout; /* #sec until nonerp IBSS beacons gone */
- uint nonerp_ovlp_timeout; /* #sec until nonerp overlapping BSS bcns gone */
- uint g_ibss_timeout; /* #sec until bcns signaling Use_Protection gone */
- uint n_ibss_timeout; /* #sec until bcns signaling Use_OFDM_Protection gone */
- uint ht20in40_ovlp_timeout; /* #sec until 20MHz overlapping OPMODE gone */
- uint ht20in40_ibss_timeout; /* #sec until 20MHz-only HT station bcns gone */
- uint non_gf_ibss_timeout; /* #sec until non-GF bcns gone */
};
/* anything affects the single/dual streams/antenna operation */
@@ -276,6 +297,49 @@ struct wlc_stf {
#define WLC_HT_WEP_RESTRICT 0x01 /* restrict HT with WEP */
#define WLC_HT_TKIP_RESTRICT 0x02 /* restrict HT with TKIP */
+/* Maximum # of keys that wl driver supports in S/W.
+ * Keys supported in H/W is less than or equal to WSEC_MAX_KEYS.
+ */
+#define WSEC_MAX_KEYS 54 /* Max # of keys (50 + 4 default keys) */
+#define WLC_DEFAULT_KEYS 4 /* Default # of keys */
+
+/*
+* Max # of keys currently supported:
+*
+* s/w keys if WSEC_SW(wlc->wsec).
+* h/w keys otherwise.
+*/
+#define WLC_MAX_WSEC_KEYS(wlc) WSEC_MAX_KEYS
+
+/* number of 802.11 default (non-paired, group keys) */
+#define WSEC_MAX_DEFAULT_KEYS 4 /* # of default keys */
+
+typedef struct wsec_iv {
+ u32 hi; /* upper 32 bits of IV */
+ u16 lo; /* lower 16 bits of IV */
+} wsec_iv_t;
+
+#define WLC_NUMRXIVS 16 /* # rx IVs (one per 802.11e TID) */
+
+typedef struct wsec_key {
+ u8 ea[ETH_ALEN]; /* per station */
+ u8 idx; /* key index in wsec_keys array */
+ u8 id; /* key ID [0-3] */
+ u8 algo; /* CRYPTO_ALGO_AES_CCM, CRYPTO_ALGO_WEP128, etc */
+ u8 rcmta; /* rcmta entry index, same as idx by default */
+ u16 flags; /* misc flags */
+ u8 algo_hw; /* cache for hw register */
+ u8 aes_mode; /* cache for hw register */
+ s8 iv_len; /* IV length */
+ s8 icv_len; /* ICV length */
+ u32 len; /* key length..don't move this var */
+ /* data is 4byte aligned */
+ u8 data[WLAN_MAX_KEY_LEN]; /* key data */
+ wsec_iv_t rxiv[WLC_NUMRXIVS]; /* Rx IV (one per TID) */
+ wsec_iv_t txiv; /* Tx IV */
+
+} wsec_key_t;
+
/*
* core state (mac)
*/
@@ -303,7 +367,7 @@ struct wlcband {
wlc_phy_t *pi; /* pointer to phy specific information */
bool abgphy_encore;
- u8 gmode; /* currently active gmode (see wlioctl.h) */
+ u8 gmode; /* currently active gmode */
struct scb *hwrs_scb; /* permanent scb for hw rateset */
@@ -336,7 +400,7 @@ struct pkt_cb {
/* module control blocks */
struct modulecb {
char name[32]; /* module name : NULL indicates empty array member */
- const bcm_iovar_t *iovars; /* iovar table */
+ const struct brcmu_iovar *iovars; /* iovar table */
void *hdl; /* handle passed when handler 'doiovar' is called */
watchdog_fn_t watchdog_fn; /* watchdog handler */
iovar_fn_t iovar_fn; /* iovar handler */
@@ -355,6 +419,24 @@ struct dumpcb_s {
struct dumpcb_s *next;
};
+struct edcf_acparam {
+ u8 ACI;
+ u8 ECW;
+ u16 TXOP;
+} __attribute__((packed));
+typedef struct edcf_acparam edcf_acparam_t;
+
+struct wme_param_ie {
+ u8 oui[3];
+ u8 type;
+ u8 subtype;
+ u8 version;
+ u8 qosinfo;
+ u8 rsvd;
+ edcf_acparam_t acparam[AC_COUNT];
+} __attribute__((packed));
+typedef struct wme_param_ie wme_param_ie_t;
+
/* virtual interface */
struct wlc_if {
struct wlc_if *next;
@@ -364,7 +446,7 @@ struct wlc_if {
* AID2PVBMAP(scb).
*/
u8 flags; /* flags for the interface */
- struct wl_if *wlif; /* pointer to wlif */
+ struct brcms_if *wlif; /* pointer to wlif */
struct wlc_txq_info *qi; /* pointer to associated tx queue */
union {
struct scb *scb; /* pointer to scb if WLC_IFTYPE_WDS */
@@ -372,8 +454,8 @@ struct wlc_if {
} u;
};
-/* flags for the interface */
-#define WLC_IF_LINKED 0x02 /* this interface is linked to a wl_if */
+/* flags for the interface, this interface is linked to a brcms_if */
+#define WLC_IF_LINKED 0x02
struct wlc_hwband {
int bandtype; /* WLC_BAND_2G, WLC_BAND_5G */
@@ -397,7 +479,7 @@ struct wlc_hw_info {
struct wlc_info *wlc;
/* fifo */
- struct hnddma_pub *di[NFIFO]; /* hnddma handles, per fifo */
+ struct dma_pub *di[NFIFO]; /* dma handles, per fifo */
uint unit; /* device instance number */
@@ -413,7 +495,7 @@ struct wlc_hw_info {
u32 machwcap_backup; /* backup of machwcap */
u16 ucode_dbgsel; /* dbgsel for ucode debug(config gpio) */
- si_t *sih; /* SB handle (cookie for siutils calls) */
+ struct si_pub *sih; /* SI handle (cookie for siutils calls) */
char *vars; /* "environment" name=value */
uint vars_size; /* size of vars, free vars on detach */
d11regs_t *regs; /* pointer to device registers */
@@ -484,7 +566,7 @@ struct wlc_txq_info {
*/
struct wlc_info {
struct wlc_pub *pub; /* pointer to wlc public state */
- struct wl_info *wl; /* pointer to os-specific private state */
+ struct brcms_info *wl; /* pointer to os-specific private state */
d11regs_t *regs; /* pointer to device registers */
struct wlc_hw_info *hw; /* HW related state used primarily by BMAC */
@@ -528,8 +610,6 @@ struct wlc_info {
struct antsel_info *asi; /* antsel module handler */
wlc_cm_info_t *cmi; /* channel manager module handler */
- void *btparam; /* bus type specific cookie */
-
uint vars_size; /* size of vars, free vars on detach */
u16 vendorid; /* PCI vendor id */
@@ -544,7 +624,6 @@ struct wlc_info {
bool bandinit_pending; /* track band init in auto band */
bool radio_monitor; /* radio timer is running */
- bool down_override; /* true=down */
bool going_down; /* down path intermediate variable */
bool mpc; /* enable minimum power consumption */
@@ -553,16 +632,10 @@ struct wlc_info {
u8 mpc_delay_off; /* delay radio disable by # of watchdog cnt */
u8 prev_non_delay_mpc; /* prev state wlc_is_non_delay_mpc */
- /* timer */
- struct wl_timer *wdtimer; /* timer for watchdog routine */
- uint fast_timer; /* Periodic timeout for 'fast' timer */
- uint slow_timer; /* Periodic timeout for 'slow' timer */
- uint glacial_timer; /* Periodic timeout for 'glacial' timer */
- uint phycal_mlo; /* last time measurelow calibration was done */
- uint phycal_txpower; /* last time txpower calibration was done */
-
- struct wl_timer *radio_timer; /* timer for hw radio button monitor routine */
- struct wl_timer *pspoll_timer; /* periodic pspoll timer */
+ /* timer for watchdog routine */
+ struct brcms_timer *wdtimer;
+ /* timer for hw radio button monitor routine */
+ struct brcms_timer *radio_timer;
/* promiscuous */
bool monitor; /* monitor (MPDU sniffing) mode */
@@ -570,30 +643,11 @@ struct wlc_info {
bool bcnmisc_scan; /* bcns promisc mode override for scan */
bool bcnmisc_monitor; /* bcns promisc mode override for monitor */
- u8 bcn_wait_prd; /* max waiting period (for beacon) in 1024TU */
-
/* driver feature */
bool _rifs; /* enable per-packet rifs */
- s32 rifs_advert; /* RIFS mode advertisement */
s8 sgi_tx; /* sgi tx */
- bool wet; /* true if wireless ethernet bridging mode */
/* AP-STA synchronization, power save */
- bool check_for_unaligned_tbtt; /* check unaligned tbtt flag */
- bool PM_override; /* no power-save flag, override PM(user input) */
- bool PMenabled; /* current power-management state (CAM or PS) */
- bool PMpending; /* waiting for tx status with PM indicated set */
- bool PMblocked; /* block any PSPolling in PS mode, used to buffer
- * AP traffic, also used to indicate in progress
- * of scan, rm, etc. off home channel activity.
- */
- bool PSpoll; /* whether there is an outstanding PS-Poll frame */
- u8 PM; /* power-management mode (CAM, PS or FASTPS) */
- bool PMawakebcn; /* bcn recvd during current waking state */
-
- bool WME_PM_blocked; /* Can STA go to PM when in WME Auto mode */
- bool wake; /* host-specified PS-mode sleep state */
- u8 pspoll_prd; /* pspoll interval in milliseconds */
u8 bcn_li_bcn; /* beacon listen interval in # beacons */
u8 bcn_li_dtim; /* beacon listen interval in # dtims */
@@ -602,18 +656,14 @@ struct wlc_info {
/* WME */
ac_bitmap_t wme_dp; /* Discard (oldest first) policy per AC */
- bool wme_apsd; /* enable Advanced Power Save Delivery */
- ac_bitmap_t wme_admctl; /* bit i set if AC i under admission control */
u16 edcf_txop[AC_COUNT]; /* current txop for each ac */
wme_param_ie_t wme_param_ie; /* WME parameter info element, which on STA
* contains parameters in use locally, and on
* AP contains parameters advertised to STA
* in beacons and assoc responses.
*/
- bool wme_prec_queuing; /* enable/disable non-wme STA prec queuing */
u16 wme_retries[AC_COUNT]; /* per-AC retry limits */
- int vlan_mode; /* OK to use 802.1Q Tags (ON, OFF, AUTO) */
u16 tx_prec_map; /* Precedence map based on HW FIFO space */
u16 fifo2prec_map[NFIFO]; /* pointer to fifo2_prec map based on WME */
@@ -623,10 +673,6 @@ struct wlc_info {
*/
struct wlc_bsscfg *bsscfg[WLC_MAXBSSCFG];
struct wlc_bsscfg *cfg; /* the primary bsscfg (can be AP or STA) */
- u8 stas_associated; /* count of ASSOCIATED STA bsscfgs */
- u8 aps_associated; /* count of UP AP bsscfgs */
- u8 block_datafifo; /* prohibit posting frames to data fifos */
- bool bcmcfifo_drain; /* TX_BCMC_FIFO is set to drain */
/* tx queue */
struct wlc_txq_info *tx_queues; /* common TX Queue list */
@@ -638,43 +684,24 @@ struct wlc_info {
* treated as sw keys (used for debugging)
*/
struct modulecb *modulecb;
- struct dumpcb_s *dumpcb_head;
u8 mimoft; /* SIGN or 11N */
- u8 mimo_band_bwcap; /* bw cap per band type */
- s8 txburst_limit_override; /* tx burst limit override */
- u16 txburst_limit; /* tx burst limit value */
s8 cck_40txbw; /* 11N, cck tx b/w override when in 40MHZ mode */
s8 ofdm_40txbw; /* 11N, ofdm tx b/w override when in 40MHZ mode */
s8 mimo_40txbw; /* 11N, mimo tx b/w override when in 40MHZ mode */
/* HT CAP IE being advertised by this node: */
struct ieee80211_ht_cap ht_cap;
- uint seckeys; /* 54 key table shm address */
- uint tkmickeys; /* 12 TKIP MIC key table shm address */
-
wlc_bss_info_t *default_bss; /* configured BSS parameters */
- u16 AID; /* association ID */
- u16 counter; /* per-sdu monotonically increasing counter */
u16 mc_fid_counter; /* BC/MC FIFO frame ID counter */
- bool ibss_allowed; /* false, all IBSS will be ignored during a scan
- * and the driver will not allow the creation of
- * an IBSS network
- */
- bool ibss_coalesce_allowed;
-
char country_default[WLC_CNTRY_BUF_SZ]; /* saved country for leaving 802.11d
* auto-country mode
*/
char autocountry_default[WLC_CNTRY_BUF_SZ]; /* initial country for 802.11d
* auto-country mode
*/
-#ifdef BCMDBG
- bcm_tlv_t *country_ie_override; /* debug override of announced Country IE */
-#endif
-
u16 prb_resp_timeout; /* do not send prb resp if request older than this,
* 0 = disable
*/
@@ -696,44 +723,17 @@ struct wlc_info {
u16 LFBL; /* Long Frame Rate Fallback Limit */
/* network config */
- bool shortpreamble; /* currently operating with CCK ShortPreambles */
bool shortslot; /* currently using 11g ShortSlot timing */
- s8 barker_preamble; /* current Barker Preamble Mode */
s8 shortslot_override; /* 11g ShortSlot override */
bool include_legacy_erp; /* include Legacy ERP info elt ID 47 as well as g ID 42 */
- bool barker_overlap_control; /* true: be aware of overlapping BSSs for barker */
- bool ignore_bcns; /* override: ignore non shortslot bcns in a 11g network */
- bool legacy_probe; /* restricts probe requests to CCK rates */
struct wlc_protection *protection;
s8 PLCPHdr_override; /* 802.11b Preamble Type override */
struct wlc_stf *stf;
- struct pkt_cb *pkt_callback; /* tx completion callback handlers */
-
- u32 txretried; /* tx retried number in one msdu */
-
ratespec_t bcn_rspec; /* save bcn ratespec purpose */
- bool apsd_sta_usp; /* Unscheduled Service Period in progress on STA */
- struct wl_timer *apsd_trigger_timer; /* timer for wme apsd trigger frames */
- u32 apsd_trigger_timeout; /* timeout value for apsd_trigger_timer (in ms)
- * 0 == disable
- */
- ac_bitmap_t apsd_trigger_ac; /* Permissible Access Category in which APSD Null
- * Trigger frames can be send
- */
- u8 htphy_membership; /* HT PHY membership */
-
- bool _regulatory_domain; /* 802.11d enabled? */
-
- u8 mimops_PM;
-
- u8 txpwr_percent; /* power output percentage */
-
- u8 ht_wsec_restriction; /* the restriction of HT with TKIP or WEP */
-
uint tempsense_lasttime;
u16 tx_duty_cycle_ofdm; /* maximum allowed duty cycle for OFDM */
@@ -741,7 +741,6 @@ struct wlc_info {
u16 next_bsscfg_ID;
- struct wlc_if *wlcif_list; /* linked list of wlc_if structs */
struct wlc_txq_info *pkt_queue; /* txq for transmit packets */
u32 mpc_dur; /* total time (ms) in mpc mode except for the
* portion since radio is turned off last time
@@ -749,8 +748,6 @@ struct wlc_info {
u32 mpc_laston_ts; /* timestamp (ms) when radio is turned off last
* time
*/
- bool pr80838_war;
- uint hwrxoff;
struct wiphy *wiphy;
};
@@ -767,6 +764,84 @@ struct antsel_info {
wlc_antselcfg_t antcfg_cur; /* current antenna config (auto) */
};
+/* BSS configuration state */
+struct wlc_bsscfg {
+ struct wlc_info *wlc; /* wlc to which this bsscfg belongs to. */
+ bool up; /* is this configuration up operational */
+ bool enable; /* is this configuration enabled */
+ bool associated; /* is BSS in ASSOCIATED state */
+ bool BSS; /* infraustructure or adhac */
+ bool dtim_programmed;
+
+ u8 SSID_len; /* the length of SSID */
+ u8 SSID[IEEE80211_MAX_SSID_LEN]; /* SSID string */
+ struct scb *bcmc_scb[MAXBANDS]; /* one bcmc_scb per band */
+ s8 _idx; /* the index of this bsscfg,
+ * assigned at wlc_bsscfg_alloc()
+ */
+ /* MAC filter */
+ uint nmac; /* # of entries on maclist array */
+ int macmode; /* allow/deny stations on maclist array */
+ struct ether_addr *maclist; /* list of source MAC addrs to match */
+
+ /* security */
+ u32 wsec; /* wireless security bitvec */
+ s16 auth; /* 802.11 authentication: Open, Shared Key, WPA */
+ s16 openshared; /* try Open auth first, then Shared Key */
+ bool wsec_restrict; /* drop unencrypted packets if wsec is enabled */
+ bool eap_restrict; /* restrict data until 802.1X auth succeeds */
+ u16 WPA_auth; /* WPA: authenticated key management */
+ bool wpa2_preauth; /* default is true, wpa_cap sets value */
+ bool wsec_portopen; /* indicates keys are plumbed */
+ wsec_iv_t wpa_none_txiv; /* global txiv for WPA_NONE, tkip and aes */
+ int wsec_index; /* 0-3: default tx key, -1: not set */
+ wsec_key_t *bss_def_keys[WLC_DEFAULT_KEYS]; /* default key storage */
+
+ /* TKIP countermeasures */
+ bool tkip_countermeasures; /* flags TKIP no-assoc period */
+ u32 tk_cm_dt; /* detect timer */
+ u32 tk_cm_bt; /* blocking timer */
+ u32 tk_cm_bt_tmstmp; /* Timestamp when TKIP BT is activated */
+ bool tk_cm_activate; /* activate countermeasures after EAPOL-Key sent */
+
+ u8 BSSID[ETH_ALEN]; /* BSSID (associated) */
+ u8 cur_etheraddr[ETH_ALEN]; /* h/w address */
+ u16 bcmc_fid; /* the last BCMC FID queued to TX_BCMC_FIFO */
+ u16 bcmc_fid_shm; /* the last BCMC FID written to shared mem */
+
+ u32 flags; /* WLC_BSSCFG flags; see below */
+
+ u8 *bcn; /* AP beacon */
+ uint bcn_len; /* AP beacon length */
+ bool ar_disassoc; /* disassociated in associated recreation */
+
+ int auth_atmptd; /* auth type (open/shared) attempted */
+
+ pmkid_cand_t pmkid_cand[MAXPMKID]; /* PMKID candidate list */
+ uint npmkid_cand; /* num PMKID candidates */
+ pmkid_t pmkid[MAXPMKID]; /* PMKID cache */
+ uint npmkid; /* num cached PMKIDs */
+
+ wlc_bss_info_t *current_bss; /* BSS parms in ASSOCIATED state */
+
+ /* PM states */
+ bool PMawakebcn; /* bcn recvd during current waking state */
+ bool PMpending; /* waiting for tx status with PM indicated set */
+ bool priorPMstate; /* Detecting PM state transitions */
+ bool PSpoll; /* whether there is an outstanding PS-Poll frame */
+
+ /* BSSID entry in RCMTA, use the wsec key management infrastructure to
+ * manage the RCMTA entries.
+ */
+ wsec_key_t *rcmta;
+
+ /* 'unique' ID of this bsscfg, assigned at bsscfg allocation */
+ u16 ID;
+
+ uint txrspecidx; /* index into tx rate circular buffer */
+ ratespec_t txrspec[NTXRATE][2]; /* circular buffer of prev MPDUs tx rates */
+};
+
#define CHANNEL_BANDUNIT(wlc, ch) (((ch) <= CH_MAX_2G_CHANNEL) ? BAND_2G_INDEX : BAND_5G_INDEX)
#define OTHERBANDUNIT(wlc) ((uint)((wlc)->band->bandunit ? BAND_2G_INDEX : BAND_5G_INDEX))
@@ -784,7 +859,7 @@ struct antsel_info {
#define TXPKTPENDCLR(wlc, fifo) ((wlc)->core->txpktpend[(fifo)] = 0)
#define TXAVAIL(wlc, fifo) (*(wlc)->core->txavail[(fifo)])
#define GETNEXTTXP(wlc, _queue) \
- dma_getnexttxp((wlc)->hw->di[(_queue)], HNDDMA_RANGE_TRANSMITTED)
+ dma_getnexttxp((wlc)->hw->di[(_queue)], DMA_RANGE_TRANSMITTED)
#define WLC_IS_MATCH_SSID(wlc, ssid1, ssid2, len1, len2) \
((len1 == len2) && !memcmp(ssid1, ssid2, len1))
@@ -805,8 +880,6 @@ extern void wlc_write_template_ram(struct wlc_info *wlc, int offset, int len,
void *buf);
extern void wlc_write_hw_bcntemplates(struct wlc_info *wlc, void *bcn, int len,
bool both);
-extern void wlc_set_cwmin(struct wlc_info *wlc, u16 newmin);
-extern void wlc_set_cwmax(struct wlc_info *wlc, u16 newmax);
extern void wlc_pllreq(struct wlc_info *wlc, bool set, mbool req_bit);
extern void wlc_reset_bmac_done(struct wlc_info *wlc);
@@ -862,8 +935,8 @@ extern void wlc_inval_dma_pkts(struct wlc_hw_info *hw,
void (*dma_callback_fn));
#if defined(BCMDBG)
-extern void wlc_dump_ie(struct wlc_info *wlc, bcm_tlv_t *ie,
- struct bcmstrbuf *b);
+extern void wlc_dump_ie(struct wlc_info *wlc, struct brcmu_tlv *ie,
+ struct brcmu_strbuf *b);
#endif
extern void wlc_reprate_init(struct wlc_info *wlc);
@@ -900,12 +973,6 @@ extern void wlc_set_chanspec(struct wlc_info *wlc, chanspec_t chanspec);
extern bool wlc_timers_init(struct wlc_info *wlc, int unit);
-extern const bcm_iovar_t wlc_iovars[];
-
-extern int wlc_doiovar(void *hdl, const bcm_iovar_t *vi, u32 actionid,
- const char *name, void *params, uint p_len, void *arg,
- int len, int val_size, struct wlc_if *wlcif);
-
#if defined(BCMDBG)
extern void wlc_print_ies(struct wlc_info *wlc, u8 *ies, uint ies_len);
#endif
@@ -928,12 +995,9 @@ extern ratespec_t wlc_lowest_basic_rspec(struct wlc_info *wlc,
wlc_rateset_t *rs);
extern void wlc_radio_disable(struct wlc_info *wlc);
extern void wlc_bcn_li_upd(struct wlc_info *wlc);
-
-extern int wlc_get_revision_info(struct wlc_info *wlc, void *buf, uint len);
extern void wlc_set_home_chanspec(struct wlc_info *wlc, chanspec_t chanspec);
-extern void wlc_watchdog_upd(struct wlc_info *wlc, bool tbtt);
extern bool wlc_ps_allowed(struct wlc_info *wlc);
extern bool wlc_stay_awake(struct wlc_info *wlc);
extern void wlc_wme_initparams_sta(struct wlc_info *wlc, wme_param_ie_t *pe);
-#endif /* _wlc_h_ */
+#endif /* _BRCM_MAIN_H_ */
diff --git a/drivers/staging/brcm80211/brcmsmac/nicpci.c b/drivers/staging/brcm80211/brcmsmac/nicpci.c
index 18b844a8d2fb3..ca781c445a864 100644
--- a/drivers/staging/brcm80211/brcmsmac/nicpci.c
+++ b/drivers/staging/brcm80211/brcmsmac/nicpci.c
@@ -17,17 +17,170 @@
#include <linux/delay.h>
#include <linux/string.h>
#include <linux/pci.h>
-#include <bcmdefs.h>
-#include <bcmutils.h>
-#include <bcmnvram.h>
+#include <defs.h>
+#include "types.h"
+#include <brcmu_utils.h>
#include <aiutils.h>
-#include <hndsoc.h>
-#include <bcmdevs.h>
-#include <sbchipc.h>
-#include <pci_core.h>
-#include <pcie_core.h>
+#include <soc.h>
+#include <brcm_hw_ids.h>
+#include <chipcommon.h>
+#include <scb.h>
+#include <pub.h>
#include <nicpci.h>
-#include <pcicfg.h>
+
+/* SPROM offsets */
+#define SRSH_ASPM_OFFSET 4 /* word 4 */
+#define SRSH_ASPM_ENB 0x18 /* bit 3, 4 */
+#define SRSH_ASPM_L1_ENB 0x10 /* bit 4 */
+#define SRSH_ASPM_L0s_ENB 0x8 /* bit 3 */
+
+#define SRSH_PCIE_MISC_CONFIG 5 /* word 5 */
+#define SRSH_L23READY_EXIT_NOPERST 0x8000 /* bit 15 */
+#define SRSH_CLKREQ_OFFSET_REV5 20 /* word 20 for srom rev <= 5 */
+#define SRSH_CLKREQ_ENB 0x0800 /* bit 11 */
+#define SRSH_BD_OFFSET 6 /* word 6 */
+
+/* chipcontrol */
+#define CHIPCTRL_4321_PLL_DOWN 0x800000 /* serdes PLL down override */
+
+/* MDIO control */
+#define MDIOCTL_DIVISOR_MASK 0x7f /* clock to be used on MDIO */
+#define MDIOCTL_DIVISOR_VAL 0x2
+#define MDIOCTL_PREAM_EN 0x80 /* Enable preamble sequnce */
+#define MDIOCTL_ACCESS_DONE 0x100 /* Tranaction complete */
+
+/* MDIO Data */
+#define MDIODATA_MASK 0x0000ffff /* data 2 bytes */
+#define MDIODATA_TA 0x00020000 /* Turnaround */
+#define MDIODATA_REGADDR_SHF_OLD 18 /* Regaddr shift (rev < 10) */
+#define MDIODATA_REGADDR_MASK_OLD 0x003c0000 /* Regaddr Mask (rev < 10) */
+#define MDIODATA_DEVADDR_SHF_OLD 22 /* Physmedia devaddr shift (rev < 10) */
+#define MDIODATA_DEVADDR_MASK_OLD 0x0fc00000 /* Physmedia devaddr Mask (rev < 10) */
+#define MDIODATA_REGADDR_SHF 18 /* Regaddr shift */
+#define MDIODATA_REGADDR_MASK 0x007c0000 /* Regaddr Mask */
+#define MDIODATA_DEVADDR_SHF 23 /* Physmedia devaddr shift */
+#define MDIODATA_DEVADDR_MASK 0x0f800000 /* Physmedia devaddr Mask */
+#define MDIODATA_WRITE 0x10000000 /* write Transaction */
+#define MDIODATA_READ 0x20000000 /* Read Transaction */
+#define MDIODATA_START 0x40000000 /* start of Transaction */
+
+#define MDIODATA_DEV_ADDR 0x0 /* dev address for serdes */
+#define MDIODATA_BLK_ADDR 0x1F /* blk address for serdes */
+
+/* serdes regs (rev < 10) */
+#define MDIODATA_DEV_PLL 0x1d /* SERDES PLL Dev */
+#define MDIODATA_DEV_TX 0x1e /* SERDES TX Dev */
+#define MDIODATA_DEV_RX 0x1f /* SERDES RX Dev */
+
+ /* SERDES RX registers */
+#define SERDES_RX_CTRL 1 /* Rx cntrl */
+#define SERDES_RX_TIMER1 2 /* Rx Timer1 */
+#define SERDES_RX_CDR 6 /* CDR */
+#define SERDES_RX_CDRBW 7 /* CDR BW */
+ /* SERDES RX control register */
+#define SERDES_RX_CTRL_FORCE 0x80 /* rxpolarity_force */
+#define SERDES_RX_CTRL_POLARITY 0x40 /* rxpolarity_value */
+
+ /* SERDES PLL registers */
+#define SERDES_PLL_CTRL 1 /* PLL control reg */
+#define PLL_CTRL_FREQDET_EN 0x4000 /* bit 14 is FREQDET on */
+
+/* Linkcontrol reg offset in PCIE Cap */
+#define PCIE_CAP_LINKCTRL_OFFSET 16 /* linkctrl offset in pcie cap */
+#define PCIE_CAP_LCREG_ASPML0s 0x01 /* ASPM L0s in linkctrl */
+#define PCIE_CAP_LCREG_ASPML1 0x02 /* ASPM L1 in linkctrl */
+#define PCIE_CLKREQ_ENAB 0x100 /* CLKREQ Enab in linkctrl */
+
+#define PCIE_ASPM_ENAB 3 /* ASPM L0s & L1 in linkctrl */
+#define PCIE_ASPM_L1_ENAB 2 /* ASPM L0s & L1 in linkctrl */
+#define PCIE_ASPM_L0s_ENAB 1 /* ASPM L0s & L1 in linkctrl */
+#define PCIE_ASPM_DISAB 0 /* ASPM L0s & L1 in linkctrl */
+
+/* Power management threshold */
+#define PCIE_L1THRESHOLDTIME_MASK 0xFF00 /* bits 8 - 15 */
+#define PCIE_L1THRESHOLDTIME_SHIFT 8 /* PCIE_L1THRESHOLDTIME_SHIFT */
+#define PCIE_L1THRESHOLD_WARVAL 0x72 /* WAR value */
+#define PCIE_ASPMTIMER_EXTEND 0x01000000 /* > rev7: enable extend ASPM timer */
+
+/* different register spaces to access thr'u pcie indirect access */
+#define PCIE_CONFIGREGS 1 /* Access to config space */
+#define PCIE_PCIEREGS 2 /* Access to pcie registers */
+
+/* PCIE protocol PHY diagnostic registers */
+#define PCIE_PLP_STATUSREG 0x204 /* Status */
+
+/* Status reg PCIE_PLP_STATUSREG */
+#define PCIE_PLP_POLARITYINV_STAT 0x10
+
+/* PCIE protocol DLLP diagnostic registers */
+#define PCIE_DLLP_LCREG 0x100 /* Link Control */
+#define PCIE_DLLP_PMTHRESHREG 0x128 /* Power Management Threshold */
+
+/* PCIE protocol TLP diagnostic registers */
+#define PCIE_TLP_WORKAROUNDSREG 0x004 /* TLP Workarounds */
+
+/* Sonics side: PCI core and host control registers */
+struct sbpciregs {
+ u32 control; /* PCI control */
+ u32 PAD[3];
+ u32 arbcontrol; /* PCI arbiter control */
+ u32 clkrun; /* Clkrun Control (>=rev11) */
+ u32 PAD[2];
+ u32 intstatus; /* Interrupt status */
+ u32 intmask; /* Interrupt mask */
+ u32 sbtopcimailbox; /* Sonics to PCI mailbox */
+ u32 PAD[9];
+ u32 bcastaddr; /* Sonics broadcast address */
+ u32 bcastdata; /* Sonics broadcast data */
+ u32 PAD[2];
+ u32 gpioin; /* ro: gpio input (>=rev2) */
+ u32 gpioout; /* rw: gpio output (>=rev2) */
+ u32 gpioouten; /* rw: gpio output enable (>= rev2) */
+ u32 gpiocontrol; /* rw: gpio control (>= rev2) */
+ u32 PAD[36];
+ u32 sbtopci0; /* Sonics to PCI translation 0 */
+ u32 sbtopci1; /* Sonics to PCI translation 1 */
+ u32 sbtopci2; /* Sonics to PCI translation 2 */
+ u32 PAD[189];
+ u32 pcicfg[4][64]; /* 0x400 - 0x7FF, PCI Cfg Space (>=rev8) */
+ u16 sprom[36]; /* SPROM shadow Area */
+ u32 PAD[46];
+};
+
+/* SB side: PCIE core and host control registers */
+typedef struct sbpcieregs {
+ u32 control; /* host mode only */
+ u32 PAD[2];
+ u32 biststatus; /* bist Status: 0x00C */
+ u32 gpiosel; /* PCIE gpio sel: 0x010 */
+ u32 gpioouten; /* PCIE gpio outen: 0x14 */
+ u32 PAD[2];
+ u32 intstatus; /* Interrupt status: 0x20 */
+ u32 intmask; /* Interrupt mask: 0x24 */
+ u32 sbtopcimailbox; /* sb to pcie mailbox: 0x028 */
+ u32 PAD[53];
+ u32 sbtopcie0; /* sb to pcie translation 0: 0x100 */
+ u32 sbtopcie1; /* sb to pcie translation 1: 0x104 */
+ u32 sbtopcie2; /* sb to pcie translation 2: 0x108 */
+ u32 PAD[5];
+
+ /* pcie core supports in direct access to config space */
+ u32 configaddr; /* pcie config space access: Address field: 0x120 */
+ u32 configdata; /* pcie config space access: Data field: 0x124 */
+
+ /* mdio access to serdes */
+ u32 mdiocontrol; /* controls the mdio access: 0x128 */
+ u32 mdiodata; /* Data to the mdio access: 0x12c */
+
+ /* pcie protocol phy/dllp/tlp register indirect access mechanism */
+ u32 pcieindaddr; /* indirect access to the internal register: 0x130 */
+ u32 pcieinddata; /* Data to/from the internal regsiter: 0x134 */
+
+ u32 clkreqenctrl; /* >= rev 6, Clkreq rdma control : 0x138 */
+ u32 PAD[177];
+ u32 pciecfg[4][64]; /* 0x400 - 0x7FF, PCIE Cfg Space */
+ u16 sprom[64]; /* SPROM shadow Area */
+} sbpcieregs_t;
typedef struct {
union {
@@ -35,7 +188,7 @@ typedef struct {
struct sbpciregs *pciregs;
} regs; /* Memory mapped register to the core */
- si_t *sih; /* System interconnect handle */
+ struct si_pub *sih; /* System interconnect handle */
struct pci_dev *dev;
u8 pciecap_lcreg_offset; /* PCIE capability LCreg offset in the config space */
bool pcie_pr42767;
@@ -69,8 +222,6 @@ static void pcie_war_noplldown(pcicore_info_t *pi);
static void pcie_war_polarity(pcicore_info_t *pi);
static void pcie_war_pci_setup(pcicore_info_t *pi);
-static bool pcicore_pmecap(pcicore_info_t *pi);
-
#define PCIE_ASPM(sih) ((PCIE_PUB(sih)) && (((sih)->buscorerev >= 3) && ((sih)->buscorerev <= 5)))
@@ -80,7 +231,7 @@ static bool pcicore_pmecap(pcicore_info_t *pi);
/* Initialize the PCI core. It's caller's responsibility to make sure that this is done
* only once
*/
-void *pcicore_init(si_t *sih, void *pdev, void *regs)
+void *pcicore_init(struct si_pub *sih, void *pdev, void *regs)
{
pcicore_info_t *pi;
@@ -178,7 +329,7 @@ pcicore_find_pci_capability(void *dev, u8 req_cap_id,
}
/* ***** Register Access API */
-uint
+static uint
pcie_readreg(sbpcieregs_t *pcieregs, uint addrtype,
uint offset)
{
@@ -202,7 +353,7 @@ pcie_readreg(sbpcieregs_t *pcieregs, uint addrtype,
return retval;
}
-uint
+static uint
pcie_writereg(sbpcieregs_t *pcieregs, uint addrtype,
uint offset, uint val)
{
@@ -327,7 +478,7 @@ pcie_mdiowrite(pcicore_info_t *pi, uint physmedia, uint regaddr, uint val)
}
/* ***** Support functions ***** */
-u8 pcie_clkreq(void *pch, u32 mask, u32 val)
+static u8 pcie_clkreq(void *pch, u32 mask, u32 val)
{
pcicore_info_t *pi = (pcicore_info_t *) pch;
u32 reg_val;
@@ -356,7 +507,7 @@ u8 pcie_clkreq(void *pch, u32 mask, u32 val)
static void pcie_extendL1timer(pcicore_info_t *pi, bool extend)
{
u32 w;
- si_t *sih = pi->sih;
+ struct si_pub *sih = pi->sih;
sbpcieregs_t *pcieregs = pi->regs.pcieregs;
if (!PCIE_PUB(sih) || sih->buscorerev < 7)
@@ -374,7 +525,7 @@ static void pcie_extendL1timer(pcicore_info_t *pi, bool extend)
/* centralized clkreq control policy */
static void pcie_clkreq_upd(pcicore_info_t *pi, uint state)
{
- si_t *sih = pi->sih;
+ struct si_pub *sih = pi->sih;
switch (state) {
case SI_DOATTACH:
@@ -440,7 +591,7 @@ static void pcie_war_polarity(pcicore_info_t *pi)
static void pcie_war_aspm_clkreq(pcicore_info_t *pi)
{
sbpcieregs_t *pcieregs = pi->regs.pcieregs;
- si_t *sih = pi->sih;
+ struct si_pub *sih = pi->sih;
u16 val16, *reg16;
u32 w;
@@ -535,7 +686,7 @@ static void pcie_war_noplldown(pcicore_info_t *pi)
/* Needs to happen when coming out of 'standby'/'hibernate' */
static void pcie_war_pci_setup(pcicore_info_t *pi)
{
- si_t *sih = pi->sih;
+ struct si_pub *sih = pi->sih;
sbpcieregs_t *pcieregs = pi->regs.pcieregs;
u32 w;
@@ -577,28 +728,11 @@ static void pcie_war_pci_setup(pcicore_info_t *pi)
pcie_misc_config_fixup(pi);
}
-void pcie_war_ovr_aspm_update(void *pch, u8 aspm)
-{
- pcicore_info_t *pi = (pcicore_info_t *) pch;
-
- if (!PCIE_ASPM(pi->sih))
- return;
-
- /* Validate */
- if (aspm > PCIE_ASPM_ENAB)
- return;
-
- pi->pcie_war_aspm_ovr = aspm;
-
- /* Update the current state */
- pcie_war_aspm_clkreq(pi);
-}
-
/* ***** Functions called during driver state changes ***** */
void pcicore_attach(void *pch, char *pvars, int state)
{
pcicore_info_t *pi = (pcicore_info_t *) pch;
- si_t *sih = pi->sih;
+ struct si_pub *sih = pi->sih;
/* Determine if this board needs override */
if (PCIE_ASPM(sih)) {
@@ -672,165 +806,52 @@ void pcicore_down(void *pch, int state)
pcie_extendL1timer(pi, false);
}
-/* ***** Wake-on-wireless-LAN (WOWL) support functions ***** */
-/* Just uses PCI config accesses to find out, when needed before sb_attach is done */
-bool pcicore_pmecap_fast(void *pch)
-{
- pcicore_info_t *pi = (pcicore_info_t *) pch;
- u8 cap_ptr;
- u32 pmecap;
-
- cap_ptr = pcicore_find_pci_capability(pi->dev, PCI_CAP_ID_PM, NULL,
- NULL);
-
- if (!cap_ptr)
- return false;
-
- pci_read_config_dword(pi->dev, cap_ptr, &pmecap);
-
- return (pmecap & (PCI_PM_CAP_PME_MASK << 16)) != 0;
-}
-
-/* return true if PM capability exists in the pci config space
- * Uses and caches the information using core handle
- */
-static bool pcicore_pmecap(pcicore_info_t *pi)
-{
- u8 cap_ptr;
- u32 pmecap;
-
- if (!pi->pmecap_offset) {
- cap_ptr = pcicore_find_pci_capability(pi->dev,
- PCI_CAP_ID_PM,
- NULL, NULL);
- if (!cap_ptr)
- return false;
-
- pi->pmecap_offset = cap_ptr;
-
- pci_read_config_dword(pi->dev, pi->pmecap_offset,
- &pmecap);
-
- /* At least one state can generate PME */
- pi->pmecap = (pmecap & (PCI_PM_CAP_PME_MASK << 16)) != 0;
- }
-
- return pi->pmecap;
-}
-
-/* Enable PME generation */
-void pcicore_pmeen(void *pch)
-{
- pcicore_info_t *pi = (pcicore_info_t *) pch;
- u32 w;
-
- /* if not pmecapable return */
- if (!pcicore_pmecap(pi))
- return;
-
- pci_read_config_dword(pi->dev, pi->pmecap_offset + PCI_PM_CTRL,
- &w);
- w |= (PCI_PM_CTRL_PME_ENABLE);
- pci_write_config_dword(pi->dev,
- pi->pmecap_offset + PCI_PM_CTRL, w);
-}
-
/*
- * Return true if PME status set
+ * precondition: current core is sii->buscoretype
*/
-bool pcicore_pmestat(void *pch)
+void pcicore_fixcfg(void *pch, void *regs)
{
pcicore_info_t *pi = (pcicore_info_t *) pch;
- u32 w;
-
- if (!pcicore_pmecap(pi))
- return false;
-
- pci_read_config_dword(pi->dev, pi->pmecap_offset + PCI_PM_CTRL,
- &w);
-
- return (w & PCI_PM_CTRL_PME_STATUS) == PCI_PM_CTRL_PME_STATUS;
+ struct si_info *sii = SI_INFO(pi->sih);
+ struct sbpciregs *pciregs = regs;
+ sbpcieregs_t *pcieregs = regs;
+ u16 val16, *reg16 = NULL;
+ uint pciidx;
+
+ /* check 'pi' is correct and fix it if not */
+ if (sii->pub.buscoretype == PCIE_CORE_ID) {
+ reg16 = &pcieregs->sprom[SRSH_PI_OFFSET];
+ } else if (sii->pub.buscoretype == PCI_CORE_ID) {
+ reg16 = &pciregs->sprom[SRSH_PI_OFFSET];
+ }
+ pciidx = ai_coreidx(&sii->pub);
+ val16 = R_REG(reg16);
+ if (((val16 & SRSH_PI_MASK) >> SRSH_PI_SHIFT) != (u16) pciidx) {
+ val16 =
+ (u16) (pciidx << SRSH_PI_SHIFT) | (val16 &
+ ~SRSH_PI_MASK);
+ W_REG(reg16, val16);
+ }
}
-/* Disable PME generation, clear the PME status bit if set
+/*
+ * precondition: current core is pci core
*/
-void pcicore_pmeclr(void *pch)
+void pcicore_pci_setup(void *pch, void *regs)
{
pcicore_info_t *pi = (pcicore_info_t *) pch;
+ struct sbpciregs *pciregs = regs;
u32 w;
- if (!pcicore_pmecap(pi))
- return;
-
- pci_read_config_dword(pi->dev, pi->pmecap_offset + PCI_PM_CTRL,
- &w);
-
- PCI_ERROR(("pcicore_pci_pmeclr PMECSR : 0x%x\n", w));
-
- /* PMESTAT is cleared by writing 1 to it */
- w &= ~(PCI_PM_CTRL_PME_ENABLE);
-
- pci_write_config_dword(pi->dev,
- pi->pmecap_offset + PCI_PM_CTRL, w);
-}
-
-u32 pcie_lcreg(void *pch, u32 mask, u32 val)
-{
- pcicore_info_t *pi = (pcicore_info_t *) pch;
- u8 offset;
- u32 tmpval;
-
- offset = pi->pciecap_lcreg_offset;
- if (!offset)
- return 0;
+ OR_REG(&pciregs->sbtopci2,
+ (SBTOPCI_PREF | SBTOPCI_BURST));
- /* set operation */
- if (mask)
- pci_write_config_dword(pi->dev, offset, val);
-
- pci_read_config_dword(pi->dev, offset, &tmpval);
- return tmpval;
-}
-
-u32
-pcicore_pciereg(void *pch, u32 offset, u32 mask, u32 val, uint type)
-{
- u32 reg_val = 0;
- pcicore_info_t *pi = (pcicore_info_t *) pch;
- sbpcieregs_t *pcieregs = pi->regs.pcieregs;
-
- if (mask) {
- PCI_ERROR(("PCIEREG: 0x%x writeval 0x%x\n", offset, val));
- pcie_writereg(pcieregs, type, offset, val);
+ if (SI_INFO(pi->sih)->pub.buscorerev >= 11) {
+ OR_REG(&pciregs->sbtopci2,
+ SBTOPCI_RC_READMULTI);
+ w = R_REG(&pciregs->clkrun);
+ W_REG(&pciregs->clkrun,
+ (w | PCI_CLKRUN_DSBL));
+ w = R_REG(&pciregs->clkrun);
}
-
- /* Should not read register 0x154 */
- if (pi->sih->buscorerev <= 5 && offset == PCIE_DLLP_PCIE11
- && type == PCIE_PCIEREGS)
- return reg_val;
-
- reg_val = pcie_readreg(pcieregs, type, offset);
- PCI_ERROR(("PCIEREG: 0x%x readval is 0x%x\n", offset, reg_val));
-
- return reg_val;
-}
-
-u32
-pcicore_pcieserdesreg(void *pch, u32 mdioslave, u32 offset, u32 mask,
- u32 val)
-{
- u32 reg_val = 0;
- pcicore_info_t *pi = (pcicore_info_t *) pch;
-
- if (mask) {
- PCI_ERROR(("PCIEMDIOREG: 0x%x writeval 0x%x\n", offset, val));
- pcie_mdiowrite(pi, mdioslave, offset, val);
- }
-
- if (pcie_mdioread(pi, mdioslave, offset, &reg_val))
- reg_val = 0xFFFFFFFF;
- PCI_ERROR(("PCIEMDIOREG: dev 0x%x offset 0x%x read 0x%x\n", mdioslave,
- offset, reg_val));
-
- return reg_val;
}
diff --git a/drivers/staging/brcm80211/brcmsmac/nicpci.h b/drivers/staging/brcm80211/brcmsmac/nicpci.h
new file mode 100644
index 0000000000000..c44b70512c4fc
--- /dev/null
+++ b/drivers/staging/brcm80211/brcmsmac/nicpci.h
@@ -0,0 +1,85 @@
+/*
+ * Copyright (c) 2010 Broadcom Corporation
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _BRCM_NICPCI_H_
+#define _BRCM_NICPCI_H_
+
+/* PCI configuration address space size */
+#define PCI_SZPCR 256
+
+/* Brcm PCI configuration registers */
+/* backplane address space accessed by BAR0 */
+#define PCI_BAR0_WIN 0x80
+/* sprom property control */
+#define PCI_SPROM_CONTROL 0x88
+/* mask of PCI and other cores interrupts */
+#define PCI_INT_MASK 0x94
+/* backplane core interrupt mask bits offset */
+#define PCI_SBIM_SHIFT 8
+/* backplane address space accessed by second 4KB of BAR0 */
+#define PCI_BAR0_WIN2 0xac
+/* pci config space gpio input (>=rev3) */
+#define PCI_GPIO_IN 0xb0
+/* pci config space gpio output (>=rev3) */
+#define PCI_GPIO_OUT 0xb4
+/* pci config space gpio output enable (>=rev3) */
+#define PCI_GPIO_OUTEN 0xb8
+
+/* bar0 + 4K accesses external sprom */
+#define PCI_BAR0_SPROM_OFFSET (4 * 1024)
+/* bar0 + 6K accesses pci core registers */
+#define PCI_BAR0_PCIREGS_OFFSET (6 * 1024)
+/*
+ * pci core SB registers are at the end of the
+ * 8KB window, so their address is the "regular"
+ * address plus 4K
+ */
+#define PCI_BAR0_PCISBR_OFFSET (4 * 1024)
+/* bar0 window size Match with corerev 13 */
+#define PCI_BAR0_WINSZ (16 * 1024)
+/* On pci corerev >= 13 and all pcie, the bar0 is now 16KB and it maps: */
+/* bar0 + 8K accesses pci/pcie core registers */
+#define PCI_16KB0_PCIREGS_OFFSET (8 * 1024)
+/* bar0 + 12K accesses chipc core registers */
+#define PCI_16KB0_CCREGS_OFFSET (12 * 1024)
+
+#define PCI_CLKRUN_DSBL 0x8000 /* Bit 15 forceClkrun */
+
+/* Sonics to PCI translation types */
+#define SBTOPCI_PREF 0x4 /* prefetch enable */
+#define SBTOPCI_BURST 0x8 /* burst enable */
+#define SBTOPCI_RC_READMULTI 0x20 /* memory read multiple */
+
+/* PCI core index in SROM shadow area */
+#define SRSH_PI_OFFSET 0 /* first word */
+#define SRSH_PI_MASK 0xf000 /* bit 15:12 */
+#define SRSH_PI_SHIFT 12 /* bit 15:12 */
+
+struct si_pub;
+
+extern void *pcicore_init(struct si_pub *sih, void *pdev, void *regs);
+extern void pcicore_deinit(void *pch);
+extern void pcicore_attach(void *pch, char *pvars, int state);
+extern void pcicore_hwup(void *pch);
+extern void pcicore_up(void *pch, int state);
+extern void pcicore_sleep(void *pch);
+extern void pcicore_down(void *pch, int state);
+extern u8 pcicore_find_pci_capability(void *dev, u8 req_cap_id,
+ unsigned char *buf, u32 *buflen);
+extern void pcicore_fixcfg(void *pch, void *regs);
+extern void pcicore_pci_setup(void *pch, void *regs);
+
+#endif /* _BRCM_NICPCI_H_ */
diff --git a/drivers/staging/brcm80211/brcmsmac/nvram.c b/drivers/staging/brcm80211/brcmsmac/nvram.c
deleted file mode 100644
index 085ec0b9224f7..0000000000000
--- a/drivers/staging/brcm80211/brcmsmac/nvram.c
+++ /dev/null
@@ -1,215 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#include <linux/slab.h>
-#include <linux/string.h>
-#include <bcmdefs.h>
-#include <bcmutils.h>
-#include <bcmnvram.h>
-#include <sbchipc.h>
-#include <bcmdevs.h>
-#include <hndsoc.h>
-
-#define NVR_MSG(x)
-
-typedef struct _vars {
- struct _vars *next;
- int bufsz; /* allocated size */
- int size; /* actual vars size */
- char *vars;
-} vars_t;
-
-#define VARS_T_OH sizeof(vars_t)
-
-static vars_t *vars;
-
-#define NVRAM_FILE 1
-
-static char *findvar(char *vars, char *lim, const char *name);
-
-int nvram_init(void)
-{
-
- /* Make sure we read nvram in flash just once before freeing the memory */
- if (vars != NULL) {
- NVR_MSG(("nvram_init: called again without calling nvram_exit()\n"));
- return 0;
- }
- return 0;
-}
-
-int nvram_append(char *varlst, uint varsz)
-{
- uint bufsz = VARS_T_OH;
- vars_t *new;
-
- new = kmalloc(bufsz, GFP_ATOMIC);
- if (new == NULL)
- return -ENOMEM;
-
- new->vars = varlst;
- new->bufsz = bufsz;
- new->size = varsz;
- new->next = vars;
- vars = new;
-
- return 0;
-}
-
-void nvram_exit(void)
-{
- vars_t *this, *next;
-
- this = vars;
- if (this)
- kfree(this->vars);
-
- while (this) {
- next = this->next;
- kfree(this);
- this = next;
- }
- vars = NULL;
-}
-
-static char *findvar(char *vars, char *lim, const char *name)
-{
- char *s;
- int len;
-
- len = strlen(name);
-
- for (s = vars; (s < lim) && *s;) {
- if ((memcmp(s, name, len) == 0) && (s[len] == '='))
- return &s[len + 1];
-
- while (*s++)
- ;
- }
-
- return NULL;
-}
-
-/*
- * Search the name=value vars for a specific one and return its value.
- * Returns NULL if not found.
- */
-char *getvar(char *vars, const char *name)
-{
- char *s;
- int len;
-
- if (!name)
- return NULL;
-
- len = strlen(name);
- if (len == 0)
- return NULL;
-
- /* first look in vars[] */
- for (s = vars; s && *s;) {
- if ((memcmp(s, name, len) == 0) && (s[len] == '='))
- return &s[len + 1];
-
- while (*s++)
- ;
- }
- /* then query nvram */
- return nvram_get(name);
-}
-
-/*
- * Search the vars for a specific one and return its value as
- * an integer. Returns 0 if not found.
- */
-int getintvar(char *vars, const char *name)
-{
- char *val;
-
- val = getvar(vars, name);
- if (val == NULL)
- return 0;
-
- return simple_strtoul(val, NULL, 0);
-}
-
-char *nvram_get(const char *name)
-{
- char *v = NULL;
- vars_t *cur;
-
- for (cur = vars; cur; cur = cur->next) {
- v = findvar(cur->vars, cur->vars + cur->size, name);
- if (v)
- break;
- }
-
- return v;
-}
-
-int nvram_set(const char *name, const char *value)
-{
- return 0;
-}
-
-int nvram_unset(const char *name)
-{
- return 0;
-}
-
-int nvram_reset(void)
-{
- return 0;
-}
-
-int nvram_commit(void)
-{
- return 0;
-}
-
-int nvram_getall(char *buf, int count)
-{
- int len, resid = count;
- vars_t *this;
-
- this = vars;
- while (this) {
- char *from, *lim, *to;
- int acc;
-
- from = this->vars;
- lim = (char *)(this->vars + this->size);
- to = buf;
- acc = 0;
- while ((from < lim) && (*from)) {
- len = strlen(from) + 1;
- if (resid < (acc + len))
- return -EOVERFLOW;
- memcpy(to, from, len);
- acc += len;
- from += len;
- to += len;
- }
-
- resid -= acc;
- buf += acc;
- this = this->next;
- }
- if (resid < 1)
- return -EOVERFLOW;
- *buf = '\0';
- return 0;
-}
diff --git a/drivers/staging/brcm80211/brcmsmac/bcmotp.c b/drivers/staging/brcm80211/brcmsmac/otp.c
index d09628b5a88e8..d21d6cadb9d29 100644
--- a/drivers/staging/brcm80211/brcmsmac/bcmotp.c
+++ b/drivers/staging/brcm80211/brcmsmac/otp.c
@@ -21,46 +21,58 @@
#include <linux/pci.h>
#include <linux/crc-ccitt.h>
-#include <bcmdefs.h>
-#include <bcmdevs.h>
-#include <bcmutils.h>
+#include <defs.h>
+#include <brcm_hw_ids.h>
+#include "types.h"
+#include <brcmu_utils.h>
#include <aiutils.h>
-#include <hndsoc.h>
-#include <sbchipc.h>
-#include <bcmotp.h>
+#include <soc.h>
+#include <chipcommon.h>
+#include "otp.h"
+
+#define OTPS_GUP_MASK 0x00000f00
+#define OTPS_GUP_SHIFT 8
+#define OTPS_GUP_HW 0x00000100 /* h/w subregion is programmed */
+#define OTPS_GUP_SW 0x00000200 /* s/w subregion is programmed */
+#define OTPS_GUP_CI 0x00000400 /* chipid/pkgopt subregion is programmed */
+#define OTPS_GUP_FUSE 0x00000800 /* fuse subregion is programmed */
+
+/* Fields in otpprog in rev >= 21 */
+#define OTPP_COL_MASK 0x000000ff
+#define OTPP_COL_SHIFT 0
+#define OTPP_ROW_MASK 0x0000ff00
+#define OTPP_ROW_SHIFT 8
+#define OTPP_OC_MASK 0x0f000000
+#define OTPP_OC_SHIFT 24
+#define OTPP_READERR 0x10000000
+#define OTPP_VALUE_MASK 0x20000000
+#define OTPP_VALUE_SHIFT 29
+#define OTPP_START_BUSY 0x80000000
+#define OTPP_READ 0x40000000
+
+/* Opcodes for OTPP_OC field */
+#define OTPPOC_READ 0
+#define OTPPOC_BIT_PROG 1
+#define OTPPOC_VERIFY 3
+#define OTPPOC_INIT 4
+#define OTPPOC_SET 5
+#define OTPPOC_RESET 6
+#define OTPPOC_OCST 7
+#define OTPPOC_ROW_LOCK 8
+#define OTPPOC_PRESCN_TEST 9
-/*
- * There are two different OTP controllers so far:
- * 1. new IPX OTP controller: chipc 21, >=23
- * 2. older HND OTP controller: chipc 12, 17, 22
- *
- * Define BCMHNDOTP to include support for the HND OTP controller.
- * Define BCMIPXOTP to include support for the IPX OTP controller.
- *
- * NOTE 1: More than one may be defined
- * NOTE 2: If none are defined, the default is to include them all.
- */
-
-#if !defined(BCMHNDOTP) && !defined(BCMIPXOTP)
-#define BCMHNDOTP 1
-#define BCMIPXOTP 1
-#endif
-
-#define OTPTYPE_HND(ccrev) ((ccrev) < 21 || (ccrev) == 22)
#define OTPTYPE_IPX(ccrev) ((ccrev) == 21 || (ccrev) >= 23)
#define OTPP_TRIES 10000000 /* # of tries for OTPP */
-#ifdef BCMIPXOTP
#define MAXNUMRDES 9 /* Maximum OTP redundancy entries */
-#endif
/* OTP common function type */
typedef int (*otp_status_t) (void *oh);
typedef int (*otp_size_t) (void *oh);
-typedef void *(*otp_init_t) (si_t *sih);
+typedef void *(*otp_init_t) (struct si_pub *sih);
typedef u16(*otp_read_bit_t) (void *oh, chipcregs_t *cc, uint off);
-typedef int (*otp_read_region_t) (si_t *sih, int region, u16 *data,
+typedef int (*otp_read_region_t) (struct si_pub *sih, int region, u16 *data,
uint *wlen);
typedef int (*otp_nvread_t) (void *oh, char *data, uint *len);
@@ -77,9 +89,8 @@ typedef struct otp_fn_s {
typedef struct {
uint ccrev; /* chipc revision */
otp_fn_t *fn; /* OTP functions */
- si_t *sih; /* Saved sb handle */
+ struct si_pub *sih; /* Saved sb handle */
-#ifdef BCMIPXOTP
/* IPX OTP section */
u16 wsize; /* Size of otp in words */
u16 rows; /* Geometry */
@@ -94,15 +105,6 @@ typedef struct {
u16 fbase; /* fuse subregion offset */
u16 flim; /* fuse subregion boundary */
int otpgu_base; /* offset to General Use Region */
-#endif /* BCMIPXOTP */
-
-#ifdef BCMHNDOTP
- /* HND OTP section */
- uint size; /* Size of otp in bytes */
- uint hwprot; /* Hardware protection bits */
- uint signvalid; /* Signature valid bits */
- int boundary; /* hw/sw boundary */
-#endif /* BCMHNDOTP */
} otpinfo_t;
static otpinfo_t otpinfo;
@@ -120,8 +122,6 @@ static otpinfo_t otpinfo;
*
*/
-#ifdef BCMIPXOTP
-
#define HWSW_RGN(rgn) (((rgn) == OTP_HW_RGN) ? "h/w" : "s/w")
/* OTP layout */
@@ -214,7 +214,7 @@ static u16 ipxotp_read_bit(void *oh, chipcregs_t *cc, uint off)
/* Calculate max HW/SW region byte size by subtracting fuse region and checksum size,
* osizew is oi->wsize (OTP size - GU size) in words
*/
-static int ipxotp_max_rgnsz(si_t *sih, int osizew)
+static int ipxotp_max_rgnsz(struct si_pub *sih, int osizew)
{
int ret = 0;
@@ -304,7 +304,7 @@ static void _ipxotp_init(otpinfo_t *oi, chipcregs_t *cc)
oi->flim = oi->wsize;
}
-static void *ipxotp_init(si_t *sih)
+static void *ipxotp_init(struct si_pub *sih)
{
uint idx;
chipcregs_t *cc;
@@ -466,374 +466,7 @@ static otp_fn_t ipxotp_fn = {
(otp_status_t) ipxotp_status
};
-#endif /* BCMIPXOTP */
-
-/*
- * HND OTP Code
- *
- * Exported functions:
- * hndotp_status()
- * hndotp_size()
- * hndotp_init()
- * hndotp_read_bit()
- * hndotp_read_region()
- * hndotp_nvread()
- *
- */
-
-#ifdef BCMHNDOTP
-
-/* Fields in otpstatus */
-#define OTPS_PROGFAIL 0x80000000
-#define OTPS_PROTECT 0x00000007
-#define OTPS_HW_PROTECT 0x00000001
-#define OTPS_SW_PROTECT 0x00000002
-#define OTPS_CID_PROTECT 0x00000004
-#define OTPS_RCEV_MSK 0x00003f00
-#define OTPS_RCEV_SHIFT 8
-
-/* Fields in the otpcontrol register */
-#define OTPC_RECWAIT 0xff000000
-#define OTPC_PROGWAIT 0x00ffff00
-#define OTPC_PRW_SHIFT 8
-#define OTPC_MAXFAIL 0x00000038
-#define OTPC_VSEL 0x00000006
-#define OTPC_SELVL 0x00000001
-
-/* OTP regions (Word offsets from otp size) */
-#define OTP_SWLIM_OFF (-4)
-#define OTP_CIDBASE_OFF 0
-#define OTP_CIDLIM_OFF 4
-
-/* Predefined OTP words (Word offset from otp size) */
-#define OTP_BOUNDARY_OFF (-4)
-#define OTP_HWSIGN_OFF (-3)
-#define OTP_SWSIGN_OFF (-2)
-#define OTP_CIDSIGN_OFF (-1)
-#define OTP_CID_OFF 0
-#define OTP_PKG_OFF 1
-#define OTP_FID_OFF 2
-#define OTP_RSV_OFF 3
-#define OTP_LIM_OFF 4
-#define OTP_RD_OFF 4 /* Redundancy row starts here */
-#define OTP_RC0_OFF 28 /* Redundancy control word 1 */
-#define OTP_RC1_OFF 32 /* Redundancy control word 2 */
-#define OTP_RC_LIM_OFF 36 /* Redundancy control word end */
-
-#define OTP_HW_REGION OTPS_HW_PROTECT
-#define OTP_SW_REGION OTPS_SW_PROTECT
-#define OTP_CID_REGION OTPS_CID_PROTECT
-
-#if OTP_HW_REGION != OTP_HW_RGN
-#error "incompatible OTP_HW_RGN"
-#endif
-#if OTP_SW_REGION != OTP_SW_RGN
-#error "incompatible OTP_SW_RGN"
-#endif
-#if OTP_CID_REGION != OTP_CI_RGN
-#error "incompatible OTP_CI_RGN"
-#endif
-
-/* Redundancy entry definitions */
-#define OTP_RCE_ROW_SZ 6
-#define OTP_RCE_SIGN_MASK 0x7fff
-#define OTP_RCE_ROW_MASK 0x3f
-#define OTP_RCE_BITS 21
-#define OTP_RCE_SIGN_SZ 15
-#define OTP_RCE_BIT0 1
-
-#define OTP_WPR 4
-#define OTP_SIGNATURE 0x578a
-#define OTP_MAGIC 0x4e56
-
-static int hndotp_status(void *oh)
-{
- otpinfo_t *oi = (otpinfo_t *) oh;
- return (int)(oi->hwprot | oi->signvalid);
-}
-
-static int hndotp_size(void *oh)
-{
- otpinfo_t *oi = (otpinfo_t *) oh;
- return (int)(oi->size);
-}
-
-static u16 hndotp_otpr(void *oh, chipcregs_t *cc, uint wn)
-{
- volatile u16 *ptr;
-
- ptr = (volatile u16 *)((volatile char *)cc + CC_SROM_OTP);
- return R_REG(&ptr[wn]);
-}
-
-static u16 hndotp_otproff(void *oh, chipcregs_t *cc, int woff)
-{
- otpinfo_t *oi = (otpinfo_t *) oh;
- volatile u16 *ptr;
-
- ptr = (volatile u16 *)((volatile char *)cc + CC_SROM_OTP);
-
- return R_REG(&ptr[(oi->size / 2) + woff]);
-}
-
-static u16 hndotp_read_bit(void *oh, chipcregs_t *cc, uint idx)
-{
- uint k, row, col;
- u32 otpp, st;
-
- row = idx / 65;
- col = idx % 65;
-
- otpp = OTPP_START_BUSY | OTPP_READ |
- ((row << OTPP_ROW_SHIFT) & OTPP_ROW_MASK) | (col & OTPP_COL_MASK);
-
- W_REG(&cc->otpprog, otpp);
- st = R_REG(&cc->otpprog);
- for (k = 0;
- ((st & OTPP_START_BUSY) == OTPP_START_BUSY) && (k < OTPP_TRIES);
- k++)
- st = R_REG(&cc->otpprog);
-
- if (k >= OTPP_TRIES) {
- return 0xffff;
- }
- if (st & OTPP_READERR) {
- return 0xffff;
- }
- st = (st & OTPP_VALUE_MASK) >> OTPP_VALUE_SHIFT;
- return (u16) st;
-}
-
-static void *hndotp_init(si_t *sih)
-{
- uint idx;
- chipcregs_t *cc;
- otpinfo_t *oi;
- u32 cap = 0, clkdiv, otpdiv = 0;
- void *ret = NULL;
-
- oi = &otpinfo;
-
- idx = ai_coreidx(sih);
-
- /* Check for otp */
- cc = ai_setcoreidx(sih, SI_CC_IDX);
- if (cc != NULL) {
- cap = R_REG(&cc->capabilities);
- if ((cap & CC_CAP_OTPSIZE) == 0) {
- /* Nothing there */
- goto out;
- }
-
- if (!((oi->ccrev == 12) || (oi->ccrev == 17)
- || (oi->ccrev == 22)))
- return NULL;
-
- /* Read the OTP byte size. chipcommon rev >= 18 has RCE so the size is
- * 8 row (64 bytes) smaller
- */
- oi->size =
- 1 << (((cap & CC_CAP_OTPSIZE) >> CC_CAP_OTPSIZE_SHIFT)
- + CC_CAP_OTPSIZE_BASE);
- if (oi->ccrev >= 18)
- oi->size -= ((OTP_RC0_OFF - OTP_BOUNDARY_OFF) * 2);
-
- oi->hwprot = (int)(R_REG(&cc->otpstatus) & OTPS_PROTECT);
- oi->boundary = -1;
-
- /* Check the region signature */
- if (hndotp_otproff(oi, cc, OTP_HWSIGN_OFF) == OTP_SIGNATURE) {
- oi->signvalid |= OTP_HW_REGION;
- oi->boundary = hndotp_otproff(oi, cc, OTP_BOUNDARY_OFF);
- }
-
- if (hndotp_otproff(oi, cc, OTP_SWSIGN_OFF) == OTP_SIGNATURE)
- oi->signvalid |= OTP_SW_REGION;
-
- if (hndotp_otproff(oi, cc, OTP_CIDSIGN_OFF) == OTP_SIGNATURE)
- oi->signvalid |= OTP_CID_REGION;
-
- /* Set OTP clkdiv for stability */
- if (oi->ccrev == 22)
- otpdiv = 12;
-
- if (otpdiv) {
- clkdiv = R_REG(&cc->clkdiv);
- clkdiv =
- (clkdiv & ~CLKD_OTP) | (otpdiv << CLKD_OTP_SHIFT);
- W_REG(&cc->clkdiv, clkdiv);
- }
- udelay(10);
-
- ret = (void *)oi;
- }
-
- out: /* All done */
- ai_setcoreidx(sih, idx);
-
- return ret;
-}
-
-static int hndotp_read_region(void *oh, int region, u16 *data, uint *wlen)
-{
- otpinfo_t *oi = (otpinfo_t *) oh;
- u32 idx, st;
- chipcregs_t *cc;
- int i;
-
-
- if (region != OTP_HW_REGION) {
- /*
- * Only support HW region
- * (no active chips use HND OTP SW region)
- * */
- return -ENOTSUPP;
- }
-
- /* Region empty? */
- st = oi->hwprot | oi->signvalid;
- if ((st & region) == 0)
- return -ENODATA;
-
- *wlen =
- ((int)*wlen < oi->boundary / 2) ? *wlen : (uint) oi->boundary / 2;
-
- idx = ai_coreidx(oi->sih);
- cc = ai_setcoreidx(oi->sih, SI_CC_IDX);
-
- for (i = 0; i < (int)*wlen; i++)
- data[i] = hndotp_otpr(oh, cc, i);
-
- ai_setcoreidx(oi->sih, idx);
-
- return 0;
-}
-
-static int hndotp_nvread(void *oh, char *data, uint *len)
-{
- int rc = 0;
- otpinfo_t *oi = (otpinfo_t *) oh;
- u32 base, bound, lim = 0, st;
- int i, chunk, gchunks, tsz = 0;
- u32 idx;
- chipcregs_t *cc;
- uint offset;
- u16 *rawotp = NULL;
-
- /* save the orig core */
- idx = ai_coreidx(oi->sih);
- cc = ai_setcoreidx(oi->sih, SI_CC_IDX);
-
- st = hndotp_status(oh);
- if (!(st & (OTP_HW_REGION | OTP_SW_REGION))) {
- rc = -1;
- goto out;
- }
-
- /* Read the whole otp so we can easily manipulate it */
- lim = hndotp_size(oh);
- rawotp = kmalloc(lim, GFP_ATOMIC);
- if (rawotp == NULL) {
- rc = -2;
- goto out;
- }
- for (i = 0; i < (int)(lim / 2); i++)
- rawotp[i] = hndotp_otpr(oh, cc, i);
-
- if ((st & OTP_HW_REGION) == 0) {
- /* This could be a programming failure in the first
- * chunk followed by one or more good chunks
- */
- for (i = 0; i < (int)(lim / 2); i++)
- if (rawotp[i] == OTP_MAGIC)
- break;
-
- if (i < (int)(lim / 2)) {
- base = i;
- bound = (i * 2) + rawotp[i + 1];
- } else {
- rc = -3;
- goto out;
- }
- } else {
- bound = rawotp[(lim / 2) + OTP_BOUNDARY_OFF];
-
- /* There are two cases: 1) The whole otp is used as nvram
- * and 2) There is a hardware header followed by nvram.
- */
- if (rawotp[0] == OTP_MAGIC) {
- base = 0;
- } else
- base = bound;
- }
-
- /* Find and copy the data */
-
- chunk = 0;
- gchunks = 0;
- i = base / 2;
- offset = 0;
- while ((i < (int)(lim / 2)) && (rawotp[i] == OTP_MAGIC)) {
- int dsz, rsz = rawotp[i + 1];
-
- if (((i * 2) + rsz) >= (int)lim) {
- /* Bad length, try to find another chunk anyway */
- rsz = 6;
- }
- if (crc_ccitt(CRC16_INIT_VALUE, (u8 *) &rawotp[i], rsz) ==
- CRC16_GOOD_VALUE) {
- /* Good crc, copy the vars */
- gchunks++;
- dsz = rsz - 6;
- tsz += dsz;
- if (offset + dsz >= *len) {
- goto out;
- }
- memcpy(&data[offset], &rawotp[i + 2], dsz);
- offset += dsz;
- /* Remove extra null characters at the end */
- while (offset > 1 &&
- data[offset - 1] == 0 && data[offset - 2] == 0)
- offset--;
- i += rsz / 2;
- } else {
- /* bad length or crc didn't check, try to find the next set */
- if (rawotp[i + (rsz / 2)] == OTP_MAGIC) {
- /* Assume length is good */
- i += rsz / 2;
- } else {
- while (++i < (int)(lim / 2))
- if (rawotp[i] == OTP_MAGIC)
- break;
- }
- }
- chunk++;
- }
-
- *len = offset;
-
- out:
- kfree(rawotp);
- ai_setcoreidx(oi->sih, idx);
-
- return rc;
-}
-
-static otp_fn_t hndotp_fn = {
- (otp_size_t) hndotp_size,
- (otp_read_bit_t) hndotp_read_bit,
-
- (otp_init_t) hndotp_init,
- (otp_read_region_t) hndotp_read_region,
- (otp_nvread_t) hndotp_nvread,
-
- (otp_status_t) hndotp_status
-};
-
-#endif /* BCMHNDOTP */
-
/*
- * Common Code: Compiled for IPX / HND / AUTO
* otp_status()
* otp_size()
* otp_read_bit()
@@ -866,7 +499,7 @@ u16 otp_read_bit(void *oh, uint offset)
return readBit;
}
-void *otp_init(si_t *sih)
+void *otp_init(struct si_pub *sih)
{
otpinfo_t *oi;
void *ret = NULL;
@@ -876,15 +509,8 @@ void *otp_init(si_t *sih)
oi->ccrev = sih->ccrev;
-#ifdef BCMIPXOTP
if (OTPTYPE_IPX(oi->ccrev))
oi->fn = &ipxotp_fn;
-#endif
-
-#ifdef BCMHNDOTP
- if (OTPTYPE_HND(oi->ccrev))
- oi->fn = &hndotp_fn;
-#endif
if (oi->fn == NULL) {
return NULL;
@@ -898,7 +524,7 @@ void *otp_init(si_t *sih)
}
int
-otp_read_region(si_t *sih, int region, u16 *data,
+otp_read_region(struct si_pub *sih, int region, u16 *data,
uint *wlen) {
bool wasup = false;
void *oh;
diff --git a/drivers/staging/brcm80211/include/bcmotp.h b/drivers/staging/brcm80211/brcmsmac/otp.h
index 5803accaa4790..c1eb3477baba7 100644
--- a/drivers/staging/brcm80211/include/bcmotp.h
+++ b/drivers/staging/brcm80211/brcmsmac/otp.h
@@ -14,8 +14,8 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#ifndef _bcmotp_h_
-#define _bcmotp_h_
+#ifndef _BRCM_OTP_H_
+#define _BRCM_OTP_H_
/* OTP regions */
#define OTP_HW_RGN 1
@@ -37,8 +37,9 @@
extern int otp_status(void *oh);
extern int otp_size(void *oh);
extern u16 otp_read_bit(void *oh, uint offset);
-extern void *otp_init(si_t *sih);
-extern int otp_read_region(si_t *sih, int region, u16 *data, uint *wlen);
+extern void *otp_init(struct si_pub *sih);
+extern int otp_read_region(struct si_pub *sih, int region, u16 *data,
+ uint *wlen);
extern int otp_nvread(void *oh, char *data, uint *len);
-#endif /* _bcmotp_h_ */
+#endif /* _BRCM_OTP_H_ */
diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c b/drivers/staging/brcm80211/brcmsmac/phy/phy_cmn.c
index 6cba4dfbc3ddd..0185788c6bd26 100644
--- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c
+++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_cmn.c
@@ -14,8 +14,6 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#include <wlc_cfg.h>
-
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/bitops.h>
@@ -23,16 +21,16 @@
#include <linux/module.h>
#include <linux/pci.h>
-#include <bcmdefs.h>
-#include <bcmnvram.h>
-#include <sbchipc.h>
-#include <bcmdevs.h>
-#include <sbhnddma.h>
+#include <defs.h>
+#include <chipcommon.h>
+#include <brcm_hw_ids.h>
+#include <dma.h>
-#include <wlc_phy_int.h>
-#include <wlc_phyreg_n.h>
-#include <wlc_phy_radio.h>
-#include <wlc_phy_lcn.h>
+#include <types.h>
+#include <phy_int.h>
+#include <phyreg_n.h>
+#include <phy_radio.h>
+#include <phy_lcn.h>
u32 phyhal_msg_level = PHYHAL_ERROR;
@@ -172,7 +170,7 @@ char *phy_getvar(phy_info_t *pi, const char *name)
;
}
- return nvram_get(name);
+ return NULL;
}
int phy_getintvar(phy_info_t *pi, const char *name)
@@ -247,16 +245,10 @@ u16 read_radio_reg(phy_info_t *pi, u16 addr)
if ((D11REV_GE(pi->sh->corerev, 24)) ||
(D11REV_IS(pi->sh->corerev, 22)
&& (pi->pubpi.phy_type != PHY_TYPE_SSN))) {
- W_REG(&pi->regs->radioregaddr, addr);
-#ifdef __mips__
- (void)R_REG(&pi->regs->radioregaddr);
-#endif
+ W_REG_FLUSH(&pi->regs->radioregaddr, addr);
data = R_REG(&pi->regs->radioregdata);
} else {
- W_REG(&pi->regs->phy4waddr, addr);
-#ifdef __mips__
- (void)R_REG(&pi->regs->phy4waddr);
-#endif
+ W_REG_FLUSH(&pi->regs->phy4waddr, addr);
#ifdef __ARM_ARCH_4T__
__asm__(" .align 4 ");
@@ -281,16 +273,10 @@ void write_radio_reg(phy_info_t *pi, u16 addr, u16 val)
(D11REV_IS(pi->sh->corerev, 22)
&& (pi->pubpi.phy_type != PHY_TYPE_SSN))) {
- W_REG(&pi->regs->radioregaddr, addr);
-#ifdef __mips__
- (void)R_REG(&pi->regs->radioregaddr);
-#endif
+ W_REG_FLUSH(&pi->regs->radioregaddr, addr);
W_REG(&pi->regs->radioregdata, val);
} else {
- W_REG(&pi->regs->phy4waddr, addr);
-#ifdef __mips__
- (void)R_REG(&pi->regs->phy4waddr);
-#endif
+ W_REG_FLUSH(&pi->regs->phy4waddr, addr);
W_REG(&pi->regs->phy4wdatalo, val);
}
@@ -312,29 +298,17 @@ static u32 read_radio_id(phy_info_t *pi)
if (D11REV_GE(pi->sh->corerev, 24)) {
u32 b0, b1, b2;
- W_REG(&pi->regs->radioregaddr, 0);
-#ifdef __mips__
- (void)R_REG(&pi->regs->radioregaddr);
-#endif
+ W_REG_FLUSH(&pi->regs->radioregaddr, 0);
b0 = (u32) R_REG(&pi->regs->radioregdata);
- W_REG(&pi->regs->radioregaddr, 1);
-#ifdef __mips__
- (void)R_REG(&pi->regs->radioregaddr);
-#endif
+ W_REG_FLUSH(&pi->regs->radioregaddr, 1);
b1 = (u32) R_REG(&pi->regs->radioregdata);
- W_REG(&pi->regs->radioregaddr, 2);
-#ifdef __mips__
- (void)R_REG(&pi->regs->radioregaddr);
-#endif
+ W_REG_FLUSH(&pi->regs->radioregaddr, 2);
b2 = (u32) R_REG(&pi->regs->radioregdata);
id = ((b0 & 0xf) << 28) | (((b2 << 8) | b1) << 12) | ((b0 >> 4)
& 0xf);
} else {
- W_REG(&pi->regs->phy4waddr, RADIO_IDCODE);
-#ifdef __mips__
- (void)R_REG(&pi->regs->phy4waddr);
-#endif
+ W_REG_FLUSH(&pi->regs->phy4waddr, RADIO_IDCODE);
id = (u32) R_REG(&pi->regs->phy4wdatalo);
id |= (u32) R_REG(&pi->regs->phy4wdatahi) << 16;
}
@@ -397,10 +371,7 @@ u16 read_phy_reg(phy_info_t *pi, u16 addr)
regs = pi->regs;
- W_REG(&regs->phyregaddr, addr);
-#ifdef __mips__
- (void)R_REG(&regs->phyregaddr);
-#endif
+ W_REG_FLUSH(&regs->phyregaddr, addr);
pi->phy_wreg = 0;
return R_REG(&regs->phyregdata);
@@ -413,8 +384,7 @@ void write_phy_reg(phy_info_t *pi, u16 addr, u16 val)
regs = pi->regs;
#ifdef __mips__
- W_REG(&regs->phyregaddr, addr);
- (void)R_REG(&regs->phyregaddr);
+ W_REG_FLUSH(&regs->phyregaddr, addr);
W_REG(&regs->phyregdata, val);
if (addr == 0x72)
(void)R_REG(&regs->phyregdata);
@@ -436,10 +406,7 @@ void and_phy_reg(phy_info_t *pi, u16 addr, u16 val)
regs = pi->regs;
- W_REG(&regs->phyregaddr, addr);
-#ifdef __mips__
- (void)R_REG(&regs->phyregaddr);
-#endif
+ W_REG_FLUSH(&regs->phyregaddr, addr);
W_REG(&regs->phyregdata, (R_REG(&regs->phyregdata) & val));
pi->phy_wreg = 0;
@@ -451,10 +418,7 @@ void or_phy_reg(phy_info_t *pi, u16 addr, u16 val)
regs = pi->regs;
- W_REG(&regs->phyregaddr, addr);
-#ifdef __mips__
- (void)R_REG(&regs->phyregaddr);
-#endif
+ W_REG_FLUSH(&regs->phyregaddr, addr);
W_REG(&regs->phyregdata, (R_REG(&regs->phyregdata) | val));
pi->phy_wreg = 0;
@@ -466,10 +430,7 @@ void mod_phy_reg(phy_info_t *pi, u16 addr, u16 mask, u16 val)
regs = pi->regs;
- W_REG(&regs->phyregaddr, addr);
-#ifdef __mips__
- (void)R_REG(&regs->phyregaddr);
-#endif
+ W_REG_FLUSH(&regs->phyregaddr, addr);
W_REG(&regs->phyregdata,
((R_REG(&regs->phyregdata) & ~mask) | (val & mask)));
@@ -2350,27 +2311,6 @@ bool wlc_phy_test_ison(wlc_phy_t *ppi)
return pi->phytest_on;
}
-bool wlc_phy_ant_rxdiv_get(wlc_phy_t *ppi, u8 *pval)
-{
- phy_info_t *pi = (phy_info_t *) ppi;
- bool ret = true;
-
- wlc_phyreg_enter(ppi);
-
- if (ISNPHY(pi)) {
-
- ret = false;
- } else if (ISLCNPHY(pi)) {
- u16 crsctrl = read_phy_reg(pi, 0x410);
- u16 div = crsctrl & (0x1 << 1);
- *pval = (div | ((crsctrl & (0x1 << 0)) ^ (div >> 1)));
- }
-
- wlc_phyreg_exit(ppi);
-
- return ret;
-}
-
void wlc_phy_ant_rxdiv_set(wlc_phy_t *ppi, u8 val)
{
phy_info_t *pi = (phy_info_t *) ppi;
diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h b/drivers/staging/brcm80211/brcmsmac/phy/phy_hal.h
index 8939153efa56d..8bd0d139a3770 100644
--- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h
+++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_hal.h
@@ -14,14 +14,18 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#ifndef _wlc_phy_h_
-#define _wlc_phy_h_
+/*
+ * phy_hal.h: functionality exported from the phy to higher layers
+ */
+
+#ifndef _BRCM_PHY_HAL_H_
+#define _BRCM_PHY_HAL_H_
-#include <wlioctl.h>
#include <aiutils.h>
#include <d11.h>
-#include <wlc_phy_shim.h>
+#include <phy_shim.h>
#include <net/mac80211.h> /* struct wiphy */
+#include "brcmu_wifi.h" /* chanspec_t */
#define IDCODE_VER_MASK 0x0000000f
#define IDCODE_VER_SHIFT 0
@@ -87,12 +91,20 @@
#define WLC_TXPWR_DB_FACTOR 4
+/* a large TX Power as an init value to factor out of min() calculations,
+ * keep low enough to fit in an s8, units are .25 dBm
+ */
+#define WLC_TXPWR_MAX (127) /* ~32 dBm = 1,500 mW */
+
#define WLC_NUM_RATES_CCK 4
#define WLC_NUM_RATES_OFDM 8
#define WLC_NUM_RATES_MCS_1_STREAM 8
#define WLC_NUM_RATES_MCS_2_STREAM 8
#define WLC_NUM_RATES_MCS_3_STREAM 8
#define WLC_NUM_RATES_MCS_4_STREAM 8
+
+#define WLC_RSSI_INVALID 0 /* invalid RSSI value */
+
typedef struct txpwr_limits {
u8 cck[WLC_NUM_RATES_CCK];
u8 ofdm[WLC_NUM_RATES_OFDM];
@@ -115,6 +127,32 @@ typedef struct txpwr_limits {
} txpwr_limits_t;
typedef struct {
+ u32 flags;
+ chanspec_t chanspec; /* txpwr report for this channel */
+ chanspec_t local_chanspec; /* channel on which we are associated */
+ u8 local_max; /* local max according to the AP */
+ u8 local_constraint; /* local constraint according to the AP */
+ s8 antgain[2]; /* Ant gain for each band - from SROM */
+ u8 rf_cores; /* count of RF Cores being reported */
+ u8 est_Pout[4]; /* Latest tx power out estimate per RF chain */
+ u8 est_Pout_act[4]; /* Latest tx power out estimate per RF chain
+ * without adjustment
+ */
+ u8 est_Pout_cck; /* Latest CCK tx power out estimate */
+ u8 tx_power_max[4]; /* Maximum target power among all rates */
+ u8 tx_power_max_rate_ind[4]; /* Index of the rate with the max target power */
+ u8 user_limit[WL_TX_POWER_RATES]; /* User limit */
+ u8 reg_limit[WL_TX_POWER_RATES]; /* Regulatory power limit */
+ u8 board_limit[WL_TX_POWER_RATES]; /* Max power board can support (SROM) */
+ u8 target[WL_TX_POWER_RATES]; /* Latest target power */
+} tx_power_t;
+
+typedef struct tx_inst_power {
+ u8 txpwr_est_Pout[2]; /* Latest estimate for 2.4 and 5 Ghz */
+ u8 txpwr_est_Pout_gofdm; /* Pwr estimate for 2.4 OFDM */
+} tx_inst_power_t;
+
+typedef struct {
u8 vec[MAXCHANNEL / NBBY];
} chanvec_t;
@@ -126,7 +164,7 @@ struct phy_pub;
typedef struct phy_pub wlc_phy_t;
typedef struct shared_phy_params {
- si_t *sih;
+ struct si_pub *sih;
void *physhim;
uint unit;
uint corerev;
@@ -226,7 +264,6 @@ extern void wlc_phy_edcrs_lock(wlc_phy_t *pih, bool lock);
extern void wlc_phy_cal_papd_recal(wlc_phy_t *ppi);
extern void wlc_phy_ant_rxdiv_set(wlc_phy_t *ppi, u8 val);
-extern bool wlc_phy_ant_rxdiv_get(wlc_phy_t *ppi, u8 *pval);
extern void wlc_phy_clear_tssi(wlc_phy_t *ppi);
extern void wlc_phy_hold_upd(wlc_phy_t *ppi, mbool id, bool val);
extern void wlc_phy_mute_upd(wlc_phy_t *ppi, bool val, mbool flags);
@@ -253,4 +290,4 @@ extern const u8 *wlc_phy_get_ofdm_rate_lookup(void);
extern s8 wlc_phy_get_tx_power_offset_by_mcs(wlc_phy_t *ppi,
u8 mcs_offset);
extern s8 wlc_phy_get_tx_power_offset(wlc_phy_t *ppi, u8 tbl_offset);
-#endif /* _wlc_phy_h_ */
+#endif /* _BRCM_PHY_HAL_H_ */
diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h b/drivers/staging/brcm80211/brcmsmac/phy/phy_int.h
index 10cbf520474fc..f3fddfcf6040b 100644
--- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h
+++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_int.h
@@ -14,15 +14,16 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#ifndef _wlc_phy_int_h_
-#define _wlc_phy_int_h_
+#ifndef _BRCM_PHY_INT_H_
+#define _BRCM_PHY_INT_H_
#include <linux/kernel.h>
-#include <bcmdefs.h>
-#include <bcmutils.h>
+#include <defs.h>
+#include <brcmu_utils.h>
-#include <bcmsrom_fmt.h>
-#include <wlc_phy_hal.h>
+#include <phy_hal.h>
+
+#define PHY_VERSION { 1, 82, 8, 0 }
#define PHYHAL_ERROR 0x0001
#define PHYHAL_TRACE 0x0002
@@ -42,6 +43,14 @@ extern u32 phyhal_msg_level;
#define LCNXN_BASEREV 16
+typedef struct {
+ u8 tssipos; /* TSSI positive slope, 1: positive, 0: negative */
+ u8 extpagain; /* Ext PA gain-type: full-gain: 0, pa-lite: 1, no_pa: 2 */
+ u8 pdetrange; /* support 32 combinations of different Pdet dynamic ranges */
+ u8 triso; /* TR switch isolation */
+ u8 antswctrllut; /* antswctrl lookup table configuration: 32 possible choices */
+} wlc_phy_srom_fem_t;
+
struct wlc_hw_info;
typedef struct phy_info phy_info_t;
typedef void (*initfn_t) (phy_info_t *);
@@ -248,7 +257,7 @@ typedef enum {
#define PHY_CHAIN_TX_DISABLE_TEMP 115
#define PHY_HYSTERESIS_DELTATEMP 5
-#define PHY_BITSCNT(x) bcm_bitcount((u8 *)&(x), sizeof(u8))
+#define PHY_BITSCNT(x) brcmu_bitcount((u8 *)&(x), sizeof(u8))
#define MOD_PHY_REG(pi, phy_type, reg_name, field, value) \
mod_phy_reg(pi, phy_type##_##reg_name, phy_type##_##reg_name##_##field##_MASK, \
@@ -527,7 +536,7 @@ typedef struct {
struct shared_phy {
struct phy_info *phy_head;
uint unit;
- si_t *sih;
+ struct si_pub *sih;
void *physhim;
uint corerev;
u32 machwcap;
@@ -653,8 +662,8 @@ struct phy_info {
s8 tx_power_offset[TXP_NUM_RATES];
u8 tx_power_target[TXP_NUM_RATES];
- srom_fem_t srom_fem2g;
- srom_fem_t srom_fem5g;
+ wlc_phy_srom_fem_t srom_fem2g;
+ wlc_phy_srom_fem_t srom_fem5g;
u8 tx_power_max;
u8 tx_power_max_rate_ind;
@@ -1223,4 +1232,4 @@ extern s8 wlc_phy_upd_rssi_offset(phy_info_t *pi, s8 rssi,
chanspec_t chanspec);
extern bool wlc_phy_n_txpower_ipa_ison(phy_info_t *pih);
-#endif /* _wlc_phy_int_h_ */
+#endif /* _BRCM_PHY_INT_H_ */
diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.c b/drivers/staging/brcm80211/brcmsmac/phy/phy_lcn.c
index b8864c5b7a199..84d50c26ae07c 100644
--- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.c
+++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_lcn.c
@@ -18,20 +18,21 @@
#include <linux/string.h>
#include <linux/bitops.h>
#include <linux/delay.h>
-#include <wlc_cfg.h>
#include <linux/pci.h>
+#include <brcmu_utils.h>
#include <aiutils.h>
-#include <wlc_pmu.h>
-#include <bcmnvram.h>
-
-#include <bcmdevs.h>
-#include <sbhnddma.h>
-
-#include "wlc_phy_radio.h"
-#include "wlc_phy_int.h"
-#include "wlc_phy_qmath.h"
-#include "wlc_phy_lcn.h"
-#include "wlc_phytbl_lcn.h"
+#include <pmu.h>
+#include <scb.h>
+#include <pub.h>
+
+#include <brcm_hw_ids.h>
+#include <dma.h>
+
+#include "phy_radio.h"
+#include "phy_int.h"
+#include "phy_qmath.h"
+#include "phy_lcn.h"
+#include "phytbl_lcn.h"
#define PLL_2064_NDIV 90
#define PLL_2064_LOW_END_VCO 3000
diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.h b/drivers/staging/brcm80211/brcmsmac/phy/phy_lcn.h
index b7bfc7230dfc2..efa8c903360b2 100644
--- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.h
+++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_lcn.h
@@ -14,8 +14,8 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#ifndef _wlc_phy_lcn_h_
-#define _wlc_phy_lcn_h_
+#ifndef _BRCM_PHY_LCN_H_
+#define _BRCM_PHY_LCN_H_
struct phy_info_lcnphy {
int lcnphy_txrf_sp_9_override;
@@ -116,4 +116,4 @@ struct phy_info_lcnphy {
uint lcnphy_aci_start_time;
s8 lcnphy_tx_power_offset[TXP_NUM_RATES];
};
-#endif /* _wlc_phy_lcn_h_ */
+#endif /* _BRCM_PHY_LCN_H_ */
diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c b/drivers/staging/brcm80211/brcmsmac/phy/phy_n.c
index 71275094e810b..e10f98dc742e8 100644
--- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c
+++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_n.c
@@ -16,21 +16,21 @@
#include <linux/kernel.h>
#include <linux/string.h>
-#include <bcmdefs.h>
-#include <wlc_cfg.h>
+#include <defs.h>
#include <linux/delay.h>
#include <linux/pci.h>
#include <aiutils.h>
-#include <sbchipc.h>
-#include <wlc_pmu.h>
+#include <chipcommon.h>
+#include <pmu.h>
-#include <bcmdevs.h>
-#include <sbhnddma.h>
+#include <brcm_hw_ids.h>
+#include <dma.h>
-#include <wlc_phy_radio.h>
-#include <wlc_phy_int.h>
-#include <wlc_phyreg_n.h>
-#include <wlc_phytbl_n.h>
+#include <types.h>
+#include <phy_radio.h>
+#include <phy_int.h>
+#include <phyreg_n.h>
+#include <phytbl_n.h>
#define READ_RADIO_REG2(pi, radio_type, jspace, core, reg_name) \
read_radio_reg(pi, radio_type##_##jspace##_##reg_name | \
@@ -141,6 +141,10 @@
#define NPHY_ADJUSTED_MINCRSPOWER 0x1e
+/* 5357 Chip specific ChipControl register bits */
+#define CCTRL5357_EXTPA (1<<14) /* extPA in ChipControl 1, bit 14 */
+#define CCTRL5357_ANT_MUX_2o3 (1<<15) /* 2o3 in ChipControl 1, bit 15 */
+
typedef struct _nphy_iqcal_params {
u16 txlpf;
u16 txgm;
diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_qmath.c b/drivers/staging/brcm80211/brcmsmac/phy/phy_qmath.c
index c98176fd0aaee..801c7c0d55556 100644
--- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_qmath.c
+++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_qmath.c
@@ -16,7 +16,7 @@
#include <linux/types.h>
-#include "wlc_phy_qmath.h"
+#include "phy_qmath.h"
/*
Description: This function make 16 bit unsigned multiplication. To fit the output into
diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_qmath.h b/drivers/staging/brcm80211/brcmsmac/phy/phy_qmath.h
index 3dcee1c4aa654..49f57f4e847b6 100644
--- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_qmath.h
+++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_qmath.h
@@ -14,8 +14,8 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#ifndef __QMATH_H__
-#define __QMATH_H__
+#ifndef _BRCM_QMATH_H_
+#define _BRCM_QMATH_H_
u16 qm_mulu16(u16 op1, u16 op2);
@@ -37,4 +37,4 @@ s16 qm_norm32(s32 op);
void qm_log10(s32 N, s16 qN, s16 *log10N, s16 *qLog10N);
-#endif /* #ifndef __QMATH_H__ */
+#endif /* #ifndef _BRCM_QMATH_H_ */
diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_radio.h b/drivers/staging/brcm80211/brcmsmac/phy/phy_radio.h
index 72176ae2882c9..c3a675455ff5f 100644
--- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_radio.h
+++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_radio.h
@@ -14,8 +14,8 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#ifndef _BCM20XX_H
-#define _BCM20XX_H
+#ifndef _BRCM_PHY_RADIO_H_
+#define _BRCM_PHY_RADIO_H_
#define RADIO_IDCODE 0x01
@@ -1530,4 +1530,4 @@
#define RADIO_2057_VCM_MASK 0x7
-#endif /* _BCM20XX_H */
+#endif /* _BRCM_PHY_RADIO_H_ */
diff --git a/drivers/staging/brcm80211/brcmsmac/phy/phy_version.h b/drivers/staging/brcm80211/brcmsmac/phy/phy_version.h
deleted file mode 100644
index 51a223880bcf0..0000000000000
--- a/drivers/staging/brcm80211/brcmsmac/phy/phy_version.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef phy_version_h_
-#define phy_version_h_
-
-#define PHY_MAJOR_VERSION 1
-
-#define PHY_MINOR_VERSION 82
-
-#define PHY_RC_NUMBER 8
-
-#define PHY_INCREMENTAL_NUMBER 0
-
-#define PHY_BUILD_NUMBER 0
-
-#define PHY_VERSION { 1, 82, 8, 0 }
-
-#define PHY_VERSION_NUM 0x01520800
-
-#define PHY_VERSION_STR "1.82.8.0"
-
-#endif /* phy_version_h_ */
diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phyreg_n.h b/drivers/staging/brcm80211/brcmsmac/phy/phyreg_n.h
index 211bc3a842afb..211bc3a842afb 100644
--- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phyreg_n.h
+++ b/drivers/staging/brcm80211/brcmsmac/phy/phyreg_n.h
diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_lcn.c b/drivers/staging/brcm80211/brcmsmac/phy/phytbl_lcn.c
index 81c59b05482a7..4dcc691693575 100644
--- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_lcn.c
+++ b/drivers/staging/brcm80211/brcmsmac/phy/phytbl_lcn.c
@@ -15,9 +15,9 @@
*/
#include <linux/types.h>
-#include <sbhnddma.h>
-#include <wlc_phy_int.h>
-#include <wlc_phytbl_lcn.h>
+#include <dma.h>
+#include <phy_int.h>
+#include <phytbl_lcn.h>
const u32 dot11lcn_gain_tbl_rev0[] = {
0x00000000,
diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_lcn.h b/drivers/staging/brcm80211/brcmsmac/phy/phytbl_lcn.h
index 5a64a988d1076..5a64a988d1076 100644
--- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_lcn.h
+++ b/drivers/staging/brcm80211/brcmsmac/phy/phytbl_lcn.h
diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.c b/drivers/staging/brcm80211/brcmsmac/phy/phytbl_n.c
index 742df997a3b11..1dd613ac5e62c 100644
--- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.c
+++ b/drivers/staging/brcm80211/brcmsmac/phy/phytbl_n.c
@@ -16,9 +16,9 @@
#include <linux/kernel.h>
-#include <sbhnddma.h>
-#include <wlc_phy_int.h>
-#include <wlc_phytbl_n.h>
+#include <dma.h>
+#include <phy_int.h>
+#include <phytbl_n.h>
const u32 frame_struct_rev0[] = {
0x08004a04,
diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.h b/drivers/staging/brcm80211/brcmsmac/phy/phytbl_n.h
index 396122f5e50b8..396122f5e50b8 100644
--- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.h
+++ b/drivers/staging/brcm80211/brcmsmac/phy/phytbl_n.h
diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c b/drivers/staging/brcm80211/brcmsmac/phy_shim.c
index 16fea021f4a56..d4975736f0d64 100644
--- a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c
+++ b/drivers/staging/brcm80211/brcmsmac/phy_shim.c
@@ -23,37 +23,28 @@
#include <linux/kernel.h>
#include <linux/module.h>
-#include <linux/pci.h>
-#include <proto/802.11.h>
-#include <bcmdefs.h>
-#include <bcmutils.h>
-#include <bcmwifi.h>
+#include <defs.h>
+#include <brcmu_utils.h>
+#include <brcmu_wifi.h>
#include <aiutils.h>
-#include <wlioctl.h>
-#include <sbconfig.h>
-#include <sbchipc.h>
-#include <pcicfg.h>
-#include <sbhnddma.h>
-#include <hnddma.h>
-#include <wlc_pmu.h>
-
-#include "wlc_types.h"
-#include "wl_dbg.h"
-#include "wlc_cfg.h"
+#include <chipcommon.h>
+#include "dma.h"
+#include <pmu.h>
+
+#include "types.h"
#include "d11.h"
-#include "wlc_rate.h"
-#include "wlc_scb.h"
-#include "wlc_pub.h"
-#include "phy/wlc_phy_hal.h"
-#include "wlc_channel.h"
-#include "bcmsrom.h"
-#include "wlc_key.h"
-#include "wlc_bmac.h"
-#include "wlc_phy_hal.h"
-#include "wl_export.h"
-#include "wlc_main.h"
-#include "wlc_phy_shim.h"
+#include "rate.h"
+#include "scb.h"
+#include "pub.h"
+#include "phy/phy_hal.h"
+#include "channel.h"
+#include "srom.h"
+#include "bmac.h"
+#include "phy_hal.h"
+#include "main.h"
+#include "phy_shim.h"
+#include "mac80211_if.h"
/* PHY SHIM module specific state */
struct wlc_phy_shim_info {
@@ -89,39 +80,40 @@ struct wlapi_timer *wlapi_init_timer(wlc_phy_shim_info_t *physhim,
void (*fn) (void *arg), void *arg,
const char *name)
{
- return (struct wlapi_timer *)wl_init_timer(physhim->wl, fn, arg, name);
+ return (struct wlapi_timer *)
+ brcms_init_timer(physhim->wl, fn, arg, name);
}
void wlapi_free_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t)
{
- wl_free_timer(physhim->wl, (struct wl_timer *)t);
+ brcms_free_timer(physhim->wl, (struct brcms_timer *)t);
}
void
wlapi_add_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t, uint ms,
int periodic)
{
- wl_add_timer(physhim->wl, (struct wl_timer *)t, ms, periodic);
+ brcms_add_timer(physhim->wl, (struct brcms_timer *)t, ms, periodic);
}
bool wlapi_del_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t)
{
- return wl_del_timer(physhim->wl, (struct wl_timer *)t);
+ return brcms_del_timer(physhim->wl, (struct brcms_timer *)t);
}
void wlapi_intrson(wlc_phy_shim_info_t *physhim)
{
- wl_intrson(physhim->wl);
+ brcms_intrson(physhim->wl);
}
u32 wlapi_intrsoff(wlc_phy_shim_info_t *physhim)
{
- return wl_intrsoff(physhim->wl);
+ return brcms_intrsoff(physhim->wl);
}
void wlapi_intrsrestore(wlc_phy_shim_info_t *physhim, u32 macintmask)
{
- wl_intrsrestore(physhim->wl, macintmask);
+ brcms_intrsrestore(physhim->wl, macintmask);
}
void wlapi_bmac_write_shm(wlc_phy_shim_info_t *physhim, uint offset, u16 v)
diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.h b/drivers/staging/brcm80211/brcmsmac/phy_shim.h
index c151a5d8c6939..1677df218a514 100644
--- a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.h
+++ b/drivers/staging/brcm80211/brcmsmac/phy_shim.h
@@ -14,8 +14,12 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#ifndef _wlc_phy_shim_h_
-#define _wlc_phy_shim_h_
+/*
+ * phy_shim.h: stuff defined in phy_shim.c and included only by the phy
+ */
+
+#ifndef _BRCM_PHY_SHIM_H_
+#define _BRCM_PHY_SHIM_H_
#define RADAR_TYPE_NONE 0 /* Radar type None */
#define RADAR_TYPE_ETSI_1 1 /* ETSI 1 Radar type */
@@ -51,6 +55,57 @@
#define ANT_RX_DIV_ENABLE 3 /* APHY bbConfig Enable RX Diversity */
#define ANT_RX_DIV_DEF ANT_RX_DIV_START_0 /* default antdiv setting */
+#define WL_ANT_RX_MAX 2 /* max 2 receive antennas */
+#define WL_ANT_HT_RX_MAX 3 /* max 3 receive antennas/cores */
+#define WL_ANT_IDX_1 0 /* antenna index 1 */
+#define WL_ANT_IDX_2 1 /* antenna index 2 */
+
+/* values for n_preamble_type */
+#define WLC_N_PREAMBLE_MIXEDMODE 0
+#define WLC_N_PREAMBLE_GF 1
+#define WLC_N_PREAMBLE_GF_BRCM 2
+
+#define WL_TX_POWER_RATES_LEGACY 45
+#define WL_TX_POWER_MCS20_FIRST 12
+#define WL_TX_POWER_MCS20_NUM 16
+#define WL_TX_POWER_MCS40_FIRST 28
+#define WL_TX_POWER_MCS40_NUM 17
+
+
+#define WL_TX_POWER_RATES 101
+#define WL_TX_POWER_CCK_FIRST 0
+#define WL_TX_POWER_CCK_NUM 4
+#define WL_TX_POWER_OFDM_FIRST 4 /* Index for first 20MHz OFDM SISO rate */
+#define WL_TX_POWER_OFDM20_CDD_FIRST 12 /* Index for first 20MHz OFDM CDD rate */
+#define WL_TX_POWER_OFDM40_SISO_FIRST 52 /* Index for first 40MHz OFDM SISO rate */
+#define WL_TX_POWER_OFDM40_CDD_FIRST 60 /* Index for first 40MHz OFDM CDD rate */
+#define WL_TX_POWER_OFDM_NUM 8
+#define WL_TX_POWER_MCS20_SISO_FIRST 20 /* Index for first 20MHz MCS SISO rate */
+#define WL_TX_POWER_MCS20_CDD_FIRST 28 /* Index for first 20MHz MCS CDD rate */
+#define WL_TX_POWER_MCS20_STBC_FIRST 36 /* Index for first 20MHz MCS STBC rate */
+#define WL_TX_POWER_MCS20_SDM_FIRST 44 /* Index for first 20MHz MCS SDM rate */
+#define WL_TX_POWER_MCS40_SISO_FIRST 68 /* Index for first 40MHz MCS SISO rate */
+#define WL_TX_POWER_MCS40_CDD_FIRST 76 /* Index for first 40MHz MCS CDD rate */
+#define WL_TX_POWER_MCS40_STBC_FIRST 84 /* Index for first 40MHz MCS STBC rate */
+#define WL_TX_POWER_MCS40_SDM_FIRST 92 /* Index for first 40MHz MCS SDM rate */
+#define WL_TX_POWER_MCS_1_STREAM_NUM 8
+#define WL_TX_POWER_MCS_2_STREAM_NUM 8
+#define WL_TX_POWER_MCS_32 100 /* Index for 40MHz rate MCS 32 */
+#define WL_TX_POWER_MCS_32_NUM 1
+
+/* sslpnphy specifics */
+#define WL_TX_POWER_MCS20_SISO_FIRST_SSN 12 /* Index for first 20MHz MCS SISO rate */
+
+/* tx_power_t.flags bits */
+#define WL_TX_POWER_F_ENABLED 1
+#define WL_TX_POWER_F_HW 2
+#define WL_TX_POWER_F_MIMO 4
+#define WL_TX_POWER_F_SISO 8
+
+/* values to force tx/rx chain */
+#define WLC_N_TXRX_CHAIN0 0
+#define WLC_N_TXRX_CHAIN1 1
+
/* Forward declarations */
struct wlc_hw_info;
typedef struct wlc_phy_shim_info wlc_phy_shim_info_t;
@@ -109,4 +164,4 @@ extern void wlapi_copyto_objmem(wlc_phy_shim_info_t *physhim, uint,
extern void wlapi_high_update_phy_mode(wlc_phy_shim_info_t *physhim,
u32 phy_mode);
extern u16 wlapi_bmac_get_txant(wlc_phy_shim_info_t *physhim);
-#endif /* _wlc_phy_shim_h_ */
+#endif /* _BRCM_PHY_SHIM_H_ */
diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c b/drivers/staging/brcm80211/brcmsmac/pmu.c
index 82986bd1ccfac..b822d403fe529 100644
--- a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c
+++ b/drivers/staging/brcm80211/brcmsmac/pmu.c
@@ -18,11 +18,13 @@
#include <linux/delay.h>
#include <linux/io.h>
-#include <bcmdevs.h>
-#include <sbchipc.h>
-#include <bcmutils.h>
-#include <bcmnvram.h>
-#include "wlc_pmu.h"
+#include <brcm_hw_ids.h>
+#include "types.h"
+#include <chipcommon.h>
+#include <brcmu_utils.h>
+#include "scb.h"
+#include "pub.h"
+#include "pmu.h"
/*
* d11 slow to fast clock transition time in slow clock cycles
@@ -128,9 +130,474 @@
#define RES_DEPEND_ADD 1
#define RES_DEPEND_REMOVE -1
+/* Fields in pmucontrol */
+#define PCTL_ILP_DIV_MASK 0xffff0000
+#define PCTL_ILP_DIV_SHIFT 16
+#define PCTL_PLL_PLLCTL_UPD 0x00000400 /* rev 2 */
+#define PCTL_NOILP_ON_WAIT 0x00000200 /* rev 1 */
+#define PCTL_HT_REQ_EN 0x00000100
+#define PCTL_ALP_REQ_EN 0x00000080
+#define PCTL_XTALFREQ_MASK 0x0000007c
+#define PCTL_XTALFREQ_SHIFT 2
+#define PCTL_ILP_DIV_EN 0x00000002
+#define PCTL_LPO_SEL 0x00000001
+
+/* Fields in clkstretch */
+#define CSTRETCH_HT 0xffff0000
+#define CSTRETCH_ALP 0x0000ffff
+
/* d11 slow to fast clock transition time in slow clock cycles */
#define D11SCC_SLOW2FAST_TRANSITION 2
+/* ILP clock */
+#define ILP_CLOCK 32000
+
+/* ALP clock on pre-PMU chips */
+#define ALP_CLOCK 20000000
+
+/* HT clock */
+#define HT_CLOCK 80000000
+
+#define OTPS_READY 0x00001000
+
+/* pmustatus */
+#define PST_EXTLPOAVAIL 0x0100
+#define PST_WDRESET 0x0080
+#define PST_INTPEND 0x0040
+#define PST_SBCLKST 0x0030
+#define PST_SBCLKST_ILP 0x0010
+#define PST_SBCLKST_ALP 0x0020
+#define PST_SBCLKST_HT 0x0030
+#define PST_ALPAVAIL 0x0008
+#define PST_HTAVAIL 0x0004
+#define PST_RESINIT 0x0003
+
+/* PMU Resource Request Timer registers */
+/* This is based on PmuRev0 */
+#define PRRT_TIME_MASK 0x03ff
+#define PRRT_INTEN 0x0400
+#define PRRT_REQ_ACTIVE 0x0800
+#define PRRT_ALP_REQ 0x1000
+#define PRRT_HT_REQ 0x2000
+
+/* PMU resource bit position */
+#define PMURES_BIT(bit) (1 << (bit))
+
+/* PMU resource number limit */
+#define PMURES_MAX_RESNUM 30
+
+/* PMU chip control0 register */
+#define PMU_CHIPCTL0 0
+
+/* PMU chip control1 register */
+#define PMU_CHIPCTL1 1
+#define PMU_CC1_RXC_DLL_BYPASS 0x00010000
+
+#define PMU_CC1_IF_TYPE_MASK 0x00000030
+#define PMU_CC1_IF_TYPE_RMII 0x00000000
+#define PMU_CC1_IF_TYPE_MII 0x00000010
+#define PMU_CC1_IF_TYPE_RGMII 0x00000020
+
+#define PMU_CC1_SW_TYPE_MASK 0x000000c0
+#define PMU_CC1_SW_TYPE_EPHY 0x00000000
+#define PMU_CC1_SW_TYPE_EPHYMII 0x00000040
+#define PMU_CC1_SW_TYPE_EPHYRMII 0x00000080
+#define PMU_CC1_SW_TYPE_RGMII 0x000000c0
+
+/* PMU corerev and chip specific PLL controls.
+ * PMU<rev>_PLL<num>_XX where <rev> is PMU corerev and <num> is an arbitrary number
+ * to differentiate different PLLs controlled by the same PMU rev.
+ */
+/* pllcontrol registers */
+/* PDIV, div_phy, div_arm, div_adc, dith_sel, ioff, kpd_scale, lsb_sel, mash_sel, lf_c & lf_r */
+#define PMU0_PLL0_PLLCTL0 0
+#define PMU0_PLL0_PC0_PDIV_MASK 1
+#define PMU0_PLL0_PC0_PDIV_FREQ 25000
+#define PMU0_PLL0_PC0_DIV_ARM_MASK 0x00000038
+#define PMU0_PLL0_PC0_DIV_ARM_SHIFT 3
+#define PMU0_PLL0_PC0_DIV_ARM_BASE 8
+
+/* PC0_DIV_ARM for PLLOUT_ARM */
+#define PMU0_PLL0_PC0_DIV_ARM_110MHZ 0
+#define PMU0_PLL0_PC0_DIV_ARM_97_7MHZ 1
+#define PMU0_PLL0_PC0_DIV_ARM_88MHZ 2
+#define PMU0_PLL0_PC0_DIV_ARM_80MHZ 3 /* Default */
+#define PMU0_PLL0_PC0_DIV_ARM_73_3MHZ 4
+#define PMU0_PLL0_PC0_DIV_ARM_67_7MHZ 5
+#define PMU0_PLL0_PC0_DIV_ARM_62_9MHZ 6
+#define PMU0_PLL0_PC0_DIV_ARM_58_6MHZ 7
+
+/* Wildcard base, stop_mod, en_lf_tp, en_cal & lf_r2 */
+#define PMU0_PLL0_PLLCTL1 1
+#define PMU0_PLL0_PC1_WILD_INT_MASK 0xf0000000
+#define PMU0_PLL0_PC1_WILD_INT_SHIFT 28
+#define PMU0_PLL0_PC1_WILD_FRAC_MASK 0x0fffff00
+#define PMU0_PLL0_PC1_WILD_FRAC_SHIFT 8
+#define PMU0_PLL0_PC1_STOP_MOD 0x00000040
+
+/* Wildcard base, vco_calvar, vco_swc, vco_var_selref, vso_ical & vco_sel_avdd */
+#define PMU0_PLL0_PLLCTL2 2
+#define PMU0_PLL0_PC2_WILD_INT_MASK 0xf
+#define PMU0_PLL0_PC2_WILD_INT_SHIFT 4
+
+/* pllcontrol registers */
+/* ndiv_pwrdn, pwrdn_ch<x>, refcomp_pwrdn, dly_ch<x>, p1div, p2div, _bypass_sdmod */
+#define PMU1_PLL0_PLLCTL0 0
+#define PMU1_PLL0_PC0_P1DIV_MASK 0x00f00000
+#define PMU1_PLL0_PC0_P1DIV_SHIFT 20
+#define PMU1_PLL0_PC0_P2DIV_MASK 0x0f000000
+#define PMU1_PLL0_PC0_P2DIV_SHIFT 24
+
+/* m<x>div */
+#define PMU1_PLL0_PLLCTL1 1
+#define PMU1_PLL0_PC1_M1DIV_MASK 0x000000ff
+#define PMU1_PLL0_PC1_M1DIV_SHIFT 0
+#define PMU1_PLL0_PC1_M2DIV_MASK 0x0000ff00
+#define PMU1_PLL0_PC1_M2DIV_SHIFT 8
+#define PMU1_PLL0_PC1_M3DIV_MASK 0x00ff0000
+#define PMU1_PLL0_PC1_M3DIV_SHIFT 16
+#define PMU1_PLL0_PC1_M4DIV_MASK 0xff000000
+#define PMU1_PLL0_PC1_M4DIV_SHIFT 24
+
+#define PMU1_PLL0_CHIPCTL0 0
+#define PMU1_PLL0_CHIPCTL1 1
+#define PMU1_PLL0_CHIPCTL2 2
+
+#define DOT11MAC_880MHZ_CLK_DIVISOR_SHIFT 8
+#define DOT11MAC_880MHZ_CLK_DIVISOR_MASK (0xFF << DOT11MAC_880MHZ_CLK_DIVISOR_SHIFT)
+#define DOT11MAC_880MHZ_CLK_DIVISOR_VAL (0xE << DOT11MAC_880MHZ_CLK_DIVISOR_SHIFT)
+
+/* m<x>div, ndiv_dither_mfb, ndiv_mode, ndiv_int */
+#define PMU1_PLL0_PLLCTL2 2
+#define PMU1_PLL0_PC2_M5DIV_MASK 0x000000ff
+#define PMU1_PLL0_PC2_M5DIV_SHIFT 0
+#define PMU1_PLL0_PC2_M6DIV_MASK 0x0000ff00
+#define PMU1_PLL0_PC2_M6DIV_SHIFT 8
+#define PMU1_PLL0_PC2_NDIV_MODE_MASK 0x000e0000
+#define PMU1_PLL0_PC2_NDIV_MODE_SHIFT 17
+#define PMU1_PLL0_PC2_NDIV_MODE_MASH 1
+#define PMU1_PLL0_PC2_NDIV_MODE_MFB 2 /* recommended for 4319 */
+#define PMU1_PLL0_PC2_NDIV_INT_MASK 0x1ff00000
+#define PMU1_PLL0_PC2_NDIV_INT_SHIFT 20
+
+/* ndiv_frac */
+#define PMU1_PLL0_PLLCTL3 3
+#define PMU1_PLL0_PC3_NDIV_FRAC_MASK 0x00ffffff
+#define PMU1_PLL0_PC3_NDIV_FRAC_SHIFT 0
+
+/* pll_ctrl */
+#define PMU1_PLL0_PLLCTL4 4
+
+/* pll_ctrl, vco_rng, clkdrive_ch<x> */
+#define PMU1_PLL0_PLLCTL5 5
+#define PMU1_PLL0_PC5_CLK_DRV_MASK 0xffffff00
+#define PMU1_PLL0_PC5_CLK_DRV_SHIFT 8
+
+/* PMU rev 2 control words */
+#define PMU2_PHY_PLL_PLLCTL 4
+#define PMU2_SI_PLL_PLLCTL 10
+
+/* PMU rev 2 */
+/* pllcontrol registers */
+/* ndiv_pwrdn, pwrdn_ch<x>, refcomp_pwrdn, dly_ch<x>, p1div, p2div, _bypass_sdmod */
+#define PMU2_PLL_PLLCTL0 0
+#define PMU2_PLL_PC0_P1DIV_MASK 0x00f00000
+#define PMU2_PLL_PC0_P1DIV_SHIFT 20
+#define PMU2_PLL_PC0_P2DIV_MASK 0x0f000000
+#define PMU2_PLL_PC0_P2DIV_SHIFT 24
+
+/* m<x>div */
+#define PMU2_PLL_PLLCTL1 1
+#define PMU2_PLL_PC1_M1DIV_MASK 0x000000ff
+#define PMU2_PLL_PC1_M1DIV_SHIFT 0
+#define PMU2_PLL_PC1_M2DIV_MASK 0x0000ff00
+#define PMU2_PLL_PC1_M2DIV_SHIFT 8
+#define PMU2_PLL_PC1_M3DIV_MASK 0x00ff0000
+#define PMU2_PLL_PC1_M3DIV_SHIFT 16
+#define PMU2_PLL_PC1_M4DIV_MASK 0xff000000
+#define PMU2_PLL_PC1_M4DIV_SHIFT 24
+
+/* m<x>div, ndiv_dither_mfb, ndiv_mode, ndiv_int */
+#define PMU2_PLL_PLLCTL2 2
+#define PMU2_PLL_PC2_M5DIV_MASK 0x000000ff
+#define PMU2_PLL_PC2_M5DIV_SHIFT 0
+#define PMU2_PLL_PC2_M6DIV_MASK 0x0000ff00
+#define PMU2_PLL_PC2_M6DIV_SHIFT 8
+#define PMU2_PLL_PC2_NDIV_MODE_MASK 0x000e0000
+#define PMU2_PLL_PC2_NDIV_MODE_SHIFT 17
+#define PMU2_PLL_PC2_NDIV_INT_MASK 0x1ff00000
+#define PMU2_PLL_PC2_NDIV_INT_SHIFT 20
+
+/* ndiv_frac */
+#define PMU2_PLL_PLLCTL3 3
+#define PMU2_PLL_PC3_NDIV_FRAC_MASK 0x00ffffff
+#define PMU2_PLL_PC3_NDIV_FRAC_SHIFT 0
+
+/* pll_ctrl */
+#define PMU2_PLL_PLLCTL4 4
+
+/* pll_ctrl, vco_rng, clkdrive_ch<x> */
+#define PMU2_PLL_PLLCTL5 5
+#define PMU2_PLL_PC5_CLKDRIVE_CH1_MASK 0x00000f00
+#define PMU2_PLL_PC5_CLKDRIVE_CH1_SHIFT 8
+#define PMU2_PLL_PC5_CLKDRIVE_CH2_MASK 0x0000f000
+#define PMU2_PLL_PC5_CLKDRIVE_CH2_SHIFT 12
+#define PMU2_PLL_PC5_CLKDRIVE_CH3_MASK 0x000f0000
+#define PMU2_PLL_PC5_CLKDRIVE_CH3_SHIFT 16
+#define PMU2_PLL_PC5_CLKDRIVE_CH4_MASK 0x00f00000
+#define PMU2_PLL_PC5_CLKDRIVE_CH4_SHIFT 20
+#define PMU2_PLL_PC5_CLKDRIVE_CH5_MASK 0x0f000000
+#define PMU2_PLL_PC5_CLKDRIVE_CH5_SHIFT 24
+#define PMU2_PLL_PC5_CLKDRIVE_CH6_MASK 0xf0000000
+#define PMU2_PLL_PC5_CLKDRIVE_CH6_SHIFT 28
+
+/* PMU rev 5 (& 6) */
+#define PMU5_PLL_P1P2_OFF 0
+#define PMU5_PLL_P1_MASK 0x0f000000
+#define PMU5_PLL_P1_SHIFT 24
+#define PMU5_PLL_P2_MASK 0x00f00000
+#define PMU5_PLL_P2_SHIFT 20
+#define PMU5_PLL_M14_OFF 1
+#define PMU5_PLL_MDIV_MASK 0x000000ff
+#define PMU5_PLL_MDIV_WIDTH 8
+#define PMU5_PLL_NM5_OFF 2
+#define PMU5_PLL_NDIV_MASK 0xfff00000
+#define PMU5_PLL_NDIV_SHIFT 20
+#define PMU5_PLL_NDIV_MODE_MASK 0x000e0000
+#define PMU5_PLL_NDIV_MODE_SHIFT 17
+#define PMU5_PLL_FMAB_OFF 3
+#define PMU5_PLL_MRAT_MASK 0xf0000000
+#define PMU5_PLL_MRAT_SHIFT 28
+#define PMU5_PLL_ABRAT_MASK 0x08000000
+#define PMU5_PLL_ABRAT_SHIFT 27
+#define PMU5_PLL_FDIV_MASK 0x07ffffff
+#define PMU5_PLL_PLLCTL_OFF 4
+#define PMU5_PLL_PCHI_OFF 5
+#define PMU5_PLL_PCHI_MASK 0x0000003f
+
+/* pmu XtalFreqRatio */
+#define PMU_XTALFREQ_REG_ILPCTR_MASK 0x00001FFF
+#define PMU_XTALFREQ_REG_MEASURE_MASK 0x80000000
+#define PMU_XTALFREQ_REG_MEASURE_SHIFT 31
+
+/* Divider allocation in 4716/47162/5356/5357 */
+#define PMU5_MAINPLL_CPU 1
+#define PMU5_MAINPLL_MEM 2
+#define PMU5_MAINPLL_SI 3
+
+#define PMU7_PLL_PLLCTL7 7
+#define PMU7_PLL_PLLCTL8 8
+#define PMU7_PLL_PLLCTL11 11
+
+/* PLL usage in 4716/47162 */
+#define PMU4716_MAINPLL_PLL0 12
+
+/* PLL usage in 5356/5357 */
+#define PMU5356_MAINPLL_PLL0 0
+#define PMU5357_MAINPLL_PLL0 0
+
+/* 4328 resources */
+#define RES4328_EXT_SWITCHER_PWM 0 /* 0x00001 */
+#define RES4328_BB_SWITCHER_PWM 1 /* 0x00002 */
+#define RES4328_BB_SWITCHER_BURST 2 /* 0x00004 */
+#define RES4328_BB_EXT_SWITCHER_BURST 3 /* 0x00008 */
+#define RES4328_ILP_REQUEST 4 /* 0x00010 */
+#define RES4328_RADIO_SWITCHER_PWM 5 /* 0x00020 */
+#define RES4328_RADIO_SWITCHER_BURST 6 /* 0x00040 */
+#define RES4328_ROM_SWITCH 7 /* 0x00080 */
+#define RES4328_PA_REF_LDO 8 /* 0x00100 */
+#define RES4328_RADIO_LDO 9 /* 0x00200 */
+#define RES4328_AFE_LDO 10 /* 0x00400 */
+#define RES4328_PLL_LDO 11 /* 0x00800 */
+#define RES4328_BG_FILTBYP 12 /* 0x01000 */
+#define RES4328_TX_FILTBYP 13 /* 0x02000 */
+#define RES4328_RX_FILTBYP 14 /* 0x04000 */
+#define RES4328_XTAL_PU 15 /* 0x08000 */
+#define RES4328_XTAL_EN 16 /* 0x10000 */
+#define RES4328_BB_PLL_FILTBYP 17 /* 0x20000 */
+#define RES4328_RF_PLL_FILTBYP 18 /* 0x40000 */
+#define RES4328_BB_PLL_PU 19 /* 0x80000 */
+
+/* 4325 A0/A1 resources */
+#define RES4325_BUCK_BOOST_BURST 0 /* 0x00000001 */
+#define RES4325_CBUCK_BURST 1 /* 0x00000002 */
+#define RES4325_CBUCK_PWM 2 /* 0x00000004 */
+#define RES4325_CLDO_CBUCK_BURST 3 /* 0x00000008 */
+#define RES4325_CLDO_CBUCK_PWM 4 /* 0x00000010 */
+#define RES4325_BUCK_BOOST_PWM 5 /* 0x00000020 */
+#define RES4325_ILP_REQUEST 6 /* 0x00000040 */
+#define RES4325_ABUCK_BURST 7 /* 0x00000080 */
+#define RES4325_ABUCK_PWM 8 /* 0x00000100 */
+#define RES4325_LNLDO1_PU 9 /* 0x00000200 */
+#define RES4325_OTP_PU 10 /* 0x00000400 */
+#define RES4325_LNLDO3_PU 11 /* 0x00000800 */
+#define RES4325_LNLDO4_PU 12 /* 0x00001000 */
+#define RES4325_XTAL_PU 13 /* 0x00002000 */
+#define RES4325_ALP_AVAIL 14 /* 0x00004000 */
+#define RES4325_RX_PWRSW_PU 15 /* 0x00008000 */
+#define RES4325_TX_PWRSW_PU 16 /* 0x00010000 */
+#define RES4325_RFPLL_PWRSW_PU 17 /* 0x00020000 */
+#define RES4325_LOGEN_PWRSW_PU 18 /* 0x00040000 */
+#define RES4325_AFE_PWRSW_PU 19 /* 0x00080000 */
+#define RES4325_BBPLL_PWRSW_PU 20 /* 0x00100000 */
+#define RES4325_HT_AVAIL 21 /* 0x00200000 */
+
+/* 4325 B0/C0 resources */
+#define RES4325B0_CBUCK_LPOM 1 /* 0x00000002 */
+#define RES4325B0_CBUCK_BURST 2 /* 0x00000004 */
+#define RES4325B0_CBUCK_PWM 3 /* 0x00000008 */
+#define RES4325B0_CLDO_PU 4 /* 0x00000010 */
+
+/* 4325 C1 resources */
+#define RES4325C1_LNLDO2_PU 12 /* 0x00001000 */
+
+#define RES4329_RESERVED0 0 /* 0x00000001 */
+#define RES4329_CBUCK_LPOM 1 /* 0x00000002 */
+#define RES4329_CBUCK_BURST 2 /* 0x00000004 */
+#define RES4329_CBUCK_PWM 3 /* 0x00000008 */
+#define RES4329_CLDO_PU 4 /* 0x00000010 */
+#define RES4329_PALDO_PU 5 /* 0x00000020 */
+#define RES4329_ILP_REQUEST 6 /* 0x00000040 */
+#define RES4329_RESERVED7 7 /* 0x00000080 */
+#define RES4329_RESERVED8 8 /* 0x00000100 */
+#define RES4329_LNLDO1_PU 9 /* 0x00000200 */
+#define RES4329_OTP_PU 10 /* 0x00000400 */
+#define RES4329_RESERVED11 11 /* 0x00000800 */
+#define RES4329_LNLDO2_PU 12 /* 0x00001000 */
+#define RES4329_XTAL_PU 13 /* 0x00002000 */
+#define RES4329_ALP_AVAIL 14 /* 0x00004000 */
+#define RES4329_RX_PWRSW_PU 15 /* 0x00008000 */
+#define RES4329_TX_PWRSW_PU 16 /* 0x00010000 */
+#define RES4329_RFPLL_PWRSW_PU 17 /* 0x00020000 */
+#define RES4329_LOGEN_PWRSW_PU 18 /* 0x00040000 */
+#define RES4329_AFE_PWRSW_PU 19 /* 0x00080000 */
+#define RES4329_BBPLL_PWRSW_PU 20 /* 0x00100000 */
+#define RES4329_HT_AVAIL 21 /* 0x00200000 */
+
+/* 4315 resources */
+#define RES4315_CBUCK_LPOM 1 /* 0x00000002 */
+#define RES4315_CBUCK_BURST 2 /* 0x00000004 */
+#define RES4315_CBUCK_PWM 3 /* 0x00000008 */
+#define RES4315_CLDO_PU 4 /* 0x00000010 */
+#define RES4315_PALDO_PU 5 /* 0x00000020 */
+#define RES4315_ILP_REQUEST 6 /* 0x00000040 */
+#define RES4315_LNLDO1_PU 9 /* 0x00000200 */
+#define RES4315_OTP_PU 10 /* 0x00000400 */
+#define RES4315_LNLDO2_PU 12 /* 0x00001000 */
+#define RES4315_XTAL_PU 13 /* 0x00002000 */
+#define RES4315_ALP_AVAIL 14 /* 0x00004000 */
+#define RES4315_RX_PWRSW_PU 15 /* 0x00008000 */
+#define RES4315_TX_PWRSW_PU 16 /* 0x00010000 */
+#define RES4315_RFPLL_PWRSW_PU 17 /* 0x00020000 */
+#define RES4315_LOGEN_PWRSW_PU 18 /* 0x00040000 */
+#define RES4315_AFE_PWRSW_PU 19 /* 0x00080000 */
+#define RES4315_BBPLL_PWRSW_PU 20 /* 0x00100000 */
+#define RES4315_HT_AVAIL 21 /* 0x00200000 */
+
+/* 4319 resources */
+#define RES4319_CBUCK_LPOM 1 /* 0x00000002 */
+#define RES4319_CBUCK_BURST 2 /* 0x00000004 */
+#define RES4319_CBUCK_PWM 3 /* 0x00000008 */
+#define RES4319_CLDO_PU 4 /* 0x00000010 */
+#define RES4319_PALDO_PU 5 /* 0x00000020 */
+#define RES4319_ILP_REQUEST 6 /* 0x00000040 */
+#define RES4319_LNLDO1_PU 9 /* 0x00000200 */
+#define RES4319_OTP_PU 10 /* 0x00000400 */
+#define RES4319_LNLDO2_PU 12 /* 0x00001000 */
+#define RES4319_XTAL_PU 13 /* 0x00002000 */
+#define RES4319_ALP_AVAIL 14 /* 0x00004000 */
+#define RES4319_RX_PWRSW_PU 15 /* 0x00008000 */
+#define RES4319_TX_PWRSW_PU 16 /* 0x00010000 */
+#define RES4319_RFPLL_PWRSW_PU 17 /* 0x00020000 */
+#define RES4319_LOGEN_PWRSW_PU 18 /* 0x00040000 */
+#define RES4319_AFE_PWRSW_PU 19 /* 0x00080000 */
+#define RES4319_BBPLL_PWRSW_PU 20 /* 0x00100000 */
+#define RES4319_HT_AVAIL 21 /* 0x00200000 */
+
+#define CCTL_4319USB_XTAL_SEL_MASK 0x00180000
+#define CCTL_4319USB_XTAL_SEL_SHIFT 19
+#define CCTL_4319USB_48MHZ_PLL_SEL 1
+#define CCTL_4319USB_24MHZ_PLL_SEL 2
+
+/* PMU resources for 4336 */
+#define RES4336_CBUCK_LPOM 0
+#define RES4336_CBUCK_BURST 1
+#define RES4336_CBUCK_LP_PWM 2
+#define RES4336_CBUCK_PWM 3
+#define RES4336_CLDO_PU 4
+#define RES4336_DIS_INT_RESET_PD 5
+#define RES4336_ILP_REQUEST 6
+#define RES4336_LNLDO_PU 7
+#define RES4336_LDO3P3_PU 8
+#define RES4336_OTP_PU 9
+#define RES4336_XTAL_PU 10
+#define RES4336_ALP_AVAIL 11
+#define RES4336_RADIO_PU 12
+#define RES4336_BG_PU 13
+#define RES4336_VREG1p4_PU_PU 14
+#define RES4336_AFE_PWRSW_PU 15
+#define RES4336_RX_PWRSW_PU 16
+#define RES4336_TX_PWRSW_PU 17
+#define RES4336_BB_PWRSW_PU 18
+#define RES4336_SYNTH_PWRSW_PU 19
+#define RES4336_MISC_PWRSW_PU 20
+#define RES4336_LOGEN_PWRSW_PU 21
+#define RES4336_BBPLL_PWRSW_PU 22
+#define RES4336_MACPHY_CLKAVAIL 23
+#define RES4336_HT_AVAIL 24
+#define RES4336_RSVD 25
+
+/* 4330 resources */
+#define RES4330_CBUCK_LPOM 0
+#define RES4330_CBUCK_BURST 1
+#define RES4330_CBUCK_LP_PWM 2
+#define RES4330_CBUCK_PWM 3
+#define RES4330_CLDO_PU 4
+#define RES4330_DIS_INT_RESET_PD 5
+#define RES4330_ILP_REQUEST 6
+#define RES4330_LNLDO_PU 7
+#define RES4330_LDO3P3_PU 8
+#define RES4330_OTP_PU 9
+#define RES4330_XTAL_PU 10
+#define RES4330_ALP_AVAIL 11
+#define RES4330_RADIO_PU 12
+#define RES4330_BG_PU 13
+#define RES4330_VREG1p4_PU_PU 14
+#define RES4330_AFE_PWRSW_PU 15
+#define RES4330_RX_PWRSW_PU 16
+#define RES4330_TX_PWRSW_PU 17
+#define RES4330_BB_PWRSW_PU 18
+#define RES4330_SYNTH_PWRSW_PU 19
+#define RES4330_MISC_PWRSW_PU 20
+#define RES4330_LOGEN_PWRSW_PU 21
+#define RES4330_BBPLL_PWRSW_PU 22
+#define RES4330_MACPHY_CLKAVAIL 23
+#define RES4330_HT_AVAIL 24
+#define RES4330_5gRX_PWRSW_PU 25
+#define RES4330_5gTX_PWRSW_PU 26
+#define RES4330_5g_LOGEN_PWRSW_PU 27
+
+/* 4313 resources */
+#define RES4313_BB_PU_RSRC 0
+#define RES4313_ILP_REQ_RSRC 1
+#define RES4313_XTAL_PU_RSRC 2
+#define RES4313_ALP_AVAIL_RSRC 3
+#define RES4313_RADIO_PU_RSRC 4
+#define RES4313_BG_PU_RSRC 5
+#define RES4313_VREG1P4_PU_RSRC 6
+#define RES4313_AFE_PWRSW_RSRC 7
+#define RES4313_RX_PWRSW_RSRC 8
+#define RES4313_TX_PWRSW_RSRC 9
+#define RES4313_BB_PWRSW_RSRC 10
+#define RES4313_SYNTH_PWRSW_RSRC 11
+#define RES4313_MISC_PWRSW_RSRC 12
+#define RES4313_BB_PLL_PWRSW_RSRC 13
+#define RES4313_HT_AVAIL_RSRC 14
+#define RES4313_MACPHY_CLK_AVAIL_RSRC 15
+
+/* PMU resource up transition time in ILP cycles */
+#define PMURES_UP_TRANSITION 2
+
/* Setup resource up/down timers */
typedef struct {
u8 resnum;
@@ -142,7 +609,8 @@ typedef struct {
u32 res_mask; /* resources (chip specific) */
s8 action; /* action */
u32 depend_mask; /* changes to the dependancies mask */
- bool(*filter) (si_t *sih); /* action is taken when filter is NULL or return true */
+ /* action is taken when filter is NULL or return true: */
+ bool(*filter) (struct si_pub *sih);
} pmu_res_depend_t;
/* setup pll and query clock speed */
@@ -158,10 +626,10 @@ typedef struct {
/*
* prototypes used in resource tables
*/
-static bool si_pmu_res_depfltr_bb(si_t *sih);
-static bool si_pmu_res_depfltr_ncb(si_t *sih);
-static bool si_pmu_res_depfltr_paldo(si_t *sih);
-static bool si_pmu_res_depfltr_npaldo(si_t *sih);
+static bool si_pmu_res_depfltr_bb(struct si_pub *sih);
+static bool si_pmu_res_depfltr_ncb(struct si_pub *sih);
+static bool si_pmu_res_depfltr_paldo(struct si_pub *sih);
+static bool si_pmu_res_depfltr_npaldo(struct si_pub *sih);
static const pmu_res_updown_t bcm4328a0_res_updown[] = {
{
@@ -505,33 +973,33 @@ static const pmu1_xtaltab0_t pmu1_xtaltab0_880[] = {
};
/* true if the power topology uses the buck boost to provide 3.3V to VDDIO_RF and WLAN PA */
-static bool si_pmu_res_depfltr_bb(si_t *sih)
+static bool si_pmu_res_depfltr_bb(struct si_pub *sih)
{
return (sih->boardflags & BFL_BUCKBOOST) != 0;
}
/* true if the power topology doesn't use the cbuck. Key on chiprev also if the chip is BCM4325. */
-static bool si_pmu_res_depfltr_ncb(si_t *sih)
+static bool si_pmu_res_depfltr_ncb(struct si_pub *sih)
{
return (sih->boardflags & BFL_NOCBUCK) != 0;
}
/* true if the power topology uses the PALDO */
-static bool si_pmu_res_depfltr_paldo(si_t *sih)
+static bool si_pmu_res_depfltr_paldo(struct si_pub *sih)
{
return (sih->boardflags & BFL_PALDO) != 0;
}
/* true if the power topology doesn't use the PALDO */
-static bool si_pmu_res_depfltr_npaldo(si_t *sih)
+static bool si_pmu_res_depfltr_npaldo(struct si_pub *sih)
{
return (sih->boardflags & BFL_PALDO) == 0;
}
/* Return dependancies (direct or all/indirect) for the given resources */
static u32
-si_pmu_res_deps(si_t *sih, chipcregs_t *cc, u32 rsrcs,
+si_pmu_res_deps(struct si_pub *sih, chipcregs_t *cc, u32 rsrcs,
bool all)
{
u32 deps = 0;
@@ -551,7 +1019,7 @@ si_pmu_res_deps(si_t *sih, chipcregs_t *cc, u32 rsrcs,
}
/* Determine min/max rsrc masks. Value 0 leaves hardware at default. */
-static void si_pmu_res_masks(si_t *sih, u32 * pmin, u32 * pmax)
+static void si_pmu_res_masks(struct si_pub *sih, u32 * pmin, u32 * pmax)
{
u32 min_mask = 0, max_mask = 0;
uint rsrcs;
@@ -638,7 +1106,7 @@ static void si_pmu_res_masks(si_t *sih, u32 * pmin, u32 * pmax)
/* Return up time in ILP cycles for the given resource. */
static uint
-si_pmu_res_uptime(si_t *sih, chipcregs_t *cc, u8 rsrc) {
+si_pmu_res_uptime(struct si_pub *sih, chipcregs_t *cc, u8 rsrc) {
u32 deps;
uint up, i, dup, dmax;
u32 min_mask = 0, max_mask = 0;
@@ -671,7 +1139,7 @@ si_pmu_res_uptime(si_t *sih, chipcregs_t *cc, u8 rsrc) {
}
static void
-si_pmu_spuravoid_pllupdate(si_t *sih, chipcregs_t *cc, u8 spuravoid)
+si_pmu_spuravoid_pllupdate(struct si_pub *sih, chipcregs_t *cc, u8 spuravoid)
{
u32 tmp = 0;
u8 phypll_offset = 0;
@@ -871,7 +1339,7 @@ si_pmu_spuravoid_pllupdate(si_t *sih, chipcregs_t *cc, u8 spuravoid)
}
/* select default xtal frequency for each chip */
-static const pmu1_xtaltab0_t *si_pmu1_xtaldef0(si_t *sih)
+static const pmu1_xtaltab0_t *si_pmu1_xtaldef0(struct si_pub *sih)
{
switch (sih->chip) {
case BCM4329_CHIP_ID:
@@ -896,7 +1364,7 @@ static const pmu1_xtaltab0_t *si_pmu1_xtaldef0(si_t *sih)
}
/* select xtal table for each chip */
-static const pmu1_xtaltab0_t *si_pmu1_xtaltab0(si_t *sih)
+static const pmu1_xtaltab0_t *si_pmu1_xtaltab0(struct si_pub *sih)
{
switch (sih->chip) {
case BCM4329_CHIP_ID:
@@ -918,7 +1386,7 @@ static const pmu1_xtaltab0_t *si_pmu1_xtaltab0(si_t *sih)
/* query alp/xtal clock frequency */
static u32
-si_pmu1_alpclk0(si_t *sih, chipcregs_t *cc)
+si_pmu1_alpclk0(struct si_pub *sih, chipcregs_t *cc)
{
const pmu1_xtaltab0_t *xt;
u32 xf;
@@ -936,7 +1404,7 @@ si_pmu1_alpclk0(si_t *sih, chipcregs_t *cc)
}
/* select default pll fvco for each chip */
-static u32 si_pmu1_pllfvco0(si_t *sih)
+static u32 si_pmu1_pllfvco0(struct si_pub *sih)
{
switch (sih->chip) {
case BCM4329_CHIP_ID:
@@ -956,7 +1424,7 @@ static u32 si_pmu1_pllfvco0(si_t *sih)
return 0;
}
-static void si_pmu_set_4330_plldivs(si_t *sih)
+static void si_pmu_set_4330_plldivs(struct si_pub *sih)
{
u32 FVCO = si_pmu1_pllfvco0(sih) / 1000;
u32 m1div, m2div, m3div, m4div, m5div, m6div;
@@ -990,7 +1458,7 @@ static void si_pmu_set_4330_plldivs(si_t *sih)
* case the xtal frequency is unknown to the s/w so we need to call
* si_pmu1_xtaldef0() wherever it is needed to return a default value.
*/
-static void si_pmu1_pllinit0(si_t *sih, chipcregs_t *cc, u32 xtal)
+static void si_pmu1_pllinit0(struct si_pub *sih, chipcregs_t *cc, u32 xtal)
{
const pmu1_xtaltab0_t *xt;
u32 tmp;
@@ -1210,7 +1678,7 @@ static void si_pmu1_pllinit0(si_t *sih, chipcregs_t *cc, u32 xtal)
W_REG(&cc->pmucontrol, tmp);
}
-u32 si_pmu_ilp_clock(si_t *sih)
+u32 si_pmu_ilp_clock(struct si_pub *sih)
{
static u32 ilpcycles_per_sec;
@@ -1232,7 +1700,7 @@ u32 si_pmu_ilp_clock(si_t *sih)
return ilpcycles_per_sec;
}
-void si_pmu_set_ldo_voltage(si_t *sih, u8 ldo, u8 voltage)
+void si_pmu_set_ldo_voltage(struct si_pub *sih, u8 ldo, u8 voltage)
{
u8 sr_cntl_shift = 0, rc_shift = 0, shift = 0, mask = 0;
u8 addr = 0;
@@ -1282,7 +1750,7 @@ void si_pmu_set_ldo_voltage(si_t *sih, u8 ldo, u8 voltage)
mask << shift, (voltage & mask) << shift);
}
-u16 si_pmu_fast_pwrup_delay(si_t *sih)
+u16 si_pmu_fast_pwrup_delay(struct si_pub *sih)
{
uint delay = PMU_MAX_TRANSITION_DLY;
chipcregs_t *cc;
@@ -1356,7 +1824,7 @@ u16 si_pmu_fast_pwrup_delay(si_t *sih)
return (u16) delay;
}
-void si_pmu_sprom_enable(si_t *sih, bool enable)
+void si_pmu_sprom_enable(struct si_pub *sih, bool enable)
{
chipcregs_t *cc;
uint origidx;
@@ -1370,7 +1838,7 @@ void si_pmu_sprom_enable(si_t *sih, bool enable)
}
/* Read/write a chipcontrol reg */
-u32 si_pmu_chipcontrol(si_t *sih, uint reg, u32 mask, u32 val)
+u32 si_pmu_chipcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val)
{
ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, chipcontrol_addr), ~0,
reg);
@@ -1379,7 +1847,7 @@ u32 si_pmu_chipcontrol(si_t *sih, uint reg, u32 mask, u32 val)
}
/* Read/write a regcontrol reg */
-u32 si_pmu_regcontrol(si_t *sih, uint reg, u32 mask, u32 val)
+u32 si_pmu_regcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val)
{
ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, regcontrol_addr), ~0,
reg);
@@ -1388,7 +1856,7 @@ u32 si_pmu_regcontrol(si_t *sih, uint reg, u32 mask, u32 val)
}
/* Read/write a pllcontrol reg */
-u32 si_pmu_pllcontrol(si_t *sih, uint reg, u32 mask, u32 val)
+u32 si_pmu_pllcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val)
{
ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, pllcontrol_addr), ~0,
reg);
@@ -1397,14 +1865,14 @@ u32 si_pmu_pllcontrol(si_t *sih, uint reg, u32 mask, u32 val)
}
/* PMU PLL update */
-void si_pmu_pllupd(si_t *sih)
+void si_pmu_pllupd(struct si_pub *sih)
{
ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, pmucontrol),
PCTL_PLL_PLLCTL_UPD, PCTL_PLL_PLLCTL_UPD);
}
/* query alp/xtal clock frequency */
-u32 si_pmu_alp_clock(si_t *sih)
+u32 si_pmu_alp_clock(struct si_pub *sih)
{
chipcregs_t *cc;
uint origidx;
@@ -1455,7 +1923,7 @@ u32 si_pmu_alp_clock(si_t *sih)
return clock;
}
-void si_pmu_spuravoid(si_t *sih, u8 spuravoid)
+void si_pmu_spuravoid(struct si_pub *sih, u8 spuravoid)
{
chipcregs_t *cc;
uint origidx, intr_val;
@@ -1490,7 +1958,7 @@ void si_pmu_spuravoid(si_t *sih, u8 spuravoid)
}
/* initialize PMU */
-void si_pmu_init(si_t *sih)
+void si_pmu_init(struct si_pub *sih)
{
chipcregs_t *cc;
uint origidx;
@@ -1518,7 +1986,7 @@ void si_pmu_init(si_t *sih)
}
/* initialize PMU chip controls and other chip level stuff */
-void si_pmu_chip_init(si_t *sih)
+void si_pmu_chip_init(struct si_pub *sih)
{
uint origidx;
@@ -1533,7 +2001,7 @@ void si_pmu_chip_init(si_t *sih)
}
/* initialize PMU switch/regulators */
-void si_pmu_swreg_init(si_t *sih)
+void si_pmu_swreg_init(struct si_pub *sih)
{
switch (sih->chip) {
case BCM4336_CHIP_ID:
@@ -1558,7 +2026,7 @@ void si_pmu_swreg_init(si_t *sih)
}
/* initialize PLL */
-void si_pmu_pll_init(si_t *sih, uint xtalfreq)
+void si_pmu_pll_init(struct si_pub *sih, uint xtalfreq)
{
chipcregs_t *cc;
uint origidx;
@@ -1598,7 +2066,7 @@ void si_pmu_pll_init(si_t *sih, uint xtalfreq)
}
/* initialize PMU resources */
-void si_pmu_res_init(si_t *sih)
+void si_pmu_res_init(struct si_pub *sih)
{
chipcregs_t *cc;
uint origidx;
@@ -1769,7 +2237,7 @@ void si_pmu_res_init(si_t *sih)
ai_setcoreidx(sih, origidx);
}
-u32 si_pmu_measure_alpclk(si_t *sih)
+u32 si_pmu_measure_alpclk(struct si_pub *sih)
{
chipcregs_t *cc;
uint origidx;
@@ -1822,7 +2290,7 @@ u32 si_pmu_measure_alpclk(si_t *sih)
return alp_khz;
}
-bool si_pmu_is_otp_powered(si_t *sih)
+bool si_pmu_is_otp_powered(struct si_pub *sih)
{
uint idx;
chipcregs_t *cc;
@@ -1872,7 +2340,7 @@ bool si_pmu_is_otp_powered(si_t *sih)
}
/* power up/down OTP through PMU resources */
-void si_pmu_otp_power(si_t *sih, bool on)
+void si_pmu_otp_power(struct si_pub *sih, bool on)
{
chipcregs_t *cc;
uint origidx;
diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.h b/drivers/staging/brcm80211/brcmsmac/pmu.h
index bd5b809b2e319..eff8d5b050384 100644
--- a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.h
+++ b/drivers/staging/brcm80211/brcmsmac/pmu.h
@@ -15,8 +15,8 @@
*/
-#ifndef WLC_PMU_H_
-#define WLC_PMU_H_
+#ifndef _BRCM_PMU_H_
+#define _BRCM_PMU_H_
#include <linux/types.h>
@@ -36,23 +36,23 @@
#define SET_LDO_VOLTAGE_LNLDO1 9
#define SET_LDO_VOLTAGE_LNLDO2_SEL 10
-extern void si_pmu_set_ldo_voltage(si_t *sih, u8 ldo, u8 voltage);
-extern u16 si_pmu_fast_pwrup_delay(si_t *sih);
-extern void si_pmu_sprom_enable(si_t *sih, bool enable);
-extern u32 si_pmu_chipcontrol(si_t *sih, uint reg, u32 mask, u32 val);
-extern u32 si_pmu_regcontrol(si_t *sih, uint reg, u32 mask, u32 val);
-extern u32 si_pmu_ilp_clock(si_t *sih);
-extern u32 si_pmu_alp_clock(si_t *sih);
-extern void si_pmu_pllupd(si_t *sih);
-extern void si_pmu_spuravoid(si_t *sih, u8 spuravoid);
-extern u32 si_pmu_pllcontrol(si_t *sih, uint reg, u32 mask, u32 val);
-extern void si_pmu_init(si_t *sih);
-extern void si_pmu_chip_init(si_t *sih);
-extern void si_pmu_pll_init(si_t *sih, u32 xtalfreq);
-extern void si_pmu_res_init(si_t *sih);
-extern void si_pmu_swreg_init(si_t *sih);
-extern u32 si_pmu_measure_alpclk(si_t *sih);
-extern bool si_pmu_is_otp_powered(si_t *sih);
-extern void si_pmu_otp_power(si_t *sih, bool on);
+extern void si_pmu_set_ldo_voltage(struct si_pub *sih, u8 ldo, u8 voltage);
+extern u16 si_pmu_fast_pwrup_delay(struct si_pub *sih);
+extern void si_pmu_sprom_enable(struct si_pub *sih, bool enable);
+extern u32 si_pmu_chipcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val);
+extern u32 si_pmu_regcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val);
+extern u32 si_pmu_ilp_clock(struct si_pub *sih);
+extern u32 si_pmu_alp_clock(struct si_pub *sih);
+extern void si_pmu_pllupd(struct si_pub *sih);
+extern void si_pmu_spuravoid(struct si_pub *sih, u8 spuravoid);
+extern u32 si_pmu_pllcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val);
+extern void si_pmu_init(struct si_pub *sih);
+extern void si_pmu_chip_init(struct si_pub *sih);
+extern void si_pmu_pll_init(struct si_pub *sih, u32 xtalfreq);
+extern void si_pmu_res_init(struct si_pub *sih);
+extern void si_pmu_swreg_init(struct si_pub *sih);
+extern u32 si_pmu_measure_alpclk(struct si_pub *sih);
+extern bool si_pmu_is_otp_powered(struct si_pub *sih);
+extern void si_pmu_otp_power(struct si_pub *sih, bool on);
-#endif /* WLC_PMU_H_ */
+#endif /* _BRCM_PMU_H_ */
diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h b/drivers/staging/brcm80211/brcmsmac/pub.h
index 9334deacda12d..e5f24b051ab03 100644
--- a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h
+++ b/drivers/staging/brcm80211/brcmsmac/pub.h
@@ -14,8 +14,11 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#ifndef _wlc_pub_h_
-#define _wlc_pub_h_
+#ifndef _BRCM_PUB_H_
+#define _BRCM_PUB_H_
+
+#include "types.h" /* forward structure declarations */
+#include "brcmu_wifi.h" /* for chanspec_t */
#define WLC_NUMRATES 16 /* max # of rates in a rateset */
#define MAXMULTILIST 32 /* max # multicast addresses */
@@ -96,6 +99,12 @@
#define AIDMAPSZ (roundup(MAXSCB, NBBY)/NBBY) /* aid bitmap size in bytes */
#endif /* AIDMAPSZ */
+#define MAX_STREAMS_SUPPORTED 4 /* max number of streams supported */
+
+#define WL_SPURAVOID_OFF 0
+#define WL_SPURAVOID_ON1 1
+#define WL_SPURAVOID_ON2 2
+
struct ieee80211_tx_queue_params;
typedef struct wlc_tunables {
@@ -134,7 +143,6 @@ struct rsn_parms {
};
/*
- * buffer length needed for wlc_format_ssid
* 32 SSID chars, max of 4 chars for each SSID char "\xFF", plus NULL.
*/
#define SSID_FMT_BUF_LEN ((4 * IEEE80211_MAX_SSID_LEN) + 1)
@@ -152,7 +160,7 @@ struct rsn_parms {
IEEE80211_HT_CAP_SUP_WIDTH_20_40 | IEEE80211_HT_CAP_GRN_FLD |\
IEEE80211_HT_CAP_MAX_AMSDU | IEEE80211_HT_CAP_DSSSCCK40)
-/* wlc internal bss_info, wl external one is in wlioctl.h */
+/* wlc internal bss_info */
typedef struct wlc_bss_info {
u8 BSSID[ETH_ALEN]; /* network BSSID */
u16 flags; /* flags for internal attributes */
@@ -211,7 +219,7 @@ struct wlc_if;
/* watchdog down and dump callback function proto's */
typedef int (*watchdog_fn_t) (void *handle);
typedef int (*down_fn_t) (void *handle);
-typedef int (*dump_fn_t) (void *handle, struct bcmstrbuf *b);
+typedef int (*dump_fn_t) (void *handle, struct brcmu_strbuf *b);
/* IOVar handler
*
@@ -226,7 +234,7 @@ typedef int (*dump_fn_t) (void *handle, struct bcmstrbuf *b);
*
* All pointers may point into the same buffer.
*/
-typedef int (*iovar_fn_t) (void *handle, const bcm_iovar_t *vi,
+typedef int (*iovar_fn_t) (void *handle, const struct brcmu_iovar *vi,
u32 actionid, const char *name, void *params,
uint plen, void *arg, int alen, int vsize,
struct wlc_if *wlcif);
@@ -247,7 +255,7 @@ struct wlc_pub {
uint mac80211_state;
uint unit; /* device instance number */
uint corerev; /* core revision */
- si_t *sih; /* SB handle (cookie for siutils calls) */
+ struct si_pub *sih; /* SI handle (cookie for siutils calls) */
char *vars; /* "environment" name=value */
bool up; /* interface up and running */
bool hw_off; /* HW is off */
@@ -311,9 +319,6 @@ struct wlc_pub {
u32 boardflags; /* Board specific flags from srom */
u32 boardflags2; /* More board flags if sromrev >= 4 */
bool tempsense_disable; /* disable periodic tempsense check */
-
- bool _lmac; /* lmac module included and enabled */
- bool _lmacproto; /* lmac protocol module included and enabled */
bool phy_11ncapable; /* the PHY/HW is capable of 802.11N */
bool _ampdumac; /* mac assist ampdu enabled or not */
@@ -335,7 +340,7 @@ typedef struct wl_rxsts {
uint preamble; /* Unknown, short, long */
uint encoding; /* Unknown, CCK, PBCC, OFDM */
uint nfrmtype; /* special 802.11n frames(AMPDU, AMSDU) */
- struct wl_if *wlif; /* wl interface */
+ struct brcms_if *wlif; /* wl interface */
} wl_rxsts_t;
/* status per error RX pkt */
@@ -371,6 +376,13 @@ typedef struct wl_rxsts {
#define WL_RXS_NFRM_AMSDU_FIRST 0x00000004 /* first MSDU in A-MSDU */
#define WL_RXS_NFRM_AMSDU_SUB 0x00000008 /* subsequent MSDU(s) in A-MSDU */
+enum wlc_par_id {
+ IOV_MPC = 1,
+ IOV_RTSTHRESH,
+ IOV_QTXPOWER,
+ IOV_BCN_LI_BCN /* Beacon listen interval in # of beacons */
+};
+
/* forward declare and use the struct notation so we don't have to
* have it defined if not necessary.
*/
@@ -483,18 +495,108 @@ extern const u8 wme_fifo2ac[];
#define WLC_PROT_N_PAM_OVR 15 /* n preamble override */
#define WLC_PROT_N_OBSS 16 /* non-HT OBSS present */
+/*
+ * 54g modes (basic bits may still be overridden)
+ *
+ * GMODE_LEGACY_B Rateset: 1b, 2b, 5.5, 11
+ * Preamble: Long
+ * Shortslot: Off
+ * GMODE_AUTO Rateset: 1b, 2b, 5.5b, 11b, 18, 24, 36, 54
+ * Extended Rateset: 6, 9, 12, 48
+ * Preamble: Long
+ * Shortslot: Auto
+ * GMODE_ONLY Rateset: 1b, 2b, 5.5b, 11b, 18, 24b, 36, 54
+ * Extended Rateset: 6b, 9, 12b, 48
+ * Preamble: Short required
+ * Shortslot: Auto
+ * GMODE_B_DEFERRED Rateset: 1b, 2b, 5.5b, 11b, 18, 24, 36, 54
+ * Extended Rateset: 6, 9, 12, 48
+ * Preamble: Long
+ * Shortslot: On
+ * GMODE_PERFORMANCE Rateset: 1b, 2b, 5.5b, 6b, 9, 11b, 12b, 18, 24b, 36, 48, 54
+ * Preamble: Short required
+ * Shortslot: On and required
+ * GMODE_LRS Rateset: 1b, 2b, 5.5b, 11b
+ * Extended Rateset: 6, 9, 12, 18, 24, 36, 48, 54
+ * Preamble: Long
+ * Shortslot: Auto
+ */
+#define GMODE_LEGACY_B 0
+#define GMODE_AUTO 1
+#define GMODE_ONLY 2
+#define GMODE_B_DEFERRED 3
+#define GMODE_PERFORMANCE 4
+#define GMODE_LRS 5
+#define GMODE_MAX 6
+
+/* values for PLCPHdr_override */
+#define WLC_PLCP_AUTO -1
+#define WLC_PLCP_SHORT 0
+#define WLC_PLCP_LONG 1
+
+/* values for g_protection_override and n_protection_override */
+#define WLC_PROTECTION_AUTO -1
+#define WLC_PROTECTION_OFF 0
+#define WLC_PROTECTION_ON 1
+#define WLC_PROTECTION_MMHDR_ONLY 2
+#define WLC_PROTECTION_CTS_ONLY 3
+
+/* values for g_protection_control and n_protection_control */
+#define WLC_PROTECTION_CTL_OFF 0
+#define WLC_PROTECTION_CTL_LOCAL 1
+#define WLC_PROTECTION_CTL_OVERLAP 2
+
+/* values for n_protection */
+#define WLC_N_PROTECTION_OFF 0
+#define WLC_N_PROTECTION_OPTIONAL 1
+#define WLC_N_PROTECTION_20IN40 2
+#define WLC_N_PROTECTION_MIXEDMODE 3
+
+/* values for band specific 40MHz capabilities */
+#define WLC_N_BW_20ALL 0
+#define WLC_N_BW_40ALL 1
+#define WLC_N_BW_20IN2G_40IN5G 2
+
+/* bitflags for SGI support (sgi_rx iovar) */
+#define WLC_N_SGI_20 0x01
+#define WLC_N_SGI_40 0x02
+
+/* defines used by the nrate iovar */
+#define NRATE_MCS_INUSE 0x00000080 /* MSC in use,indicates b0-6 holds an mcs */
+#define NRATE_RATE_MASK 0x0000007f /* rate/mcs value */
+#define NRATE_STF_MASK 0x0000ff00 /* stf mode mask: siso, cdd, stbc, sdm */
+#define NRATE_STF_SHIFT 8 /* stf mode shift */
+#define NRATE_OVERRIDE 0x80000000 /* bit indicates override both rate & mode */
+#define NRATE_OVERRIDE_MCS_ONLY 0x40000000 /* bit indicate to override mcs only */
+#define NRATE_SGI_MASK 0x00800000 /* sgi mode */
+#define NRATE_SGI_SHIFT 23 /* sgi mode */
+#define NRATE_LDPC_CODING 0x00400000 /* bit indicates adv coding in use */
+#define NRATE_LDPC_SHIFT 22 /* ldpc shift */
+
+#define NRATE_STF_SISO 0 /* stf mode SISO */
+#define NRATE_STF_CDD 1 /* stf mode CDD */
+#define NRATE_STF_STBC 2 /* stf mode STBC */
+#define NRATE_STF_SDM 3 /* stf mode SDM */
+
+#define ANT_SELCFG_MAX 4 /* max number of antenna configurations */
+
+#define HIGHEST_SINGLE_STREAM_MCS 7 /* MCS values greater than this enable multiple streams */
+
+typedef struct {
+ u8 ant_config[ANT_SELCFG_MAX]; /* antenna configuration */
+ u8 num_antcfg; /* number of available antenna configurations */
+} wlc_antselcfg_t;
+
/* common functions for every port */
-extern void *wlc_attach(struct wl_info *wl, u16 vendor, u16 device, uint unit,
- bool piomode, void *regsva, uint bustype, void *btparam,
- uint *perr);
+extern void *wlc_attach(struct brcms_info *wl, u16 vendor, u16 device,
+ uint unit, bool piomode, void *regsva, uint bustype,
+ void *btparam, uint *perr);
extern uint wlc_detach(struct wlc_info *wlc);
extern int wlc_up(struct wlc_info *wlc);
extern uint wlc_down(struct wlc_info *wlc);
extern int wlc_set(struct wlc_info *wlc, int cmd, int arg);
extern int wlc_get(struct wlc_info *wlc, int cmd, int *arg);
-extern int wlc_iovar_getint(struct wlc_info *wlc, const char *name, int *arg);
-extern int wlc_iovar_setint(struct wlc_info *wlc, const char *name, int arg);
extern bool wlc_chipmatch(u16 vendor, u16 device);
extern void wlc_init(struct wlc_info *wlc);
extern void wlc_reset(struct wlc_info *wlc);
@@ -507,9 +609,6 @@ extern bool wlc_isr(struct wlc_info *wlc, bool *wantdpc);
extern bool wlc_dpc(struct wlc_info *wlc, bool bounded);
extern bool wlc_sendpkt_mac80211(struct wlc_info *wlc, struct sk_buff *sdu,
struct ieee80211_hw *hw);
-extern int wlc_iovar_op(struct wlc_info *wlc, const char *name, void *params,
- int p_len, void *arg, int len, bool set,
- struct wlc_if *wlcif);
extern int wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len,
struct wlc_if *wlcif);
extern bool wlc_aggregatable(struct wlc_info *wlc, u8 tid);
@@ -535,18 +634,17 @@ extern void wlc_default_rateset(struct wlc_info *wlc, wlc_rateset_t *rs);
struct ieee80211_sta;
extern void wlc_ampdu_flush(struct wlc_info *wlc, struct ieee80211_sta *sta,
u16 tid);
+extern int wlc_set_par(struct wlc_info *wlc, enum wlc_par_id par_id, int val);
+extern int wlc_get_par(struct wlc_info *wlc, enum wlc_par_id par_id, int *ret_int_ptr);
+extern char *getvar(char *vars, const char *name);
+extern int getintvar(char *vars, const char *name);
/* wlc_phy.c helper functions */
extern void wlc_set_ps_ctrl(struct wlc_info *wlc);
extern void wlc_mctrl(struct wlc_info *wlc, u32 mask, u32 val);
-/* ioctl */
-extern int wlc_iovar_check(struct wlc_pub *pub, const bcm_iovar_t *vi,
- void *arg,
- int len, bool set);
-
-extern int wlc_module_register(struct wlc_pub *pub, const bcm_iovar_t *iovars,
- const char *name, void *hdl, iovar_fn_t iovar_fn,
+extern int wlc_module_register(struct wlc_pub *pub,
+ const char *name, void *hdl,
watchdog_fn_t watchdog_fn, down_fn_t down_fn);
extern int wlc_module_unregister(struct wlc_pub *pub, const char *name,
void *hdl);
@@ -558,18 +656,10 @@ extern void wlc_scan_stop(struct wlc_info *wlc);
extern int wlc_get_curband(struct wlc_info *wlc);
extern void wlc_wait_for_tx_completion(struct wlc_info *wlc, bool drop);
-#if defined(BCMDBG)
-extern int wlc_iocregchk(struct wlc_info *wlc, uint band);
-#endif
-
/* helper functions */
extern bool wlc_check_radio_disabled(struct wlc_info *wlc);
extern bool wlc_radio_monitor_stop(struct wlc_info *wlc);
-#if defined(BCMDBG)
-extern int wlc_format_ssid(char *buf, const unsigned char ssid[], uint ssid_len);
-#endif
-
#define MAXBANDS 2 /* Maximum #of bands */
/* bandstate array indices */
#define BAND_2G_INDEX 0 /* wlc->bandstate[x] index */
@@ -581,4 +671,4 @@ extern int wlc_format_ssid(char *buf, const unsigned char ssid[], uint ssid_len)
/* BMAC RPC: 7 u32 params: pkttotlen, fifo, commit, fid, txpktpend, pktflag, rpc_id */
#define WLC_RPCTX_PARAMS 32
-#endif /* _wlc_pub_h_ */
+#endif /* _BRCM_PUB_H_ */
diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_rate.c b/drivers/staging/brcm80211/brcmsmac/rate.c
index 87b252d6a7f58..5162ec2e3990b 100644
--- a/drivers/staging/brcm80211/brcmsmac/wlc_rate.c
+++ b/drivers/staging/brcm80211/brcmsmac/rate.c
@@ -16,20 +16,16 @@
#include <linux/kernel.h>
#include <linux/module.h>
-#include <proto/802.11.h>
-#include <bcmdefs.h>
-#include <bcmutils.h>
+#include <defs.h>
+#include <brcmu_utils.h>
#include <aiutils.h>
-#include <wlioctl.h>
-#include <sbhnddma.h>
+#include "dma.h"
-#include "wlc_types.h"
+#include "types.h"
#include "d11.h"
-#include "wl_dbg.h"
-#include "wlc_cfg.h"
-#include "wlc_scb.h"
-#include "wlc_pub.h"
-#include "wlc_rate.h"
+#include "scb.h"
+#include "pub.h"
+#include "rate.h"
/* Rate info per rate: It tells whether a rate is ofdm or not and its phy_rate value */
const u8 rate_info[WLC_MAXRATE + 1] = {
diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_rate.h b/drivers/staging/brcm80211/brcmsmac/rate.h
index 5575e83bdc694..5575e83bdc694 100644
--- a/drivers/staging/brcm80211/brcmsmac/wlc_rate.h
+++ b/drivers/staging/brcm80211/brcmsmac/rate.h
diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_scb.h b/drivers/staging/brcm80211/brcmsmac/scb.h
index f07a891d5d275..edd471b9de457 100644
--- a/drivers/staging/brcm80211/brcmsmac/wlc_scb.h
+++ b/drivers/staging/brcm80211/brcmsmac/scb.h
@@ -14,8 +14,11 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#ifndef _wlc_scb_h_
-#define _wlc_scb_h_
+#ifndef _BRCM_SCB_H_
+#define _BRCM_SCB_H_
+
+#include <linux/if_ether.h> /* for ETH_ALEN */
+#include <defs.h>
#define AMPDU_TX_BA_MAX_WSIZE 64 /* max Tx ba window size (in pdu) */
/* structure to store per-tid state for the ampdu initiator */
@@ -77,4 +80,4 @@ struct scb {
#define SCB_PS(a) NULL
#define SCB_STBC_CAP(a) ((a)->flags & SCB_STBCCAP)
#define SCB_AMPDU(a) true
-#endif /* _wlc_scb_h_ */
+#endif /* _BRCM_SCB_H_ */
diff --git a/drivers/staging/brcm80211/brcmsmac/bcmsrom_tbl.h b/drivers/staging/brcm80211/brcmsmac/srom.c
index f4b3e61dc37d5..17e0f2aa4051a 100644
--- a/drivers/staging/brcm80211/brcmsmac/bcmsrom_tbl.h
+++ b/drivers/staging/brcm80211/brcmsmac/srom.c
@@ -13,20 +13,345 @@
* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/etherdevice.h>
+#include <defs.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <stdarg.h>
+#include "types.h"
+#include <brcmu_utils.h>
+#include <soc.h>
+#include <chipcommon.h>
+#include <brcm_hw_ids.h>
+#include <nicpci.h>
+#include <aiutils.h>
+#include "srom.h"
+#include "otp.h"
-#ifndef _bcmsrom_tbl_h_
-#define _bcmsrom_tbl_h_
+#define SROM_OFFSET(sih) ((sih->ccrev > 31) ? \
+ (((sih->cccaps & CC_CAP_SROM) == 0) ? NULL : \
+ ((u8 *)curmap + PCI_16KB0_CCREGS_OFFSET + CC_SROM_OTP)) : \
+ ((u8 *)curmap + PCI_BAR0_SPROM_OFFSET))
-#include "wlioctl.h"
+#if defined(BCMDBG)
+#define WRITE_ENABLE_DELAY 500 /* 500 ms after write enable/disable toggle */
+#define WRITE_WORD_DELAY 20 /* 20 ms between each word write */
+#endif
-typedef struct {
- const char *name;
- u32 revmask;
- u32 flags;
- u16 off;
- u16 mask;
-} sromvar_t;
+/* Maximum srom: 6 Kilobits == 768 bytes */
+#define SROM_MAX 768
+
+/* PCI fields */
+#define PCI_F0DEVID 48
+
+#define SROM_WORDS 64
+
+#define SROM_SSID 2
+
+#define SROM_WL1LHMAXP 29
+
+#define SROM_WL1LPAB0 30
+#define SROM_WL1LPAB1 31
+#define SROM_WL1LPAB2 32
+
+#define SROM_WL1HPAB0 33
+#define SROM_WL1HPAB1 34
+#define SROM_WL1HPAB2 35
+
+#define SROM_MACHI_IL0 36
+#define SROM_MACMID_IL0 37
+#define SROM_MACLO_IL0 38
+#define SROM_MACHI_ET1 42
+#define SROM_MACMID_ET1 43
+#define SROM_MACLO_ET1 44
+#define SROM3_MACHI 37
+#define SROM3_MACMID 38
+#define SROM3_MACLO 39
+
+#define SROM_BXARSSI2G 40
+#define SROM_BXARSSI5G 41
+
+#define SROM_TRI52G 42
+#define SROM_TRI5GHL 43
+
+#define SROM_RXPO52G 45
+
+#define SROM_AABREV 46
+/* Fields in AABREV */
+#define SROM_BR_MASK 0x00ff
+#define SROM_CC_MASK 0x0f00
+#define SROM_CC_SHIFT 8
+#define SROM_AA0_MASK 0x3000
+#define SROM_AA0_SHIFT 12
+#define SROM_AA1_MASK 0xc000
+#define SROM_AA1_SHIFT 14
+
+#define SROM_WL0PAB0 47
+#define SROM_WL0PAB1 48
+#define SROM_WL0PAB2 49
+
+#define SROM_LEDBH10 50
+#define SROM_LEDBH32 51
+
+#define SROM_WL10MAXP 52
+
+#define SROM_WL1PAB0 53
+#define SROM_WL1PAB1 54
+#define SROM_WL1PAB2 55
+
+#define SROM_ITT 56
+
+#define SROM_BFL 57
+#define SROM_BFL2 28
+#define SROM3_BFL2 61
+
+#define SROM_AG10 58
+
+#define SROM_CCODE 59
+
+#define SROM_OPO 60
+
+#define SROM3_LEDDC 62
+
+#define SROM_CRCREV 63
+
+/* SROM Rev 4: Reallocate the software part of the srom to accommodate
+ * MIMO features. It assumes up to two PCIE functions and 440 bytes
+ * of usable srom i.e. the usable storage in chips with OTP that
+ * implements hardware redundancy.
+ */
+
+#define SROM4_WORDS 220
+
+#define SROM4_SIGN 32
+#define SROM4_SIGNATURE 0x5372
+
+#define SROM4_BREV 33
+
+#define SROM4_BFL0 34
+#define SROM4_BFL1 35
+#define SROM4_BFL2 36
+#define SROM4_BFL3 37
+#define SROM5_BFL0 37
+#define SROM5_BFL1 38
+#define SROM5_BFL2 39
+#define SROM5_BFL3 40
+
+#define SROM4_MACHI 38
+#define SROM4_MACMID 39
+#define SROM4_MACLO 40
+#define SROM5_MACHI 41
+#define SROM5_MACMID 42
+#define SROM5_MACLO 43
+
+#define SROM4_CCODE 41
+#define SROM4_REGREV 42
+#define SROM5_CCODE 34
+#define SROM5_REGREV 35
+
+#define SROM4_LEDBH10 43
+#define SROM4_LEDBH32 44
+#define SROM5_LEDBH10 59
+#define SROM5_LEDBH32 60
+
+#define SROM4_LEDDC 45
+#define SROM5_LEDDC 45
+
+#define SROM4_AA 46
+
+#define SROM4_AG10 47
+#define SROM4_AG32 48
+
+#define SROM4_TXPID2G 49
+#define SROM4_TXPID5G 51
+#define SROM4_TXPID5GL 53
+#define SROM4_TXPID5GH 55
+
+#define SROM4_TXRXC 61
+#define SROM4_TXCHAIN_MASK 0x000f
+#define SROM4_TXCHAIN_SHIFT 0
+#define SROM4_RXCHAIN_MASK 0x00f0
+#define SROM4_RXCHAIN_SHIFT 4
+#define SROM4_SWITCH_MASK 0xff00
+#define SROM4_SWITCH_SHIFT 8
+
+/* Per-path fields */
+#define MAX_PATH_SROM 4
+#define SROM4_PATH0 64
+#define SROM4_PATH1 87
+#define SROM4_PATH2 110
+#define SROM4_PATH3 133
+
+#define SROM4_2G_ITT_MAXP 0
+#define SROM4_2G_PA 1
+#define SROM4_5G_ITT_MAXP 5
+#define SROM4_5GLH_MAXP 6
+#define SROM4_5G_PA 7
+#define SROM4_5GL_PA 11
+#define SROM4_5GH_PA 15
+
+/* All the miriad power offsets */
+#define SROM4_2G_CCKPO 156
+#define SROM4_2G_OFDMPO 157
+#define SROM4_5G_OFDMPO 159
+#define SROM4_5GL_OFDMPO 161
+#define SROM4_5GH_OFDMPO 163
+#define SROM4_2G_MCSPO 165
+#define SROM4_5G_MCSPO 173
+#define SROM4_5GL_MCSPO 181
+#define SROM4_5GH_MCSPO 189
+#define SROM4_CDDPO 197
+#define SROM4_STBCPO 198
+#define SROM4_BW40PO 199
+#define SROM4_BWDUPPO 200
+#define SROM4_CRCREV 219
+
+/* SROM Rev 8: Make space for a 48word hardware header for PCIe rev >= 6.
+ * This is acombined srom for both MIMO and SISO boards, usable in
+ * the .130 4Kilobit OTP with hardware redundancy.
+ */
+#define SROM8_BREV 65
+
+#define SROM8_BFL0 66
+#define SROM8_BFL1 67
+#define SROM8_BFL2 68
+#define SROM8_BFL3 69
+
+#define SROM8_MACHI 70
+#define SROM8_MACMID 71
+#define SROM8_MACLO 72
+
+#define SROM8_CCODE 73
+#define SROM8_REGREV 74
+
+#define SROM8_LEDBH10 75
+#define SROM8_LEDBH32 76
+
+#define SROM8_LEDDC 77
+
+#define SROM8_AA 78
+
+#define SROM8_AG10 79
+#define SROM8_AG32 80
+
+#define SROM8_TXRXC 81
+
+#define SROM8_BXARSSI2G 82
+#define SROM8_BXARSSI5G 83
+#define SROM8_TRI52G 84
+#define SROM8_TRI5GHL 85
+#define SROM8_RXPO52G 86
+
+#define SROM8_FEM2G 87
+#define SROM8_FEM5G 88
+#define SROM8_FEM_ANTSWLUT_MASK 0xf800
+#define SROM8_FEM_ANTSWLUT_SHIFT 11
+#define SROM8_FEM_TR_ISO_MASK 0x0700
+#define SROM8_FEM_TR_ISO_SHIFT 8
+#define SROM8_FEM_PDET_RANGE_MASK 0x00f8
+#define SROM8_FEM_PDET_RANGE_SHIFT 3
+#define SROM8_FEM_EXTPA_GAIN_MASK 0x0006
+#define SROM8_FEM_EXTPA_GAIN_SHIFT 1
+#define SROM8_FEM_TSSIPOS_MASK 0x0001
+#define SROM8_FEM_TSSIPOS_SHIFT 0
+
+#define SROM8_THERMAL 89
+
+/* Temp sense related entries */
+#define SROM8_MPWR_RAWTS 90
+#define SROM8_TS_SLP_OPT_CORRX 91
+/* FOC: freiquency offset correction, HWIQ: H/W IOCAL enable, IQSWP: IQ CAL swap disable */
+#define SROM8_FOC_HWIQ_IQSWP 92
+
+/* Temperature delta for PHY calibration */
+#define SROM8_PHYCAL_TEMPDELTA 93
+
+/* Per-path offsets & fields */
+#define SROM8_PATH0 96
+#define SROM8_PATH1 112
+#define SROM8_PATH2 128
+#define SROM8_PATH3 144
+
+#define SROM8_2G_ITT_MAXP 0
+#define SROM8_2G_PA 1
+#define SROM8_5G_ITT_MAXP 4
+#define SROM8_5GLH_MAXP 5
+#define SROM8_5G_PA 6
+#define SROM8_5GL_PA 9
+#define SROM8_5GH_PA 12
+
+/* All the miriad power offsets */
+#define SROM8_2G_CCKPO 160
+
+#define SROM8_2G_OFDMPO 161
+#define SROM8_5G_OFDMPO 163
+#define SROM8_5GL_OFDMPO 165
+#define SROM8_5GH_OFDMPO 167
+
+#define SROM8_2G_MCSPO 169
+#define SROM8_5G_MCSPO 177
+#define SROM8_5GL_MCSPO 185
+#define SROM8_5GH_MCSPO 193
+
+#define SROM8_CDDPO 201
+#define SROM8_STBCPO 202
+#define SROM8_BW40PO 203
+#define SROM8_BWDUPPO 204
+
+/* SISO PA parameters are in the path0 spaces */
+#define SROM8_SISO 96
+
+/* Legacy names for SISO PA paramters */
+#define SROM8_W0_ITTMAXP (SROM8_SISO + SROM8_2G_ITT_MAXP)
+#define SROM8_W0_PAB0 (SROM8_SISO + SROM8_2G_PA)
+#define SROM8_W0_PAB1 (SROM8_SISO + SROM8_2G_PA + 1)
+#define SROM8_W0_PAB2 (SROM8_SISO + SROM8_2G_PA + 2)
+#define SROM8_W1_ITTMAXP (SROM8_SISO + SROM8_5G_ITT_MAXP)
+#define SROM8_W1_MAXP_LCHC (SROM8_SISO + SROM8_5GLH_MAXP)
+#define SROM8_W1_PAB0 (SROM8_SISO + SROM8_5G_PA)
+#define SROM8_W1_PAB1 (SROM8_SISO + SROM8_5G_PA + 1)
+#define SROM8_W1_PAB2 (SROM8_SISO + SROM8_5G_PA + 2)
+#define SROM8_W1_PAB0_LC (SROM8_SISO + SROM8_5GL_PA)
+#define SROM8_W1_PAB1_LC (SROM8_SISO + SROM8_5GL_PA + 1)
+#define SROM8_W1_PAB2_LC (SROM8_SISO + SROM8_5GL_PA + 2)
+#define SROM8_W1_PAB0_HC (SROM8_SISO + SROM8_5GH_PA)
+#define SROM8_W1_PAB1_HC (SROM8_SISO + SROM8_5GH_PA + 1)
+#define SROM8_W1_PAB2_HC (SROM8_SISO + SROM8_5GH_PA + 2)
+
+/* SROM REV 9 */
+#define SROM9_2GPO_CCKBW20 160
+#define SROM9_2GPO_CCKBW20UL 161
+#define SROM9_2GPO_LOFDMBW20 162
+#define SROM9_2GPO_LOFDMBW20UL 164
+
+#define SROM9_5GLPO_LOFDMBW20 166
+#define SROM9_5GLPO_LOFDMBW20UL 168
+#define SROM9_5GMPO_LOFDMBW20 170
+#define SROM9_5GMPO_LOFDMBW20UL 172
+#define SROM9_5GHPO_LOFDMBW20 174
+#define SROM9_5GHPO_LOFDMBW20UL 176
+
+#define SROM9_2GPO_MCSBW20 178
+#define SROM9_2GPO_MCSBW20UL 180
+#define SROM9_2GPO_MCSBW40 182
+
+#define SROM9_5GLPO_MCSBW20 184
+#define SROM9_5GLPO_MCSBW20UL 186
+#define SROM9_5GLPO_MCSBW40 188
+#define SROM9_5GMPO_MCSBW20 190
+#define SROM9_5GMPO_MCSBW20UL 192
+#define SROM9_5GMPO_MCSBW40 194
+#define SROM9_5GHPO_MCSBW20 196
+#define SROM9_5GHPO_MCSBW20UL 198
+#define SROM9_5GHPO_MCSBW40 200
+
+#define SROM9_PO_MCS32 202
+#define SROM9_PO_LOFDM40DUP 203
+
+/* SROM flags (see sromvar_t) */
#define SRFL_MORE 1 /* value continues as described by the next entry */
#define SRFL_NOFFS 2 /* value bits can't be all one's */
#define SRFL_PRHEX 4 /* value is in hexdecimal format */
@@ -36,6 +361,23 @@ typedef struct {
#define SRFL_LEDDC 0x40 /* value is an LED duty cycle */
#define SRFL_NOVAR 0x80 /* do not generate a nvram param, entry is for mfgc */
+/* Max. nvram variable table size */
+#define MAXSZ_NVRAM_VARS 4096
+
+typedef struct {
+ const char *name;
+ u32 revmask;
+ u32 flags;
+ u16 off;
+ u16 mask;
+} sromvar_t;
+
+typedef struct varbuf {
+ char *base; /* pointer to buffer base */
+ char *buf; /* pointer to current position */
+ unsigned int size; /* current (residual) size in bytes */
+} varbuf_t;
+
/* Assumptions:
* - Ethernet address spans across 3 consective words
*
@@ -48,7 +390,6 @@ typedef struct {
* - The last entry's name field must be NULL to indicate the end of the table. Other
* entries must have non-NULL name.
*/
-
static const sromvar_t pci_sromvars[] = {
{"devid", 0xffffff00, SRFL_PRHEX | SRFL_NOVAR, PCI_F0DEVID, 0xffff},
{"boardrev", 0x0000000e, SRFL_PRHEX, SROM_AABREV, SROM_BR_MASK},
@@ -437,77 +778,555 @@ static const sromvar_t perpath_pci_sromvars[] = {
{NULL, 0, 0, 0, 0}
};
-#if !(defined(PHY_TYPE_N) && defined(PHY_TYPE_LP))
-#define PHY_TYPE_N 4 /* N-Phy value */
-#define PHY_TYPE_LP 5 /* LP-Phy value */
-#endif /* !(defined(PHY_TYPE_N) && defined(PHY_TYPE_LP)) */
-#if !defined(PHY_TYPE_NULL)
-#define PHY_TYPE_NULL 0xf /* Invalid Phy value */
-#endif /* !defined(PHY_TYPE_NULL) */
+static void _initvars_srom_pci(u8 sromrev, u16 *srom, uint off, varbuf_t *b);
+static int initvars_srom_pci(struct si_pub *sih, void *curmap, char **vars,
+ uint *count);
+static int sprom_read_pci(struct si_pub *sih, u16 *sprom,
+ uint wordoff, u16 *buf, uint nwords, bool check_crc);
+#if defined(BCMNVRAMR)
+static int otp_read_pci(struct si_pub *sih, u16 *buf, uint bufsz);
+#endif
+static u16 srom_cc_cmd(struct si_pub *sih, void *ccregs, u32 cmd,
+ uint wordoff, u16 data);
-typedef struct {
- u16 phy_type;
- u16 bandrange;
- u16 chain;
- const char *vars;
-} pavars_t;
-
-static const pavars_t pavars[] = {
- /* NPHY */
- {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_2G, 0, "pa2gw0a0 pa2gw1a0 pa2gw2a0"},
- {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_2G, 1, "pa2gw0a1 pa2gw1a1 pa2gw2a1"},
- {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GL, 0,
- "pa5glw0a0 pa5glw1a0 pa5glw2a0"},
- {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GL, 1,
- "pa5glw0a1 pa5glw1a1 pa5glw2a1"},
- {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GM, 0, "pa5gw0a0 pa5gw1a0 pa5gw2a0"},
- {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GM, 1, "pa5gw0a1 pa5gw1a1 pa5gw2a1"},
- {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GH, 0,
- "pa5ghw0a0 pa5ghw1a0 pa5ghw2a0"},
- {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GH, 1,
- "pa5ghw0a1 pa5ghw1a1 pa5ghw2a1"},
- /* LPPHY */
- {PHY_TYPE_LP, WL_CHAN_FREQ_RANGE_2G, 0, "pa0b0 pa0b1 pa0b2"},
- {PHY_TYPE_LP, WL_CHAN_FREQ_RANGE_5GL, 0, "pa1lob0 pa1lob1 pa1lob2"},
- {PHY_TYPE_LP, WL_CHAN_FREQ_RANGE_5GM, 0, "pa1b0 pa1b1 pa1b2"},
- {PHY_TYPE_LP, WL_CHAN_FREQ_RANGE_5GH, 0, "pa1hib0 pa1hib1 pa1hib2"},
- {PHY_TYPE_NULL, 0, 0, ""}
-};
+static int initvars_table(char *start, char *end,
+ char **vars, uint *count);
-typedef struct {
- u16 phy_type;
- u16 bandrange;
- const char *vars;
-} povars_t;
-
-static const povars_t povars[] = {
- /* NPHY */
- {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_2G,
- "mcs2gpo0 mcs2gpo1 mcs2gpo2 mcs2gpo3 "
- "mcs2gpo4 mcs2gpo5 mcs2gpo6 mcs2gpo7"},
- {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GL,
- "mcs5glpo0 mcs5glpo1 mcs5glpo2 mcs5glpo3 "
- "mcs5glpo4 mcs5glpo5 mcs5glpo6 mcs5glpo7"},
- {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GM,
- "mcs5gpo0 mcs5gpo1 mcs5gpo2 mcs5gpo3 "
- "mcs5gpo4 mcs5gpo5 mcs5gpo6 mcs5gpo7"},
- {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GH,
- "mcs5ghpo0 mcs5ghpo1 mcs5ghpo2 mcs5ghpo3 "
- "mcs5ghpo4 mcs5ghpo5 mcs5ghpo6 mcs5ghpo7"},
- {PHY_TYPE_NULL, 0, ""}
-};
+/* Initialization of varbuf structure */
+static void varbuf_init(varbuf_t *b, char *buf, uint size)
+{
+ b->size = size;
+ b->base = b->buf = buf;
+}
-typedef struct {
- u8 tag; /* Broadcom subtag name */
- u8 len; /* Length field of the tuple, note that it includes the
- * subtag name (1 byte): 1 + tuple content length
- */
- const char *params;
-} cis_tuple_t;
-
-#define OTP_RAW (0xff - 1) /* Reserved tuple number for wrvar Raw input */
-#define OTP_VERS_1 (0xff - 2) /* CISTPL_VERS_1 */
-#define OTP_MANFID (0xff - 3) /* CISTPL_MANFID */
-#define OTP_RAW1 (0xff - 4) /* Like RAW, but comes first */
-
-#endif /* _bcmsrom_tbl_h_ */
+/* append a null terminated var=value string */
+static int varbuf_append(varbuf_t *b, const char *fmt, ...)
+{
+ va_list ap;
+ int r;
+ size_t len;
+ char *s;
+
+ if (b->size < 2)
+ return 0;
+
+ va_start(ap, fmt);
+ r = vsnprintf(b->buf, b->size, fmt, ap);
+ va_end(ap);
+
+ /* C99 snprintf behavior returns r >= size on overflow,
+ * others return -1 on overflow.
+ * All return -1 on format error.
+ * We need to leave room for 2 null terminations, one for the current var
+ * string, and one for final null of the var table. So check that the
+ * strlen written, r, leaves room for 2 chars.
+ */
+ if ((r == -1) || (r > (int)(b->size - 2))) {
+ b->size = 0;
+ return 0;
+ }
+
+ /* Remove any earlier occurrence of the same variable */
+ s = strchr(b->buf, '=');
+ if (s != NULL) {
+ len = (size_t) (s - b->buf);
+ for (s = b->base; s < b->buf;) {
+ if ((memcmp(s, b->buf, len) == 0) && s[len] == '=') {
+ len = strlen(s) + 1;
+ memmove(s, (s + len),
+ ((b->buf + r + 1) - (s + len)));
+ b->buf -= len;
+ b->size += (unsigned int)len;
+ break;
+ }
+
+ while (*s++)
+ ;
+ }
+ }
+
+ /* skip over this string's null termination */
+ r++;
+ b->size -= r;
+ b->buf += r;
+
+ return r;
+}
+
+/*
+ * Initialize local vars from the right source for this platform.
+ * Return 0 on success, nonzero on error.
+ */
+int srom_var_init(struct si_pub *sih, uint bustype, void *curmap,
+ char **vars, uint *count)
+{
+ uint len;
+
+ len = 0;
+
+ if (vars == NULL || count == NULL)
+ return 0;
+
+ *vars = NULL;
+ *count = 0;
+
+ if (curmap != NULL && bustype == PCI_BUS)
+ return initvars_srom_pci(sih, curmap, vars, count);
+
+ return -1;
+}
+
+/* In chips with chipcommon rev 32 and later, the srom is in chipcommon,
+ * not in the bus cores.
+ */
+static u16
+srom_cc_cmd(struct si_pub *sih, void *ccregs, u32 cmd,
+ uint wordoff, u16 data)
+{
+ chipcregs_t *cc = (chipcregs_t *) ccregs;
+ uint wait_cnt = 1000;
+
+ if ((cmd == SRC_OP_READ) || (cmd == SRC_OP_WRITE)) {
+ W_REG(&cc->sromaddress, wordoff * 2);
+ if (cmd == SRC_OP_WRITE)
+ W_REG(&cc->sromdata, data);
+ }
+
+ W_REG(&cc->sromcontrol, SRC_START | cmd);
+
+ while (wait_cnt--) {
+ if ((R_REG(&cc->sromcontrol) & SRC_BUSY) == 0)
+ break;
+ }
+
+ if (!wait_cnt) {
+ return 0xffff;
+ }
+ if (cmd == SRC_OP_READ)
+ return (u16) R_REG(&cc->sromdata);
+ else
+ return 0xffff;
+}
+
+static inline void ltoh16_buf(u16 *buf, unsigned int size)
+{
+ for (size /= 2; size; size--)
+ *(buf + size) = le16_to_cpu(*(buf + size));
+}
+
+static inline void htol16_buf(u16 *buf, unsigned int size)
+{
+ for (size /= 2; size; size--)
+ *(buf + size) = cpu_to_le16(*(buf + size));
+}
+
+/*
+ * Read in and validate sprom.
+ * Return 0 on success, nonzero on error.
+ */
+static int
+sprom_read_pci(struct si_pub *sih, u16 *sprom, uint wordoff,
+ u16 *buf, uint nwords, bool check_crc)
+{
+ int err = 0;
+ uint i;
+ void *ccregs = NULL;
+
+ /* read the sprom */
+ for (i = 0; i < nwords; i++) {
+
+ if (sih->ccrev > 31 && ISSIM_ENAB(sih)) {
+ /* use indirect since direct is too slow on QT */
+ if ((sih->cccaps & CC_CAP_SROM) == 0)
+ return 1;
+
+ ccregs = (void *)((u8 *) sprom - CC_SROM_OTP);
+ buf[i] =
+ srom_cc_cmd(sih, ccregs, SRC_OP_READ,
+ wordoff + i, 0);
+
+ } else {
+ if (ISSIM_ENAB(sih))
+ buf[i] = R_REG(&sprom[wordoff + i]);
+
+ buf[i] = R_REG(&sprom[wordoff + i]);
+ }
+
+ }
+
+ /* bypass crc checking for simulation to allow srom hack */
+ if (ISSIM_ENAB(sih))
+ return err;
+
+ if (check_crc) {
+
+ if (buf[0] == 0xffff) {
+ /* The hardware thinks that an srom that starts with 0xffff
+ * is blank, regardless of the rest of the content, so declare
+ * it bad.
+ */
+ return 1;
+ }
+
+ /* fixup the endianness so crc8 will pass */
+ htol16_buf(buf, nwords * 2);
+ if (brcmu_crc8((u8 *) buf, nwords * 2, CRC8_INIT_VALUE) !=
+ CRC8_GOOD_VALUE) {
+ /* DBG only pci always read srom4 first, then srom8/9 */
+ err = 1;
+ }
+ /* now correct the endianness of the byte array */
+ ltoh16_buf(buf, nwords * 2);
+ }
+ return err;
+}
+
+#if defined(BCMNVRAMR)
+static int otp_read_pci(struct si_pub *sih, u16 *buf, uint bufsz)
+{
+ u8 *otp;
+ uint sz = OTP_SZ_MAX / 2; /* size in words */
+ int err = 0;
+
+ otp = kzalloc(OTP_SZ_MAX, GFP_ATOMIC);
+ if (otp == NULL) {
+ return -EBADE;
+ }
+
+ err = otp_read_region(sih, OTP_HW_RGN, (u16 *) otp, &sz);
+
+ memcpy(buf, otp, bufsz);
+
+ kfree(otp);
+
+ /* Check CRC */
+ if (buf[0] == 0xffff) {
+ /* The hardware thinks that an srom that starts with 0xffff
+ * is blank, regardless of the rest of the content, so declare
+ * it bad.
+ */
+ return 1;
+ }
+
+ /* fixup the endianness so crc8 will pass */
+ htol16_buf(buf, bufsz);
+ if (brcmu_crc8((u8 *) buf, SROM4_WORDS * 2, CRC8_INIT_VALUE) !=
+ CRC8_GOOD_VALUE) {
+ err = 1;
+ }
+ /* now correct the endianness of the byte array */
+ ltoh16_buf(buf, bufsz);
+
+ return err;
+}
+#endif /* defined(BCMNVRAMR) */
+/*
+* Create variable table from memory.
+* Return 0 on success, nonzero on error.
+*/
+static int initvars_table(char *start, char *end,
+ char **vars, uint *count)
+{
+ int c = (int)(end - start);
+
+ /* do it only when there is more than just the null string */
+ if (c > 1) {
+ char *vp = kmalloc(c, GFP_ATOMIC);
+ if (!vp)
+ return -ENOMEM;
+ memcpy(vp, start, c);
+ *vars = vp;
+ *count = c;
+ } else {
+ *vars = NULL;
+ *count = 0;
+ }
+
+ return 0;
+}
+
+/* Parse SROM and create name=value pairs. 'srom' points to
+ * the SROM word array. 'off' specifies the offset of the
+ * first word 'srom' points to, which should be either 0 or
+ * SROM3_SWRG_OFF (full SROM or software region).
+ */
+
+static uint mask_shift(u16 mask)
+{
+ uint i;
+ for (i = 0; i < (sizeof(mask) << 3); i++) {
+ if (mask & (1 << i))
+ return i;
+ }
+ return 0;
+}
+
+static uint mask_width(u16 mask)
+{
+ int i;
+ for (i = (sizeof(mask) << 3) - 1; i >= 0; i--) {
+ if (mask & (1 << i))
+ return (uint) (i - mask_shift(mask) + 1);
+ }
+ return 0;
+}
+
+static void _initvars_srom_pci(u8 sromrev, u16 *srom, uint off, varbuf_t *b)
+{
+ u16 w;
+ u32 val;
+ const sromvar_t *srv;
+ uint width;
+ uint flags;
+ u32 sr = (1 << sromrev);
+
+ varbuf_append(b, "sromrev=%d", sromrev);
+
+ for (srv = pci_sromvars; srv->name != NULL; srv++) {
+ const char *name;
+
+ if ((srv->revmask & sr) == 0)
+ continue;
+
+ if (srv->off < off)
+ continue;
+
+ flags = srv->flags;
+ name = srv->name;
+
+ /* This entry is for mfgc only. Don't generate param for it, */
+ if (flags & SRFL_NOVAR)
+ continue;
+
+ if (flags & SRFL_ETHADDR) {
+ u8 ea[ETH_ALEN];
+
+ ea[0] = (srom[srv->off - off] >> 8) & 0xff;
+ ea[1] = srom[srv->off - off] & 0xff;
+ ea[2] = (srom[srv->off + 1 - off] >> 8) & 0xff;
+ ea[3] = srom[srv->off + 1 - off] & 0xff;
+ ea[4] = (srom[srv->off + 2 - off] >> 8) & 0xff;
+ ea[5] = srom[srv->off + 2 - off] & 0xff;
+
+ varbuf_append(b, "%s=%pM", name, ea);
+ } else {
+ w = srom[srv->off - off];
+ val = (w & srv->mask) >> mask_shift(srv->mask);
+ width = mask_width(srv->mask);
+
+ while (srv->flags & SRFL_MORE) {
+ srv++;
+ if (srv->off == 0 || srv->off < off)
+ continue;
+
+ w = srom[srv->off - off];
+ val +=
+ ((w & srv->mask) >> mask_shift(srv->
+ mask)) <<
+ width;
+ width += mask_width(srv->mask);
+ }
+
+ if ((flags & SRFL_NOFFS)
+ && ((int)val == (1 << width) - 1))
+ continue;
+
+ if (flags & SRFL_CCODE) {
+ if (val == 0)
+ varbuf_append(b, "ccode=");
+ else
+ varbuf_append(b, "ccode=%c%c",
+ (val >> 8), (val & 0xff));
+ }
+ /* LED Powersave duty cycle has to be scaled:
+ *(oncount >> 24) (offcount >> 8)
+ */
+ else if (flags & SRFL_LEDDC) {
+ u32 w32 = (((val >> 8) & 0xff) << 24) | /* oncount */
+ (((val & 0xff)) << 8); /* offcount */
+ varbuf_append(b, "leddc=%d", w32);
+ } else if (flags & SRFL_PRHEX)
+ varbuf_append(b, "%s=0x%x", name, val);
+ else if ((flags & SRFL_PRSIGN)
+ && (val & (1 << (width - 1))))
+ varbuf_append(b, "%s=%d", name,
+ (int)(val | (~0 << width)));
+ else
+ varbuf_append(b, "%s=%u", name, val);
+ }
+ }
+
+ if (sromrev >= 4) {
+ /* Do per-path variables */
+ uint p, pb, psz;
+
+ if (sromrev >= 8) {
+ pb = SROM8_PATH0;
+ psz = SROM8_PATH1 - SROM8_PATH0;
+ } else {
+ pb = SROM4_PATH0;
+ psz = SROM4_PATH1 - SROM4_PATH0;
+ }
+
+ for (p = 0; p < MAX_PATH_SROM; p++) {
+ for (srv = perpath_pci_sromvars; srv->name != NULL;
+ srv++) {
+ if ((srv->revmask & sr) == 0)
+ continue;
+
+ if (pb + srv->off < off)
+ continue;
+
+ /* This entry is for mfgc only. Don't generate param for it, */
+ if (srv->flags & SRFL_NOVAR)
+ continue;
+
+ w = srom[pb + srv->off - off];
+ val = (w & srv->mask) >> mask_shift(srv->mask);
+ width = mask_width(srv->mask);
+
+ /* Cheating: no per-path var is more than 1 word */
+
+ if ((srv->flags & SRFL_NOFFS)
+ && ((int)val == (1 << width) - 1))
+ continue;
+
+ if (srv->flags & SRFL_PRHEX)
+ varbuf_append(b, "%s%d=0x%x", srv->name,
+ p, val);
+ else
+ varbuf_append(b, "%s%d=%d", srv->name,
+ p, val);
+ }
+ pb += psz;
+ }
+ }
+}
+
+/*
+ * Initialize nonvolatile variable table from sprom.
+ * Return 0 on success, nonzero on error.
+ */
+static int initvars_srom_pci(struct si_pub *sih, void *curmap, char **vars,
+ uint *count)
+{
+ u16 *srom, *sromwindow;
+ u8 sromrev = 0;
+ u32 sr;
+ varbuf_t b;
+ char *vp, *base = NULL;
+ bool flash = false;
+ int err = 0;
+
+ /*
+ * Apply CRC over SROM content regardless SROM is present or not,
+ * and use variable <devpath>sromrev's existence in flash to decide
+ * if we should return an error when CRC fails or read SROM variables
+ * from flash.
+ */
+ srom = kmalloc(SROM_MAX, GFP_ATOMIC);
+ if (!srom)
+ return -2;
+
+ sromwindow = (u16 *) SROM_OFFSET(sih);
+ if (ai_is_sprom_available(sih)) {
+ err =
+ sprom_read_pci(sih, sromwindow, 0, srom, SROM_WORDS,
+ true);
+
+ if ((srom[SROM4_SIGN] == SROM4_SIGNATURE) ||
+ (((sih->buscoretype == PCIE_CORE_ID)
+ && (sih->buscorerev >= 6))
+ || ((sih->buscoretype == PCI_CORE_ID)
+ && (sih->buscorerev >= 0xe)))) {
+ /* sromrev >= 4, read more */
+ err =
+ sprom_read_pci(sih, sromwindow, 0, srom,
+ SROM4_WORDS, true);
+ sromrev = srom[SROM4_CRCREV] & 0xff;
+ } else if (err == 0) {
+ /* srom is good and is rev < 4 */
+ /* top word of sprom contains version and crc8 */
+ sromrev = srom[SROM_CRCREV] & 0xff;
+ /* bcm4401 sroms misprogrammed */
+ if (sromrev == 0x10)
+ sromrev = 1;
+ }
+ }
+#if defined(BCMNVRAMR)
+ /* Use OTP if SPROM not available */
+ else {
+ err = otp_read_pci(sih, srom, SROM_MAX);
+ if (err == 0)
+ /* OTP only contain SROM rev8/rev9 for now */
+ sromrev = srom[SROM4_CRCREV] & 0xff;
+ else
+ err = 1;
+ }
+#else
+ else
+ err = 1;
+#endif
+
+ /*
+ * We want internal/wltest driver to come up with default
+ * sromvars so we can program a blank SPROM/OTP.
+ */
+ if (err) {
+ char *value;
+ u32 val;
+ val = 0;
+
+ value = ai_getdevpathvar(sih, "sromrev");
+ if (value) {
+ sromrev = (u8) simple_strtoul(value, NULL, 0);
+ flash = true;
+ goto varscont;
+ }
+
+ value = ai_getnvramflvar(sih, "sromrev");
+ if (value) {
+ err = 0;
+ goto errout;
+ }
+
+ {
+ err = -1;
+ goto errout;
+ }
+ }
+
+ varscont:
+ /* Bitmask for the sromrev */
+ sr = 1 << sromrev;
+
+ /* srom version check: Current valid versions: 1, 2, 3, 4, 5, 8, 9 */
+ if ((sr & 0x33e) == 0) {
+ err = -2;
+ goto errout;
+ }
+
+ base = kmalloc(MAXSZ_NVRAM_VARS, GFP_ATOMIC);
+ if (!base) {
+ err = -2;
+ goto errout;
+ }
+
+ varbuf_init(&b, base, MAXSZ_NVRAM_VARS);
+
+ /* parse SROM into name=value pairs. */
+ _initvars_srom_pci(sromrev, srom, 0, &b);
+
+ /* final nullbyte terminator */
+ vp = b.buf;
+ *vp++ = '\0';
+
+ err = initvars_table(base, vp, vars, count);
+
+ errout:
+ if (base)
+ kfree(base);
+
+ kfree(srom);
+ return err;
+}
diff --git a/drivers/staging/brcm80211/include/bcmsrom.h b/drivers/staging/brcm80211/brcmsmac/srom.h
index b2dc8951c5d2b..ee4f8801e7cd9 100644
--- a/drivers/staging/brcm80211/include/bcmsrom.h
+++ b/drivers/staging/brcm80211/brcmsmac/srom.h
@@ -14,16 +14,14 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#ifndef _bcmsrom_h_
-#define _bcmsrom_h_
-
-#include <bcmsrom_fmt.h>
+#ifndef _BRCM_SROM_H_
+#define _BRCM_SROM_H_
/* Prototypes */
-extern int srom_var_init(si_t *sih, uint bus, void *curmap,
+extern int srom_var_init(struct si_pub *sih, uint bus, void *curmap,
char **vars, uint *count);
-extern int srom_read(si_t *sih, uint bus, void *curmap,
+extern int srom_read(struct si_pub *sih, uint bus, void *curmap,
uint byteoff, uint nbytes, u16 *buf, bool check_crc);
/* parse standard PCMCIA cis, normally used by SB/PCMCIA/SDIO/SPI/OTP
@@ -31,4 +29,4 @@ extern int srom_read(si_t *sih, uint bus, void *curmap,
*/
extern int srom_parsecis(u8 **pcis, uint ciscnt,
char **vars, uint *count);
-#endif /* _bcmsrom_h_ */
+#endif /* _BRCM_SROM_H_ */
diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_stf.c b/drivers/staging/brcm80211/brcmsmac/stf.c
index c4f58172182d6..5f98804ec7bdf 100644
--- a/drivers/staging/brcm80211/brcmsmac/wlc_stf.c
+++ b/drivers/staging/brcm80211/brcmsmac/stf.c
@@ -17,30 +17,22 @@
#include <linux/kernel.h>
#include <linux/module.h>
-#include <proto/802.11.h>
-
-#include <bcmdefs.h>
-#include <bcmutils.h>
+#include <defs.h>
+#include <brcmu_utils.h>
#include <aiutils.h>
-#include <wlioctl.h>
-#include <bcmwifi.h>
-#include <bcmnvram.h>
-#include <sbhnddma.h>
+#include <brcmu_wifi.h>
+#include "dma.h"
-#include "wlc_types.h"
+#include "types.h"
#include "d11.h"
-#include "wl_dbg.h"
-#include "wlc_cfg.h"
-#include "wlc_rate.h"
-#include "wlc_scb.h"
-#include "wlc_pub.h"
-#include "wlc_key.h"
-#include "phy/wlc_phy_hal.h"
-#include "wlc_channel.h"
-#include "wlc_main.h"
-#include "wl_export.h"
-#include "wlc_bmac.h"
-#include "wlc_stf.h"
+#include "rate.h"
+#include "scb.h"
+#include "pub.h"
+#include "phy/phy_hal.h"
+#include "channel.h"
+#include "main.h"
+#include "bmac.h"
+#include "stf.h"
#define MIN_SPATIAL_EXPANSION 0
#define MAX_SPATIAL_EXPANSION 1
@@ -364,39 +356,6 @@ void wlc_stf_detach(struct wlc_info *wlc)
{
}
-int wlc_stf_ant_txant_validate(struct wlc_info *wlc, s8 val)
-{
- int bcmerror = 0;
-
- /* when there is only 1 tx_streams, don't allow to change the txant */
- if (WLCISNPHY(wlc->band) && (wlc->stf->txstreams == 1))
- return ((val == wlc->stf->txant) ? bcmerror : -EINVAL);
-
- switch (val) {
- case -1:
- val = ANT_TX_DEF;
- break;
- case 0:
- val = ANT_TX_FORCE_0;
- break;
- case 1:
- val = ANT_TX_FORCE_1;
- break;
- case 3:
- val = ANT_TX_LAST_RX;
- break;
- default:
- bcmerror = -EINVAL;
- break;
- }
-
- if (bcmerror == 0)
- wlc->stf->txant = (s8) val;
-
- return bcmerror;
-
-}
-
/*
* Centralized txant update function. call it whenever wlc->stf->txant and/or wlc->stf->txchain
* change
diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_stf.h b/drivers/staging/brcm80211/brcmsmac/stf.h
index 2b1180b128a8e..75e8205a2c416 100644
--- a/drivers/staging/brcm80211/brcmsmac/wlc_stf.h
+++ b/drivers/staging/brcm80211/brcmsmac/stf.h
@@ -14,8 +14,8 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#ifndef _wlc_stf_h_
-#define _wlc_stf_h_
+#ifndef _BRCM_STF_H_
+#define _BRCM_STF_H_
extern int wlc_stf_attach(struct wlc_info *wlc);
extern void wlc_stf_detach(struct wlc_info *wlc);
@@ -28,11 +28,9 @@ extern int wlc_stf_ss_update(struct wlc_info *wlc, struct wlcband *band);
extern void wlc_stf_phy_txant_upd(struct wlc_info *wlc);
extern int wlc_stf_txchain_set(struct wlc_info *wlc, s32 int_val, bool force);
extern bool wlc_stf_stbc_rx_set(struct wlc_info *wlc, s32 int_val);
-
-extern int wlc_stf_ant_txant_validate(struct wlc_info *wlc, s8 val);
extern void wlc_stf_phy_txant_upd(struct wlc_info *wlc);
extern void wlc_stf_phy_chain_calc(struct wlc_info *wlc);
extern u16 wlc_stf_phytxchain_sel(struct wlc_info *wlc, ratespec_t rspec);
extern u16 wlc_stf_d11hdrs_phyctl_txant(struct wlc_info *wlc, ratespec_t rspec);
-#endif /* _wlc_stf_h_ */
+#endif /* _BRCM_STF_H_ */
diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_cfg.h b/drivers/staging/brcm80211/brcmsmac/types.h
index 85fbd06353100..e907990f74cab 100644
--- a/drivers/staging/brcm80211/brcmsmac/wlc_cfg.h
+++ b/drivers/staging/brcm80211/brcmsmac/types.h
@@ -14,21 +14,69 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#ifndef _wlc_cfg_h_
-#define _wlc_cfg_h_
-
-#define NBANDS(wlc) ((wlc)->pub->_nbands)
-#define NBANDS_PUB(pub) ((pub)->_nbands)
-#define NBANDS_HW(hw) ((hw)->_nbands)
-
-#define IS_SINGLEBAND_5G(device) 0
+#ifndef _BRCM_TYPES_H_
+#define _BRCM_TYPES_H_
+
+/* Bus types */
+#define SI_BUS 0 /* SOC Interconnect */
+#define PCI_BUS 1 /* PCI target */
+#define SDIO_BUS 3 /* SDIO target */
+#define JTAG_BUS 4 /* JTAG */
+#define USB_BUS 5 /* USB (does not support R/W REG) */
+#define SPI_BUS 6 /* gSPI target */
+#define RPC_BUS 7 /* RPC target */
+
+#define WL_CHAN_FREQ_RANGE_2G 0
+#define WL_CHAN_FREQ_RANGE_5GL 1
+#define WL_CHAN_FREQ_RANGE_5GM 2
+#define WL_CHAN_FREQ_RANGE_5GH 3
+
+#define MAX_DMA_SEGS 4
+
+/* boardflags */
+#define BFL_PACTRL 0x00000002 /* Board has gpio 9 controlling the PA */
+#define BFL_NOPLLDOWN 0x00000020 /* Not ok to power down the chip pll and oscillator */
+#define BFL_FEM 0x00000800 /* Board supports the Front End Module */
+#define BFL_EXTLNA 0x00001000 /* Board has an external LNA in 2.4GHz band */
+#define BFL_NOPA 0x00010000 /* Board has no PA */
+#define BFL_BUCKBOOST 0x00200000 /* Power topology uses BUCKBOOST */
+#define BFL_FEM_BT 0x00400000 /* Board has FEM and switch to share antenna w/ BT */
+#define BFL_NOCBUCK 0x00800000 /* Power topology doesn't use CBUCK */
+#define BFL_PALDO 0x02000000 /* Power topology uses PALDO */
+#define BFL_EXTLNA_5GHz 0x10000000 /* Board has an external LNA in 5GHz band */
+
+/* boardflags2 */
+#define BFL2_RXBB_INT_REG_DIS 0x00000001 /* Board has an external rxbb regulator */
+#define BFL2_APLL_WAR 0x00000002 /* Flag to implement alternative A-band PLL settings */
+#define BFL2_TXPWRCTRL_EN 0x00000004 /* Board permits enabling TX Power Control */
+#define BFL2_2X4_DIV 0x00000008 /* Board supports the 2X4 diversity switch */
+#define BFL2_5G_PWRGAIN 0x00000010 /* Board supports 5G band power gain */
+#define BFL2_PCIEWAR_OVR 0x00000020 /* Board overrides ASPM and Clkreq settings */
+#define BFL2_LEGACY 0x00000080
+#define BFL2_SKWRKFEM_BRD 0x00000100 /* 4321mcm93 board uses Skyworks FEM */
+#define BFL2_SPUR_WAR 0x00000200 /* Board has a WAR for clock-harmonic spurs */
+#define BFL2_GPLL_WAR 0x00000400 /* Flag to narrow G-band PLL loop b/w */
+#define BFL2_SINGLEANT_CCK 0x00001000 /* Tx CCK pkts on Ant 0 only */
+#define BFL2_2G_SPUR_WAR 0x00002000 /* WAR to reduce and avoid clock-harmonic spurs in 2G */
+#define BFL2_GPLL_WAR2 0x00010000 /* Flag to widen G-band PLL loop b/w */
+#define BFL2_IPALVLSHIFT_3P3 0x00020000
+#define BFL2_INTERNDET_TXIQCAL 0x00040000 /* Use internal envelope detector for TX IQCAL */
+#define BFL2_XTALBUFOUTEN 0x00080000 /* Keep the buffered Xtal output from radio "ON"
+ * Most drivers will turn it off without this flag
+ * to save power.
+ */
+
+/* board specific GPIO assignment, gpio 0-3 are also customer-configurable led */
+#define BOARD_GPIO_PACTRL 0x200 /* bit 9 controls the PA on new 4306 boards */
+#define BOARD_GPIO_12 0x1000 /* gpio 12 */
+#define BOARD_GPIO_13 0x2000 /* gpio 13 */
/* **** Core type/rev defaults **** */
-#define D11_DEFAULT 0x0fffffb0 /* Supported D11 revs: 4, 5, 7-27
+#define D11CONF 0x0fffffb0 /* Supported D11 revs: 4, 5, 7-27
* also need to update wlc.h MAXCOREREV
*/
-#define NPHY_DEFAULT 0x000001ff /* Supported nphy revs:
+#define NCONF 0x000001ff /* Supported nphy revs:
* 0 4321a0
* 1 4321a1
* 2 4321b0/b1/c0/c1
@@ -40,35 +88,19 @@
* 8 5357a0, 43236a0
*/
-#define LCNPHY_DEFAULT 0x00000007 /* Supported lcnphy revs:
+#define LCNCONF 0x00000007 /* Supported lcnphy revs:
* 0 4313a0, 4336a0, 4330a0
* 1
* 2 4330a0
*/
-#define SSLPNPHY_DEFAULT 0x0000000f /* Supported sslpnphy revs:
+#define SSLPNCONF 0x0000000f /* Supported sslpnphy revs:
* 0 4329a0/k0
* 1 4329b0/4329C0
* 2 4319a0
* 3 5356a0
*/
-
-/* For undefined values, use defaults */
-#ifndef D11CONF
-#define D11CONF D11_DEFAULT
-#endif
-#ifndef NCONF
-#define NCONF NPHY_DEFAULT
-#endif
-#ifndef LCNCONF
-#define LCNCONF LCNPHY_DEFAULT
-#endif
-
-#ifndef SSLPNCONF
-#define SSLPNCONF SSLPNPHY_DEFAULT
-#endif
-
/********************************************************************
* Phy/Core Configuration. Defines macros to to check core phy/rev *
* compile-time configuration. Defines default core support. *
@@ -142,40 +174,11 @@
#define CASECHECK(config, val) if (!(CONF_HAS(config, val))) break
#define CASEMSK(config, mask) if (!(CONF_MSK(config, mask))) break
-#if (D11CONF ^ (D11CONF & D11_DEFAULT))
-#error "Unsupported MAC revision configured"
-#endif
-#if (NCONF ^ (NCONF & NPHY_DEFAULT))
-#error "Unsupported NPHY revision configured"
-#endif
-#if (LCNCONF ^ (LCNCONF & LCNPHY_DEFAULT))
-#error "Unsupported LPPHY revision configured"
-#endif
-
-/* *** Consistency checks *** */
-#if !D11CONF
-#error "No MAC revisions configured!"
-#endif
-
-#if !NCONF && !LCNCONF && !SSLPNCONF
-#error "No PHY configured!"
-#endif
-
/* Set up PHYTYPE automatically: (depends on PHY_TYPE_X, from d11.h) */
#define _PHYCONF_N (1 << PHY_TYPE_N)
-
-#if LCNCONF
#define _PHYCONF_LCN (1 << PHY_TYPE_LCN)
-#else
-#define _PHYCONF_LCN 0
-#endif /* LCNCONF */
-
-#if SSLPNCONF
#define _PHYCONF_SSLPN (1 << PHY_TYPE_SSN)
-#else
-#define _PHYCONF_SSLPN 0
-#endif /* SSLPNCONF */
#define PHYTYPE (_PHYCONF_N | _PHYCONF_LCN | _PHYCONF_SSLPN)
@@ -207,28 +210,11 @@
*
* ***********************************************
*/
-#ifndef NTXD
#define NTXD 256 /* Max # of entries in Tx FIFO based on 4kb page size */
-#endif /* NTXD */
-#ifndef NRXD
#define NRXD 256 /* Max # of entries in Rx FIFO based on 4kb page size */
-#endif /* NRXD */
-
-#ifndef NRXBUFPOST
#define NRXBUFPOST 32 /* try to keep this # rbufs posted to the chip */
-#endif /* NRXBUFPOST */
-
-#ifndef MAXSCB /* station control blocks in cache */
#define MAXSCB 32 /* Maximum SCBs in cache for STA */
-#endif /* MAXSCB */
-
-#ifndef AMPDU_NUM_MPDU
#define AMPDU_NUM_MPDU 16 /* max allowed number of mpdus in an ampdu (2 streams) */
-#endif /* AMPDU_NUM_MPDU */
-
-#ifndef AMPDU_NUM_MPDU_3STREAMS
-#define AMPDU_NUM_MPDU_3STREAMS 32 /* max allowed number of mpdus in an ampdu for 3+ streams */
-#endif /* AMPDU_NUM_MPDU_3STREAMS */
/* Count of packet callback structures. either of following
* 1. Set to the number of SCBs since a STA
@@ -236,45 +222,145 @@
* queue up an "are you there?" Null Data callback for each associated STA
* 2. controlled by tunable config file
*/
-#ifndef MAXPKTCB
#define MAXPKTCB MAXSCB /* Max number of packet callbacks */
-#endif /* MAXPKTCB */
-
-#ifndef CTFPOOLSZ
-#define CTFPOOLSZ 128
-#endif /* CTFPOOLSZ */
/* NetBSD also needs to keep track of this */
#define WLC_MAX_UCODE_BSS (16) /* Number of BSS handled in ucode bcn/prb */
#define WLC_MAX_UCODE_BSS4 (4) /* Number of BSS handled in sw bcn/prb */
-#ifndef WLC_MAXBSSCFG
#define WLC_MAXBSSCFG (1) /* max # BSS configs */
-#endif /* WLC_MAXBSSCFG */
-
-#ifndef MAXBSS
#define MAXBSS 64 /* max # available networks */
-#endif /* MAXBSS */
-
-#ifndef WLC_DATAHIWAT
#define WLC_DATAHIWAT 50 /* data msg txq hiwat mark */
-#endif /* WLC_DATAHIWAT */
-
-#ifndef WLC_AMPDUDATAHIWAT
#define WLC_AMPDUDATAHIWAT 255
-#endif /* WLC_AMPDUDATAHIWAT */
/* bounded rx loops */
-#ifndef RXBND
#define RXBND 8 /* max # frames to process in wlc_recv() */
-#endif /* RXBND */
-#ifndef TXSBND
#define TXSBND 8 /* max # tx status to process in wlc_txstatus() */
-#endif /* TXSBND */
+
+#define WLBANDINITFN(_fn) _fn
#define BAND_5G(bt) ((bt) == WLC_BAND_5G)
#define BAND_2G(bt) ((bt) == WLC_BAND_2G)
-#define WLBANDINITDATA(_data) _data
-#define WLBANDINITFN(_fn) _fn
-
-#endif /* _wlc_cfg_h_ */
+#define BCMMSG(dev, fmt, args...) \
+do { \
+ if (brcm_msg_level & LOG_TRACE_VAL) \
+ wiphy_err(dev, "%s: " fmt, __func__, ##args); \
+} while (0)
+
+#define WL_ERROR_ON() (brcm_msg_level & LOG_ERROR_VAL)
+
+/* register access macros */
+#ifndef __BIG_ENDIAN
+#ifndef __mips__
+#define R_REG(r) \
+ ({\
+ sizeof(*(r)) == sizeof(u8) ? \
+ readb((volatile u8*)(r)) : \
+ sizeof(*(r)) == sizeof(u16) ? readw((volatile u16*)(r)) : \
+ readl((volatile u32*)(r)); \
+ })
+#else /* __mips__ */
+#define R_REG(r) \
+ ({ \
+ __typeof(*(r)) __osl_v; \
+ __asm__ __volatile__("sync"); \
+ switch (sizeof(*(r))) { \
+ case sizeof(u8): \
+ __osl_v = readb((volatile u8*)(r)); \
+ break; \
+ case sizeof(u16): \
+ __osl_v = readw((volatile u16*)(r)); \
+ break; \
+ case sizeof(u32): \
+ __osl_v = \
+ readl((volatile u32*)(r)); \
+ break; \
+ } \
+ __asm__ __volatile__("sync"); \
+ __osl_v; \
+ })
+#endif /* __mips__ */
+
+#define W_REG(r, v) do { \
+ switch (sizeof(*(r))) { \
+ case sizeof(u8): \
+ writeb((u8)(v), (volatile u8*)(r)); break; \
+ case sizeof(u16): \
+ writew((u16)(v), (volatile u16*)(r)); break; \
+ case sizeof(u32): \
+ writel((u32)(v), (volatile u32*)(r)); break; \
+ }; \
+ } while (0)
+#else /* __BIG_ENDIAN */
+#define R_REG(r) \
+ ({ \
+ __typeof(*(r)) __osl_v; \
+ switch (sizeof(*(r))) { \
+ case sizeof(u8): \
+ __osl_v = \
+ readb((volatile u8*)((r)^3)); \
+ break; \
+ case sizeof(u16): \
+ __osl_v = \
+ readw((volatile u16*)((r)^2)); \
+ break; \
+ case sizeof(u32): \
+ __osl_v = readl((volatile u32*)(r)); \
+ break; \
+ } \
+ __osl_v; \
+ })
+
+#define W_REG(r, v) do { \
+ switch (sizeof(*(r))) { \
+ case sizeof(u8): \
+ writeb((u8)(v), \
+ (volatile u8*)((r)^3)); break; \
+ case sizeof(u16): \
+ writew((u16)(v), \
+ (volatile u16*)((r)^2)); break; \
+ case sizeof(u32): \
+ writel((u32)(v), \
+ (volatile u32*)(r)); break; \
+ } \
+ } while (0)
+#endif /* __BIG_ENDIAN */
+
+#ifdef __mips__
+/*
+ * bcm4716 (which includes 4717 & 4718), plus 4706 on PCIe can reorder
+ * transactions. As a fix, a read after write is performed on certain places
+ * in the code. Older chips and the newer 5357 family don't require this fix.
+ */
+#define W_REG_FLUSH(r, v) ({ W_REG((r), (v)); (void)R_REG(r); })
+#else
+#define W_REG_FLUSH(r, v) W_REG((r), (v))
+#endif /* __mips__ */
+
+#define AND_REG(r, v) W_REG((r), R_REG(r) & (v))
+#define OR_REG(r, v) W_REG((r), R_REG(r) | (v))
+
+#define SET_REG(r, mask, val) \
+ W_REG((r), ((R_REG(r) & ~(mask)) | (val)))
+
+
+/* forward declarations */
+struct sk_buff;
+struct brcms_info;
+struct wlc_info;
+struct wlc_hw_info;
+struct wlc_if;
+struct brcms_if;
+struct ampdu_info;
+struct antsel_info;
+struct bmac_pmq;
+struct d11init;
+struct dma_pub;
+struct wlc_bsscfg;
+struct brcmu_strbuf;
+struct si_pub;
+
+/* brcm_msg_level is a bit vector with defs in defs.h */
+extern u32 brcm_msg_level;
+
+#endif /* _BRCM_TYPES_H_ */
diff --git a/drivers/staging/brcm80211/brcmsmac/wl_ucode_loader.c b/drivers/staging/brcm80211/brcmsmac/ucode_loader.c
index cc00dd19746bd..32d5196d64913 100644
--- a/drivers/staging/brcm80211/brcmsmac/wl_ucode_loader.c
+++ b/drivers/staging/brcm80211/brcmsmac/ucode_loader.c
@@ -15,8 +15,8 @@
*/
#include <linux/types.h>
-#include <bcmdefs.h>
-#include <wl_ucode.h>
+#include <defs.h>
+#include <ucode_loader.h>
enum {
D11UCODE_NAMETAG_START = 0,
@@ -53,59 +53,63 @@ u32 bcm43xx_24_lcnsz;
u32 *bcm43xx_bommajor;
u32 *bcm43xx_bomminor;
-int wl_ucode_data_init(struct wl_info *wl)
+int brcms_ucode_data_init(struct brcms_info *wl)
{
int rc;
- rc = wl_check_firmwares(wl);
+ rc = brcms_check_firmwares(wl);
- rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&d11lcn0bsinitvals24,
- D11LCN0BSINITVALS24);
- rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&d11lcn0initvals24,
+ rc = rc < 0 ? rc :
+ brcms_ucode_init_buf(wl, (void **)&d11lcn0bsinitvals24,
+ D11LCN0BSINITVALS24);
+ rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&d11lcn0initvals24,
D11LCN0INITVALS24);
- rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&d11lcn1bsinitvals24,
- D11LCN1BSINITVALS24);
- rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&d11lcn1initvals24,
+ rc = rc < 0 ? rc :
+ brcms_ucode_init_buf(wl, (void **)&d11lcn1bsinitvals24,
+ D11LCN1BSINITVALS24);
+ rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&d11lcn1initvals24,
D11LCN1INITVALS24);
- rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&d11lcn2bsinitvals24,
- D11LCN2BSINITVALS24);
- rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&d11lcn2initvals24,
+ rc = rc < 0 ? rc :
+ brcms_ucode_init_buf(wl, (void **)&d11lcn2bsinitvals24,
+ D11LCN2BSINITVALS24);
+ rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&d11lcn2initvals24,
D11LCN2INITVALS24);
- rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&d11n0absinitvals16,
- D11N0ABSINITVALS16);
- rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&d11n0bsinitvals16,
+ rc = rc < 0 ? rc :
+ brcms_ucode_init_buf(wl, (void **)&d11n0absinitvals16,
+ D11N0ABSINITVALS16);
+ rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&d11n0bsinitvals16,
D11N0BSINITVALS16);
- rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&d11n0initvals16,
+ rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&d11n0initvals16,
D11N0INITVALS16);
- rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&bcm43xx_16_mimo,
+ rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&bcm43xx_16_mimo,
D11UCODE_OVERSIGHT16_MIMO);
- rc = rc < 0 ? rc : wl_ucode_init_uint(wl, &bcm43xx_16_mimosz,
+ rc = rc < 0 ? rc : brcms_ucode_init_uint(wl, &bcm43xx_16_mimosz,
D11UCODE_OVERSIGHT16_MIMOSZ);
- rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&bcm43xx_24_lcn,
+ rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&bcm43xx_24_lcn,
D11UCODE_OVERSIGHT24_LCN);
- rc = rc < 0 ? rc : wl_ucode_init_uint(wl, &bcm43xx_24_lcnsz,
+ rc = rc < 0 ? rc : brcms_ucode_init_uint(wl, &bcm43xx_24_lcnsz,
D11UCODE_OVERSIGHT24_LCNSZ);
- rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&bcm43xx_bommajor,
+ rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&bcm43xx_bommajor,
D11UCODE_OVERSIGHT_BOMMAJOR);
- rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&bcm43xx_bomminor,
+ rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&bcm43xx_bomminor,
D11UCODE_OVERSIGHT_BOMMINOR);
return rc;
}
-void wl_ucode_data_free(void)
+void brcms_ucode_data_free(void)
{
- wl_ucode_free_buf((void *)d11lcn0bsinitvals24);
- wl_ucode_free_buf((void *)d11lcn0initvals24);
- wl_ucode_free_buf((void *)d11lcn1bsinitvals24);
- wl_ucode_free_buf((void *)d11lcn1initvals24);
- wl_ucode_free_buf((void *)d11lcn2bsinitvals24);
- wl_ucode_free_buf((void *)d11lcn2initvals24);
- wl_ucode_free_buf((void *)d11n0absinitvals16);
- wl_ucode_free_buf((void *)d11n0bsinitvals16);
- wl_ucode_free_buf((void *)d11n0initvals16);
- wl_ucode_free_buf((void *)bcm43xx_16_mimo);
- wl_ucode_free_buf((void *)bcm43xx_24_lcn);
- wl_ucode_free_buf((void *)bcm43xx_bommajor);
- wl_ucode_free_buf((void *)bcm43xx_bomminor);
+ brcms_ucode_free_buf((void *)d11lcn0bsinitvals24);
+ brcms_ucode_free_buf((void *)d11lcn0initvals24);
+ brcms_ucode_free_buf((void *)d11lcn1bsinitvals24);
+ brcms_ucode_free_buf((void *)d11lcn1initvals24);
+ brcms_ucode_free_buf((void *)d11lcn2bsinitvals24);
+ brcms_ucode_free_buf((void *)d11lcn2initvals24);
+ brcms_ucode_free_buf((void *)d11n0absinitvals16);
+ brcms_ucode_free_buf((void *)d11n0bsinitvals16);
+ brcms_ucode_free_buf((void *)d11n0initvals16);
+ brcms_ucode_free_buf((void *)bcm43xx_16_mimo);
+ brcms_ucode_free_buf((void *)bcm43xx_24_lcn);
+ brcms_ucode_free_buf((void *)bcm43xx_bommajor);
+ brcms_ucode_free_buf((void *)bcm43xx_bomminor);
return;
}
diff --git a/drivers/staging/brcm80211/brcmsmac/wl_ucode.h b/drivers/staging/brcm80211/brcmsmac/ucode_loader.h
index 6933fda0e6a0f..ca53deced7bf1 100644
--- a/drivers/staging/brcm80211/brcmsmac/wl_ucode.h
+++ b/drivers/staging/brcm80211/brcmsmac/ucode_loader.h
@@ -14,6 +14,8 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
+#include "types.h" /* forward structure declarations */
+
#define MIN_FW_SIZE 40000 /* minimum firmware file size in bytes */
#define MAX_FW_SIZE 150000
@@ -39,11 +41,12 @@ extern u32 bcm43xx_16_mimosz;
extern u32 *bcm43xx_24_lcn;
extern u32 bcm43xx_24_lcnsz;
-extern int wl_ucode_data_init(struct wl_info *wl);
-extern void wl_ucode_data_free(void);
+extern int brcms_ucode_data_init(struct brcms_info *wl);
+extern void brcms_ucode_data_free(void);
-extern int wl_ucode_init_buf(struct wl_info *wl, void **pbuf, unsigned int idx);
-extern int wl_ucode_init_uint(struct wl_info *wl, unsigned *data,
+extern int brcms_ucode_init_buf(struct brcms_info *wl, void **pbuf,
+ unsigned int idx);
+extern int brcms_ucode_init_uint(struct brcms_info *wl, unsigned *data,
unsigned int idx);
-extern void wl_ucode_free_buf(void *);
-extern int wl_check_firmwares(struct wl_info *wl);
+extern void brcms_ucode_free_buf(void *);
+extern int brcms_check_firmwares(struct brcms_info *wl);
diff --git a/drivers/staging/brcm80211/brcmsmac/wl_dbg.h b/drivers/staging/brcm80211/brcmsmac/wl_dbg.h
deleted file mode 100644
index 5582de3ee721a..0000000000000
--- a/drivers/staging/brcm80211/brcmsmac/wl_dbg.h
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _wl_dbg_h_
-#define _wl_dbg_h_
-
-#include <linux/device.h> /* dev_err() */
-
-/* wl_msg_level is a bit vector with defs in wlioctl.h */
-extern u32 wl_msg_level;
-
-#define BCMMSG(dev, fmt, args...) \
-do { \
- if (wl_msg_level & WL_TRACE_VAL) \
- wiphy_err(dev, "%s: " fmt, __func__, ##args); \
-} while (0)
-
-#ifdef BCMDBG
-
-
-/* Extra message control for AMPDU debugging */
-#define WL_AMPDU_UPDN_VAL 0x00000001 /* Config up/down related */
-#define WL_AMPDU_ERR_VAL 0x00000002 /* Calls to beaocn update */
-#define WL_AMPDU_TX_VAL 0x00000004 /* Transmit data path */
-#define WL_AMPDU_RX_VAL 0x00000008 /* Receive data path */
-#define WL_AMPDU_CTL_VAL 0x00000010 /* TSF-related items */
-#define WL_AMPDU_HW_VAL 0x00000020 /* AMPDU_HW */
-#define WL_AMPDU_HWTXS_VAL 0x00000040 /* AMPDU_HWTXS */
-#define WL_AMPDU_HWDBG_VAL 0x00000080 /* AMPDU_DBG */
-
-extern u32 wl_ampdu_dbg;
-
-#define WL_AMPDU_PRINT(level, fmt, args...) \
-do { \
- if (wl_ampdu_dbg & level) { \
- WL_AMPDU(fmt, ##args); \
- } \
-} while (0)
-
-#define WL_AMPDU_UPDN(fmt, args...) \
- WL_AMPDU_PRINT(WL_AMPDU_UPDN_VAL, fmt, ##args)
-#define WL_AMPDU_RX(fmt, args...) \
- WL_AMPDU_PRINT(WL_AMPDU_RX_VAL, fmt, ##args)
-#define WL_AMPDU_ERR(fmt, args...) \
- WL_AMPDU_PRINT(WL_AMPDU_ERR_VAL, fmt, ##args)
-#define WL_AMPDU_TX(fmt, args...) \
- WL_AMPDU_PRINT(WL_AMPDU_TX_VAL, fmt, ##args)
-#define WL_AMPDU_CTL(fmt, args...) \
- WL_AMPDU_PRINT(WL_AMPDU_CTL_VAL, fmt, ##args)
-#define WL_AMPDU_HW(fmt, args...) \
- WL_AMPDU_PRINT(WL_AMPDU_HW_VAL, fmt, ##args)
-#define WL_AMPDU_HWTXS(fmt, args...) \
- WL_AMPDU_PRINT(WL_AMPDU_HWTXS_VAL, fmt, ##args)
-#define WL_AMPDU_HWDBG(fmt, args...) \
- WL_AMPDU_PRINT(WL_AMPDU_HWDBG_VAL, fmt, ##args)
-#define WL_AMPDU_ERR_ON() (wl_ampdu_dbg & WL_AMPDU_ERR_VAL)
-#define WL_AMPDU_HW_ON() (wl_ampdu_dbg & WL_AMPDU_HW_VAL)
-#define WL_AMPDU_HWTXS_ON() (wl_ampdu_dbg & WL_AMPDU_HWTXS_VAL)
-
-#else /* BCMDBG */
-
-
-#define WL_AMPDU_UPDN(fmt, args...) no_printk(fmt, ##args)
-#define WL_AMPDU_RX(fmt, args...) no_printk(fmt, ##args)
-#define WL_AMPDU_ERR(fmt, args...) no_printk(fmt, ##args)
-#define WL_AMPDU_TX(fmt, args...) no_printk(fmt, ##args)
-#define WL_AMPDU_CTL(fmt, args...) no_printk(fmt, ##args)
-#define WL_AMPDU_HW(fmt, args...) no_printk(fmt, ##args)
-#define WL_AMPDU_HWTXS(fmt, args...) no_printk(fmt, ##args)
-#define WL_AMPDU_HWDBG(fmt, args...) no_printk(fmt, ##args)
-#define WL_AMPDU_ERR_ON() 0
-#define WL_AMPDU_HW_ON() 0
-#define WL_AMPDU_HWTXS_ON() 0
-
-#endif /* BCMDBG */
-
-#define WL_ERROR_ON() (wl_msg_level & WL_ERROR_VAL)
-
-#endif /* _wl_dbg_h_ */
diff --git a/drivers/staging/brcm80211/brcmsmac/wl_export.h b/drivers/staging/brcm80211/brcmsmac/wl_export.h
deleted file mode 100644
index 0fe0b24b586f5..0000000000000
--- a/drivers/staging/brcm80211/brcmsmac/wl_export.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _wl_export_h_
-#define _wl_export_h_
-
-/* misc callbacks */
-struct wl_info;
-struct wl_if;
-struct wlc_if;
-extern void wl_init(struct wl_info *wl);
-extern uint wl_reset(struct wl_info *wl);
-extern void wl_intrson(struct wl_info *wl);
-extern u32 wl_intrsoff(struct wl_info *wl);
-extern void wl_intrsrestore(struct wl_info *wl, u32 macintmask);
-extern int wl_up(struct wl_info *wl);
-extern void wl_down(struct wl_info *wl);
-extern void wl_txflowcontrol(struct wl_info *wl, struct wl_if *wlif, bool state,
- int prio);
-extern bool wl_alloc_dma_resources(struct wl_info *wl, uint dmaddrwidth);
-extern bool wl_rfkill_set_hw_state(struct wl_info *wl);
-
-/* timer functions */
-struct wl_timer;
-extern struct wl_timer *wl_init_timer(struct wl_info *wl,
- void (*fn) (void *arg), void *arg,
- const char *name);
-extern void wl_free_timer(struct wl_info *wl, struct wl_timer *timer);
-extern void wl_add_timer(struct wl_info *wl, struct wl_timer *timer, uint ms,
- int periodic);
-extern bool wl_del_timer(struct wl_info *wl, struct wl_timer *timer);
-extern void wl_msleep(struct wl_info *wl, uint ms);
-
-#endif /* _wl_export_h_ */
diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bsscfg.h b/drivers/staging/brcm80211/brcmsmac/wlc_bsscfg.h
deleted file mode 100644
index 2572541bde9b6..0000000000000
--- a/drivers/staging/brcm80211/brcmsmac/wlc_bsscfg.h
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _WLC_BSSCFG_H_
-#define _WLC_BSSCFG_H_
-
-/* Check if a particular BSS config is AP or STA */
-#define BSSCFG_AP(cfg) (0)
-#define BSSCFG_STA(cfg) (1)
-
-#define BSSCFG_IBSS(cfg) (!(cfg)->BSS)
-
-#define NTXRATE 64 /* # tx MPDUs rate is reported for */
-#define MAXMACLIST 64 /* max # source MAC matches */
-#define BCN_TEMPLATE_COUNT 2
-
-/* Iterator for "associated" STA bss configs:
- (struct wlc_info *wlc, int idx, struct wlc_bsscfg *cfg) */
-#define FOREACH_AS_STA(wlc, idx, cfg) \
- for (idx = 0; (int) idx < WLC_MAXBSSCFG; idx++) \
- if ((cfg = (wlc)->bsscfg[idx]) && BSSCFG_STA(cfg) && cfg->associated)
-
-/* As above for all non-NULL BSS configs */
-#define FOREACH_BSS(wlc, idx, cfg) \
- for (idx = 0; (int) idx < WLC_MAXBSSCFG; idx++) \
- if ((cfg = (wlc)->bsscfg[idx]))
-
-/* BSS configuration state */
-struct wlc_bsscfg {
- struct wlc_info *wlc; /* wlc to which this bsscfg belongs to. */
- bool up; /* is this configuration up operational */
- bool enable; /* is this configuration enabled */
- bool associated; /* is BSS in ASSOCIATED state */
- bool BSS; /* infraustructure or adhac */
- bool dtim_programmed;
-
- u8 SSID_len; /* the length of SSID */
- u8 SSID[IEEE80211_MAX_SSID_LEN]; /* SSID string */
- struct scb *bcmc_scb[MAXBANDS]; /* one bcmc_scb per band */
- s8 _idx; /* the index of this bsscfg,
- * assigned at wlc_bsscfg_alloc()
- */
- /* MAC filter */
- uint nmac; /* # of entries on maclist array */
- int macmode; /* allow/deny stations on maclist array */
- struct ether_addr *maclist; /* list of source MAC addrs to match */
-
- /* security */
- u32 wsec; /* wireless security bitvec */
- s16 auth; /* 802.11 authentication: Open, Shared Key, WPA */
- s16 openshared; /* try Open auth first, then Shared Key */
- bool wsec_restrict; /* drop unencrypted packets if wsec is enabled */
- bool eap_restrict; /* restrict data until 802.1X auth succeeds */
- u16 WPA_auth; /* WPA: authenticated key management */
- bool wpa2_preauth; /* default is true, wpa_cap sets value */
- bool wsec_portopen; /* indicates keys are plumbed */
- wsec_iv_t wpa_none_txiv; /* global txiv for WPA_NONE, tkip and aes */
- int wsec_index; /* 0-3: default tx key, -1: not set */
- wsec_key_t *bss_def_keys[WLC_DEFAULT_KEYS]; /* default key storage */
-
- /* TKIP countermeasures */
- bool tkip_countermeasures; /* flags TKIP no-assoc period */
- u32 tk_cm_dt; /* detect timer */
- u32 tk_cm_bt; /* blocking timer */
- u32 tk_cm_bt_tmstmp; /* Timestamp when TKIP BT is activated */
- bool tk_cm_activate; /* activate countermeasures after EAPOL-Key sent */
-
- u8 BSSID[ETH_ALEN]; /* BSSID (associated) */
- u8 cur_etheraddr[ETH_ALEN]; /* h/w address */
- u16 bcmc_fid; /* the last BCMC FID queued to TX_BCMC_FIFO */
- u16 bcmc_fid_shm; /* the last BCMC FID written to shared mem */
-
- u32 flags; /* WLC_BSSCFG flags; see below */
-
- u8 *bcn; /* AP beacon */
- uint bcn_len; /* AP beacon length */
- bool ar_disassoc; /* disassociated in associated recreation */
-
- int auth_atmptd; /* auth type (open/shared) attempted */
-
- pmkid_cand_t pmkid_cand[MAXPMKID]; /* PMKID candidate list */
- uint npmkid_cand; /* num PMKID candidates */
- pmkid_t pmkid[MAXPMKID]; /* PMKID cache */
- uint npmkid; /* num cached PMKIDs */
-
- wlc_bss_info_t *current_bss; /* BSS parms in ASSOCIATED state */
-
- /* PM states */
- bool PMawakebcn; /* bcn recvd during current waking state */
- bool PMpending; /* waiting for tx status with PM indicated set */
- bool priorPMstate; /* Detecting PM state transitions */
- bool PSpoll; /* whether there is an outstanding PS-Poll frame */
-
- /* BSSID entry in RCMTA, use the wsec key management infrastructure to
- * manage the RCMTA entries.
- */
- wsec_key_t *rcmta;
-
- /* 'unique' ID of this bsscfg, assigned at bsscfg allocation */
- u16 ID;
-
- uint txrspecidx; /* index into tx rate circular buffer */
- ratespec_t txrspec[NTXRATE][2]; /* circular buffer of prev MPDUs tx rates */
-};
-
-#define WLC_BSSCFG_11N_DISABLE 0x1000 /* Do not advertise .11n IEs for this BSS */
-#define WLC_BSSCFG_HW_BCN 0x20 /* The BSS is generating beacons in HW */
-
-#define HWBCN_ENAB(cfg) (((cfg)->flags & WLC_BSSCFG_HW_BCN) != 0)
-#define HWPRB_ENAB(cfg) (((cfg)->flags & WLC_BSSCFG_HW_PRB) != 0)
-
-/* Extend N_ENAB to per-BSS */
-#define BSS_N_ENAB(wlc, cfg) \
- (N_ENAB((wlc)->pub) && !((cfg)->flags & WLC_BSSCFG_11N_DISABLE))
-
-#define MBSS_BCN_ENAB(cfg) 0
-#define MBSS_PRB_ENAB(cfg) 0
-#define SOFTBCN_ENAB(pub) (0)
-#define SOFTPRB_ENAB(pub) (0)
-#define wlc_bsscfg_tx_check(a) do { } while (0);
-
-#endif /* _WLC_BSSCFG_H_ */
diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_key.h b/drivers/staging/brcm80211/brcmsmac/wlc_key.h
deleted file mode 100644
index cab10c7379371..0000000000000
--- a/drivers/staging/brcm80211/brcmsmac/wlc_key.h
+++ /dev/null
@@ -1,140 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _wlc_key_h_
-#define _wlc_key_h_
-
-struct scb;
-struct wlc_info;
-struct wlc_bsscfg;
-/* Maximum # of keys that wl driver supports in S/W.
- * Keys supported in H/W is less than or equal to WSEC_MAX_KEYS.
- */
-#define WSEC_MAX_KEYS 54 /* Max # of keys (50 + 4 default keys) */
-#define WLC_DEFAULT_KEYS 4 /* Default # of keys */
-
-#define WSEC_MAX_WOWL_KEYS 5 /* Max keys in WOWL mode (1 + 4 default keys) */
-
-#define WPA2_GTK_MAX 3
-
-/*
-* Max # of keys currently supported:
-*
-* s/w keys if WSEC_SW(wlc->wsec).
-* h/w keys otherwise.
-*/
-#define WLC_MAX_WSEC_KEYS(wlc) WSEC_MAX_KEYS
-
-/* number of 802.11 default (non-paired, group keys) */
-#define WSEC_MAX_DEFAULT_KEYS 4 /* # of default keys */
-
-/* Max # of hardware keys supported */
-#define WLC_MAX_WSEC_HW_KEYS(wlc) WSEC_MAX_RCMTA_KEYS
-
-/* Max # of hardware TKIP MIC keys supported */
-#define WLC_MAX_TKMIC_HW_KEYS(wlc) (WSEC_MAX_TKMIC_ENGINE_KEYS)
-
-#define WSEC_HW_TKMIC_KEY(wlc, key, bsscfg) \
- ((((wlc)->machwcap & MCAP_TKIPMIC)) && \
- (key) && ((key)->algo == CRYPTO_ALGO_TKIP) && \
- !WSEC_SOFTKEY(wlc, key, bsscfg) && \
- WSEC_KEY_INDEX(wlc, key) >= WLC_DEFAULT_KEYS && \
- (WSEC_KEY_INDEX(wlc, key) < WSEC_MAX_TKMIC_ENGINE_KEYS))
-
-/* index of key in key table */
-#define WSEC_KEY_INDEX(wlc, key) ((key)->idx)
-
-#define WSEC_SOFTKEY(wlc, key, bsscfg) (WLC_SW_KEYS(wlc, bsscfg) || \
- WSEC_KEY_INDEX(wlc, key) >= WLC_MAX_WSEC_HW_KEYS(wlc))
-
-/* get a key, non-NULL only if key allocated and not clear */
-#define WSEC_KEY(wlc, i) (((wlc)->wsec_keys[i] && (wlc)->wsec_keys[i]->len) ? \
- (wlc)->wsec_keys[i] : NULL)
-
-#define WSEC_SCB_KEY_VALID(scb) (((scb)->key && (scb)->key->len) ? true : false)
-
-/* default key */
-#define WSEC_BSS_DEFAULT_KEY(bsscfg) (((bsscfg)->wsec_index == -1) ? \
- (struct wsec_key *)NULL:(bsscfg)->bss_def_keys[(bsscfg)->wsec_index])
-
-/* Macros for key management in IBSS mode */
-#define WSEC_IBSS_MAX_PEERS 16 /* Max # of IBSS Peers */
-#define WSEC_IBSS_RCMTA_INDEX(idx) \
- (((idx - WSEC_MAX_DEFAULT_KEYS) % WSEC_IBSS_MAX_PEERS) + WSEC_MAX_DEFAULT_KEYS)
-
-/* contiguous # key slots for infrastructure mode STA */
-#define WSEC_BSS_STA_KEY_GROUP_SIZE 5
-
-typedef struct wsec_iv {
- u32 hi; /* upper 32 bits of IV */
- u16 lo; /* lower 16 bits of IV */
-} wsec_iv_t;
-
-#define WLC_NUMRXIVS 16 /* # rx IVs (one per 802.11e TID) */
-
-typedef struct wsec_key {
- u8 ea[ETH_ALEN]; /* per station */
- u8 idx; /* key index in wsec_keys array */
- u8 id; /* key ID [0-3] */
- u8 algo; /* CRYPTO_ALGO_AES_CCM, CRYPTO_ALGO_WEP128, etc */
- u8 rcmta; /* rcmta entry index, same as idx by default */
- u16 flags; /* misc flags */
- u8 algo_hw; /* cache for hw register */
- u8 aes_mode; /* cache for hw register */
- s8 iv_len; /* IV length */
- s8 icv_len; /* ICV length */
- u32 len; /* key length..don't move this var */
- /* data is 4byte aligned */
- u8 data[WLAN_MAX_KEY_LEN]; /* key data */
- wsec_iv_t rxiv[WLC_NUMRXIVS]; /* Rx IV (one per TID) */
- wsec_iv_t txiv; /* Tx IV */
-
-} wsec_key_t;
-
-#define broken_roundup(x, y) ((((x) + ((y) - 1)) / (y)) * (y))
-
-/* For use with wsec_key_t.flags */
-
-#define WSEC_BS_UPDATE (1 << 0) /* Indicates hw needs key update on BS switch */
-#define WSEC_PRIMARY_KEY (1 << 1) /* Indicates this key is the primary (ie tx) key */
-#define WSEC_TKIP_ERROR (1 << 2) /* Provoke deliberate MIC error */
-#define WSEC_REPLAY_ERROR (1 << 3) /* Provoke deliberate replay */
-#define WSEC_IBSS_PEER_GROUP_KEY (1 << 7) /* Flag: group key for a IBSS PEER */
-#define WSEC_ICV_ERROR (1 << 8) /* Provoke deliberate ICV error */
-
-#define wlc_key_insert(a, b, c, d, e, f, g, h, i, j) (-EBADE)
-#define wlc_key_update(a, b, c) do {} while (0)
-#define wlc_key_remove(a, b, c) do {} while (0)
-#define wlc_key_remove_all(a, b) do {} while (0)
-#define wlc_key_delete(a, b, c) do {} while (0)
-#define wlc_scb_key_delete(a, b) do {} while (0)
-#define wlc_key_lookup(a, b, c, d, e) (NULL)
-#define wlc_key_hw_init_all(a) do {} while (0)
-#define wlc_key_hw_init(a, b, c) do {} while (0)
-#define wlc_key_hw_wowl_init(a, b, c, d) do {} while (0)
-#define wlc_key_sw_wowl_update(a, b, c, d, e) do {} while (0)
-#define wlc_key_sw_wowl_create(a, b, c) (-EBADE)
-#define wlc_key_iv_update(a, b, c, d, e) do {(void)e; } while (0)
-#define wlc_key_iv_init(a, b, c) do {} while (0)
-#define wlc_key_set_error(a, b, c) (-EBADE)
-#define wlc_key_dump_hw(a, b) (-EBADE)
-#define wlc_key_dump_sw(a, b) (-EBADE)
-#define wlc_key_defkeyflag(a) (0)
-#define wlc_rcmta_add_bssid(a, b) do {} while (0)
-#define wlc_rcmta_del_bssid(a, b) do {} while (0)
-#define wlc_key_scb_delete(a, b) do {} while (0)
-
-#endif /* _wlc_key_h_ */
diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_types.h b/drivers/staging/brcm80211/brcmsmac/wlc_types.h
deleted file mode 100644
index df6e04c6ac581..0000000000000
--- a/drivers/staging/brcm80211/brcmsmac/wlc_types.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _wlc_types_h_
-#define _wlc_types_h_
-
-/* forward declarations */
-
-struct wlc_info;
-struct wlc_hw_info;
-struct wlc_if;
-struct wl_if;
-struct ampdu_info;
-struct antsel_info;
-struct bmac_pmq;
-
-struct d11init;
-
-#ifndef _hnddma_pub_
-#define _hnddma_pub_
-struct hnddma_pub;
-#endif /* _hnddma_pub_ */
-
-#endif /* _wlc_types_h_ */
diff --git a/drivers/staging/brcm80211/util/Makefile b/drivers/staging/brcm80211/brcmutil/Makefile
index f9b36cafdc877..6403423c0212e 100644
--- a/drivers/staging/brcm80211/util/Makefile
+++ b/drivers/staging/brcm80211/brcmutil/Makefile
@@ -16,12 +16,12 @@
# CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
ccflags-y := \
- -Idrivers/staging/brcm80211/util \
+ -Idrivers/staging/brcm80211/brcmutil \
-Idrivers/staging/brcm80211/include
BRCMUTIL_OFILES := \
- bcmutils.o \
- bcmwifi.o
+ utils.o \
+ wifi.o
MODULEPFX := brcmutil
diff --git a/drivers/staging/brcm80211/util/bcmutils.c b/drivers/staging/brcm80211/brcmutil/utils.c
index 43e5bb3aec02a..ab11c4bf4f1b4 100644
--- a/drivers/staging/brcm80211/util/bcmutils.c
+++ b/drivers/staging/brcm80211/brcmutil/utils.c
@@ -22,19 +22,17 @@
#include <linux/netdevice.h>
#include <linux/sched.h>
#include <linux/printk.h>
-#include <bcmdefs.h>
+#include <defs.h>
#include <stdarg.h>
-#include <bcmutils.h>
-#include <bcmnvram.h>
-#include <bcmdevs.h>
-#include <proto/802.11.h>
+#include <brcmu_utils.h>
+#include <brcm_hw_ids.h>
MODULE_AUTHOR("Broadcom Corporation");
MODULE_DESCRIPTION("Broadcom 802.11n wireless LAN driver utilities.");
MODULE_SUPPORTED_DEVICE("Broadcom 802.11n WLAN cards");
MODULE_LICENSE("Dual BSD/GPL");
-struct sk_buff *bcm_pkt_buf_get_skb(uint len)
+struct sk_buff *brcmu_pkt_buf_get_skb(uint len)
{
struct sk_buff *skb;
@@ -46,10 +44,10 @@ struct sk_buff *bcm_pkt_buf_get_skb(uint len)
return skb;
}
-EXPORT_SYMBOL(bcm_pkt_buf_get_skb);
+EXPORT_SYMBOL(brcmu_pkt_buf_get_skb);
/* Free the driver packet. Free the tag if present */
-void bcm_pkt_buf_free_skb(struct sk_buff *skb)
+void brcmu_pkt_buf_free_skb(struct sk_buff *skb)
{
struct sk_buff *nskb;
int nest = 0;
@@ -74,11 +72,11 @@ void bcm_pkt_buf_free_skb(struct sk_buff *skb)
skb = nskb;
}
}
-EXPORT_SYMBOL(bcm_pkt_buf_free_skb);
+EXPORT_SYMBOL(brcmu_pkt_buf_free_skb);
/* copy a buffer into a pkt buffer chain */
-uint bcm_pktfrombuf(struct sk_buff *p, uint offset, int len,
+uint brcmu_pktfrombuf(struct sk_buff *p, uint offset, int len,
unsigned char *buf)
{
uint n, ret = 0;
@@ -105,10 +103,10 @@ uint bcm_pktfrombuf(struct sk_buff *p, uint offset, int len,
return ret;
}
-EXPORT_SYMBOL(bcm_pktfrombuf);
+EXPORT_SYMBOL(brcmu_pktfrombuf);
/* return total length of buffer chain */
-uint bcm_pkttotlen(struct sk_buff *p)
+uint brcmu_pkttotlen(struct sk_buff *p)
{
uint total;
@@ -117,13 +115,13 @@ uint bcm_pkttotlen(struct sk_buff *p)
total += p->len;
return total;
}
-EXPORT_SYMBOL(bcm_pkttotlen);
+EXPORT_SYMBOL(brcmu_pkttotlen);
/*
* osl multiple-precedence packet queue
* hi_prec is always >= the number of the highest non-empty precedence
*/
-struct sk_buff *bcm_pktq_penq(struct pktq *pq, int prec,
+struct sk_buff *brcmu_pktq_penq(struct pktq *pq, int prec,
struct sk_buff *p)
{
struct pktq_prec *q;
@@ -148,9 +146,9 @@ struct sk_buff *bcm_pktq_penq(struct pktq *pq, int prec,
return p;
}
-EXPORT_SYMBOL(bcm_pktq_penq);
+EXPORT_SYMBOL(brcmu_pktq_penq);
-struct sk_buff *bcm_pktq_penq_head(struct pktq *pq, int prec,
+struct sk_buff *brcmu_pktq_penq_head(struct pktq *pq, int prec,
struct sk_buff *p)
{
struct pktq_prec *q;
@@ -174,9 +172,9 @@ struct sk_buff *bcm_pktq_penq_head(struct pktq *pq, int prec,
return p;
}
-EXPORT_SYMBOL(bcm_pktq_penq_head);
+EXPORT_SYMBOL(brcmu_pktq_penq_head);
-struct sk_buff *bcm_pktq_pdeq(struct pktq *pq, int prec)
+struct sk_buff *brcmu_pktq_pdeq(struct pktq *pq, int prec)
{
struct pktq_prec *q;
struct sk_buff *p;
@@ -199,9 +197,9 @@ struct sk_buff *bcm_pktq_pdeq(struct pktq *pq, int prec)
return p;
}
-EXPORT_SYMBOL(bcm_pktq_pdeq);
+EXPORT_SYMBOL(brcmu_pktq_pdeq);
-struct sk_buff *bcm_pktq_pdeq_tail(struct pktq *pq, int prec)
+struct sk_buff *brcmu_pktq_pdeq_tail(struct pktq *pq, int prec)
{
struct pktq_prec *q;
struct sk_buff *p, *prev;
@@ -227,10 +225,10 @@ struct sk_buff *bcm_pktq_pdeq_tail(struct pktq *pq, int prec)
return p;
}
-EXPORT_SYMBOL(bcm_pktq_pdeq_tail);
+EXPORT_SYMBOL(brcmu_pktq_pdeq_tail);
void
-bcm_pktq_pflush(struct pktq *pq, int prec, bool dir,
+brcmu_pktq_pflush(struct pktq *pq, int prec, bool dir,
ifpkt_cb_t fn, void *arg)
{
struct pktq_prec *q;
@@ -246,7 +244,7 @@ bcm_pktq_pflush(struct pktq *pq, int prec, bool dir,
else
prev->prev = p->prev;
p->prev = NULL;
- bcm_pkt_buf_free_skb(p);
+ brcmu_pkt_buf_free_skb(p);
q->len--;
pq->len--;
p = (head ? q->head : prev->prev);
@@ -260,18 +258,18 @@ bcm_pktq_pflush(struct pktq *pq, int prec, bool dir,
q->tail = NULL;
}
}
-EXPORT_SYMBOL(bcm_pktq_pflush);
+EXPORT_SYMBOL(brcmu_pktq_pflush);
-void bcm_pktq_flush(struct pktq *pq, bool dir,
+void brcmu_pktq_flush(struct pktq *pq, bool dir,
ifpkt_cb_t fn, void *arg)
{
int prec;
for (prec = 0; prec < pq->num_prec; prec++)
- bcm_pktq_pflush(pq, prec, dir, fn, arg);
+ brcmu_pktq_pflush(pq, prec, dir, fn, arg);
}
-EXPORT_SYMBOL(bcm_pktq_flush);
+EXPORT_SYMBOL(brcmu_pktq_flush);
-void bcm_pktq_init(struct pktq *pq, int num_prec, int max_len)
+void brcmu_pktq_init(struct pktq *pq, int num_prec, int max_len)
{
int prec;
@@ -286,9 +284,9 @@ void bcm_pktq_init(struct pktq *pq, int num_prec, int max_len)
for (prec = 0; prec < num_prec; prec++)
pq->q[prec].max = pq->max;
}
-EXPORT_SYMBOL(bcm_pktq_init);
+EXPORT_SYMBOL(brcmu_pktq_init);
-struct sk_buff *bcm_pktq_peek_tail(struct pktq *pq, int *prec_out)
+struct sk_buff *brcmu_pktq_peek_tail(struct pktq *pq, int *prec_out)
{
int prec;
@@ -304,10 +302,10 @@ struct sk_buff *bcm_pktq_peek_tail(struct pktq *pq, int *prec_out)
return pq->q[prec].tail;
}
-EXPORT_SYMBOL(bcm_pktq_peek_tail);
+EXPORT_SYMBOL(brcmu_pktq_peek_tail);
/* Return sum of lengths of a specific set of precedences */
-int bcm_pktq_mlen(struct pktq *pq, uint prec_bmp)
+int brcmu_pktq_mlen(struct pktq *pq, uint prec_bmp)
{
int prec, len;
@@ -319,10 +317,10 @@ int bcm_pktq_mlen(struct pktq *pq, uint prec_bmp)
return len;
}
-EXPORT_SYMBOL(bcm_pktq_mlen);
+EXPORT_SYMBOL(brcmu_pktq_mlen);
/* Priority dequeue from a specific set of precedences */
-struct sk_buff *bcm_pktq_mdeq(struct pktq *pq, uint prec_bmp,
+struct sk_buff *brcmu_pktq_mdeq(struct pktq *pq, uint prec_bmp,
int *prec_out)
{
struct pktq_prec *q;
@@ -360,10 +358,10 @@ struct sk_buff *bcm_pktq_mdeq(struct pktq *pq, uint prec_bmp,
return p;
}
-EXPORT_SYMBOL(bcm_pktq_mdeq);
+EXPORT_SYMBOL(brcmu_pktq_mdeq);
/* parse a xx:xx:xx:xx:xx:xx format ethernet address */
-int bcm_ether_atoe(char *p, u8 *ea)
+int brcmu_ether_atoe(char *p, u8 *ea)
{
int i = 0;
@@ -375,11 +373,11 @@ int bcm_ether_atoe(char *p, u8 *ea)
return i == 6;
}
-EXPORT_SYMBOL(bcm_ether_atoe);
+EXPORT_SYMBOL(brcmu_ether_atoe);
#if defined(BCMDBG)
/* pretty hex print a pkt buffer chain */
-void bcm_prpkt(const char *msg, struct sk_buff *p0)
+void brcmu_prpkt(const char *msg, struct sk_buff *p0)
{
struct sk_buff *p;
@@ -389,13 +387,14 @@ void bcm_prpkt(const char *msg, struct sk_buff *p0)
for (p = p0; p; p = p->next)
print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, p->data, p->len);
}
-EXPORT_SYMBOL(bcm_prpkt);
+EXPORT_SYMBOL(brcmu_prpkt);
#endif /* defined(BCMDBG) */
/* iovar table lookup */
-const bcm_iovar_t *bcm_iovar_lookup(const bcm_iovar_t *table, const char *name)
+const struct brcmu_iovar *brcmu_iovar_lookup(const struct brcmu_iovar *table,
+ const char *name)
{
- const bcm_iovar_t *vi;
+ const struct brcmu_iovar *vi;
const char *lookup_name;
/* skip any ':' delimited option prefixes */
@@ -413,9 +412,10 @@ const bcm_iovar_t *bcm_iovar_lookup(const bcm_iovar_t *table, const char *name)
return NULL; /* var name not found */
}
-EXPORT_SYMBOL(bcm_iovar_lookup);
+EXPORT_SYMBOL(brcmu_iovar_lookup);
-int bcm_iovar_lencheck(const bcm_iovar_t *vi, void *arg, int len, bool set)
+int brcmu_iovar_lencheck(const struct brcmu_iovar *vi, void *arg, int len,
+ bool set)
{
int bcmerror = 0;
@@ -458,7 +458,7 @@ int bcm_iovar_lencheck(const bcm_iovar_t *vi, void *arg, int len, bool set)
return bcmerror;
}
-EXPORT_SYMBOL(bcm_iovar_lencheck);
+EXPORT_SYMBOL(brcmu_iovar_lencheck);
/*******************************************************************************
* crc8
@@ -517,7 +517,7 @@ static const u8 crc8_table[256] = {
0xF4, 0x03, 0x4D, 0xBA, 0xD1, 0x26, 0x68, 0x9F
};
-u8 bcm_crc8(u8 *pdata, /* pointer to array of data to process */
+u8 brcmu_crc8(u8 *pdata, /* pointer to array of data to process */
uint nbytes, /* number of input data bytes to process */
u8 crc /* either CRC8_INIT_VALUE or previous return value */
) {
@@ -527,19 +527,19 @@ u8 bcm_crc8(u8 *pdata, /* pointer to array of data to process */
return crc;
}
-EXPORT_SYMBOL(bcm_crc8);
+EXPORT_SYMBOL(brcmu_crc8);
/*
* Traverse a string of 1-byte tag/1-byte length/variable-length value
* triples, returning a pointer to the substring whose first element
* matches tag
*/
-bcm_tlv_t *bcm_parse_tlvs(void *buf, int buflen, uint key)
+struct brcmu_tlv *brcmu_parse_tlvs(void *buf, int buflen, uint key)
{
- bcm_tlv_t *elt;
+ struct brcmu_tlv *elt;
int totlen;
- elt = (bcm_tlv_t *) buf;
+ elt = (struct brcmu_tlv *) buf;
totlen = buflen;
/* find tagged parameter */
@@ -550,18 +550,19 @@ bcm_tlv_t *bcm_parse_tlvs(void *buf, int buflen, uint key)
if ((elt->id == key) && (totlen >= (len + 2)))
return elt;
- elt = (bcm_tlv_t *) ((u8 *) elt + (len + 2));
+ elt = (struct brcmu_tlv *) ((u8 *) elt + (len + 2));
totlen -= (len + 2);
}
return NULL;
}
-EXPORT_SYMBOL(bcm_parse_tlvs);
+EXPORT_SYMBOL(brcmu_parse_tlvs);
#if defined(BCMDBG)
int
-bcm_format_flags(const bcm_bit_desc_t *bd, u32 flags, char *buf, int len)
+brcmu_format_flags(const struct brcmu_bit_desc *bd, u32 flags, char *buf,
+ int len)
{
int i;
char *p = buf;
@@ -612,10 +613,10 @@ bcm_format_flags(const bcm_bit_desc_t *bd, u32 flags, char *buf, int len)
return (int)(p - buf);
}
-EXPORT_SYMBOL(bcm_format_flags);
+EXPORT_SYMBOL(brcmu_format_flags);
/* print bytes formatted as hex to a string. return the resulting string length */
-int bcm_format_hex(char *str, const void *bytes, int len)
+int brcmu_format_hex(char *str, const void *bytes, int len)
{
int i;
char *p = str;
@@ -627,10 +628,10 @@ int bcm_format_hex(char *str, const void *bytes, int len)
}
return (int)(p - str);
}
-EXPORT_SYMBOL(bcm_format_hex);
+EXPORT_SYMBOL(brcmu_format_hex);
#endif /* defined(BCMDBG) */
-char *bcm_chipname(uint chipid, char *buf, uint len)
+char *brcmu_chipname(uint chipid, char *buf, uint len)
{
const char *fmt;
@@ -638,9 +639,9 @@ char *bcm_chipname(uint chipid, char *buf, uint len)
snprintf(buf, len, fmt, chipid);
return buf;
}
-EXPORT_SYMBOL(bcm_chipname);
+EXPORT_SYMBOL(brcmu_chipname);
-uint bcm_mkiovar(char *name, char *data, uint datalen, char *buf, uint buflen)
+uint brcmu_mkiovar(char *name, char *data, uint datalen, char *buf, uint buflen)
{
uint len;
@@ -657,7 +658,7 @@ uint bcm_mkiovar(char *name, char *data, uint datalen, char *buf, uint buflen)
return len;
}
-EXPORT_SYMBOL(bcm_mkiovar);
+EXPORT_SYMBOL(brcmu_mkiovar);
/* Quarter dBm units to mW
* Table starts at QDBM_OFFSET, so the first entry is mW for qdBm=153
@@ -689,7 +690,7 @@ static const u16 nqdBm_to_mW_map[QDBM_TABLE_LEN] = {
/* 185: */ 42170, 44668, 47315, 50119, 53088, 56234, 59566, 63096
};
-u16 bcm_qdbm_to_mw(u8 qdbm)
+u16 brcmu_qdbm_to_mw(u8 qdbm)
{
uint factor = 1;
int idx = qdbm - QDBM_OFFSET;
@@ -712,9 +713,9 @@ u16 bcm_qdbm_to_mw(u8 qdbm)
*/
return (nqdBm_to_mW_map[idx] + factor / 2) / factor;
}
-EXPORT_SYMBOL(bcm_qdbm_to_mw);
+EXPORT_SYMBOL(brcmu_qdbm_to_mw);
-u8 bcm_mw_to_qdbm(u16 mw)
+u8 brcmu_mw_to_qdbm(u16 mw)
{
u8 qdbm;
int offset;
@@ -744,9 +745,9 @@ u8 bcm_mw_to_qdbm(u16 mw)
return qdbm;
}
-EXPORT_SYMBOL(bcm_mw_to_qdbm);
+EXPORT_SYMBOL(brcmu_mw_to_qdbm);
-uint bcm_bitcount(u8 *bitmap, uint length)
+uint brcmu_bitcount(u8 *bitmap, uint length)
{
uint bitcount = 0, i;
u8 tmp;
@@ -759,18 +760,18 @@ uint bcm_bitcount(u8 *bitmap, uint length)
}
return bitcount;
}
-EXPORT_SYMBOL(bcm_bitcount);
+EXPORT_SYMBOL(brcmu_bitcount);
-/* Initialization of bcmstrbuf structure */
-void bcm_binit(struct bcmstrbuf *b, char *buf, uint size)
+/* Initialization of brcmu_strbuf structure */
+void brcmu_binit(struct brcmu_strbuf *b, char *buf, uint size)
{
b->origsize = b->size = size;
b->origbuf = b->buf = buf;
}
-EXPORT_SYMBOL(bcm_binit);
+EXPORT_SYMBOL(brcmu_binit);
/* Buffer sprintf wrapper to guard against buffer overflow */
-int bcm_bprintf(struct bcmstrbuf *b, const char *fmt, ...)
+int brcmu_bprintf(struct brcmu_strbuf *b, const char *fmt, ...)
{
va_list ap;
int r;
@@ -780,7 +781,7 @@ int bcm_bprintf(struct bcmstrbuf *b, const char *fmt, ...)
/* Non Ansi C99 compliant returns -1,
* Ansi compliant return r >= b->size,
- * bcmstdlib returns 0, handle all
+ * stdlib returns 0, handle all
*/
if ((r == -1) || (r >= (int)b->size) || (r == 0)) {
b->size = 0;
@@ -793,4 +794,4 @@ int bcm_bprintf(struct bcmstrbuf *b, const char *fmt, ...)
return r;
}
-EXPORT_SYMBOL(bcm_bprintf);
+EXPORT_SYMBOL(brcmu_bprintf);
diff --git a/drivers/staging/brcm80211/util/bcmwifi.c b/drivers/staging/brcm80211/brcmutil/wifi.c
index 955a3ab1a8275..bacf3450206bf 100644
--- a/drivers/staging/brcm80211/util/bcmwifi.c
+++ b/drivers/staging/brcm80211/brcmutil/wifi.c
@@ -16,9 +16,9 @@
#include <linux/ctype.h>
#include <linux/kernel.h>
#include <linux/module.h>
-#include <bcmdefs.h>
-#include <bcmutils.h>
-#include <bcmwifi.h>
+#include <defs.h>
+#include <brcmu_utils.h>
+#include <brcmu_wifi.h>
/*
* Verify the chanspec is using a legal set of parameters, i.e. that the
@@ -26,7 +26,7 @@
* combination could be legal given any set of circumstances.
* RETURNS: true is the chanspec is malformed, false if it looks good.
*/
-bool bcm_chspec_malformed(chanspec_t chanspec)
+bool brcmu_chspec_malformed(chanspec_t chanspec)
{
/* must be 2G or 5G band */
if (!CHSPEC_IS5G(chanspec) && !CHSPEC_IS2G(chanspec))
@@ -46,14 +46,14 @@ bool bcm_chspec_malformed(chanspec_t chanspec)
return false;
}
-EXPORT_SYMBOL(bcm_chspec_malformed);
+EXPORT_SYMBOL(brcmu_chspec_malformed);
/*
* This function returns the channel number that control traffic is being sent on, for legacy
* channels this is just the channel number, for 40MHZ channels it is the upper or lowre 20MHZ
* sideband depending on the chanspec selected
*/
-u8 bcm_chspec_ctlchan(chanspec_t chspec)
+u8 brcmu_chspec_ctlchan(chanspec_t chspec)
{
u8 ctl_chan;
@@ -76,7 +76,7 @@ u8 bcm_chspec_ctlchan(chanspec_t chspec)
return ctl_chan;
}
-EXPORT_SYMBOL(bcm_chspec_ctlchan);
+EXPORT_SYMBOL(brcmu_chspec_ctlchan);
/*
* Return the channel number for a given frequency and base frequency.
@@ -97,7 +97,7 @@ EXPORT_SYMBOL(bcm_chspec_ctlchan);
*
* Reference 802.11 REVma, section 17.3.8.3, and 802.11B section 18.4.6.2
*/
-int bcm_mhz2channel(uint freq, uint start_factor)
+int brcmu_mhz2channel(uint freq, uint start_factor)
{
int ch = -1;
uint base;
@@ -133,5 +133,5 @@ int bcm_mhz2channel(uint freq, uint start_factor)
return ch;
}
-EXPORT_SYMBOL(bcm_mhz2channel);
+EXPORT_SYMBOL(brcmu_mhz2channel);
diff --git a/drivers/staging/brcm80211/include/aidmp.h b/drivers/staging/brcm80211/include/aidmp.h
deleted file mode 100644
index 7e0ce8f243482..0000000000000
--- a/drivers/staging/brcm80211/include/aidmp.h
+++ /dev/null
@@ -1,374 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _AIDMP_H
-#define _AIDMP_H
-
-/* Manufacturer Ids */
-#define MFGID_ARM 0x43b
-#define MFGID_BRCM 0x4bf
-#define MFGID_MIPS 0x4a7
-
-/* Component Classes */
-#define CC_SIM 0
-#define CC_EROM 1
-#define CC_CORESIGHT 9
-#define CC_VERIF 0xb
-#define CC_OPTIMO 0xd
-#define CC_GEN 0xe
-#define CC_PRIMECELL 0xf
-
-/* Enumeration ROM registers */
-#define ER_EROMENTRY 0x000
-#define ER_REMAPCONTROL 0xe00
-#define ER_REMAPSELECT 0xe04
-#define ER_MASTERSELECT 0xe10
-#define ER_ITCR 0xf00
-#define ER_ITIP 0xf04
-
-/* Erom entries */
-#define ER_TAG 0xe
-#define ER_TAG1 0x6
-#define ER_VALID 1
-#define ER_CI 0
-#define ER_MP 2
-#define ER_ADD 4
-#define ER_END 0xe
-#define ER_BAD 0xffffffff
-
-/* EROM CompIdentA */
-#define CIA_MFG_MASK 0xfff00000
-#define CIA_MFG_SHIFT 20
-#define CIA_CID_MASK 0x000fff00
-#define CIA_CID_SHIFT 8
-#define CIA_CCL_MASK 0x000000f0
-#define CIA_CCL_SHIFT 4
-
-/* EROM CompIdentB */
-#define CIB_REV_MASK 0xff000000
-#define CIB_REV_SHIFT 24
-#define CIB_NSW_MASK 0x00f80000
-#define CIB_NSW_SHIFT 19
-#define CIB_NMW_MASK 0x0007c000
-#define CIB_NMW_SHIFT 14
-#define CIB_NSP_MASK 0x00003e00
-#define CIB_NSP_SHIFT 9
-#define CIB_NMP_MASK 0x000001f0
-#define CIB_NMP_SHIFT 4
-
-/* EROM MasterPortDesc */
-#define MPD_MUI_MASK 0x0000ff00
-#define MPD_MUI_SHIFT 8
-#define MPD_MP_MASK 0x000000f0
-#define MPD_MP_SHIFT 4
-
-/* EROM AddrDesc */
-#define AD_ADDR_MASK 0xfffff000
-#define AD_SP_MASK 0x00000f00
-#define AD_SP_SHIFT 8
-#define AD_ST_MASK 0x000000c0
-#define AD_ST_SHIFT 6
-#define AD_ST_SLAVE 0x00000000
-#define AD_ST_BRIDGE 0x00000040
-#define AD_ST_SWRAP 0x00000080
-#define AD_ST_MWRAP 0x000000c0
-#define AD_SZ_MASK 0x00000030
-#define AD_SZ_SHIFT 4
-#define AD_SZ_4K 0x00000000
-#define AD_SZ_8K 0x00000010
-#define AD_SZ_16K 0x00000020
-#define AD_SZ_SZD 0x00000030
-#define AD_AG32 0x00000008
-#define AD_ADDR_ALIGN 0x00000fff
-#define AD_SZ_BASE 0x00001000 /* 4KB */
-
-/* EROM SizeDesc */
-#define SD_SZ_MASK 0xfffff000
-#define SD_SG32 0x00000008
-#define SD_SZ_ALIGN 0x00000fff
-
-#ifndef _LANGUAGE_ASSEMBLY
-
-typedef volatile struct _aidmp {
- u32 oobselina30; /* 0x000 */
- u32 oobselina74; /* 0x004 */
- u32 PAD[6];
- u32 oobselinb30; /* 0x020 */
- u32 oobselinb74; /* 0x024 */
- u32 PAD[6];
- u32 oobselinc30; /* 0x040 */
- u32 oobselinc74; /* 0x044 */
- u32 PAD[6];
- u32 oobselind30; /* 0x060 */
- u32 oobselind74; /* 0x064 */
- u32 PAD[38];
- u32 oobselouta30; /* 0x100 */
- u32 oobselouta74; /* 0x104 */
- u32 PAD[6];
- u32 oobseloutb30; /* 0x120 */
- u32 oobseloutb74; /* 0x124 */
- u32 PAD[6];
- u32 oobseloutc30; /* 0x140 */
- u32 oobseloutc74; /* 0x144 */
- u32 PAD[6];
- u32 oobseloutd30; /* 0x160 */
- u32 oobseloutd74; /* 0x164 */
- u32 PAD[38];
- u32 oobsynca; /* 0x200 */
- u32 oobseloutaen; /* 0x204 */
- u32 PAD[6];
- u32 oobsyncb; /* 0x220 */
- u32 oobseloutben; /* 0x224 */
- u32 PAD[6];
- u32 oobsyncc; /* 0x240 */
- u32 oobseloutcen; /* 0x244 */
- u32 PAD[6];
- u32 oobsyncd; /* 0x260 */
- u32 oobseloutden; /* 0x264 */
- u32 PAD[38];
- u32 oobaextwidth; /* 0x300 */
- u32 oobainwidth; /* 0x304 */
- u32 oobaoutwidth; /* 0x308 */
- u32 PAD[5];
- u32 oobbextwidth; /* 0x320 */
- u32 oobbinwidth; /* 0x324 */
- u32 oobboutwidth; /* 0x328 */
- u32 PAD[5];
- u32 oobcextwidth; /* 0x340 */
- u32 oobcinwidth; /* 0x344 */
- u32 oobcoutwidth; /* 0x348 */
- u32 PAD[5];
- u32 oobdextwidth; /* 0x360 */
- u32 oobdinwidth; /* 0x364 */
- u32 oobdoutwidth; /* 0x368 */
- u32 PAD[37];
- u32 ioctrlset; /* 0x400 */
- u32 ioctrlclear; /* 0x404 */
- u32 ioctrl; /* 0x408 */
- u32 PAD[61];
- u32 iostatus; /* 0x500 */
- u32 PAD[127];
- u32 ioctrlwidth; /* 0x700 */
- u32 iostatuswidth; /* 0x704 */
- u32 PAD[62];
- u32 resetctrl; /* 0x800 */
- u32 resetstatus; /* 0x804 */
- u32 resetreadid; /* 0x808 */
- u32 resetwriteid; /* 0x80c */
- u32 PAD[60];
- u32 errlogctrl; /* 0x900 */
- u32 errlogdone; /* 0x904 */
- u32 errlogstatus; /* 0x908 */
- u32 errlogaddrlo; /* 0x90c */
- u32 errlogaddrhi; /* 0x910 */
- u32 errlogid; /* 0x914 */
- u32 errloguser; /* 0x918 */
- u32 errlogflags; /* 0x91c */
- u32 PAD[56];
- u32 intstatus; /* 0xa00 */
- u32 PAD[127];
- u32 config; /* 0xe00 */
- u32 PAD[63];
- u32 itcr; /* 0xf00 */
- u32 PAD[3];
- u32 itipooba; /* 0xf10 */
- u32 itipoobb; /* 0xf14 */
- u32 itipoobc; /* 0xf18 */
- u32 itipoobd; /* 0xf1c */
- u32 PAD[4];
- u32 itipoobaout; /* 0xf30 */
- u32 itipoobbout; /* 0xf34 */
- u32 itipoobcout; /* 0xf38 */
- u32 itipoobdout; /* 0xf3c */
- u32 PAD[4];
- u32 itopooba; /* 0xf50 */
- u32 itopoobb; /* 0xf54 */
- u32 itopoobc; /* 0xf58 */
- u32 itopoobd; /* 0xf5c */
- u32 PAD[4];
- u32 itopoobain; /* 0xf70 */
- u32 itopoobbin; /* 0xf74 */
- u32 itopoobcin; /* 0xf78 */
- u32 itopoobdin; /* 0xf7c */
- u32 PAD[4];
- u32 itopreset; /* 0xf90 */
- u32 PAD[15];
- u32 peripherialid4; /* 0xfd0 */
- u32 peripherialid5; /* 0xfd4 */
- u32 peripherialid6; /* 0xfd8 */
- u32 peripherialid7; /* 0xfdc */
- u32 peripherialid0; /* 0xfe0 */
- u32 peripherialid1; /* 0xfe4 */
- u32 peripherialid2; /* 0xfe8 */
- u32 peripherialid3; /* 0xfec */
- u32 componentid0; /* 0xff0 */
- u32 componentid1; /* 0xff4 */
- u32 componentid2; /* 0xff8 */
- u32 componentid3; /* 0xffc */
-} aidmp_t;
-
-#endif /* _LANGUAGE_ASSEMBLY */
-
-/* Out-of-band Router registers */
-#define OOB_BUSCONFIG 0x020
-#define OOB_STATUSA 0x100
-#define OOB_STATUSB 0x104
-#define OOB_STATUSC 0x108
-#define OOB_STATUSD 0x10c
-#define OOB_ENABLEA0 0x200
-#define OOB_ENABLEA1 0x204
-#define OOB_ENABLEA2 0x208
-#define OOB_ENABLEA3 0x20c
-#define OOB_ENABLEB0 0x280
-#define OOB_ENABLEB1 0x284
-#define OOB_ENABLEB2 0x288
-#define OOB_ENABLEB3 0x28c
-#define OOB_ENABLEC0 0x300
-#define OOB_ENABLEC1 0x304
-#define OOB_ENABLEC2 0x308
-#define OOB_ENABLEC3 0x30c
-#define OOB_ENABLED0 0x380
-#define OOB_ENABLED1 0x384
-#define OOB_ENABLED2 0x388
-#define OOB_ENABLED3 0x38c
-#define OOB_ITCR 0xf00
-#define OOB_ITIPOOBA 0xf10
-#define OOB_ITIPOOBB 0xf14
-#define OOB_ITIPOOBC 0xf18
-#define OOB_ITIPOOBD 0xf1c
-#define OOB_ITOPOOBA 0xf30
-#define OOB_ITOPOOBB 0xf34
-#define OOB_ITOPOOBC 0xf38
-#define OOB_ITOPOOBD 0xf3c
-
-/* DMP wrapper registers */
-#define AI_OOBSELINA30 0x000
-#define AI_OOBSELINA74 0x004
-#define AI_OOBSELINB30 0x020
-#define AI_OOBSELINB74 0x024
-#define AI_OOBSELINC30 0x040
-#define AI_OOBSELINC74 0x044
-#define AI_OOBSELIND30 0x060
-#define AI_OOBSELIND74 0x064
-#define AI_OOBSELOUTA30 0x100
-#define AI_OOBSELOUTA74 0x104
-#define AI_OOBSELOUTB30 0x120
-#define AI_OOBSELOUTB74 0x124
-#define AI_OOBSELOUTC30 0x140
-#define AI_OOBSELOUTC74 0x144
-#define AI_OOBSELOUTD30 0x160
-#define AI_OOBSELOUTD74 0x164
-#define AI_OOBSYNCA 0x200
-#define AI_OOBSELOUTAEN 0x204
-#define AI_OOBSYNCB 0x220
-#define AI_OOBSELOUTBEN 0x224
-#define AI_OOBSYNCC 0x240
-#define AI_OOBSELOUTCEN 0x244
-#define AI_OOBSYNCD 0x260
-#define AI_OOBSELOUTDEN 0x264
-#define AI_OOBAEXTWIDTH 0x300
-#define AI_OOBAINWIDTH 0x304
-#define AI_OOBAOUTWIDTH 0x308
-#define AI_OOBBEXTWIDTH 0x320
-#define AI_OOBBINWIDTH 0x324
-#define AI_OOBBOUTWIDTH 0x328
-#define AI_OOBCEXTWIDTH 0x340
-#define AI_OOBCINWIDTH 0x344
-#define AI_OOBCOUTWIDTH 0x348
-#define AI_OOBDEXTWIDTH 0x360
-#define AI_OOBDINWIDTH 0x364
-#define AI_OOBDOUTWIDTH 0x368
-
-#if defined(__BIG_ENDIAN) && defined(BCMHND74K)
-/* Selective swapped defines for those registers we need in
- * big-endian code.
- */
-#define AI_IOCTRLSET 0x404
-#define AI_IOCTRLCLEAR 0x400
-#define AI_IOCTRL 0x40c
-#define AI_IOSTATUS 0x504
-#define AI_RESETCTRL 0x804
-#define AI_RESETSTATUS 0x800
-
-#else /* !__BIG_ENDIAN || !BCMHND74K */
-
-#define AI_IOCTRLSET 0x400
-#define AI_IOCTRLCLEAR 0x404
-#define AI_IOCTRL 0x408
-#define AI_IOSTATUS 0x500
-#define AI_RESETCTRL 0x800
-#define AI_RESETSTATUS 0x804
-
-#endif /* __BIG_ENDIAN && BCMHND74K */
-
-#define AI_IOCTRLWIDTH 0x700
-#define AI_IOSTATUSWIDTH 0x704
-
-#define AI_RESETREADID 0x808
-#define AI_RESETWRITEID 0x80c
-#define AI_ERRLOGCTRL 0xa00
-#define AI_ERRLOGDONE 0xa04
-#define AI_ERRLOGSTATUS 0xa08
-#define AI_ERRLOGADDRLO 0xa0c
-#define AI_ERRLOGADDRHI 0xa10
-#define AI_ERRLOGID 0xa14
-#define AI_ERRLOGUSER 0xa18
-#define AI_ERRLOGFLAGS 0xa1c
-#define AI_INTSTATUS 0xa00
-#define AI_CONFIG 0xe00
-#define AI_ITCR 0xf00
-#define AI_ITIPOOBA 0xf10
-#define AI_ITIPOOBB 0xf14
-#define AI_ITIPOOBC 0xf18
-#define AI_ITIPOOBD 0xf1c
-#define AI_ITIPOOBAOUT 0xf30
-#define AI_ITIPOOBBOUT 0xf34
-#define AI_ITIPOOBCOUT 0xf38
-#define AI_ITIPOOBDOUT 0xf3c
-#define AI_ITOPOOBA 0xf50
-#define AI_ITOPOOBB 0xf54
-#define AI_ITOPOOBC 0xf58
-#define AI_ITOPOOBD 0xf5c
-#define AI_ITOPOOBAIN 0xf70
-#define AI_ITOPOOBBIN 0xf74
-#define AI_ITOPOOBCIN 0xf78
-#define AI_ITOPOOBDIN 0xf7c
-#define AI_ITOPRESET 0xf90
-#define AI_PERIPHERIALID4 0xfd0
-#define AI_PERIPHERIALID5 0xfd4
-#define AI_PERIPHERIALID6 0xfd8
-#define AI_PERIPHERIALID7 0xfdc
-#define AI_PERIPHERIALID0 0xfe0
-#define AI_PERIPHERIALID1 0xfe4
-#define AI_PERIPHERIALID2 0xfe8
-#define AI_PERIPHERIALID3 0xfec
-#define AI_COMPONENTID0 0xff0
-#define AI_COMPONENTID1 0xff4
-#define AI_COMPONENTID2 0xff8
-#define AI_COMPONENTID3 0xffc
-
-/* resetctrl */
-#define AIRC_RESET 1
-
-/* config */
-#define AICFG_OOB 0x00000020
-#define AICFG_IOS 0x00000010
-#define AICFG_IOC 0x00000008
-#define AICFG_TO 0x00000004
-#define AICFG_ERRL 0x00000002
-#define AICFG_RST 0x00000001
-
-#endif /* _AIDMP_H */
diff --git a/drivers/staging/brcm80211/include/bcmdefs.h b/drivers/staging/brcm80211/include/bcmdefs.h
deleted file mode 100644
index 55631f367436a..0000000000000
--- a/drivers/staging/brcm80211/include/bcmdefs.h
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _bcmdefs_h_
-#define _bcmdefs_h_
-
-#define SI_BUS 0
-#define PCI_BUS 1
-#define PCMCIA_BUS 2
-#define SDIO_BUS 3
-#define JTAG_BUS 4
-#define USB_BUS 5
-#define SPI_BUS 6
-
-
-#ifndef OFF
-#define OFF 0
-#endif
-
-#ifndef ON
-#define ON 1 /* ON = 1 */
-#endif
-
-#define AUTO (-1) /* Auto = -1 */
-
-/* Bus types */
-#define SI_BUS 0 /* SOC Interconnect */
-#define PCI_BUS 1 /* PCI target */
-#define SDIO_BUS 3 /* SDIO target */
-#define JTAG_BUS 4 /* JTAG */
-#define USB_BUS 5 /* USB (does not support R/W REG) */
-#define SPI_BUS 6 /* gSPI target */
-#define RPC_BUS 7 /* RPC target */
-
-
-/* Defines for DMA Address Width - Shared between OSL and HNDDMA */
-#define DMADDR_MASK_32 0x0 /* Address mask for 32-bits */
-#define DMADDR_MASK_30 0xc0000000 /* Address mask for 30-bits */
-#define DMADDR_MASK_0 0xffffffff /* Address mask for 0-bits (hi-part) */
-
-#define DMADDRWIDTH_30 30 /* 30-bit addressing capability */
-#define DMADDRWIDTH_32 32 /* 32-bit addressing capability */
-#define DMADDRWIDTH_63 63 /* 64-bit addressing capability */
-#define DMADDRWIDTH_64 64 /* 64-bit addressing capability */
-
-#ifdef BCMDMA64OSL
-typedef struct {
- u32 loaddr;
- u32 hiaddr;
-} dma64addr_t;
-
-typedef dma64addr_t dmaaddr_t;
-#define PHYSADDRHI(_pa) ((_pa).hiaddr)
-#define PHYSADDRHISET(_pa, _val) \
- do { \
- (_pa).hiaddr = (_val); \
- } while (0)
-#define PHYSADDRLO(_pa) ((_pa).loaddr)
-#define PHYSADDRLOSET(_pa, _val) \
- do { \
- (_pa).loaddr = (_val); \
- } while (0)
-
-#else
-typedef unsigned long dmaaddr_t;
-#define PHYSADDRHI(_pa) (0)
-#define PHYSADDRHISET(_pa, _val)
-#define PHYSADDRLO(_pa) ((_pa))
-#define PHYSADDRLOSET(_pa, _val) \
- do { \
- (_pa) = (_val); \
- } while (0)
-#endif /* BCMDMA64OSL */
-
-/* One physical DMA segment */
-typedef struct {
- dmaaddr_t addr;
- u32 length;
-} hnddma_seg_t;
-
-#define MAX_DMA_SEGS 4
-
-typedef struct {
- void *oshdmah; /* Opaque handle for OSL to store its information */
- uint origsize; /* Size of the virtual packet */
- uint nsegs;
- hnddma_seg_t segs[MAX_DMA_SEGS];
-} hnddma_seg_map_t;
-
-/* packet headroom necessary to accommodate the largest header in the system, (i.e TXOFF).
- * By doing, we avoid the need to allocate an extra buffer for the header when bridging to WL.
- * There is a compile time check in wlc.c which ensure that this value is at least as big
- * as TXOFF. This value is used in dma_rxfill (hnddma.c).
- */
-
-#define BCMEXTRAHDROOM 172
-
-/* Macros for doing definition and get/set of bitfields
- * Usage example, e.g. a three-bit field (bits 4-6):
- * #define <NAME>_M BITFIELD_MASK(3)
- * #define <NAME>_S 4
- * ...
- * regval = R_REG(osh, &regs->regfoo);
- * field = GFIELD(regval, <NAME>);
- * regval = SFIELD(regval, <NAME>, 1);
- * W_REG(osh, &regs->regfoo, regval);
- */
-#define BITFIELD_MASK(width) \
- (((unsigned)1 << (width)) - 1)
-#define GFIELD(val, field) \
- (((val) >> field ## _S) & field ## _M)
-#define SFIELD(val, field, bits) \
- (((val) & (~(field ## _M << field ## _S))) | \
- ((unsigned)(bits) << field ## _S))
-
-/*
- * Priority definitions according 802.1D
- */
-#define PRIO_8021D_NONE 2
-#define PRIO_8021D_BK 1
-#define PRIO_8021D_BE 0
-#define PRIO_8021D_EE 3
-#define PRIO_8021D_CL 4
-#define PRIO_8021D_VI 5
-#define PRIO_8021D_VO 6
-#define PRIO_8021D_NC 7
-#define MAXPRIO 7
-#define NUMPRIO (MAXPRIO + 1)
-
-/* Max. nvram variable table size */
-#define MAXSZ_NVRAM_VARS 4096
-
-/* handle forward declaration */
-struct wl_info;
-struct wlc_bsscfg;
-
-#endif /* _bcmdefs_h_ */
diff --git a/drivers/staging/brcm80211/include/bcmdevs.h b/drivers/staging/brcm80211/include/bcmdevs.h
deleted file mode 100644
index 26947efa83e8c..0000000000000
--- a/drivers/staging/brcm80211/include/bcmdevs.h
+++ /dev/null
@@ -1,124 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _BCMDEVS_H
-#define _BCMDEVS_H
-
-#define BCM4325_D11DUAL_ID 0x431b
-#define BCM4325_D11G_ID 0x431c
-#define BCM4325_D11A_ID 0x431d
-
-#define BCM4329_D11N2G_ID 0x432f /* 4329 802.11n 2.4G device */
-#define BCM4329_D11N5G_ID 0x4330 /* 4329 802.11n 5G device */
-#define BCM4329_D11NDUAL_ID 0x432e
-
-#define BCM4319_D11N_ID 0x4337 /* 4319 802.11n dualband device */
-#define BCM4319_D11N2G_ID 0x4338 /* 4319 802.11n 2.4G device */
-#define BCM4319_D11N5G_ID 0x4339 /* 4319 802.11n 5G device */
-
-#define BCM43224_D11N_ID 0x4353 /* 43224 802.11n dualband device */
-
-#define BCM43225_D11N2G_ID 0x4357 /* 43225 802.11n 2.4GHz device */
-
-#define BCM43236_D11N_ID 0x4346 /* 43236 802.11n dualband device */
-#define BCM43236_D11N2G_ID 0x4347 /* 43236 802.11n 2.4GHz device */
-
-#define BCM4313_D11N2G_ID 0x4727 /* 4313 802.11n 2.4G device */
-
-/* Chip IDs */
-#define BCM4313_CHIP_ID 0x4313 /* 4313 chip id */
-#define BCM4319_CHIP_ID 0x4319 /* 4319 chip id */
-
-#define BCM43224_CHIP_ID 43224 /* 43224 chipcommon chipid */
-#define BCM43225_CHIP_ID 43225 /* 43225 chipcommon chipid */
-#define BCM43421_CHIP_ID 43421 /* 43421 chipcommon chipid */
-#define BCM43235_CHIP_ID 43235 /* 43235 chipcommon chipid */
-#define BCM43236_CHIP_ID 43236 /* 43236 chipcommon chipid */
-#define BCM43238_CHIP_ID 43238 /* 43238 chipcommon chipid */
-#define BCM4329_CHIP_ID 0x4329 /* 4329 chipcommon chipid */
-#define BCM4325_CHIP_ID 0x4325 /* 4325 chipcommon chipid */
-#define BCM4331_CHIP_ID 0x4331 /* 4331 chipcommon chipid */
-#define BCM4336_CHIP_ID 0x4336 /* 4336 chipcommon chipid */
-#define BCM4330_CHIP_ID 0x4330 /* 4330 chipcommon chipid */
-#define BCM6362_CHIP_ID 0x6362 /* 6362 chipcommon chipid */
-
-/* these are router chips */
-#define BCM4716_CHIP_ID 0x4716 /* 4716 chipcommon chipid */
-#define BCM47162_CHIP_ID 47162 /* 47162 chipcommon chipid */
-#define BCM4748_CHIP_ID 0x4748 /* 4716 chipcommon chipid (OTP, RBBU) */
-#define BCM5356_CHIP_ID 0x5356 /* 5356 chipcommon chipid */
-#define BCM5357_CHIP_ID 0x5357 /* 5357 chipcommon chipid */
-
-/* Package IDs */
-#define BCM4329_289PIN_PKG_ID 0 /* 4329 289-pin package id */
-#define BCM4329_182PIN_PKG_ID 1 /* 4329N 182-pin package id */
-#define BCM4717_PKG_ID 9 /* 4717 package id */
-#define BCM4718_PKG_ID 10 /* 4718 package id */
-#define HDLSIM_PKG_ID 14 /* HDL simulator package id */
-#define HWSIM_PKG_ID 15 /* Hardware simulator package id */
-#define BCM43224_FAB_SMIC 0xa /* the chip is manufactured by SMIC */
-
-/* boardflags */
-#define BFL_PACTRL 0x00000002 /* Board has gpio 9 controlling the PA */
-#define BFL_NOPLLDOWN 0x00000020 /* Not ok to power down the chip pll and oscillator */
-#define BFL_FEM 0x00000800 /* Board supports the Front End Module */
-#define BFL_EXTLNA 0x00001000 /* Board has an external LNA in 2.4GHz band */
-#define BFL_NOPA 0x00010000 /* Board has no PA */
-#define BFL_BUCKBOOST 0x00200000 /* Power topology uses BUCKBOOST */
-#define BFL_FEM_BT 0x00400000 /* Board has FEM and switch to share antenna w/ BT */
-#define BFL_NOCBUCK 0x00800000 /* Power topology doesn't use CBUCK */
-#define BFL_PALDO 0x02000000 /* Power topology uses PALDO */
-#define BFL_EXTLNA_5GHz 0x10000000 /* Board has an external LNA in 5GHz band */
-
-/* boardflags2 */
-#define BFL2_RXBB_INT_REG_DIS 0x00000001 /* Board has an external rxbb regulator */
-#define BFL2_APLL_WAR 0x00000002 /* Flag to implement alternative A-band PLL settings */
-#define BFL2_TXPWRCTRL_EN 0x00000004 /* Board permits enabling TX Power Control */
-#define BFL2_2X4_DIV 0x00000008 /* Board supports the 2X4 diversity switch */
-#define BFL2_5G_PWRGAIN 0x00000010 /* Board supports 5G band power gain */
-#define BFL2_PCIEWAR_OVR 0x00000020 /* Board overrides ASPM and Clkreq settings */
-#define BFL2_LEGACY 0x00000080
-#define BFL2_SKWRKFEM_BRD 0x00000100 /* 4321mcm93 board uses Skyworks FEM */
-#define BFL2_SPUR_WAR 0x00000200 /* Board has a WAR for clock-harmonic spurs */
-#define BFL2_GPLL_WAR 0x00000400 /* Flag to narrow G-band PLL loop b/w */
-#define BFL2_SINGLEANT_CCK 0x00001000 /* Tx CCK pkts on Ant 0 only */
-#define BFL2_2G_SPUR_WAR 0x00002000 /* WAR to reduce and avoid clock-harmonic spurs in 2G */
-#define BFL2_GPLL_WAR2 0x00010000 /* Flag to widen G-band PLL loop b/w */
-#define BFL2_IPALVLSHIFT_3P3 0x00020000
-#define BFL2_INTERNDET_TXIQCAL 0x00040000 /* Use internal envelope detector for TX IQCAL */
-#define BFL2_XTALBUFOUTEN 0x00080000 /* Keep the buffered Xtal output from radio "ON"
- * Most drivers will turn it off without this flag
- * to save power.
- */
-
-/* board specific GPIO assignment, gpio 0-3 are also customer-configurable led */
-#define BOARD_GPIO_PACTRL 0x200 /* bit 9 controls the PA on new 4306 boards */
-#define BOARD_GPIO_12 0x1000 /* gpio 12 */
-#define BOARD_GPIO_13 0x2000 /* gpio 13 */
-
-#define PCI_CFG_GPIO_SCS 0x10 /* PCI config space bit 4 for 4306c0 slow clock source */
-#define PCI_CFG_GPIO_XTAL 0x40 /* PCI config space GPIO 14 for Xtal power-up */
-#define PCI_CFG_GPIO_PLL 0x80 /* PCI config space GPIO 15 for PLL power-down */
-
-/* power control defines */
-#define PLL_DELAY 150 /* us pll on delay */
-#define FREF_DELAY 200 /* us fref change delay */
-#define XTAL_ON_DELAY 1000 /* us crystal power-on delay */
-
-/* Reference board types */
-#define SPI_BOARD 0x0402
-
-#endif /* _BCMDEVS_H */
diff --git a/drivers/staging/brcm80211/include/bcmnvram.h b/drivers/staging/brcm80211/include/bcmnvram.h
deleted file mode 100644
index 12645ddf000d1..0000000000000
--- a/drivers/staging/brcm80211/include/bcmnvram.h
+++ /dev/null
@@ -1,153 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _bcmnvram_h_
-#define _bcmnvram_h_
-
-#ifndef _LANGUAGE_ASSEMBLY
-
-#include <bcmdefs.h>
-
-struct nvram_header {
- u32 magic;
- u32 len;
- u32 crc_ver_init; /* 0:7 crc, 8:15 ver, 16:31 sdram_init */
- u32 config_refresh; /* 0:15 sdram_config, 16:31 sdram_refresh */
- u32 config_ncdl; /* ncdl values for memc */
-};
-
-/*
- * Initialize NVRAM access. May be unnecessary or undefined on certain
- * platforms.
- */
-extern int nvram_init(void);
-
-/*
- * Append a chunk of nvram variables to the global list
- */
-extern int nvram_append(char *vars, uint varsz);
-
-/*
- * Check for reset button press for restoring factory defaults.
- */
-extern int nvram_reset(void);
-
-/*
- * Disable NVRAM access. May be unnecessary or undefined on certain
- * platforms.
- */
-extern void nvram_exit(void);
-
-/*
- * Get the value of an NVRAM variable. The pointer returned may be
- * invalid after a set.
- * @param name name of variable to get
- * @return value of variable or NULL if undefined
- */
-extern char *nvram_get(const char *name);
-
-/*
- * Get the value of an NVRAM variable.
- * @param name name of variable to get
- * @return value of variable or NUL if undefined
- */
-#define nvram_safe_get(name) (nvram_get(name) ? : "")
-
-/*
- * Match an NVRAM variable.
- * @param name name of variable to match
- * @param match value to compare against value of variable
- * @return true if variable is defined and its value is string equal
- * to match or false otherwise
- */
-static inline int nvram_match(char *name, char *match)
-{
- const char *value = nvram_get(name);
- return value && !strcmp(value, match);
-}
-
-/*
- * Inversely match an NVRAM variable.
- * @param name name of variable to match
- * @param match value to compare against value of variable
- * @return true if variable is defined and its value is not string
- * equal to invmatch or false otherwise
- */
-static inline int nvram_invmatch(char *name, char *invmatch)
-{
- const char *value = nvram_get(name);
- return value && strcmp(value, invmatch);
-}
-
-/*
- * Set the value of an NVRAM variable. The name and value strings are
- * copied into private storage. Pointers to previously set values
- * may become invalid. The new value may be immediately
- * retrieved but will not be permanently stored until a commit.
- * @param name name of variable to set
- * @param value value of variable
- * @return 0 on success and errno on failure
- */
-extern int nvram_set(const char *name, const char *value);
-
-/*
- * Unset an NVRAM variable. Pointers to previously set values
- * remain valid until a set.
- * @param name name of variable to unset
- * @return 0 on success and errno on failure
- * NOTE: use nvram_commit to commit this change to flash.
- */
-extern int nvram_unset(const char *name);
-
-/*
- * Commit NVRAM variables to permanent storage. All pointers to values
- * may be invalid after a commit.
- * NVRAM values are undefined after a commit.
- * @return 0 on success and errno on failure
- */
-extern int nvram_commit(void);
-
-/*
- * Get all NVRAM variables (format name=value\0 ... \0\0).
- * @param buf buffer to store variables
- * @param count size of buffer in bytes
- * @return 0 on success and errno on failure
- */
-extern int nvram_getall(char *nvram_buf, int count);
-
-#endif /* _LANGUAGE_ASSEMBLY */
-
-/* variable access */
-extern char *getvar(char *vars, const char *name);
-extern int getintvar(char *vars, const char *name);
-
-/* The NVRAM version number stored as an NVRAM variable */
-#define NVRAM_SOFTWARE_VERSION "1"
-
-#define NVRAM_MAGIC 0x48534C46 /* 'FLSH' */
-#define NVRAM_CLEAR_MAGIC 0x0
-#define NVRAM_INVALID_MAGIC 0xFFFFFFFF
-#define NVRAM_VERSION 1
-#define NVRAM_HEADER_SIZE 20
-#define NVRAM_SPACE 0x8000
-
-#define NVRAM_MAX_VALUE_LEN 255
-#define NVRAM_MAX_PARAM_LEN 64
-
-#define NVRAM_CRC_START_POSITION 9 /* magic, len, crc8 to be skipped */
-#define NVRAM_CRC_VER_MASK 0xffffff00 /* for crc_ver_init */
-
-#endif /* _bcmnvram_h_ */
diff --git a/drivers/staging/brcm80211/include/bcmsdpcm.h b/drivers/staging/brcm80211/include/bcmsdpcm.h
deleted file mode 100644
index 5175e67a6d28f..0000000000000
--- a/drivers/staging/brcm80211/include/bcmsdpcm.h
+++ /dev/null
@@ -1,208 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _bcmsdpcm_h_
-#define _bcmsdpcm_h_
-
-/*
- * Software allocation of To SB Mailbox resources
- */
-
-/* intstatus bits */
-#define I_SMB_NAK I_SMB_SW0 /* To SB Mailbox Frame NAK */
-#define I_SMB_INT_ACK I_SMB_SW1 /* To SB Mailbox Host Interrupt ACK */
-#define I_SMB_USE_OOB I_SMB_SW2 /* To SB Mailbox Use OOB Wakeup */
-#define I_SMB_DEV_INT I_SMB_SW3 /* To SB Mailbox Miscellaneous Interrupt */
-
-#define I_TOSBMAIL (I_SMB_NAK | I_SMB_INT_ACK | I_SMB_USE_OOB | I_SMB_DEV_INT)
-
-/* tosbmailbox bits corresponding to intstatus bits */
-#define SMB_NAK (1 << 0) /* To SB Mailbox Frame NAK */
-#define SMB_INT_ACK (1 << 1) /* To SB Mailbox Host Interrupt ACK */
-#define SMB_USE_OOB (1 << 2) /* To SB Mailbox Use OOB Wakeup */
-#define SMB_DEV_INT (1 << 3) /* To SB Mailbox Miscellaneous Interrupt */
-#define SMB_MASK 0x0000000f /* To SB Mailbox Mask */
-
-/* tosbmailboxdata */
-#define SMB_DATA_VERSION_MASK 0x00ff0000 /* host protocol version (sent with F2 enable) */
-#define SMB_DATA_VERSION_SHIFT 16 /* host protocol version (sent with F2 enable) */
-
-/*
- * Software allocation of To Host Mailbox resources
- */
-
-/* intstatus bits */
-#define I_HMB_FC_STATE I_HMB_SW0 /* To Host Mailbox Flow Control State */
-#define I_HMB_FC_CHANGE I_HMB_SW1 /* To Host Mailbox Flow Control State Changed */
-#define I_HMB_FRAME_IND I_HMB_SW2 /* To Host Mailbox Frame Indication */
-#define I_HMB_HOST_INT I_HMB_SW3 /* To Host Mailbox Miscellaneous Interrupt */
-
-#define I_TOHOSTMAIL (I_HMB_FC_CHANGE | I_HMB_FRAME_IND | I_HMB_HOST_INT)
-
-/* tohostmailbox bits corresponding to intstatus bits */
-#define HMB_FC_ON (1 << 0) /* To Host Mailbox Flow Control State */
-#define HMB_FC_CHANGE (1 << 1) /* To Host Mailbox Flow Control State Changed */
-#define HMB_FRAME_IND (1 << 2) /* To Host Mailbox Frame Indication */
-#define HMB_HOST_INT (1 << 3) /* To Host Mailbox Miscellaneous Interrupt */
-#define HMB_MASK 0x0000000f /* To Host Mailbox Mask */
-
-/* tohostmailboxdata */
-#define HMB_DATA_NAKHANDLED 1 /* we're ready to retransmit NAK'd frame to host */
-#define HMB_DATA_DEVREADY 2 /* we're ready to to talk to host after enable */
-#define HMB_DATA_FC 4 /* per prio flowcontrol update flag to host */
-#define HMB_DATA_FWREADY 8 /* firmware is ready for protocol activity */
-
-#define HMB_DATA_FCDATA_MASK 0xff000000 /* per prio flowcontrol data */
-#define HMB_DATA_FCDATA_SHIFT 24 /* per prio flowcontrol data */
-
-#define HMB_DATA_VERSION_MASK 0x00ff0000 /* device protocol version (with devready) */
-#define HMB_DATA_VERSION_SHIFT 16 /* device protocol version (with devready) */
-
-/*
- * Software-defined protocol header
- */
-
-/* Current protocol version */
-#define SDPCM_PROT_VERSION 4
-
-/* SW frame header */
-#define SDPCM_SEQUENCE_MASK 0x000000ff /* Sequence Number Mask */
-#define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff) /* p starts w/SW Header */
-
-#define SDPCM_CHANNEL_MASK 0x00000f00 /* Channel Number Mask */
-#define SDPCM_CHANNEL_SHIFT 8 /* Channel Number Shift */
-#define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f) /* p starts w/SW Header */
-
-#define SDPCM_FLAGS_MASK 0x0000f000 /* Mask of flag bits */
-#define SDPCM_FLAGS_SHIFT 12 /* Flag bits shift */
-#define SDPCM_PACKET_FLAGS(p) ((((u8 *)p)[1] & 0xf0) >> 4) /* p starts w/SW Header */
-
-/* Next Read Len: lookahead length of next frame, in 16-byte units (rounded up) */
-#define SDPCM_NEXTLEN_MASK 0x00ff0000 /* Next Read Len Mask */
-#define SDPCM_NEXTLEN_SHIFT 16 /* Next Read Len Shift */
-#define SDPCM_NEXTLEN_VALUE(p) ((((u8 *)p)[2] & 0xff) << 4) /* p starts w/SW Header */
-#define SDPCM_NEXTLEN_OFFSET 2
-
-/* Data Offset from SOF (HW Tag, SW Tag, Pad) */
-#define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */
-#define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
-#define SDPCM_DOFFSET_MASK 0xff000000
-#define SDPCM_DOFFSET_SHIFT 24
-
-#define SDPCM_FCMASK_OFFSET 4 /* Flow control */
-#define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff)
-#define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */
-#define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff)
-#define SDPCM_VERSION_OFFSET 6 /* Version # */
-#define SDPCM_VERSION_VALUE(p) (((u8 *)p)[SDPCM_VERSION_OFFSET] & 0xff)
-#define SDPCM_UNUSED_OFFSET 7 /* Spare */
-#define SDPCM_UNUSED_VALUE(p) (((u8 *)p)[SDPCM_UNUSED_OFFSET] & 0xff)
-
-#define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */
-
-/* logical channel numbers */
-#define SDPCM_CONTROL_CHANNEL 0 /* Control Request/Response Channel Id */
-#define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */
-#define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */
-#define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets (superframes) */
-#define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */
-#define SDPCM_MAX_CHANNEL 15
-
-#define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for eight-bit frame seq number */
-
-#define SDPCM_FLAG_RESVD0 0x01
-#define SDPCM_FLAG_RESVD1 0x02
-#define SDPCM_FLAG_GSPI_TXENAB 0x04
-#define SDPCM_FLAG_GLOMDESC 0x08 /* Superframe descriptor mask */
-
-/* For GLOM_CHANNEL frames, use a flag to indicate descriptor frame */
-#define SDPCM_GLOMDESC_FLAG (SDPCM_FLAG_GLOMDESC << SDPCM_FLAGS_SHIFT)
-
-#define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
-
-/* For TEST_CHANNEL packets, define another 4-byte header */
-#define SDPCM_TEST_HDRLEN 4 /* Generally: Cmd(1), Ext(1), Len(2);
- * Semantics of Ext byte depend on command.
- * Len is current or requested frame length, not
- * including test header; sent little-endian.
- */
-#define SDPCM_TEST_DISCARD 0x01 /* Receiver discards. Ext is a pattern id. */
-#define SDPCM_TEST_ECHOREQ 0x02 /* Echo request. Ext is a pattern id. */
-#define SDPCM_TEST_ECHORSP 0x03 /* Echo response. Ext is a pattern id. */
-#define SDPCM_TEST_BURST 0x04 /* Receiver to send a burst. Ext is a frame count */
-#define SDPCM_TEST_SEND 0x05 /* Receiver sets send mode. Ext is boolean on/off */
-
-/* Handy macro for filling in datagen packets with a pattern */
-#define SDPCM_TEST_FILL(byteno, id) ((u8)(id + byteno))
-
-/*
- * Software counters (first part matches hardware counters)
- */
-
-typedef volatile struct {
- u32 cmd52rd; /* Cmd52RdCount, SDIO: cmd52 reads */
- u32 cmd52wr; /* Cmd52WrCount, SDIO: cmd52 writes */
- u32 cmd53rd; /* Cmd53RdCount, SDIO: cmd53 reads */
- u32 cmd53wr; /* Cmd53WrCount, SDIO: cmd53 writes */
- u32 abort; /* AbortCount, SDIO: aborts */
- u32 datacrcerror; /* DataCrcErrorCount, SDIO: frames w/CRC error */
- u32 rdoutofsync; /* RdOutOfSyncCount, SDIO/PCMCIA: Rd Frm out of sync */
- u32 wroutofsync; /* RdOutOfSyncCount, SDIO/PCMCIA: Wr Frm out of sync */
- u32 writebusy; /* WriteBusyCount, SDIO: device asserted "busy" */
- u32 readwait; /* ReadWaitCount, SDIO: no data ready for a read cmd */
- u32 readterm; /* ReadTermCount, SDIO: read frame termination cmds */
- u32 writeterm; /* WriteTermCount, SDIO: write frames termination cmds */
- u32 rxdescuflo; /* receive descriptor underflows */
- u32 rxfifooflo; /* receive fifo overflows */
- u32 txfifouflo; /* transmit fifo underflows */
- u32 runt; /* runt (too short) frames recv'd from bus */
- u32 badlen; /* frame's rxh len does not match its hw tag len */
- u32 badcksum; /* frame's hw tag chksum doesn't agree with len value */
- u32 seqbreak; /* break in sequence # space from one rx frame to the next */
- u32 rxfcrc; /* frame rx header indicates crc error */
- u32 rxfwoos; /* frame rx header indicates write out of sync */
- u32 rxfwft; /* frame rx header indicates write frame termination */
- u32 rxfabort; /* frame rx header indicates frame aborted */
- u32 woosint; /* write out of sync interrupt */
- u32 roosint; /* read out of sync interrupt */
- u32 rftermint; /* read frame terminate interrupt */
- u32 wftermint; /* write frame terminate interrupt */
-} sdpcmd_cnt_t;
-
-/*
- * Shared structure between dongle and the host.
- * The structure contains pointers to trap or assert information.
- */
-#define SDPCM_SHARED_VERSION 0x0002
-#define SDPCM_SHARED_VERSION_MASK 0x00FF
-#define SDPCM_SHARED_ASSERT_BUILT 0x0100
-#define SDPCM_SHARED_ASSERT 0x0200
-#define SDPCM_SHARED_TRAP 0x0400
-
-typedef struct {
- u32 flags;
- u32 trap_addr;
- u32 assert_exp_addr;
- u32 assert_file_addr;
- u32 assert_line;
- u32 console_addr; /* Address of hndrte_cons_t */
- u32 msgtrace_addr;
- u8 tag[32];
-} sdpcm_shared_t;
-
-extern sdpcm_shared_t sdpcm_shared;
-
-#endif /* _bcmsdpcm_h_ */
diff --git a/drivers/staging/brcm80211/include/bcmsrom_fmt.h b/drivers/staging/brcm80211/include/bcmsrom_fmt.h
deleted file mode 100644
index 4666afd883a51..0000000000000
--- a/drivers/staging/brcm80211/include/bcmsrom_fmt.h
+++ /dev/null
@@ -1,367 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _bcmsrom_fmt_h_
-#define _bcmsrom_fmt_h_
-
-/* Maximum srom: 6 Kilobits == 768 bytes */
-#define SROM_MAX 768
-#define SROM_MAXW 384
-#define VARS_MAX 4096
-
-/* PCI fields */
-#define PCI_F0DEVID 48
-
-#define SROM_WORDS 64
-
-#define SROM3_SWRGN_OFF 28 /* s/w region offset in words */
-
-#define SROM_SSID 2
-
-#define SROM_WL1LHMAXP 29
-
-#define SROM_WL1LPAB0 30
-#define SROM_WL1LPAB1 31
-#define SROM_WL1LPAB2 32
-
-#define SROM_WL1HPAB0 33
-#define SROM_WL1HPAB1 34
-#define SROM_WL1HPAB2 35
-
-#define SROM_MACHI_IL0 36
-#define SROM_MACMID_IL0 37
-#define SROM_MACLO_IL0 38
-#define SROM_MACHI_ET0 39
-#define SROM_MACMID_ET0 40
-#define SROM_MACLO_ET0 41
-#define SROM_MACHI_ET1 42
-#define SROM_MACMID_ET1 43
-#define SROM_MACLO_ET1 44
-#define SROM3_MACHI 37
-#define SROM3_MACMID 38
-#define SROM3_MACLO 39
-
-#define SROM_BXARSSI2G 40
-#define SROM_BXARSSI5G 41
-
-#define SROM_TRI52G 42
-#define SROM_TRI5GHL 43
-
-#define SROM_RXPO52G 45
-
-#define SROM2_ENETPHY 45
-
-#define SROM_AABREV 46
-/* Fields in AABREV */
-#define SROM_BR_MASK 0x00ff
-#define SROM_CC_MASK 0x0f00
-#define SROM_CC_SHIFT 8
-#define SROM_AA0_MASK 0x3000
-#define SROM_AA0_SHIFT 12
-#define SROM_AA1_MASK 0xc000
-#define SROM_AA1_SHIFT 14
-
-#define SROM_WL0PAB0 47
-#define SROM_WL0PAB1 48
-#define SROM_WL0PAB2 49
-
-#define SROM_LEDBH10 50
-#define SROM_LEDBH32 51
-
-#define SROM_WL10MAXP 52
-
-#define SROM_WL1PAB0 53
-#define SROM_WL1PAB1 54
-#define SROM_WL1PAB2 55
-
-#define SROM_ITT 56
-
-#define SROM_BFL 57
-#define SROM_BFL2 28
-#define SROM3_BFL2 61
-
-#define SROM_AG10 58
-
-#define SROM_CCODE 59
-
-#define SROM_OPO 60
-
-#define SROM3_LEDDC 62
-
-#define SROM_CRCREV 63
-
-/* SROM Rev 4: Reallocate the software part of the srom to accommodate
- * MIMO features. It assumes up to two PCIE functions and 440 bytes
- * of usable srom i.e. the usable storage in chips with OTP that
- * implements hardware redundancy.
- */
-
-#define SROM4_WORDS 220
-
-#define SROM4_SIGN 32
-#define SROM4_SIGNATURE 0x5372
-
-#define SROM4_BREV 33
-
-#define SROM4_BFL0 34
-#define SROM4_BFL1 35
-#define SROM4_BFL2 36
-#define SROM4_BFL3 37
-#define SROM5_BFL0 37
-#define SROM5_BFL1 38
-#define SROM5_BFL2 39
-#define SROM5_BFL3 40
-
-#define SROM4_MACHI 38
-#define SROM4_MACMID 39
-#define SROM4_MACLO 40
-#define SROM5_MACHI 41
-#define SROM5_MACMID 42
-#define SROM5_MACLO 43
-
-#define SROM4_CCODE 41
-#define SROM4_REGREV 42
-#define SROM5_CCODE 34
-#define SROM5_REGREV 35
-
-#define SROM4_LEDBH10 43
-#define SROM4_LEDBH32 44
-#define SROM5_LEDBH10 59
-#define SROM5_LEDBH32 60
-
-#define SROM4_LEDDC 45
-#define SROM5_LEDDC 45
-
-#define SROM4_AA 46
-#define SROM4_AA2G_MASK 0x00ff
-#define SROM4_AA2G_SHIFT 0
-#define SROM4_AA5G_MASK 0xff00
-#define SROM4_AA5G_SHIFT 8
-
-#define SROM4_AG10 47
-#define SROM4_AG32 48
-
-#define SROM4_TXPID2G 49
-#define SROM4_TXPID5G 51
-#define SROM4_TXPID5GL 53
-#define SROM4_TXPID5GH 55
-
-#define SROM4_TXRXC 61
-#define SROM4_TXCHAIN_MASK 0x000f
-#define SROM4_TXCHAIN_SHIFT 0
-#define SROM4_RXCHAIN_MASK 0x00f0
-#define SROM4_RXCHAIN_SHIFT 4
-#define SROM4_SWITCH_MASK 0xff00
-#define SROM4_SWITCH_SHIFT 8
-
-/* Per-path fields */
-#define MAX_PATH_SROM 4
-#define SROM4_PATH0 64
-#define SROM4_PATH1 87
-#define SROM4_PATH2 110
-#define SROM4_PATH3 133
-
-#define SROM4_2G_ITT_MAXP 0
-#define SROM4_2G_PA 1
-#define SROM4_5G_ITT_MAXP 5
-#define SROM4_5GLH_MAXP 6
-#define SROM4_5G_PA 7
-#define SROM4_5GL_PA 11
-#define SROM4_5GH_PA 15
-
-/* Fields in the ITT_MAXP and 5GLH_MAXP words */
-#define B2G_MAXP_MASK 0xff
-#define B2G_ITT_SHIFT 8
-#define B5G_MAXP_MASK 0xff
-#define B5G_ITT_SHIFT 8
-#define B5GH_MAXP_MASK 0xff
-#define B5GL_MAXP_SHIFT 8
-
-/* All the miriad power offsets */
-#define SROM4_2G_CCKPO 156
-#define SROM4_2G_OFDMPO 157
-#define SROM4_5G_OFDMPO 159
-#define SROM4_5GL_OFDMPO 161
-#define SROM4_5GH_OFDMPO 163
-#define SROM4_2G_MCSPO 165
-#define SROM4_5G_MCSPO 173
-#define SROM4_5GL_MCSPO 181
-#define SROM4_5GH_MCSPO 189
-#define SROM4_CDDPO 197
-#define SROM4_STBCPO 198
-#define SROM4_BW40PO 199
-#define SROM4_BWDUPPO 200
-
-#define SROM4_CRCREV 219
-
-/* SROM Rev 8: Make space for a 48word hardware header for PCIe rev >= 6.
- * This is acombined srom for both MIMO and SISO boards, usable in
- * the .130 4Kilobit OTP with hardware redundancy.
- */
-
-#define SROM8_SIGN 64
-
-#define SROM8_BREV 65
-
-#define SROM8_BFL0 66
-#define SROM8_BFL1 67
-#define SROM8_BFL2 68
-#define SROM8_BFL3 69
-
-#define SROM8_MACHI 70
-#define SROM8_MACMID 71
-#define SROM8_MACLO 72
-
-#define SROM8_CCODE 73
-#define SROM8_REGREV 74
-
-#define SROM8_LEDBH10 75
-#define SROM8_LEDBH32 76
-
-#define SROM8_LEDDC 77
-
-#define SROM8_AA 78
-
-#define SROM8_AG10 79
-#define SROM8_AG32 80
-
-#define SROM8_TXRXC 81
-
-#define SROM8_BXARSSI2G 82
-#define SROM8_BXARSSI5G 83
-#define SROM8_TRI52G 84
-#define SROM8_TRI5GHL 85
-#define SROM8_RXPO52G 86
-
-#define SROM8_FEM2G 87
-#define SROM8_FEM5G 88
-#define SROM8_FEM_ANTSWLUT_MASK 0xf800
-#define SROM8_FEM_ANTSWLUT_SHIFT 11
-#define SROM8_FEM_TR_ISO_MASK 0x0700
-#define SROM8_FEM_TR_ISO_SHIFT 8
-#define SROM8_FEM_PDET_RANGE_MASK 0x00f8
-#define SROM8_FEM_PDET_RANGE_SHIFT 3
-#define SROM8_FEM_EXTPA_GAIN_MASK 0x0006
-#define SROM8_FEM_EXTPA_GAIN_SHIFT 1
-#define SROM8_FEM_TSSIPOS_MASK 0x0001
-#define SROM8_FEM_TSSIPOS_SHIFT 0
-
-#define SROM8_THERMAL 89
-
-/* Temp sense related entries */
-#define SROM8_MPWR_RAWTS 90
-#define SROM8_TS_SLP_OPT_CORRX 91
-/* FOC: freiquency offset correction, HWIQ: H/W IOCAL enable, IQSWP: IQ CAL swap disable */
-#define SROM8_FOC_HWIQ_IQSWP 92
-
-/* Temperature delta for PHY calibration */
-#define SROM8_PHYCAL_TEMPDELTA 93
-
-/* Per-path offsets & fields */
-#define SROM8_PATH0 96
-#define SROM8_PATH1 112
-#define SROM8_PATH2 128
-#define SROM8_PATH3 144
-
-#define SROM8_2G_ITT_MAXP 0
-#define SROM8_2G_PA 1
-#define SROM8_5G_ITT_MAXP 4
-#define SROM8_5GLH_MAXP 5
-#define SROM8_5G_PA 6
-#define SROM8_5GL_PA 9
-#define SROM8_5GH_PA 12
-
-/* All the miriad power offsets */
-#define SROM8_2G_CCKPO 160
-
-#define SROM8_2G_OFDMPO 161
-#define SROM8_5G_OFDMPO 163
-#define SROM8_5GL_OFDMPO 165
-#define SROM8_5GH_OFDMPO 167
-
-#define SROM8_2G_MCSPO 169
-#define SROM8_5G_MCSPO 177
-#define SROM8_5GL_MCSPO 185
-#define SROM8_5GH_MCSPO 193
-
-#define SROM8_CDDPO 201
-#define SROM8_STBCPO 202
-#define SROM8_BW40PO 203
-#define SROM8_BWDUPPO 204
-
-/* SISO PA parameters are in the path0 spaces */
-#define SROM8_SISO 96
-
-/* Legacy names for SISO PA paramters */
-#define SROM8_W0_ITTMAXP (SROM8_SISO + SROM8_2G_ITT_MAXP)
-#define SROM8_W0_PAB0 (SROM8_SISO + SROM8_2G_PA)
-#define SROM8_W0_PAB1 (SROM8_SISO + SROM8_2G_PA + 1)
-#define SROM8_W0_PAB2 (SROM8_SISO + SROM8_2G_PA + 2)
-#define SROM8_W1_ITTMAXP (SROM8_SISO + SROM8_5G_ITT_MAXP)
-#define SROM8_W1_MAXP_LCHC (SROM8_SISO + SROM8_5GLH_MAXP)
-#define SROM8_W1_PAB0 (SROM8_SISO + SROM8_5G_PA)
-#define SROM8_W1_PAB1 (SROM8_SISO + SROM8_5G_PA + 1)
-#define SROM8_W1_PAB2 (SROM8_SISO + SROM8_5G_PA + 2)
-#define SROM8_W1_PAB0_LC (SROM8_SISO + SROM8_5GL_PA)
-#define SROM8_W1_PAB1_LC (SROM8_SISO + SROM8_5GL_PA + 1)
-#define SROM8_W1_PAB2_LC (SROM8_SISO + SROM8_5GL_PA + 2)
-#define SROM8_W1_PAB0_HC (SROM8_SISO + SROM8_5GH_PA)
-#define SROM8_W1_PAB1_HC (SROM8_SISO + SROM8_5GH_PA + 1)
-#define SROM8_W1_PAB2_HC (SROM8_SISO + SROM8_5GH_PA + 2)
-
-#define SROM8_CRCREV 219
-
-/* SROM REV 9 */
-#define SROM9_2GPO_CCKBW20 160
-#define SROM9_2GPO_CCKBW20UL 161
-#define SROM9_2GPO_LOFDMBW20 162
-#define SROM9_2GPO_LOFDMBW20UL 164
-
-#define SROM9_5GLPO_LOFDMBW20 166
-#define SROM9_5GLPO_LOFDMBW20UL 168
-#define SROM9_5GMPO_LOFDMBW20 170
-#define SROM9_5GMPO_LOFDMBW20UL 172
-#define SROM9_5GHPO_LOFDMBW20 174
-#define SROM9_5GHPO_LOFDMBW20UL 176
-
-#define SROM9_2GPO_MCSBW20 178
-#define SROM9_2GPO_MCSBW20UL 180
-#define SROM9_2GPO_MCSBW40 182
-
-#define SROM9_5GLPO_MCSBW20 184
-#define SROM9_5GLPO_MCSBW20UL 186
-#define SROM9_5GLPO_MCSBW40 188
-#define SROM9_5GMPO_MCSBW20 190
-#define SROM9_5GMPO_MCSBW20UL 192
-#define SROM9_5GMPO_MCSBW40 194
-#define SROM9_5GHPO_MCSBW20 196
-#define SROM9_5GHPO_MCSBW20UL 198
-#define SROM9_5GHPO_MCSBW40 200
-
-#define SROM9_PO_MCS32 202
-#define SROM9_PO_LOFDM40DUP 203
-
-#define SROM9_REV_CRC 219
-
-typedef struct {
- u8 tssipos; /* TSSI positive slope, 1: positive, 0: negative */
- u8 extpagain; /* Ext PA gain-type: full-gain: 0, pa-lite: 1, no_pa: 2 */
- u8 pdetrange; /* support 32 combinations of different Pdet dynamic ranges */
- u8 triso; /* TR switch isolation */
- u8 antswctrllut; /* antswctrl lookup table configuration: 32 possible choices */
-} srom_fem_t;
-
-#endif /* _bcmsrom_fmt_h_ */
diff --git a/drivers/staging/brcm80211/include/brcm_hw_ids.h b/drivers/staging/brcm80211/include/brcm_hw_ids.h
new file mode 100644
index 0000000000000..5fb17d53c9b28
--- /dev/null
+++ b/drivers/staging/brcm80211/include/brcm_hw_ids.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2010 Broadcom Corporation
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _BRCM_HW_IDS_H_
+#define _BRCM_HW_IDS_H_
+
+#define BCM4325_D11DUAL_ID 0x431b
+#define BCM4325_D11G_ID 0x431c
+#define BCM4325_D11A_ID 0x431d
+
+#define BCM4329_D11N2G_ID 0x432f /* 4329 802.11n 2.4G device */
+#define BCM4329_D11N5G_ID 0x4330 /* 4329 802.11n 5G device */
+#define BCM4329_D11NDUAL_ID 0x432e
+
+#define BCM4319_D11N_ID 0x4337 /* 4319 802.11n dualband device */
+#define BCM4319_D11N2G_ID 0x4338 /* 4319 802.11n 2.4G device */
+#define BCM4319_D11N5G_ID 0x4339 /* 4319 802.11n 5G device */
+
+#define BCM43224_D11N_ID 0x4353 /* 43224 802.11n dualband device */
+#define BCM43224_D11N_ID_VEN1 0x0576 /* Vendor specific 43224 802.11n db */
+
+#define BCM43225_D11N2G_ID 0x4357 /* 43225 802.11n 2.4GHz device */
+
+#define BCM43236_D11N_ID 0x4346 /* 43236 802.11n dualband device */
+#define BCM43236_D11N2G_ID 0x4347 /* 43236 802.11n 2.4GHz device */
+
+#define BCM4313_D11N2G_ID 0x4727 /* 4313 802.11n 2.4G device */
+
+/* Chip IDs */
+#define BCM4313_CHIP_ID 0x4313 /* 4313 chip id */
+#define BCM4319_CHIP_ID 0x4319 /* 4319 chip id */
+
+#define BCM43224_CHIP_ID 43224 /* 43224 chipcommon chipid */
+#define BCM43225_CHIP_ID 43225 /* 43225 chipcommon chipid */
+#define BCM43421_CHIP_ID 43421 /* 43421 chipcommon chipid */
+#define BCM43235_CHIP_ID 43235 /* 43235 chipcommon chipid */
+#define BCM43236_CHIP_ID 43236 /* 43236 chipcommon chipid */
+#define BCM43238_CHIP_ID 43238 /* 43238 chipcommon chipid */
+#define BCM4329_CHIP_ID 0x4329 /* 4329 chipcommon chipid */
+#define BCM4325_CHIP_ID 0x4325 /* 4325 chipcommon chipid */
+#define BCM4331_CHIP_ID 0x4331 /* 4331 chipcommon chipid */
+#define BCM4336_CHIP_ID 0x4336 /* 4336 chipcommon chipid */
+#define BCM4330_CHIP_ID 0x4330 /* 4330 chipcommon chipid */
+#define BCM6362_CHIP_ID 0x6362 /* 6362 chipcommon chipid */
+
+#endif /* _BRCM_HW_IDS_H_ */
diff --git a/drivers/staging/brcm80211/include/bcmutils.h b/drivers/staging/brcm80211/include/brcmu_utils.h
index 17683f2f785ff..a4b52cfb98a71 100644
--- a/drivers/staging/brcm80211/include/bcmutils.h
+++ b/drivers/staging/brcm80211/include/brcmu_utils.h
@@ -14,15 +14,15 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#ifndef _bcmutils_h_
-#define _bcmutils_h_
+#ifndef _BRCMU_UTILS_H_
+#define _BRCMU_UTILS_H_
/* Buffer structure for collecting string-formatted data
-* using bcm_bprintf() API.
-* Use bcm_binit() to initialize before use
+* using brcmu_bprintf() API.
+* Use brcmu_binit() to initialize before use
*/
- struct bcmstrbuf {
+ struct brcmu_strbuf {
char *buf; /* pointer to current position in origbuf */
unsigned int size; /* current (residual) size in bytes */
char *origbuf; /* unmodified pointer to orignal buffer */
@@ -87,25 +87,25 @@ typedef bool(*ifpkt_cb_t) (struct sk_buff *, void *);
#define pktq_ppeek(pq, prec) ((pq)->q[prec].head)
#define pktq_ppeek_tail(pq, prec) ((pq)->q[prec].tail)
-extern struct sk_buff *bcm_pktq_penq(struct pktq *pq, int prec,
+extern struct sk_buff *brcmu_pktq_penq(struct pktq *pq, int prec,
struct sk_buff *p);
-extern struct sk_buff *bcm_pktq_penq_head(struct pktq *pq, int prec,
+extern struct sk_buff *brcmu_pktq_penq_head(struct pktq *pq, int prec,
struct sk_buff *p);
-extern struct sk_buff *bcm_pktq_pdeq(struct pktq *pq, int prec);
-extern struct sk_buff *bcm_pktq_pdeq_tail(struct pktq *pq, int prec);
+extern struct sk_buff *brcmu_pktq_pdeq(struct pktq *pq, int prec);
+extern struct sk_buff *brcmu_pktq_pdeq_tail(struct pktq *pq, int prec);
/* packet primitives */
-extern struct sk_buff *bcm_pkt_buf_get_skb(uint len);
-extern void bcm_pkt_buf_free_skb(struct sk_buff *skb);
+extern struct sk_buff *brcmu_pkt_buf_get_skb(uint len);
+extern void brcmu_pkt_buf_free_skb(struct sk_buff *skb);
/* Empty the queue at particular precedence level */
-extern void bcm_pktq_pflush(struct pktq *pq, int prec,
+extern void brcmu_pktq_pflush(struct pktq *pq, int prec,
bool dir, ifpkt_cb_t fn, void *arg);
/* operations on a set of precedences in packet queue */
-extern int bcm_pktq_mlen(struct pktq *pq, uint prec_bmp);
-extern struct sk_buff *bcm_pktq_mdeq(struct pktq *pq, uint prec_bmp,
+extern int brcmu_pktq_mlen(struct pktq *pq, uint prec_bmp);
+extern struct sk_buff *brcmu_pktq_mdeq(struct pktq *pq, uint prec_bmp,
int *prec_out);
/* operations on packet queue as a whole */
@@ -117,46 +117,37 @@ extern struct sk_buff *bcm_pktq_mdeq(struct pktq *pq, uint prec_bmp,
#define pktq_empty(pq) ((pq)->len == 0)
/* operations for single precedence queues */
-#define pktenq(pq, p) bcm_pktq_penq(((struct pktq *)pq), 0, (p))
-#define pktenq_head(pq, p) bcm_pktq_penq_head(((struct pktq *)pq), 0, (p))
-#define pktdeq(pq) bcm_pktq_pdeq(((struct pktq *)pq), 0)
-#define pktdeq_tail(pq) bcm_pktq_pdeq_tail(((struct pktq *)pq), 0)
-#define pktqinit(pq, len) bcm_pktq_init(((struct pktq *)pq), 1, len)
-
-extern void bcm_pktq_init(struct pktq *pq, int num_prec, int max_len);
+#define pktenq(pq, p) brcmu_pktq_penq(((struct pktq *)pq), 0, (p))
+#define pktenq_head(pq, p)\
+ brcmu_pktq_penq_head(((struct pktq *)pq), 0, (p))
+#define pktdeq(pq) brcmu_pktq_pdeq(((struct pktq *)pq), 0)
+#define pktdeq_tail(pq) brcmu_pktq_pdeq_tail(((struct pktq *)pq), 0)
+#define pktqinit(pq, len) brcmu_pktq_init(((struct pktq *)pq), 1, len)
+
+extern void brcmu_pktq_init(struct pktq *pq, int num_prec, int max_len);
/* prec_out may be NULL if caller is not interested in return value */
-extern struct sk_buff *bcm_pktq_peek_tail(struct pktq *pq, int *prec_out);
-extern void bcm_pktq_flush(struct pktq *pq, bool dir,
+extern struct sk_buff *brcmu_pktq_peek_tail(struct pktq *pq, int *prec_out);
+extern void brcmu_pktq_flush(struct pktq *pq, bool dir,
ifpkt_cb_t fn, void *arg);
/* externs */
/* packet */
-extern uint bcm_pktfrombuf(struct sk_buff *p,
+extern uint brcmu_pktfrombuf(struct sk_buff *p,
uint offset, int len, unsigned char *buf);
-extern uint bcm_pkttotlen(struct sk_buff *p);
+extern uint brcmu_pkttotlen(struct sk_buff *p);
/* ethernet address */
-extern int bcm_ether_atoe(char *p, u8 *ea);
+extern int brcmu_ether_atoe(char *p, u8 *ea);
/* ip address */
struct ipv4_addr;
- extern char *bcm_ip_ntoa(struct ipv4_addr *ia, char *buf);
#ifdef BCMDBG
-extern void bcm_prpkt(const char *msg, struct sk_buff *p0);
+extern void brcmu_prpkt(const char *msg, struct sk_buff *p0);
#else
-#define bcm_prpkt(a, b)
+#define brcmu_prpkt(a, b)
#endif /* BCMDBG */
-#define bcm_perf_enable()
-#define bcmlog(fmt, a1, a2)
-#define bcmdumplog(buf, size) (*buf = '\0')
-#define bcmdumplogent(buf, idx) -1
-
-#define bcmtslog(tstamp, fmt, a1, a2)
-#define bcmprinttslogs()
-#define bcmprinttstamp(us)
-
/* Support for sharing code across in-driver iovar implementations.
* The intent is that a driver use this structure to map iovar names
* to its (private) iovar identifiers, and the lookup function to
@@ -165,13 +156,13 @@ extern void bcm_prpkt(const char *msg, struct sk_buff *p0);
*/
/* iovar structure */
- typedef struct bcm_iovar {
- const char *name; /* name for lookup and display */
- u16 varid; /* id for switch */
- u16 flags; /* driver-specific flag bits */
- u16 type; /* base type of argument */
- u16 minlen; /* min length for buffer vars */
- } bcm_iovar_t;
+struct brcmu_iovar {
+ const char *name; /* name for lookup and display */
+ u16 varid; /* id for switch */
+ u16 flags; /* driver-specific flag bits */
+ u16 type; /* base type of argument */
+ u16 minlen; /* min length for buffer vars */
+};
/* varid definitions are per-driver, may use these get/set bits */
@@ -185,12 +176,11 @@ extern void bcm_prpkt(const char *msg, struct sk_buff *p0);
#define IOV_ISSET(actionid) ((actionid & IOV_SET) == IOV_SET)
#define IOV_ID(actionid) (actionid >> 1)
-/* flags are per-driver based on driver attributes */
-
- extern const bcm_iovar_t *bcm_iovar_lookup(const bcm_iovar_t *table,
- const char *name);
- extern int bcm_iovar_lencheck(const bcm_iovar_t *table, void *arg,
- int len, bool set);
+extern const struct
+brcmu_iovar *brcmu_iovar_lookup(const struct brcmu_iovar *table,
+ const char *name);
+extern int brcmu_iovar_lencheck(const struct brcmu_iovar *table, void *arg,
+ int len, bool set);
/* Base type definitions */
#define IOVT_VOID 0 /* no value (implictly set only) */
@@ -245,132 +235,10 @@ extern void bcm_prpkt(const char *msg, struct sk_buff *p0);
#define REG_MAP(pa, size) (void *)(0)
#endif
-/* register access macros */
-#if defined(BCMSDIO)
-#ifdef BRCM_FULLMAC
-#include <bcmsdh.h>
-#endif
-#define OSL_WRITE_REG(r, v) \
- (bcmsdh_reg_write(NULL, (unsigned long)(r), sizeof(*(r)), (v)))
-#define OSL_READ_REG(r) \
- (bcmsdh_reg_read(NULL, (unsigned long)(r), sizeof(*(r))))
-#endif
-
-#if defined(BCMSDIO)
-#define SELECT_BUS_WRITE(mmap_op, bus_op) bus_op
-#define SELECT_BUS_READ(mmap_op, bus_op) bus_op
-#else
-#define SELECT_BUS_WRITE(mmap_op, bus_op) mmap_op
-#define SELECT_BUS_READ(mmap_op, bus_op) mmap_op
-#endif
-
/* the largest reasonable packet buffer driver uses for ethernet MTU in bytes */
#define PKTBUFSZ 2048
#define OSL_SYSUPTIME() ((u32)jiffies * (1000 / HZ))
-#ifdef BRCM_FULLMAC
-#include <linux/kernel.h> /* for vsn/printf's */
-#include <linux/string.h> /* for mem*, str* */
-#endif
-/* bcopy's: Linux kernel doesn't provide these (anymore) */
-#define bcopy(src, dst, len) memcpy((dst), (src), (len))
-
-/* register access macros */
-#ifndef __BIG_ENDIAN
-#ifndef __mips__
-#define R_REG(r) (\
- SELECT_BUS_READ(sizeof(*(r)) == sizeof(u8) ? \
- readb((volatile u8*)(r)) : \
- sizeof(*(r)) == sizeof(u16) ? readw((volatile u16*)(r)) : \
- readl((volatile u32*)(r)), OSL_READ_REG(r)) \
-)
-#else /* __mips__ */
-#define R_REG(r) (\
- SELECT_BUS_READ( \
- ({ \
- __typeof(*(r)) __osl_v; \
- __asm__ __volatile__("sync"); \
- switch (sizeof(*(r))) { \
- case sizeof(u8): \
- __osl_v = readb((volatile u8*)(r)); \
- break; \
- case sizeof(u16): \
- __osl_v = readw((volatile u16*)(r)); \
- break; \
- case sizeof(u32): \
- __osl_v = \
- readl((volatile u32*)(r)); \
- break; \
- } \
- __asm__ __volatile__("sync"); \
- __osl_v; \
- }), \
- ({ \
- __typeof(*(r)) __osl_v; \
- __asm__ __volatile__("sync"); \
- __osl_v = OSL_READ_REG(r); \
- __asm__ __volatile__("sync"); \
- __osl_v; \
- })) \
-)
-#endif /* __mips__ */
-
-#define W_REG(r, v) do { \
- SELECT_BUS_WRITE( \
- switch (sizeof(*(r))) { \
- case sizeof(u8): \
- writeb((u8)(v), (volatile u8*)(r)); break; \
- case sizeof(u16): \
- writew((u16)(v), (volatile u16*)(r)); break; \
- case sizeof(u32): \
- writel((u32)(v), (volatile u32*)(r)); break; \
- }, \
- (OSL_WRITE_REG(r, v))); \
- } while (0)
-#else /* __BIG_ENDIAN */
-#define R_REG(r) (\
- SELECT_BUS_READ( \
- ({ \
- __typeof(*(r)) __osl_v; \
- switch (sizeof(*(r))) { \
- case sizeof(u8): \
- __osl_v = \
- readb((volatile u8*)((r)^3)); \
- break; \
- case sizeof(u16): \
- __osl_v = \
- readw((volatile u16*)((r)^2)); \
- break; \
- case sizeof(u32): \
- __osl_v = readl((volatile u32*)(r)); \
- break; \
- } \
- __osl_v; \
- }), \
- OSL_READ_REG(r)) \
-)
-#define W_REG(r, v) do { \
- SELECT_BUS_WRITE( \
- switch (sizeof(*(r))) { \
- case sizeof(u8): \
- writeb((u8)(v), \
- (volatile u8*)((r)^3)); break; \
- case sizeof(u16): \
- writew((u16)(v), \
- (volatile u16*)((r)^2)); break; \
- case sizeof(u32): \
- writel((u32)(v), \
- (volatile u32*)(r)); break; \
- }, \
- (OSL_WRITE_REG(r, v))); \
- } while (0)
-#endif /* __BIG_ENDIAN */
-
-#define AND_REG(r, v) W_REG((r), R_REG(r) & (v))
-#define OR_REG(r, v) W_REG((r), R_REG(r) | (v))
-
-#define SET_REG(r, mask, val) \
- W_REG((r), ((R_REG(r) & ~(mask)) | (val)))
#ifndef setbit
#ifndef NBBY /* the BSD family defines NBBY */
@@ -415,21 +283,18 @@ extern void bcm_prpkt(const char *msg, struct sk_buff *p0);
#define CRC16_INIT_VALUE 0xffff /* Initial CRC16 checksum value */
#define CRC16_GOOD_VALUE 0xf0b8 /* Good final CRC16 checksum value */
-/* bcm_format_flags() bit description structure */
- typedef struct bcm_bit_desc {
- u32 bit;
- const char *name;
- } bcm_bit_desc_t;
+/* brcmu_format_flags() bit description structure */
+struct brcmu_bit_desc {
+ u32 bit;
+ const char *name;
+};
/* tag_ID/length/value_buffer tuple */
- typedef struct bcm_tlv {
- u8 id;
- u8 len;
- u8 data[1];
- } bcm_tlv_t;
-
-/* Check that bcm_tlv_t fits into the given buflen */
-#define bcm_valid_tlv(elt, buflen) ((buflen) >= 2 && (int)(buflen) >= (int)(2 + (elt)->len))
+struct brcmu_tlv {
+ u8 id;
+ u8 len;
+ u8 data[1];
+};
#define ETHER_ADDR_STR_LEN 18 /* 18-bytes of Ethernet address buffer length */
@@ -467,17 +332,19 @@ extern void bcm_prpkt(const char *msg, struct sk_buff *p0);
/* externs */
/* crc */
-extern u8 bcm_crc8(u8 *p, uint nbytes, u8 crc);
+extern u8 brcmu_crc8(u8 *p, uint nbytes, u8 crc);
+
/* format/print */
#if defined(BCMDBG)
- extern int bcm_format_flags(const bcm_bit_desc_t *bd, u32 flags,
- char *buf, int len);
- extern int bcm_format_hex(char *str, const void *bytes, int len);
+extern int brcmu_format_flags(const struct brcmu_bit_desc *bd, u32 flags,
+ char *buf, int len);
+extern int brcmu_format_hex(char *str, const void *bytes, int len);
#endif
- extern char *bcm_chipname(uint chipid, char *buf, uint len);
- extern bcm_tlv_t *bcm_parse_tlvs(void *buf, int buflen,
- uint key);
+extern char *brcmu_chipname(uint chipid, char *buf, uint len);
+
+extern struct brcmu_tlv *brcmu_parse_tlvs(void *buf, int buflen,
+ uint key);
/* multi-bool data type: set of bools, mbool is true if any is set */
typedef u32 mbool;
@@ -487,14 +354,14 @@ extern u8 bcm_crc8(u8 *p, uint nbytes, u8 crc);
#define mboolmaskset(mb, mask, val) ((mb) = (((mb) & ~(mask)) | (val)))
/* power conversion */
- extern u16 bcm_qdbm_to_mw(u8 qdbm);
- extern u8 bcm_mw_to_qdbm(u16 mw);
+extern u16 brcmu_qdbm_to_mw(u8 qdbm);
+extern u8 brcmu_mw_to_qdbm(u16 mw);
- extern void bcm_binit(struct bcmstrbuf *b, char *buf, uint size);
- extern int bcm_bprintf(struct bcmstrbuf *b, const char *fmt, ...);
+extern void brcmu_binit(struct brcmu_strbuf *b, char *buf, uint size);
+extern int brcmu_bprintf(struct brcmu_strbuf *b, const char *fmt, ...);
- extern uint bcm_mkiovar(char *name, char *data, uint datalen, char *buf,
- uint len);
- extern uint bcm_bitcount(u8 *bitmap, uint bytelength);
+extern uint brcmu_mkiovar(char *name, char *data, uint datalen,
+ char *buf, uint len);
+extern uint brcmu_bitcount(u8 *bitmap, uint bytelength);
-#endif /* _bcmutils_h_ */
+#endif /* _BRCMU_UTILS_H_ */
diff --git a/drivers/staging/brcm80211/include/bcmwifi.h b/drivers/staging/brcm80211/include/brcmu_wifi.h
index a573ebff7680c..72013a4024719 100644
--- a/drivers/staging/brcm80211/include/bcmwifi.h
+++ b/drivers/staging/brcm80211/include/brcmu_wifi.h
@@ -14,8 +14,11 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#ifndef _bcmwifi_h_
-#define _bcmwifi_h_
+#ifndef _BRCMU_WIFI_H_
+#define _BRCMU_WIFI_H_
+
+#include <linux/if_ether.h> /* for ETH_ALEN */
+#include <linux/ieee80211.h> /* for WLAN_PMKID_LEN */
/* A chanspec holds the channel number, band, bandwidth and control sideband */
typedef u16 chanspec_t;
@@ -128,20 +131,24 @@ typedef u16 chanspec_t;
#define WLC_2G_25MHZ_OFFSET 5 /* 2.4GHz band channel offset */
+#define MCSSET_LEN 16
+
+#define AC_BITMAP_TST(ab, ac) (((ab) & (1 << (ac))) != 0)
+
/*
* Verify the chanspec is using a legal set of parameters, i.e. that the
* chanspec specified a band, bw, ctl_sb and channel and that the
* combination could be legal given any set of circumstances.
* RETURNS: true is the chanspec is malformed, false if it looks good.
*/
-extern bool bcm_chspec_malformed(chanspec_t chanspec);
+extern bool brcmu_chspec_malformed(chanspec_t chanspec);
/*
* This function returns the channel number that control traffic is being sent on, for legacy
* channels this is just the channel number, for 40MHZ channels it is the upper or lowre 20MHZ
* sideband depending on the chanspec selected
*/
-extern u8 bcm_chspec_ctlchan(chanspec_t chspec);
+extern u8 brcmu_chspec_ctlchan(chanspec_t chspec);
/*
* Return the channel number for a given frequency and base frequency.
@@ -162,6 +169,74 @@ extern u8 bcm_chspec_ctlchan(chanspec_t chspec);
*
* Reference 802.11 REVma, section 17.3.8.3, and 802.11B section 18.4.6.2
*/
-extern int bcm_mhz2channel(uint freq, uint start_factor);
-
-#endif /* _bcmwifi_h_ */
+extern int brcmu_mhz2channel(uint freq, uint start_factor);
+
+/* Enumerate crypto algorithms */
+#define CRYPTO_ALGO_OFF 0
+#define CRYPTO_ALGO_WEP1 1
+#define CRYPTO_ALGO_TKIP 2
+#define CRYPTO_ALGO_WEP128 3
+#define CRYPTO_ALGO_AES_CCM 4
+#define CRYPTO_ALGO_AES_RESERVED1 5
+#define CRYPTO_ALGO_AES_RESERVED2 6
+#define CRYPTO_ALGO_NALG 7
+
+/* wireless security bitvec */
+#define WEP_ENABLED 0x0001
+#define TKIP_ENABLED 0x0002
+#define AES_ENABLED 0x0004
+#define WSEC_SWFLAG 0x0008
+#define SES_OW_ENABLED 0x0040 /* to go into transition mode without setting wep */
+
+/* WPA authentication mode bitvec */
+#define WPA_AUTH_DISABLED 0x0000 /* Legacy (i.e., non-WPA) */
+#define WPA_AUTH_NONE 0x0001 /* none (IBSS) */
+#define WPA_AUTH_UNSPECIFIED 0x0002 /* over 802.1x */
+#define WPA_AUTH_PSK 0x0004 /* Pre-shared key */
+#define WPA_AUTH_RESERVED1 0x0008
+#define WPA_AUTH_RESERVED2 0x0010
+ /* #define WPA_AUTH_8021X 0x0020 *//* 802.1x, reserved */
+#define WPA2_AUTH_RESERVED1 0x0020
+#define WPA2_AUTH_UNSPECIFIED 0x0040 /* over 802.1x */
+#define WPA2_AUTH_PSK 0x0080 /* Pre-shared key */
+#define WPA2_AUTH_RESERVED3 0x0200
+#define WPA2_AUTH_RESERVED4 0x0400
+#define WPA2_AUTH_RESERVED5 0x0800
+
+/* pmkid */
+#define MAXPMKID 16
+
+#define DOT11_DEFAULT_RTS_LEN 2347
+#define DOT11_DEFAULT_FRAG_LEN 2346
+
+#define DOT11_ICV_AES_LEN 8
+#define DOT11_QOS_LEN 2
+#define DOT11_IV_MAX_LEN 8
+#define DOT11_A4_HDR_LEN 30
+
+#define HT_CAP_RX_STBC_NO 0x0
+#define HT_CAP_RX_STBC_ONE_STREAM 0x1
+
+typedef struct _pmkid {
+ u8 BSSID[ETH_ALEN];
+ u8 PMKID[WLAN_PMKID_LEN];
+} pmkid_t;
+
+typedef struct _pmkid_list {
+ u32 npmkid;
+ pmkid_t pmkid[1];
+} pmkid_list_t;
+
+typedef struct _pmkid_cand {
+ u8 BSSID[ETH_ALEN];
+ u8 preauth;
+} pmkid_cand_t;
+
+typedef struct _pmkid_cand_list {
+ u32 npmkid_cand;
+ pmkid_cand_t pmkid_cand[1];
+} pmkid_cand_list_t;
+
+typedef u8 ac_bitmap_t;
+
+#endif /* _BRCMU_WIFI_H_ */
diff --git a/drivers/staging/brcm80211/include/chipcommon.h b/drivers/staging/brcm80211/include/chipcommon.h
new file mode 100644
index 0000000000000..296582aced692
--- /dev/null
+++ b/drivers/staging/brcm80211/include/chipcommon.h
@@ -0,0 +1,281 @@
+/*
+ * Copyright (c) 2010 Broadcom Corporation
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _SBCHIPC_H
+#define _SBCHIPC_H
+
+#include "defs.h" /* for PAD macro */
+
+typedef volatile struct {
+ u32 chipid; /* 0x0 */
+ u32 capabilities;
+ u32 corecontrol; /* corerev >= 1 */
+ u32 bist;
+
+ /* OTP */
+ u32 otpstatus; /* 0x10, corerev >= 10 */
+ u32 otpcontrol;
+ u32 otpprog;
+ u32 otplayout; /* corerev >= 23 */
+
+ /* Interrupt control */
+ u32 intstatus; /* 0x20 */
+ u32 intmask;
+
+ /* Chip specific regs */
+ u32 chipcontrol; /* 0x28, rev >= 11 */
+ u32 chipstatus; /* 0x2c, rev >= 11 */
+
+ /* Jtag Master */
+ u32 jtagcmd; /* 0x30, rev >= 10 */
+ u32 jtagir;
+ u32 jtagdr;
+ u32 jtagctrl;
+
+ /* serial flash interface registers */
+ u32 flashcontrol; /* 0x40 */
+ u32 flashaddress;
+ u32 flashdata;
+ u32 PAD[1];
+
+ /* Silicon backplane configuration broadcast control */
+ u32 broadcastaddress; /* 0x50 */
+ u32 broadcastdata;
+
+ /* gpio - cleared only by power-on-reset */
+ u32 gpiopullup; /* 0x58, corerev >= 20 */
+ u32 gpiopulldown; /* 0x5c, corerev >= 20 */
+ u32 gpioin; /* 0x60 */
+ u32 gpioout; /* 0x64 */
+ u32 gpioouten; /* 0x68 */
+ u32 gpiocontrol; /* 0x6C */
+ u32 gpiointpolarity; /* 0x70 */
+ u32 gpiointmask; /* 0x74 */
+
+ /* GPIO events corerev >= 11 */
+ u32 gpioevent;
+ u32 gpioeventintmask;
+
+ /* Watchdog timer */
+ u32 watchdog; /* 0x80 */
+
+ /* GPIO events corerev >= 11 */
+ u32 gpioeventintpolarity;
+
+ /* GPIO based LED powersave registers corerev >= 16 */
+ u32 gpiotimerval; /* 0x88 */
+ u32 gpiotimeroutmask;
+
+ /* clock control */
+ u32 clockcontrol_n; /* 0x90 */
+ u32 clockcontrol_sb; /* aka m0 */
+ u32 clockcontrol_pci; /* aka m1 */
+ u32 clockcontrol_m2; /* mii/uart/mipsref */
+ u32 clockcontrol_m3; /* cpu */
+ u32 clkdiv; /* corerev >= 3 */
+ u32 gpiodebugsel; /* corerev >= 28 */
+ u32 capabilities_ext; /* 0xac */
+
+ /* pll delay registers (corerev >= 4) */
+ u32 pll_on_delay; /* 0xb0 */
+ u32 fref_sel_delay;
+ u32 slow_clk_ctl; /* 5 < corerev < 10 */
+ u32 PAD;
+
+ /* Instaclock registers (corerev >= 10) */
+ u32 system_clk_ctl; /* 0xc0 */
+ u32 clkstatestretch;
+ u32 PAD[2];
+
+ /* Indirect backplane access (corerev >= 22) */
+ u32 bp_addrlow; /* 0xd0 */
+ u32 bp_addrhigh;
+ u32 bp_data;
+ u32 PAD;
+ u32 bp_indaccess;
+ u32 PAD[3];
+
+ /* More clock dividers (corerev >= 32) */
+ u32 clkdiv2;
+ u32 PAD[2];
+
+ /* In AI chips, pointer to erom */
+ u32 eromptr; /* 0xfc */
+
+ /* ExtBus control registers (corerev >= 3) */
+ u32 pcmcia_config; /* 0x100 */
+ u32 pcmcia_memwait;
+ u32 pcmcia_attrwait;
+ u32 pcmcia_iowait;
+ u32 ide_config;
+ u32 ide_memwait;
+ u32 ide_attrwait;
+ u32 ide_iowait;
+ u32 prog_config;
+ u32 prog_waitcount;
+ u32 flash_config;
+ u32 flash_waitcount;
+ u32 SECI_config; /* 0x130 SECI configuration */
+ u32 PAD[3];
+
+ /* Enhanced Coexistence Interface (ECI) registers (corerev >= 21) */
+ u32 eci_output; /* 0x140 */
+ u32 eci_control;
+ u32 eci_inputlo;
+ u32 eci_inputmi;
+ u32 eci_inputhi;
+ u32 eci_inputintpolaritylo;
+ u32 eci_inputintpolaritymi;
+ u32 eci_inputintpolarityhi;
+ u32 eci_intmasklo;
+ u32 eci_intmaskmi;
+ u32 eci_intmaskhi;
+ u32 eci_eventlo;
+ u32 eci_eventmi;
+ u32 eci_eventhi;
+ u32 eci_eventmasklo;
+ u32 eci_eventmaskmi;
+ u32 eci_eventmaskhi;
+ u32 PAD[3];
+
+ /* SROM interface (corerev >= 32) */
+ u32 sromcontrol; /* 0x190 */
+ u32 sromaddress;
+ u32 sromdata;
+ u32 PAD[17];
+
+ /* Clock control and hardware workarounds (corerev >= 20) */
+ u32 clk_ctl_st; /* 0x1e0 */
+ u32 hw_war;
+ u32 PAD[70];
+
+ /* UARTs */
+ u8 uart0data; /* 0x300 */
+ u8 uart0imr;
+ u8 uart0fcr;
+ u8 uart0lcr;
+ u8 uart0mcr;
+ u8 uart0lsr;
+ u8 uart0msr;
+ u8 uart0scratch;
+ u8 PAD[248]; /* corerev >= 1 */
+
+ u8 uart1data; /* 0x400 */
+ u8 uart1imr;
+ u8 uart1fcr;
+ u8 uart1lcr;
+ u8 uart1mcr;
+ u8 uart1lsr;
+ u8 uart1msr;
+ u8 uart1scratch;
+ u32 PAD[126];
+
+ /* PMU registers (corerev >= 20) */
+ u32 pmucontrol; /* 0x600 */
+ u32 pmucapabilities;
+ u32 pmustatus;
+ u32 res_state;
+ u32 res_pending;
+ u32 pmutimer;
+ u32 min_res_mask;
+ u32 max_res_mask;
+ u32 res_table_sel;
+ u32 res_dep_mask;
+ u32 res_updn_timer;
+ u32 res_timer;
+ u32 clkstretch;
+ u32 pmuwatchdog;
+ u32 gpiosel; /* 0x638, rev >= 1 */
+ u32 gpioenable; /* 0x63c, rev >= 1 */
+ u32 res_req_timer_sel;
+ u32 res_req_timer;
+ u32 res_req_mask;
+ u32 PAD;
+ u32 chipcontrol_addr; /* 0x650 */
+ u32 chipcontrol_data; /* 0x654 */
+ u32 regcontrol_addr;
+ u32 regcontrol_data;
+ u32 pllcontrol_addr;
+ u32 pllcontrol_data;
+ u32 pmustrapopt; /* 0x668, corerev >= 28 */
+ u32 pmu_xtalfreq; /* 0x66C, pmurev >= 10 */
+ u32 PAD[100];
+ u16 sromotp[768];
+} chipcregs_t;
+
+/* chipid */
+#define CID_ID_MASK 0x0000ffff /* Chip Id mask */
+#define CID_REV_MASK 0x000f0000 /* Chip Revision mask */
+#define CID_REV_SHIFT 16 /* Chip Revision shift */
+#define CID_PKG_MASK 0x00f00000 /* Package Option mask */
+#define CID_PKG_SHIFT 20 /* Package Option shift */
+#define CID_CC_MASK 0x0f000000 /* CoreCount (corerev >= 4) */
+#define CID_CC_SHIFT 24
+#define CID_TYPE_MASK 0xf0000000 /* Chip Type */
+#define CID_TYPE_SHIFT 28
+
+/* capabilities */
+#define CC_CAP_UARTS_MASK 0x00000003 /* Number of UARTs */
+#define CC_CAP_MIPSEB 0x00000004 /* MIPS is in big-endian mode */
+#define CC_CAP_UCLKSEL 0x00000018 /* UARTs clock select */
+#define CC_CAP_UINTCLK 0x00000008 /* UARTs are driven by internal divided clock */
+#define CC_CAP_UARTGPIO 0x00000020 /* UARTs own GPIOs 15:12 */
+#define CC_CAP_EXTBUS_MASK 0x000000c0 /* External bus mask */
+#define CC_CAP_EXTBUS_NONE 0x00000000 /* No ExtBus present */
+#define CC_CAP_EXTBUS_FULL 0x00000040 /* ExtBus: PCMCIA, IDE & Prog */
+#define CC_CAP_EXTBUS_PROG 0x00000080 /* ExtBus: ProgIf only */
+#define CC_CAP_FLASH_MASK 0x00000700 /* Type of flash */
+#define CC_CAP_PLL_MASK 0x00038000 /* Type of PLL */
+#define CC_CAP_PWR_CTL 0x00040000 /* Power control */
+#define CC_CAP_OTPSIZE 0x00380000 /* OTP Size (0 = none) */
+#define CC_CAP_OTPSIZE_SHIFT 19 /* OTP Size shift */
+#define CC_CAP_OTPSIZE_BASE 5 /* OTP Size base */
+#define CC_CAP_JTAGP 0x00400000 /* JTAG Master Present */
+#define CC_CAP_ROM 0x00800000 /* Internal boot rom active */
+#define CC_CAP_BKPLN64 0x08000000 /* 64-bit backplane */
+#define CC_CAP_PMU 0x10000000 /* PMU Present, rev >= 20 */
+#define CC_CAP_SROM 0x40000000 /* Srom Present, rev >= 32 */
+#define CC_CAP_NFLASH 0x80000000 /* Nand flash present, rev >= 35 */
+
+#define CC_CAP2_SECI 0x00000001 /* SECI Present, rev >= 36 */
+#define CC_CAP2_GSIO 0x00000002 /* GSIO (spi/i2c) present, rev >= 37 */
+
+/* pmucapabilities */
+#define PCAP_REV_MASK 0x000000ff
+#define PCAP_RC_MASK 0x00001f00
+#define PCAP_RC_SHIFT 8
+#define PCAP_TC_MASK 0x0001e000
+#define PCAP_TC_SHIFT 13
+#define PCAP_PC_MASK 0x001e0000
+#define PCAP_PC_SHIFT 17
+#define PCAP_VC_MASK 0x01e00000
+#define PCAP_VC_SHIFT 21
+#define PCAP_CC_MASK 0x1e000000
+#define PCAP_CC_SHIFT 25
+#define PCAP5_PC_MASK 0x003e0000 /* PMU corerev >= 5 */
+#define PCAP5_PC_SHIFT 17
+#define PCAP5_VC_MASK 0x07c00000
+#define PCAP5_VC_SHIFT 22
+#define PCAP5_CC_MASK 0xf8000000
+#define PCAP5_CC_SHIFT 27
+
+/*
+* Maximum delay for the PMU state transition in us.
+* This is an upper bound intended for spinwaits etc.
+*/
+#define PMU_MAX_TRANSITION_DLY 15000
+
+#endif /* _SBCHIPC_H */
diff --git a/drivers/staging/brcm80211/include/defs.h b/drivers/staging/brcm80211/include/defs.h
new file mode 100644
index 0000000000000..768df8dfe28fe
--- /dev/null
+++ b/drivers/staging/brcm80211/include/defs.h
@@ -0,0 +1,110 @@
+/*
+ * Copyright (c) 2010 Broadcom Corporation
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _BRCM_DEFS_H_
+#define _BRCM_DEFS_H_
+
+#define SI_BUS 0
+#define PCI_BUS 1
+#define PCMCIA_BUS 2
+#define SDIO_BUS 3
+#define JTAG_BUS 4
+#define USB_BUS 5
+#define SPI_BUS 6
+
+#ifndef OFF
+#define OFF 0
+#endif
+
+#ifndef ON
+#define ON 1 /* ON = 1 */
+#endif
+
+#define AUTO (-1) /* Auto = -1 */
+
+/*
+ * Priority definitions according 802.1D
+ */
+#define PRIO_8021D_NONE 2
+#define PRIO_8021D_BK 1
+#define PRIO_8021D_BE 0
+#define PRIO_8021D_EE 3
+#define PRIO_8021D_CL 4
+#define PRIO_8021D_VI 5
+#define PRIO_8021D_VO 6
+#define PRIO_8021D_NC 7
+
+#define MAXPRIO 7
+#define NUMPRIO (MAXPRIO + 1)
+
+#define WL_NUMRATES 16 /* max # of rates in a rateset */
+
+typedef struct wl_rateset {
+ u32 count; /* # rates in this set */
+ u8 rates[WL_NUMRATES]; /* rates in 500kbps units w/hi bit set if basic */
+} wl_rateset_t;
+
+#define WLC_CNTRY_BUF_SZ 4 /* Country string is 3 bytes + NUL */
+
+#define WLC_SET_CHANNEL 30
+#define WLC_SET_SRL 32
+#define WLC_SET_LRL 34
+
+#define WLC_SET_RATESET 72
+#define WLC_SET_BCNPRD 76
+#define WLC_GET_CURR_RATESET 114 /* current rateset */
+#define WLC_GET_PHYLIST 180
+
+/* Bit masks for radio disabled status - returned by WL_GET_RADIO */
+#define WL_RADIO_SW_DISABLE (1<<0)
+#define WL_RADIO_HW_DISABLE (1<<1)
+#define WL_RADIO_MPC_DISABLE (1<<2)
+#define WL_RADIO_COUNTRY_DISABLE (1<<3) /* some countries don't support any channel */
+
+/* Override bit for WLC_SET_TXPWR. if set, ignore other level limits */
+#define WL_TXPWR_OVERRIDE (1U<<31)
+
+/* band types */
+#define WLC_BAND_AUTO 0 /* auto-select */
+#define WLC_BAND_5G 1 /* 5 Ghz */
+#define WLC_BAND_2G 2 /* 2.4 Ghz */
+#define WLC_BAND_ALL 3 /* all bands */
+
+/* Values for PM */
+#define PM_OFF 0
+#define PM_MAX 1
+
+/* Message levels */
+#define LOG_ERROR_VAL 0x00000001
+#define LOG_TRACE_VAL 0x00000002
+
+#define PM_OFF 0
+#define PM_MAX 1
+#define PM_FAST 2
+
+/*
+ * Sonics Configuration Space Registers.
+ */
+#define SBCONFIGOFF 0xf00 /* core sbconfig regs are top 256bytes of regs */
+
+/* cpp contortions to concatenate w/arg prescan */
+#ifndef PAD
+#define _PADLINE(line) pad ## line
+#define _XSTR(line) _PADLINE(line)
+#define PAD _XSTR(__LINE__)
+#endif
+
+#endif /* _BRCM_DEFS_H_ */
diff --git a/drivers/staging/brcm80211/include/hndsoc.h b/drivers/staging/brcm80211/include/hndsoc.h
deleted file mode 100644
index 6435686b329f4..0000000000000
--- a/drivers/staging/brcm80211/include/hndsoc.h
+++ /dev/null
@@ -1,199 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _HNDSOC_H
-#define _HNDSOC_H
-
-/* Include the soci specific files */
-#include <sbconfig.h>
-#include <aidmp.h>
-
-/*
- * SOC Interconnect Address Map.
- * All regions may not exist on all chips.
- */
-#define SI_SDRAM_BASE 0x00000000 /* Physical SDRAM */
-#define SI_PCI_MEM 0x08000000 /* Host Mode sb2pcitranslation0 (64 MB) */
-#define SI_PCI_MEM_SZ (64 * 1024 * 1024)
-#define SI_PCI_CFG 0x0c000000 /* Host Mode sb2pcitranslation1 (64 MB) */
-#define SI_SDRAM_SWAPPED 0x10000000 /* Byteswapped Physical SDRAM */
-#define SI_SDRAM_R2 0x80000000 /* Region 2 for sdram (512 MB) */
-
-#ifdef SI_ENUM_BASE_VARIABLE
-#define SI_ENUM_BASE (sii->pub.si_enum_base)
-#else
-#define SI_ENUM_BASE 0x18000000 /* Enumeration space base */
-#endif /* SI_ENUM_BASE_VARIABLE */
-
-#define SI_WRAP_BASE 0x18100000 /* Wrapper space base */
-#define SI_CORE_SIZE 0x1000 /* each core gets 4Kbytes for registers */
-#define SI_MAXCORES 16 /* Max cores (this is arbitrary, for software
- * convenience and could be changed if we
- * make any larger chips
- */
-
-#define SI_FASTRAM 0x19000000 /* On-chip RAM on chips that also have DDR */
-#define SI_FASTRAM_SWAPPED 0x19800000
-
-#define SI_FLASH2 0x1c000000 /* Flash Region 2 (region 1 shadowed here) */
-#define SI_FLASH2_SZ 0x02000000 /* Size of Flash Region 2 */
-#define SI_ARMCM3_ROM 0x1e000000 /* ARM Cortex-M3 ROM */
-#define SI_FLASH1 0x1fc00000 /* MIPS Flash Region 1 */
-#define SI_FLASH1_SZ 0x00400000 /* MIPS Size of Flash Region 1 */
-#define SI_ARM7S_ROM 0x20000000 /* ARM7TDMI-S ROM */
-#define SI_ARMCM3_SRAM2 0x60000000 /* ARM Cortex-M3 SRAM Region 2 */
-#define SI_ARM7S_SRAM2 0x80000000 /* ARM7TDMI-S SRAM Region 2 */
-#define SI_ARM_FLASH1 0xffff0000 /* ARM Flash Region 1 */
-#define SI_ARM_FLASH1_SZ 0x00010000 /* ARM Size of Flash Region 1 */
-
-#define SI_PCI_DMA 0x40000000 /* Client Mode sb2pcitranslation2 (1 GB) */
-#define SI_PCI_DMA2 0x80000000 /* Client Mode sb2pcitranslation2 (1 GB) */
-#define SI_PCI_DMA_SZ 0x40000000 /* Client Mode sb2pcitranslation2 size in bytes */
-#define SI_PCIE_DMA_L32 0x00000000 /* PCIE Client Mode sb2pcitranslation2
- * (2 ZettaBytes), low 32 bits
- */
-#define SI_PCIE_DMA_H32 0x80000000 /* PCIE Client Mode sb2pcitranslation2
- * (2 ZettaBytes), high 32 bits
- */
-
-/* core codes */
-#define NODEV_CORE_ID 0x700 /* Invalid coreid */
-#define CC_CORE_ID 0x800 /* chipcommon core */
-#define ILINE20_CORE_ID 0x801 /* iline20 core */
-#define SRAM_CORE_ID 0x802 /* sram core */
-#define SDRAM_CORE_ID 0x803 /* sdram core */
-#define PCI_CORE_ID 0x804 /* pci core */
-#define MIPS_CORE_ID 0x805 /* mips core */
-#define ENET_CORE_ID 0x806 /* enet mac core */
-#define CODEC_CORE_ID 0x807 /* v90 codec core */
-#define USB_CORE_ID 0x808 /* usb 1.1 host/device core */
-#define ADSL_CORE_ID 0x809 /* ADSL core */
-#define ILINE100_CORE_ID 0x80a /* iline100 core */
-#define IPSEC_CORE_ID 0x80b /* ipsec core */
-#define UTOPIA_CORE_ID 0x80c /* utopia core */
-#define PCMCIA_CORE_ID 0x80d /* pcmcia core */
-#define SOCRAM_CORE_ID 0x80e /* internal memory core */
-#define MEMC_CORE_ID 0x80f /* memc sdram core */
-#define OFDM_CORE_ID 0x810 /* OFDM phy core */
-#define EXTIF_CORE_ID 0x811 /* external interface core */
-#define D11_CORE_ID 0x812 /* 802.11 MAC core */
-#define APHY_CORE_ID 0x813 /* 802.11a phy core */
-#define BPHY_CORE_ID 0x814 /* 802.11b phy core */
-#define GPHY_CORE_ID 0x815 /* 802.11g phy core */
-#define MIPS33_CORE_ID 0x816 /* mips3302 core */
-#define USB11H_CORE_ID 0x817 /* usb 1.1 host core */
-#define USB11D_CORE_ID 0x818 /* usb 1.1 device core */
-#define USB20H_CORE_ID 0x819 /* usb 2.0 host core */
-#define USB20D_CORE_ID 0x81a /* usb 2.0 device core */
-#define SDIOH_CORE_ID 0x81b /* sdio host core */
-#define ROBO_CORE_ID 0x81c /* roboswitch core */
-#define ATA100_CORE_ID 0x81d /* parallel ATA core */
-#define SATAXOR_CORE_ID 0x81e /* serial ATA & XOR DMA core */
-#define GIGETH_CORE_ID 0x81f /* gigabit ethernet core */
-#define PCIE_CORE_ID 0x820 /* pci express core */
-#define NPHY_CORE_ID 0x821 /* 802.11n 2x2 phy core */
-#define SRAMC_CORE_ID 0x822 /* SRAM controller core */
-#define MINIMAC_CORE_ID 0x823 /* MINI MAC/phy core */
-#define ARM11_CORE_ID 0x824 /* ARM 1176 core */
-#define ARM7S_CORE_ID 0x825 /* ARM7tdmi-s core */
-#define LPPHY_CORE_ID 0x826 /* 802.11a/b/g phy core */
-#define PMU_CORE_ID 0x827 /* PMU core */
-#define SSNPHY_CORE_ID 0x828 /* 802.11n single-stream phy core */
-#define SDIOD_CORE_ID 0x829 /* SDIO device core */
-#define ARMCM3_CORE_ID 0x82a /* ARM Cortex M3 core */
-#define HTPHY_CORE_ID 0x82b /* 802.11n 4x4 phy core */
-#define MIPS74K_CORE_ID 0x82c /* mips 74k core */
-#define GMAC_CORE_ID 0x82d /* Gigabit MAC core */
-#define DMEMC_CORE_ID 0x82e /* DDR1/2 memory controller core */
-#define PCIERC_CORE_ID 0x82f /* PCIE Root Complex core */
-#define OCP_CORE_ID 0x830 /* OCP2OCP bridge core */
-#define SC_CORE_ID 0x831 /* shared common core */
-#define AHB_CORE_ID 0x832 /* OCP2AHB bridge core */
-#define SPIH_CORE_ID 0x833 /* SPI host core */
-#define I2S_CORE_ID 0x834 /* I2S core */
-#define DMEMS_CORE_ID 0x835 /* SDR/DDR1 memory controller core */
-#define DEF_SHIM_COMP 0x837 /* SHIM component in ubus/6362 */
-#define OOB_ROUTER_CORE_ID 0x367 /* OOB router core ID */
-#define DEF_AI_COMP 0xfff /* Default component, in ai chips it maps all
- * unused address ranges
- */
-
-/* There are TWO constants on all HND chips: SI_ENUM_BASE above,
- * and chipcommon being the first core:
- */
-#define SI_CC_IDX 0
-
-/* SOC Interconnect types (aka chip types) */
-#define SOCI_AI 1
-
-/* Common core control flags */
-#define SICF_BIST_EN 0x8000
-#define SICF_PME_EN 0x4000
-#define SICF_CORE_BITS 0x3ffc
-#define SICF_FGC 0x0002
-#define SICF_CLOCK_EN 0x0001
-
-/* Common core status flags */
-#define SISF_BIST_DONE 0x8000
-#define SISF_BIST_ERROR 0x4000
-#define SISF_GATED_CLK 0x2000
-#define SISF_DMA64 0x1000
-#define SISF_CORE_BITS 0x0fff
-
-/* A register that is common to all cores to
- * communicate w/PMU regarding clock control.
- */
-#define SI_CLK_CTL_ST 0x1e0 /* clock control and status */
-
-/* clk_ctl_st register */
-#define CCS_FORCEALP 0x00000001 /* force ALP request */
-#define CCS_FORCEHT 0x00000002 /* force HT request */
-#define CCS_FORCEILP 0x00000004 /* force ILP request */
-#define CCS_ALPAREQ 0x00000008 /* ALP Avail Request */
-#define CCS_HTAREQ 0x00000010 /* HT Avail Request */
-#define CCS_FORCEHWREQOFF 0x00000020 /* Force HW Clock Request Off */
-#define CCS_ERSRC_REQ_MASK 0x00000700 /* external resource requests */
-#define CCS_ERSRC_REQ_SHIFT 8
-#define CCS_ALPAVAIL 0x00010000 /* ALP is available */
-#define CCS_HTAVAIL 0x00020000 /* HT is available */
-#define CCS_BP_ON_APL 0x00040000 /* RO: Backplane is running on ALP clock */
-#define CCS_BP_ON_HT 0x00080000 /* RO: Backplane is running on HT clock */
-#define CCS_ERSRC_STS_MASK 0x07000000 /* external resource status */
-#define CCS_ERSRC_STS_SHIFT 24
-
-#define CCS0_HTAVAIL 0x00010000 /* HT avail in chipc and pcmcia on 4328a0 */
-#define CCS0_ALPAVAIL 0x00020000 /* ALP avail in chipc and pcmcia on 4328a0 */
-
-/* Not really related to SOC Interconnect, but a couple of software
- * conventions for the use the flash space:
- */
-
-/* Minimum amount of flash we support */
-#define FLASH_MIN 0x00020000 /* Minimum flash size */
-
-/* A boot/binary may have an embedded block that describes its size */
-#define BISZ_OFFSET 0x3e0 /* At this offset into the binary */
-#define BISZ_MAGIC 0x4249535a /* Marked with this value: 'BISZ' */
-#define BISZ_MAGIC_IDX 0 /* Word 0: magic */
-#define BISZ_TXTST_IDX 1 /* 1: text start */
-#define BISZ_TXTEND_IDX 2 /* 2: text end */
-#define BISZ_DATAST_IDX 3 /* 3: data start */
-#define BISZ_DATAEND_IDX 4 /* 4: data end */
-#define BISZ_BSSST_IDX 5 /* 5: bss start */
-#define BISZ_BSSEND_IDX 6 /* 6: bss end */
-#define BISZ_SIZE 7 /* descriptor size in 32-bit integers */
-
-#endif /* _HNDSOC_H */
diff --git a/drivers/staging/brcm80211/include/nicpci.h b/drivers/staging/brcm80211/include/nicpci.h
deleted file mode 100644
index 30321eb0477e6..0000000000000
--- a/drivers/staging/brcm80211/include/nicpci.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _NICPCI_H
-#define _NICPCI_H
-
-#if defined(BCMSDIO) || (defined(BCMBUSTYPE) && (BCMBUSTYPE == SI_BUS))
-#define pcicore_find_pci_capability(a, b, c, d) (0)
-#define pcie_readreg(a, b, c, d) (0)
-#define pcie_writereg(a, b, c, d, e) (0)
-
-#define pcie_clkreq(a, b, c) (0)
-#define pcie_lcreg(a, b, c) (0)
-
-#define pcicore_init(a, b, c) (0x0dadbeef)
-#define pcicore_deinit(a) do { } while (0)
-#define pcicore_attach(a, b, c) do { } while (0)
-#define pcicore_hwup(a) do { } while (0)
-#define pcicore_up(a, b) do { } while (0)
-#define pcicore_sleep(a) do { } while (0)
-#define pcicore_down(a, b) do { } while (0)
-
-#define pcie_war_ovr_aspm_update(a, b) do { } while (0)
-
-#define pcicore_pcieserdesreg(a, b, c, d, e) (0)
-#define pcicore_pciereg(a, b, c, d, e) (0)
-
-#define pcicore_pmecap_fast(a) (false)
-#define pcicore_pmeen(a) do { } while (0)
-#define pcicore_pmeclr(a) do { } while (0)
-#define pcicore_pmestat(a) (false)
-#else
-struct sbpcieregs;
-
-extern u8 pcicore_find_pci_capability(void *dev, u8 req_cap_id,
- unsigned char *buf, u32 *buflen);
-extern uint pcie_readreg(struct sbpcieregs *pcieregs,
- uint addrtype, uint offset);
-extern uint pcie_writereg(struct sbpcieregs *pcieregs,
- uint addrtype, uint offset, uint val);
-
-extern u8 pcie_clkreq(void *pch, u32 mask, u32 val);
-extern u32 pcie_lcreg(void *pch, u32 mask, u32 val);
-
-extern void *pcicore_init(si_t *sih, void *pdev, void *regs);
-extern void pcicore_deinit(void *pch);
-extern void pcicore_attach(void *pch, char *pvars, int state);
-extern void pcicore_hwup(void *pch);
-extern void pcicore_up(void *pch, int state);
-extern void pcicore_sleep(void *pch);
-extern void pcicore_down(void *pch, int state);
-
-extern void pcie_war_ovr_aspm_update(void *pch, u8 aspm);
-extern u32 pcicore_pcieserdesreg(void *pch, u32 mdioslave, u32 offset,
- u32 mask, u32 val);
-
-extern u32 pcicore_pciereg(void *pch, u32 offset, u32 mask,
- u32 val, uint type);
-
-extern bool pcicore_pmecap_fast(void *pch);
-extern void pcicore_pmeen(void *pch);
-extern void pcicore_pmeclr(void *pch);
-extern bool pcicore_pmestat(void *pch);
-#endif /* defined(BCMSDIO)||(defined(BCMBUSTYPE) && (BCMBUSTYPE==SI_BUS)) */
-
-#endif /* _NICPCI_H */
diff --git a/drivers/staging/brcm80211/include/pci_core.h b/drivers/staging/brcm80211/include/pci_core.h
deleted file mode 100644
index 9153dcb8160e1..0000000000000
--- a/drivers/staging/brcm80211/include/pci_core.h
+++ /dev/null
@@ -1,122 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _PCI_CORE_H_
-#define _PCI_CORE_H_
-
-#ifndef _LANGUAGE_ASSEMBLY
-
-/* cpp contortions to concatenate w/arg prescan */
-#ifndef PAD
-#define _PADLINE(line) pad ## line
-#define _XSTR(line) _PADLINE(line)
-#define PAD _XSTR(__LINE__)
-#endif
-
-/* Sonics side: PCI core and host control registers */
-struct sbpciregs {
- u32 control; /* PCI control */
- u32 PAD[3];
- u32 arbcontrol; /* PCI arbiter control */
- u32 clkrun; /* Clkrun Control (>=rev11) */
- u32 PAD[2];
- u32 intstatus; /* Interrupt status */
- u32 intmask; /* Interrupt mask */
- u32 sbtopcimailbox; /* Sonics to PCI mailbox */
- u32 PAD[9];
- u32 bcastaddr; /* Sonics broadcast address */
- u32 bcastdata; /* Sonics broadcast data */
- u32 PAD[2];
- u32 gpioin; /* ro: gpio input (>=rev2) */
- u32 gpioout; /* rw: gpio output (>=rev2) */
- u32 gpioouten; /* rw: gpio output enable (>= rev2) */
- u32 gpiocontrol; /* rw: gpio control (>= rev2) */
- u32 PAD[36];
- u32 sbtopci0; /* Sonics to PCI translation 0 */
- u32 sbtopci1; /* Sonics to PCI translation 1 */
- u32 sbtopci2; /* Sonics to PCI translation 2 */
- u32 PAD[189];
- u32 pcicfg[4][64]; /* 0x400 - 0x7FF, PCI Cfg Space (>=rev8) */
- u16 sprom[36]; /* SPROM shadow Area */
- u32 PAD[46];
-};
-
-#endif /* _LANGUAGE_ASSEMBLY */
-
-/* PCI control */
-#define PCI_RST_OE 0x01 /* When set, drives PCI_RESET out to pin */
-#define PCI_RST 0x02 /* Value driven out to pin */
-#define PCI_CLK_OE 0x04 /* When set, drives clock as gated by PCI_CLK out to pin */
-#define PCI_CLK 0x08 /* Gate for clock driven out to pin */
-
-/* PCI arbiter control */
-#define PCI_INT_ARB 0x01 /* When set, use an internal arbiter */
-#define PCI_EXT_ARB 0x02 /* When set, use an external arbiter */
-/* ParkID - for PCI corerev >= 8 */
-#define PCI_PARKID_MASK 0x1c /* Selects which agent is parked on an idle bus */
-#define PCI_PARKID_SHIFT 2
-#define PCI_PARKID_EXT0 0 /* External master 0 */
-#define PCI_PARKID_EXT1 1 /* External master 1 */
-#define PCI_PARKID_EXT2 2 /* External master 2 */
-#define PCI_PARKID_EXT3 3 /* External master 3 (rev >= 11) */
-#define PCI_PARKID_INT 3 /* Internal master (rev < 11) */
-#define PCI11_PARKID_INT 4 /* Internal master (rev >= 11) */
-#define PCI_PARKID_LAST 4 /* Last active master (rev < 11) */
-#define PCI11_PARKID_LAST 5 /* Last active master (rev >= 11) */
-
-#define PCI_CLKRUN_DSBL 0x8000 /* Bit 15 forceClkrun */
-
-/* Interrupt status/mask */
-#define PCI_INTA 0x01 /* PCI INTA# is asserted */
-#define PCI_INTB 0x02 /* PCI INTB# is asserted */
-#define PCI_SERR 0x04 /* PCI SERR# has been asserted (write one to clear) */
-#define PCI_PERR 0x08 /* PCI PERR# has been asserted (write one to clear) */
-#define PCI_PME 0x10 /* PCI PME# is asserted */
-
-/* (General) PCI/SB mailbox interrupts, two bits per pci function */
-#define MAILBOX_F0_0 0x100 /* function 0, int 0 */
-#define MAILBOX_F0_1 0x200 /* function 0, int 1 */
-#define MAILBOX_F1_0 0x400 /* function 1, int 0 */
-#define MAILBOX_F1_1 0x800 /* function 1, int 1 */
-#define MAILBOX_F2_0 0x1000 /* function 2, int 0 */
-#define MAILBOX_F2_1 0x2000 /* function 2, int 1 */
-#define MAILBOX_F3_0 0x4000 /* function 3, int 0 */
-#define MAILBOX_F3_1 0x8000 /* function 3, int 1 */
-
-/* Sonics broadcast address */
-#define BCAST_ADDR_MASK 0xff /* Broadcast register address */
-
-/* Sonics to PCI translation types */
-#define SBTOPCI0_MASK 0xfc000000
-#define SBTOPCI1_MASK 0xfc000000
-#define SBTOPCI2_MASK 0xc0000000
-#define SBTOPCI_MEM 0
-#define SBTOPCI_IO 1
-#define SBTOPCI_CFG0 2
-#define SBTOPCI_CFG1 3
-#define SBTOPCI_PREF 0x4 /* prefetch enable */
-#define SBTOPCI_BURST 0x8 /* burst enable */
-#define SBTOPCI_RC_MASK 0x30 /* read command (>= rev11) */
-#define SBTOPCI_RC_READ 0x00 /* memory read */
-#define SBTOPCI_RC_READLINE 0x10 /* memory read line */
-#define SBTOPCI_RC_READMULTI 0x20 /* memory read multiple */
-
-/* PCI core index in SROM shadow area */
-#define SRSH_PI_OFFSET 0 /* first word */
-#define SRSH_PI_MASK 0xf000 /* bit 15:12 */
-#define SRSH_PI_SHIFT 12 /* bit 15:12 */
-
-#endif /* _PCI_CORE_H_ */
diff --git a/drivers/staging/brcm80211/include/pcie_core.h b/drivers/staging/brcm80211/include/pcie_core.h
deleted file mode 100644
index cd54ddcf45976..0000000000000
--- a/drivers/staging/brcm80211/include/pcie_core.h
+++ /dev/null
@@ -1,299 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _PCIE_CORE_H
-#define _PCIE_CORE_H
-
-/* cpp contortions to concatenate w/arg prescan */
-#ifndef PAD
-#define _PADLINE(line) pad ## line
-#define _XSTR(line) _PADLINE(line)
-#define PAD _XSTR(__LINE__)
-#endif
-
-/* PCIE Enumeration space offsets */
-#define PCIE_CORE_CONFIG_OFFSET 0x0
-#define PCIE_FUNC0_CONFIG_OFFSET 0x400
-#define PCIE_FUNC1_CONFIG_OFFSET 0x500
-#define PCIE_FUNC2_CONFIG_OFFSET 0x600
-#define PCIE_FUNC3_CONFIG_OFFSET 0x700
-#define PCIE_SPROM_SHADOW_OFFSET 0x800
-#define PCIE_SBCONFIG_OFFSET 0xE00
-
-/* PCIE Bar0 Address Mapping. Each function maps 16KB config space */
-#define PCIE_DEV_BAR0_SIZE 0x4000
-#define PCIE_BAR0_WINMAPCORE_OFFSET 0x0
-#define PCIE_BAR0_EXTSPROM_OFFSET 0x1000
-#define PCIE_BAR0_PCIECORE_OFFSET 0x2000
-#define PCIE_BAR0_CCCOREREG_OFFSET 0x3000
-
-/* different register spaces to access thr'u pcie indirect access */
-#define PCIE_CONFIGREGS 1 /* Access to config space */
-#define PCIE_PCIEREGS 2 /* Access to pcie registers */
-
-/* SB side: PCIE core and host control registers */
-typedef struct sbpcieregs {
- u32 control; /* host mode only */
- u32 PAD[2];
- u32 biststatus; /* bist Status: 0x00C */
- u32 gpiosel; /* PCIE gpio sel: 0x010 */
- u32 gpioouten; /* PCIE gpio outen: 0x14 */
- u32 PAD[2];
- u32 intstatus; /* Interrupt status: 0x20 */
- u32 intmask; /* Interrupt mask: 0x24 */
- u32 sbtopcimailbox; /* sb to pcie mailbox: 0x028 */
- u32 PAD[53];
- u32 sbtopcie0; /* sb to pcie translation 0: 0x100 */
- u32 sbtopcie1; /* sb to pcie translation 1: 0x104 */
- u32 sbtopcie2; /* sb to pcie translation 2: 0x108 */
- u32 PAD[5];
-
- /* pcie core supports in direct access to config space */
- u32 configaddr; /* pcie config space access: Address field: 0x120 */
- u32 configdata; /* pcie config space access: Data field: 0x124 */
-
- /* mdio access to serdes */
- u32 mdiocontrol; /* controls the mdio access: 0x128 */
- u32 mdiodata; /* Data to the mdio access: 0x12c */
-
- /* pcie protocol phy/dllp/tlp register indirect access mechanism */
- u32 pcieindaddr; /* indirect access to the internal register: 0x130 */
- u32 pcieinddata; /* Data to/from the internal regsiter: 0x134 */
-
- u32 clkreqenctrl; /* >= rev 6, Clkreq rdma control : 0x138 */
- u32 PAD[177];
- u32 pciecfg[4][64]; /* 0x400 - 0x7FF, PCIE Cfg Space */
- u16 sprom[64]; /* SPROM shadow Area */
-} sbpcieregs_t;
-
-/* PCI control */
-#define PCIE_RST_OE 0x01 /* When set, drives PCI_RESET out to pin */
-#define PCIE_RST 0x02 /* Value driven out to pin */
-
-#define PCIE_CFGADDR 0x120 /* offsetof(configaddr) */
-#define PCIE_CFGDATA 0x124 /* offsetof(configdata) */
-
-/* Interrupt status/mask */
-#define PCIE_INTA 0x01 /* PCIE INTA message is received */
-#define PCIE_INTB 0x02 /* PCIE INTB message is received */
-#define PCIE_INTFATAL 0x04 /* PCIE INTFATAL message is received */
-#define PCIE_INTNFATAL 0x08 /* PCIE INTNONFATAL message is received */
-#define PCIE_INTCORR 0x10 /* PCIE INTCORR message is received */
-#define PCIE_INTPME 0x20 /* PCIE INTPME message is received */
-
-/* SB to PCIE translation masks */
-#define SBTOPCIE0_MASK 0xfc000000
-#define SBTOPCIE1_MASK 0xfc000000
-#define SBTOPCIE2_MASK 0xc0000000
-
-/* Access type bits (0:1) */
-#define SBTOPCIE_MEM 0
-#define SBTOPCIE_IO 1
-#define SBTOPCIE_CFG0 2
-#define SBTOPCIE_CFG1 3
-
-/* Prefetch enable bit 2 */
-#define SBTOPCIE_PF 4
-
-/* Write Burst enable for memory write bit 3 */
-#define SBTOPCIE_WR_BURST 8
-
-/* config access */
-#define CONFIGADDR_FUNC_MASK 0x7000
-#define CONFIGADDR_FUNC_SHF 12
-#define CONFIGADDR_REG_MASK 0x0FFF
-#define CONFIGADDR_REG_SHF 0
-
-#define PCIE_CONFIG_INDADDR(f, r) \
- ((((f) & CONFIGADDR_FUNC_MASK) << CONFIGADDR_FUNC_SHF) | \
- (((r) & CONFIGADDR_REG_MASK) << CONFIGADDR_REG_SHF))
-
-/* PCIE protocol regs Indirect Address */
-#define PCIEADDR_PROT_MASK 0x300
-#define PCIEADDR_PROT_SHF 8
-#define PCIEADDR_PL_TLP 0
-#define PCIEADDR_PL_DLLP 1
-#define PCIEADDR_PL_PLP 2
-
-/* PCIE protocol PHY diagnostic registers */
-#define PCIE_PLP_MODEREG 0x200 /* Mode */
-#define PCIE_PLP_STATUSREG 0x204 /* Status */
-#define PCIE_PLP_LTSSMCTRLREG 0x208 /* LTSSM control */
-#define PCIE_PLP_LTLINKNUMREG 0x20c /* Link Training Link number */
-#define PCIE_PLP_LTLANENUMREG 0x210 /* Link Training Lane number */
-#define PCIE_PLP_LTNFTSREG 0x214 /* Link Training N_FTS */
-#define PCIE_PLP_ATTNREG 0x218 /* Attention */
-#define PCIE_PLP_ATTNMASKREG 0x21C /* Attention Mask */
-#define PCIE_PLP_RXERRCTR 0x220 /* Rx Error */
-#define PCIE_PLP_RXFRMERRCTR 0x224 /* Rx Framing Error */
-#define PCIE_PLP_RXERRTHRESHREG 0x228 /* Rx Error threshold */
-#define PCIE_PLP_TESTCTRLREG 0x22C /* Test Control reg */
-#define PCIE_PLP_SERDESCTRLOVRDREG 0x230 /* SERDES Control Override */
-#define PCIE_PLP_TIMINGOVRDREG 0x234 /* Timing param override */
-#define PCIE_PLP_RXTXSMDIAGREG 0x238 /* RXTX State Machine Diag */
-#define PCIE_PLP_LTSSMDIAGREG 0x23C /* LTSSM State Machine Diag */
-
-/* PCIE protocol DLLP diagnostic registers */
-#define PCIE_DLLP_LCREG 0x100 /* Link Control */
-#define PCIE_DLLP_LSREG 0x104 /* Link Status */
-#define PCIE_DLLP_LAREG 0x108 /* Link Attention */
-#define PCIE_DLLP_LAMASKREG 0x10C /* Link Attention Mask */
-#define PCIE_DLLP_NEXTTXSEQNUMREG 0x110 /* Next Tx Seq Num */
-#define PCIE_DLLP_ACKEDTXSEQNUMREG 0x114 /* Acked Tx Seq Num */
-#define PCIE_DLLP_PURGEDTXSEQNUMREG 0x118 /* Purged Tx Seq Num */
-#define PCIE_DLLP_RXSEQNUMREG 0x11C /* Rx Sequence Number */
-#define PCIE_DLLP_LRREG 0x120 /* Link Replay */
-#define PCIE_DLLP_LACKTOREG 0x124 /* Link Ack Timeout */
-#define PCIE_DLLP_PMTHRESHREG 0x128 /* Power Management Threshold */
-#define PCIE_DLLP_RTRYWPREG 0x12C /* Retry buffer write ptr */
-#define PCIE_DLLP_RTRYRPREG 0x130 /* Retry buffer Read ptr */
-#define PCIE_DLLP_RTRYPPREG 0x134 /* Retry buffer Purged ptr */
-#define PCIE_DLLP_RTRRWREG 0x138 /* Retry buffer Read/Write */
-#define PCIE_DLLP_ECTHRESHREG 0x13C /* Error Count Threshold */
-#define PCIE_DLLP_TLPERRCTRREG 0x140 /* TLP Error Counter */
-#define PCIE_DLLP_ERRCTRREG 0x144 /* Error Counter */
-#define PCIE_DLLP_NAKRXCTRREG 0x148 /* NAK Received Counter */
-#define PCIE_DLLP_TESTREG 0x14C /* Test */
-#define PCIE_DLLP_PKTBIST 0x150 /* Packet BIST */
-#define PCIE_DLLP_PCIE11 0x154 /* DLLP PCIE 1.1 reg */
-
-#define PCIE_DLLP_LSREG_LINKUP (1 << 16)
-
-/* PCIE protocol TLP diagnostic registers */
-#define PCIE_TLP_CONFIGREG 0x000 /* Configuration */
-#define PCIE_TLP_WORKAROUNDSREG 0x004 /* TLP Workarounds */
-#define PCIE_TLP_WRDMAUPPER 0x010 /* Write DMA Upper Address */
-#define PCIE_TLP_WRDMALOWER 0x014 /* Write DMA Lower Address */
-#define PCIE_TLP_WRDMAREQ_LBEREG 0x018 /* Write DMA Len/ByteEn Req */
-#define PCIE_TLP_RDDMAUPPER 0x01C /* Read DMA Upper Address */
-#define PCIE_TLP_RDDMALOWER 0x020 /* Read DMA Lower Address */
-#define PCIE_TLP_RDDMALENREG 0x024 /* Read DMA Len Req */
-#define PCIE_TLP_MSIDMAUPPER 0x028 /* MSI DMA Upper Address */
-#define PCIE_TLP_MSIDMALOWER 0x02C /* MSI DMA Lower Address */
-#define PCIE_TLP_MSIDMALENREG 0x030 /* MSI DMA Len Req */
-#define PCIE_TLP_SLVREQLENREG 0x034 /* Slave Request Len */
-#define PCIE_TLP_FCINPUTSREQ 0x038 /* Flow Control Inputs */
-#define PCIE_TLP_TXSMGRSREQ 0x03C /* Tx StateMachine and Gated Req */
-#define PCIE_TLP_ADRACKCNTARBLEN 0x040 /* Address Ack XferCnt and ARB Len */
-#define PCIE_TLP_DMACPLHDR0 0x044 /* DMA Completion Hdr 0 */
-#define PCIE_TLP_DMACPLHDR1 0x048 /* DMA Completion Hdr 1 */
-#define PCIE_TLP_DMACPLHDR2 0x04C /* DMA Completion Hdr 2 */
-#define PCIE_TLP_DMACPLMISC0 0x050 /* DMA Completion Misc0 */
-#define PCIE_TLP_DMACPLMISC1 0x054 /* DMA Completion Misc1 */
-#define PCIE_TLP_DMACPLMISC2 0x058 /* DMA Completion Misc2 */
-#define PCIE_TLP_SPTCTRLLEN 0x05C /* Split Controller Req len */
-#define PCIE_TLP_SPTCTRLMSIC0 0x060 /* Split Controller Misc 0 */
-#define PCIE_TLP_SPTCTRLMSIC1 0x064 /* Split Controller Misc 1 */
-#define PCIE_TLP_BUSDEVFUNC 0x068 /* Bus/Device/Func */
-#define PCIE_TLP_RESETCTR 0x06C /* Reset Counter */
-#define PCIE_TLP_RTRYBUF 0x070 /* Retry Buffer value */
-#define PCIE_TLP_TGTDEBUG1 0x074 /* Target Debug Reg1 */
-#define PCIE_TLP_TGTDEBUG2 0x078 /* Target Debug Reg2 */
-#define PCIE_TLP_TGTDEBUG3 0x07C /* Target Debug Reg3 */
-#define PCIE_TLP_TGTDEBUG4 0x080 /* Target Debug Reg4 */
-
-/* MDIO control */
-#define MDIOCTL_DIVISOR_MASK 0x7f /* clock to be used on MDIO */
-#define MDIOCTL_DIVISOR_VAL 0x2
-#define MDIOCTL_PREAM_EN 0x80 /* Enable preamble sequnce */
-#define MDIOCTL_ACCESS_DONE 0x100 /* Tranaction complete */
-
-/* MDIO Data */
-#define MDIODATA_MASK 0x0000ffff /* data 2 bytes */
-#define MDIODATA_TA 0x00020000 /* Turnaround */
-#define MDIODATA_REGADDR_SHF_OLD 18 /* Regaddr shift (rev < 10) */
-#define MDIODATA_REGADDR_MASK_OLD 0x003c0000 /* Regaddr Mask (rev < 10) */
-#define MDIODATA_DEVADDR_SHF_OLD 22 /* Physmedia devaddr shift (rev < 10) */
-#define MDIODATA_DEVADDR_MASK_OLD 0x0fc00000 /* Physmedia devaddr Mask (rev < 10) */
-#define MDIODATA_REGADDR_SHF 18 /* Regaddr shift */
-#define MDIODATA_REGADDR_MASK 0x007c0000 /* Regaddr Mask */
-#define MDIODATA_DEVADDR_SHF 23 /* Physmedia devaddr shift */
-#define MDIODATA_DEVADDR_MASK 0x0f800000 /* Physmedia devaddr Mask */
-#define MDIODATA_WRITE 0x10000000 /* write Transaction */
-#define MDIODATA_READ 0x20000000 /* Read Transaction */
-#define MDIODATA_START 0x40000000 /* start of Transaction */
-
-#define MDIODATA_DEV_ADDR 0x0 /* dev address for serdes */
-#define MDIODATA_BLK_ADDR 0x1F /* blk address for serdes */
-
-/* MDIO devices (SERDES modules)
- * unlike old pcie cores (rev < 10), rev10 pcie serde organizes registers into a few blocks.
- * two layers mapping (blockidx, register offset) is required
- */
-#define MDIO_DEV_IEEE0 0x000
-#define MDIO_DEV_IEEE1 0x001
-#define MDIO_DEV_BLK0 0x800
-#define MDIO_DEV_BLK1 0x801
-#define MDIO_DEV_BLK2 0x802
-#define MDIO_DEV_BLK3 0x803
-#define MDIO_DEV_BLK4 0x804
-#define MDIO_DEV_TXPLL 0x808 /* TXPLL register block idx */
-#define MDIO_DEV_TXCTRL0 0x820
-#define MDIO_DEV_SERDESID 0x831
-#define MDIO_DEV_RXCTRL0 0x840
-
-/* serdes regs (rev < 10) */
-#define MDIODATA_DEV_PLL 0x1d /* SERDES PLL Dev */
-#define MDIODATA_DEV_TX 0x1e /* SERDES TX Dev */
-#define MDIODATA_DEV_RX 0x1f /* SERDES RX Dev */
- /* SERDES RX registers */
-#define SERDES_RX_CTRL 1 /* Rx cntrl */
-#define SERDES_RX_TIMER1 2 /* Rx Timer1 */
-#define SERDES_RX_CDR 6 /* CDR */
-#define SERDES_RX_CDRBW 7 /* CDR BW */
-
- /* SERDES RX control register */
-#define SERDES_RX_CTRL_FORCE 0x80 /* rxpolarity_force */
-#define SERDES_RX_CTRL_POLARITY 0x40 /* rxpolarity_value */
-
- /* SERDES PLL registers */
-#define SERDES_PLL_CTRL 1 /* PLL control reg */
-#define PLL_CTRL_FREQDET_EN 0x4000 /* bit 14 is FREQDET on */
-
-/* Power management threshold */
-#define PCIE_L0THRESHOLDTIME_MASK 0xFF00 /* bits 0 - 7 */
-#define PCIE_L1THRESHOLDTIME_MASK 0xFF00 /* bits 8 - 15 */
-#define PCIE_L1THRESHOLDTIME_SHIFT 8 /* PCIE_L1THRESHOLDTIME_SHIFT */
-#define PCIE_L1THRESHOLD_WARVAL 0x72 /* WAR value */
-#define PCIE_ASPMTIMER_EXTEND 0x01000000 /* > rev7: enable extend ASPM timer */
-
-/* SPROM offsets */
-#define SRSH_ASPM_OFFSET 4 /* word 4 */
-#define SRSH_ASPM_ENB 0x18 /* bit 3, 4 */
-#define SRSH_ASPM_L1_ENB 0x10 /* bit 4 */
-#define SRSH_ASPM_L0s_ENB 0x8 /* bit 3 */
-#define SRSH_PCIE_MISC_CONFIG 5 /* word 5 */
-#define SRSH_L23READY_EXIT_NOPERST 0x8000 /* bit 15 */
-#define SRSH_CLKREQ_OFFSET_REV5 20 /* word 20 for srom rev <= 5 */
-#define SRSH_CLKREQ_OFFSET_REV8 52 /* word 52 for srom rev 8 */
-#define SRSH_CLKREQ_ENB 0x0800 /* bit 11 */
-#define SRSH_BD_OFFSET 6 /* word 6 */
-#define SRSH_AUTOINIT_OFFSET 18 /* auto initialization enable */
-
-/* Linkcontrol reg offset in PCIE Cap */
-#define PCIE_CAP_LINKCTRL_OFFSET 16 /* linkctrl offset in pcie cap */
-#define PCIE_CAP_LCREG_ASPML0s 0x01 /* ASPM L0s in linkctrl */
-#define PCIE_CAP_LCREG_ASPML1 0x02 /* ASPM L1 in linkctrl */
-#define PCIE_CLKREQ_ENAB 0x100 /* CLKREQ Enab in linkctrl */
-
-#define PCIE_ASPM_ENAB 3 /* ASPM L0s & L1 in linkctrl */
-#define PCIE_ASPM_L1_ENAB 2 /* ASPM L0s & L1 in linkctrl */
-#define PCIE_ASPM_L0s_ENAB 1 /* ASPM L0s & L1 in linkctrl */
-#define PCIE_ASPM_DISAB 0 /* ASPM L0s & L1 in linkctrl */
-
-/* Status reg PCIE_PLP_STATUSREG */
-#define PCIE_PLP_POLARITYINV_STAT 0x10
-#endif /* _PCIE_CORE_H */
diff --git a/drivers/staging/brcm80211/include/proto/802.11.h b/drivers/staging/brcm80211/include/proto/802.11.h
deleted file mode 100644
index 374125d770b93..0000000000000
--- a/drivers/staging/brcm80211/include/proto/802.11.h
+++ /dev/null
@@ -1,200 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _802_11_H_
-#define _802_11_H_
-
-#include <linux/if_ether.h>
-
-#define DOT11_A3_HDR_LEN 24
-#define DOT11_A4_HDR_LEN 30
-#define DOT11_MAC_HDR_LEN DOT11_A3_HDR_LEN
-#define DOT11_ICV_AES_LEN 8
-#define DOT11_QOS_LEN 2
-
-#define DOT11_IV_MAX_LEN 8
-
-#define DOT11_DEFAULT_RTS_LEN 2347
-
-#define DOT11_MIN_FRAG_LEN 256
-#define DOT11_MAX_FRAG_LEN 2346
-#define DOT11_DEFAULT_FRAG_LEN 2346
-
-#define DOT11_MIN_BEACON_PERIOD 1
-#define DOT11_MAX_BEACON_PERIOD 0xFFFF
-
-#define DOT11_MIN_DTIM_PERIOD 1
-#define DOT11_MAX_DTIM_PERIOD 0xFF
-
-#define DOT11_OUI_LEN 3
-
-#define DOT11_RTS_LEN 16
-#define DOT11_CTS_LEN 10
-#define DOT11_ACK_LEN 10
-
-#define DOT11_BA_BITMAP_LEN 128
-#define DOT11_BA_LEN 4
-
-#define WME_OUI "\x00\x50\xf2"
-#define WME_VER 1
-#define WME_TYPE 2
-#define WME_SUBTYPE_PARAM_IE 1
-
-#define AC_BE 0
-#define AC_BK 1
-#define AC_VI 2
-#define AC_VO 3
-#define AC_COUNT 4
-
-typedef u8 ac_bitmap_t;
-
-#define AC_BITMAP_ALL 0xf
-#define AC_BITMAP_TST(ab, ac) (((ab) & (1 << (ac))) != 0)
-
-struct edcf_acparam {
- u8 ACI;
- u8 ECW;
- u16 TXOP;
-} __attribute__((packed));
-typedef struct edcf_acparam edcf_acparam_t;
-
-struct wme_param_ie {
- u8 oui[3];
- u8 type;
- u8 subtype;
- u8 version;
- u8 qosinfo;
- u8 rsvd;
- edcf_acparam_t acparam[AC_COUNT];
-} __attribute__((packed));
-typedef struct wme_param_ie wme_param_ie_t;
-#define WME_PARAM_IE_LEN 24
-
-#define EDCF_AIFSN_MIN 1
-#define EDCF_AIFSN_MAX 15
-#define EDCF_AIFSN_MASK 0x0f
-#define EDCF_ACM_MASK 0x10
-#define EDCF_ACI_MASK 0x60
-#define EDCF_ACI_SHIFT 5
-
-#define EDCF_ECW2CW(exp) ((1 << (exp)) - 1)
-#define EDCF_ECWMIN_MASK 0x0f
-#define EDCF_ECWMAX_MASK 0xf0
-#define EDCF_ECWMAX_SHIFT 4
-
-#define EDCF_TXOP2USEC(txop) ((txop) << 5)
-
-#define EDCF_AC_BE_ACI_STA 0x03
-#define EDCF_AC_BE_ECW_STA 0xA4
-#define EDCF_AC_BE_TXOP_STA 0x0000
-#define EDCF_AC_BK_ACI_STA 0x27
-#define EDCF_AC_BK_ECW_STA 0xA4
-#define EDCF_AC_BK_TXOP_STA 0x0000
-#define EDCF_AC_VI_ACI_STA 0x42
-#define EDCF_AC_VI_ECW_STA 0x43
-#define EDCF_AC_VI_TXOP_STA 0x005e
-#define EDCF_AC_VO_ACI_STA 0x62
-#define EDCF_AC_VO_ECW_STA 0x32
-#define EDCF_AC_VO_TXOP_STA 0x002f
-
-#define EDCF_AC_VO_TXOP_AP 0x002f
-
-#define SEQNUM_SHIFT 4
-#define SEQNUM_MAX 0x1000
-#define FRAGNUM_MASK 0xF
-
-#define DOT11_MNG_RSN_ID 48
-#define DOT11_MNG_WPA_ID 221
-#define DOT11_MNG_VS_ID 221
-
-#define DOT11_BSSTYPE_INFRASTRUCTURE 0
-#define DOT11_BSSTYPE_ANY 2
-#define DOT11_SCANTYPE_ACTIVE 0
-
-#define PREN_PREAMBLE 24
-#define PREN_MM_EXT 12
-#define PREN_PREAMBLE_EXT 4
-
-#define RIFS_11N_TIME 2
-
-#define APHY_SLOT_TIME 9
-#define APHY_SIFS_TIME 16
-#define APHY_PREAMBLE_TIME 16
-#define APHY_SIGNAL_TIME 4
-#define APHY_SYMBOL_TIME 4
-#define APHY_SERVICE_NBITS 16
-#define APHY_TAIL_NBITS 6
-#define APHY_CWMIN 15
-
-#define BPHY_SLOT_TIME 20
-#define BPHY_SIFS_TIME 10
-#define BPHY_PLCP_TIME 192
-#define BPHY_PLCP_SHORT_TIME 96
-
-#define DOT11_OFDM_SIGNAL_EXTENSION 6
-
-#define PHY_CWMAX 1023
-
-#define DOT11_MAXNUMFRAGS 16
-
-typedef struct d11cnt {
- u32 txfrag;
- u32 txmulti;
- u32 txfail;
- u32 txretry;
- u32 txretrie;
- u32 rxdup;
- u32 txrts;
- u32 txnocts;
- u32 txnoack;
- u32 rxfrag;
- u32 rxmulti;
- u32 rxcrc;
- u32 txfrmsnt;
- u32 rxundec;
-} d11cnt_t;
-
-#define MCSSET_LEN 16
-
-#define HT_CAP_IE_LEN 26
-
-#define HT_CAP_RX_STBC_NO 0x0
-#define HT_CAP_RX_STBC_ONE_STREAM 0x1
-
-#define AMPDU_MAX_MPDU_DENSITY IEEE80211_HT_MPDU_DENSITY_16
-
-#define AMPDU_DELIMITER_LEN 4
-
-#define DOT11N_TXBURST 0x0008
-
-#define WPA_VERSION 1
-#define WPA_OUI "\x00\x50\xF2"
-
-#define WFA_OUI "\x00\x50\xF2"
-#define WFA_OUI_LEN 3
-
-#define WFA_OUI_TYPE_WPA 1
-
-#define RSN_AKM_NONE 0
-#define RSN_AKM_UNSPECIFIED 1
-#define RSN_AKM_PSK 2
-
-#define DOT11_MAX_DEFAULT_KEYS 4
-#define DOT11_WPA_KEY_RSC_LEN 8
-
-#define BRCM_OUI "\x00\x10\x18"
-
-#endif /* _802_11_H_ */
diff --git a/drivers/staging/brcm80211/include/proto/bcmeth.h b/drivers/staging/brcm80211/include/proto/bcmeth.h
deleted file mode 100644
index e98ee654458d1..0000000000000
--- a/drivers/staging/brcm80211/include/proto/bcmeth.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _BCMETH_H_
-#define _BCMETH_H_
-
-#define BCMILCP_SUBTYPE_RATE 1
-#define BCMILCP_SUBTYPE_LINK 2
-#define BCMILCP_SUBTYPE_CSA 3
-#define BCMILCP_SUBTYPE_LARQ 4
-#define BCMILCP_SUBTYPE_VENDOR 5
-#define BCMILCP_SUBTYPE_FLH 17
-#define BCMILCP_SUBTYPE_VENDOR_LONG 32769
-#define BCMILCP_SUBTYPE_CERT 32770
-#define BCMILCP_SUBTYPE_SES 32771
-#define BCMILCP_BCM_SUBTYPE_RESERVED 0
-#define BCMILCP_BCM_SUBTYPE_EVENT 1
-#define BCMILCP_BCM_SUBTYPE_SES 2
-#define BCMILCP_BCM_SUBTYPE_DPT 4
-#define BCMILCP_BCM_SUBTYPEHDR_MINLENGTH 8
-#define BCMILCP_BCM_SUBTYPEHDR_VERSION 0
-
-typedef struct bcmeth_hdr {
- u16 subtype;
- u16 length;
- u8 version;
- u8 oui[3];
- u16 usr_subtype;
-} __attribute__((packed)) bcmeth_hdr_t;
-
-#endif /* _BCMETH_H_ */
diff --git a/drivers/staging/brcm80211/include/proto/bcmevent.h b/drivers/staging/brcm80211/include/proto/bcmevent.h
deleted file mode 100644
index 1b60789aef05f..0000000000000
--- a/drivers/staging/brcm80211/include/proto/bcmevent.h
+++ /dev/null
@@ -1,207 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _BCMEVENT_H_
-#define _BCMEVENT_H_
-
-#include <linux/if_ether.h>
-
-#define BCM_EVENT_MSG_VERSION 1
-#define BCM_MSG_IFNAME_MAX 16
-
-#define WLC_EVENT_MSG_LINK 0x01
-#define WLC_EVENT_MSG_FLUSHTXQ 0x02
-#define WLC_EVENT_MSG_GROUP 0x04
-
-typedef struct {
- u16 version;
- u16 flags;
- u32 event_type;
- u32 status;
- u32 reason;
- u32 auth_type;
- u32 datalen;
- u8 addr[ETH_ALEN];
- char ifname[BCM_MSG_IFNAME_MAX];
-} __attribute__((packed)) wl_event_msg_t;
-
-#ifdef BRCM_FULLMAC
-typedef struct bcm_event {
- struct ethhdr eth;
- bcmeth_hdr_t bcm_hdr;
- wl_event_msg_t event;
-} __attribute__((packed)) bcm_event_t;
-#endif
-#define BCM_MSG_LEN (sizeof(bcm_event_t) - sizeof(bcmeth_hdr_t) - \
- sizeof(struct ether_header))
-
-#define WLC_E_SET_SSID 0
-#define WLC_E_JOIN 1
-#define WLC_E_START 2
-#define WLC_E_AUTH 3
-#define WLC_E_AUTH_IND 4
-#define WLC_E_DEAUTH 5
-#define WLC_E_DEAUTH_IND 6
-#define WLC_E_ASSOC 7
-#define WLC_E_ASSOC_IND 8
-#define WLC_E_REASSOC 9
-#define WLC_E_REASSOC_IND 10
-#define WLC_E_DISASSOC 11
-#define WLC_E_DISASSOC_IND 12
-#define WLC_E_QUIET_START 13
-#define WLC_E_QUIET_END 14
-#define WLC_E_BEACON_RX 15
-#define WLC_E_LINK 16
-#define WLC_E_MIC_ERROR 17
-#define WLC_E_NDIS_LINK 18
-#define WLC_E_ROAM 19
-#define WLC_E_TXFAIL 20
-#define WLC_E_PMKID_CACHE 21
-#define WLC_E_RETROGRADE_TSF 22
-#define WLC_E_PRUNE 23
-#define WLC_E_AUTOAUTH 24
-#define WLC_E_EAPOL_MSG 25
-#define WLC_E_SCAN_COMPLETE 26
-#define WLC_E_ADDTS_IND 27
-#define WLC_E_DELTS_IND 28
-#define WLC_E_BCNSENT_IND 29
-#define WLC_E_BCNRX_MSG 30
-#define WLC_E_BCNLOST_MSG 31
-#define WLC_E_ROAM_PREP 32
-#define WLC_E_PFN_NET_FOUND 33
-#define WLC_E_PFN_NET_LOST 34
-#define WLC_E_RESET_COMPLETE 35
-#define WLC_E_JOIN_START 36
-#define WLC_E_ROAM_START 37
-#define WLC_E_ASSOC_START 38
-#define WLC_E_IBSS_ASSOC 39
-#define WLC_E_RADIO 40
-#define WLC_E_PSM_WATCHDOG 41
-#define WLC_E_PROBREQ_MSG 44
-#define WLC_E_SCAN_CONFIRM_IND 45
-#define WLC_E_PSK_SUP 46
-#define WLC_E_COUNTRY_CODE_CHANGED 47
-#define WLC_E_EXCEEDED_MEDIUM_TIME 48
-#define WLC_E_ICV_ERROR 49
-#define WLC_E_UNICAST_DECODE_ERROR 50
-#define WLC_E_MULTICAST_DECODE_ERROR 51
-#define WLC_E_TRACE 52
-#define WLC_E_IF 54
-#define WLC_E_RSSI 56
-#define WLC_E_PFN_SCAN_COMPLETE 57
-#define WLC_E_EXTLOG_MSG 58
-#define WLC_E_ACTION_FRAME 59
-#define WLC_E_ACTION_FRAME_COMPLETE 60
-#define WLC_E_PRE_ASSOC_IND 61
-#define WLC_E_PRE_REASSOC_IND 62
-#define WLC_E_CHANNEL_ADOPTED 63
-#define WLC_E_AP_STARTED 64
-#define WLC_E_DFS_AP_STOP 65
-#define WLC_E_DFS_AP_RESUME 66
-#define WLC_E_RESERVED1 67
-#define WLC_E_RESERVED2 68
-#define WLC_E_ESCAN_RESULT 69
-#define WLC_E_ACTION_FRAME_OFF_CHAN_COMPLETE 70
-#define WLC_E_DCS_REQUEST 73
-
-#define WLC_E_FIFO_CREDIT_MAP 74
-
-#define WLC_E_LAST 75
-
-typedef struct {
- uint event;
- const char *name;
-} bcmevent_name_t;
-
-extern const bcmevent_name_t bcmevent_names[];
-extern const int bcmevent_names_size;
-
-#define WLC_E_STATUS_SUCCESS 0
-#define WLC_E_STATUS_FAIL 1
-#define WLC_E_STATUS_TIMEOUT 2
-#define WLC_E_STATUS_NO_NETWORKS 3
-#define WLC_E_STATUS_ABORT 4
-#define WLC_E_STATUS_NO_ACK 5
-#define WLC_E_STATUS_UNSOLICITED 6
-#define WLC_E_STATUS_ATTEMPT 7
-#define WLC_E_STATUS_PARTIAL 8
-#define WLC_E_STATUS_NEWSCAN 9
-#define WLC_E_STATUS_NEWASSOC 10
-#define WLC_E_STATUS_11HQUIET 11
-#define WLC_E_STATUS_SUPPRESS 12
-#define WLC_E_STATUS_NOCHANS 13
-#define WLC_E_STATUS_CS_ABORT 15
-#define WLC_E_STATUS_ERROR 16
-
-#define WLC_E_REASON_INITIAL_ASSOC 0
-#define WLC_E_REASON_LOW_RSSI 1
-#define WLC_E_REASON_DEAUTH 2
-#define WLC_E_REASON_DISASSOC 3
-#define WLC_E_REASON_BCNS_LOST 4
-#define WLC_E_REASON_MINTXRATE 9
-#define WLC_E_REASON_TXFAIL 10
-
-#define WLC_E_REASON_FAST_ROAM_FAILED 5
-#define WLC_E_REASON_DIRECTED_ROAM 6
-#define WLC_E_REASON_TSPEC_REJECTED 7
-#define WLC_E_REASON_BETTER_AP 8
-
-#define WLC_E_PRUNE_ENCR_MISMATCH 1
-#define WLC_E_PRUNE_BCAST_BSSID 2
-#define WLC_E_PRUNE_MAC_DENY 3
-#define WLC_E_PRUNE_MAC_NA 4
-#define WLC_E_PRUNE_REG_PASSV 5
-#define WLC_E_PRUNE_SPCT_MGMT 6
-#define WLC_E_PRUNE_RADAR 7
-#define WLC_E_RSN_MISMATCH 8
-#define WLC_E_PRUNE_NO_COMMON_RATES 9
-#define WLC_E_PRUNE_BASIC_RATES 10
-#define WLC_E_PRUNE_CIPHER_NA 12
-#define WLC_E_PRUNE_KNOWN_STA 13
-#define WLC_E_PRUNE_WDS_PEER 15
-#define WLC_E_PRUNE_QBSS_LOAD 16
-#define WLC_E_PRUNE_HOME_AP 17
-
-#define WLC_E_SUP_OTHER 0
-#define WLC_E_SUP_DECRYPT_KEY_DATA 1
-#define WLC_E_SUP_BAD_UCAST_WEP128 2
-#define WLC_E_SUP_BAD_UCAST_WEP40 3
-#define WLC_E_SUP_UNSUP_KEY_LEN 4
-#define WLC_E_SUP_PW_KEY_CIPHER 5
-#define WLC_E_SUP_MSG3_TOO_MANY_IE 6
-#define WLC_E_SUP_MSG3_IE_MISMATCH 7
-#define WLC_E_SUP_NO_INSTALL_FLAG 8
-#define WLC_E_SUP_MSG3_NO_GTK 9
-#define WLC_E_SUP_GRP_KEY_CIPHER 10
-#define WLC_E_SUP_GRP_MSG1_NO_GTK 11
-#define WLC_E_SUP_GTK_DECRYPT_FAIL 12
-#define WLC_E_SUP_SEND_FAIL 13
-#define WLC_E_SUP_DEAUTH 14
-
-#define WLC_E_IF_ADD 1
-#define WLC_E_IF_DEL 2
-#define WLC_E_IF_CHANGE 3
-
-#define WLC_E_IF_ROLE_STA 0
-#define WLC_E_IF_ROLE_AP 1
-#define WLC_E_IF_ROLE_WDS 2
-
-#define WLC_E_LINK_BCN_LOSS 1
-#define WLC_E_LINK_DISASSOC 2
-#define WLC_E_LINK_ASSOC_REC 3
-#define WLC_E_LINK_BSSCFG_DIS 4
-
-#endif /* _BCMEVENT_H_ */
diff --git a/drivers/staging/brcm80211/include/sbchipc.h b/drivers/staging/brcm80211/include/sbchipc.h
deleted file mode 100644
index 8c01c638ab8dd..0000000000000
--- a/drivers/staging/brcm80211/include/sbchipc.h
+++ /dev/null
@@ -1,1588 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _SBCHIPC_H
-#define _SBCHIPC_H
-
-#ifndef _LANGUAGE_ASSEMBLY
-
-/* cpp contortions to concatenate w/arg prescan */
-#ifndef PAD
-#define _PADLINE(line) pad ## line
-#define _XSTR(line) _PADLINE(line)
-#define PAD _XSTR(__LINE__)
-#endif /* PAD */
-
-typedef volatile struct {
- u32 chipid; /* 0x0 */
- u32 capabilities;
- u32 corecontrol; /* corerev >= 1 */
- u32 bist;
-
- /* OTP */
- u32 otpstatus; /* 0x10, corerev >= 10 */
- u32 otpcontrol;
- u32 otpprog;
- u32 otplayout; /* corerev >= 23 */
-
- /* Interrupt control */
- u32 intstatus; /* 0x20 */
- u32 intmask;
-
- /* Chip specific regs */
- u32 chipcontrol; /* 0x28, rev >= 11 */
- u32 chipstatus; /* 0x2c, rev >= 11 */
-
- /* Jtag Master */
- u32 jtagcmd; /* 0x30, rev >= 10 */
- u32 jtagir;
- u32 jtagdr;
- u32 jtagctrl;
-
- /* serial flash interface registers */
- u32 flashcontrol; /* 0x40 */
- u32 flashaddress;
- u32 flashdata;
- u32 PAD[1];
-
- /* Silicon backplane configuration broadcast control */
- u32 broadcastaddress; /* 0x50 */
- u32 broadcastdata;
-
- /* gpio - cleared only by power-on-reset */
- u32 gpiopullup; /* 0x58, corerev >= 20 */
- u32 gpiopulldown; /* 0x5c, corerev >= 20 */
- u32 gpioin; /* 0x60 */
- u32 gpioout; /* 0x64 */
- u32 gpioouten; /* 0x68 */
- u32 gpiocontrol; /* 0x6C */
- u32 gpiointpolarity; /* 0x70 */
- u32 gpiointmask; /* 0x74 */
-
- /* GPIO events corerev >= 11 */
- u32 gpioevent;
- u32 gpioeventintmask;
-
- /* Watchdog timer */
- u32 watchdog; /* 0x80 */
-
- /* GPIO events corerev >= 11 */
- u32 gpioeventintpolarity;
-
- /* GPIO based LED powersave registers corerev >= 16 */
- u32 gpiotimerval; /* 0x88 */
- u32 gpiotimeroutmask;
-
- /* clock control */
- u32 clockcontrol_n; /* 0x90 */
- u32 clockcontrol_sb; /* aka m0 */
- u32 clockcontrol_pci; /* aka m1 */
- u32 clockcontrol_m2; /* mii/uart/mipsref */
- u32 clockcontrol_m3; /* cpu */
- u32 clkdiv; /* corerev >= 3 */
- u32 gpiodebugsel; /* corerev >= 28 */
- u32 capabilities_ext; /* 0xac */
-
- /* pll delay registers (corerev >= 4) */
- u32 pll_on_delay; /* 0xb0 */
- u32 fref_sel_delay;
- u32 slow_clk_ctl; /* 5 < corerev < 10 */
- u32 PAD;
-
- /* Instaclock registers (corerev >= 10) */
- u32 system_clk_ctl; /* 0xc0 */
- u32 clkstatestretch;
- u32 PAD[2];
-
- /* Indirect backplane access (corerev >= 22) */
- u32 bp_addrlow; /* 0xd0 */
- u32 bp_addrhigh;
- u32 bp_data;
- u32 PAD;
- u32 bp_indaccess;
- u32 PAD[3];
-
- /* More clock dividers (corerev >= 32) */
- u32 clkdiv2;
- u32 PAD[2];
-
- /* In AI chips, pointer to erom */
- u32 eromptr; /* 0xfc */
-
- /* ExtBus control registers (corerev >= 3) */
- u32 pcmcia_config; /* 0x100 */
- u32 pcmcia_memwait;
- u32 pcmcia_attrwait;
- u32 pcmcia_iowait;
- u32 ide_config;
- u32 ide_memwait;
- u32 ide_attrwait;
- u32 ide_iowait;
- u32 prog_config;
- u32 prog_waitcount;
- u32 flash_config;
- u32 flash_waitcount;
- u32 SECI_config; /* 0x130 SECI configuration */
- u32 PAD[3];
-
- /* Enhanced Coexistence Interface (ECI) registers (corerev >= 21) */
- u32 eci_output; /* 0x140 */
- u32 eci_control;
- u32 eci_inputlo;
- u32 eci_inputmi;
- u32 eci_inputhi;
- u32 eci_inputintpolaritylo;
- u32 eci_inputintpolaritymi;
- u32 eci_inputintpolarityhi;
- u32 eci_intmasklo;
- u32 eci_intmaskmi;
- u32 eci_intmaskhi;
- u32 eci_eventlo;
- u32 eci_eventmi;
- u32 eci_eventhi;
- u32 eci_eventmasklo;
- u32 eci_eventmaskmi;
- u32 eci_eventmaskhi;
- u32 PAD[3];
-
- /* SROM interface (corerev >= 32) */
- u32 sromcontrol; /* 0x190 */
- u32 sromaddress;
- u32 sromdata;
- u32 PAD[17];
-
- /* Clock control and hardware workarounds (corerev >= 20) */
- u32 clk_ctl_st; /* 0x1e0 */
- u32 hw_war;
- u32 PAD[70];
-
- /* UARTs */
- u8 uart0data; /* 0x300 */
- u8 uart0imr;
- u8 uart0fcr;
- u8 uart0lcr;
- u8 uart0mcr;
- u8 uart0lsr;
- u8 uart0msr;
- u8 uart0scratch;
- u8 PAD[248]; /* corerev >= 1 */
-
- u8 uart1data; /* 0x400 */
- u8 uart1imr;
- u8 uart1fcr;
- u8 uart1lcr;
- u8 uart1mcr;
- u8 uart1lsr;
- u8 uart1msr;
- u8 uart1scratch;
- u32 PAD[126];
-
- /* PMU registers (corerev >= 20) */
- u32 pmucontrol; /* 0x600 */
- u32 pmucapabilities;
- u32 pmustatus;
- u32 res_state;
- u32 res_pending;
- u32 pmutimer;
- u32 min_res_mask;
- u32 max_res_mask;
- u32 res_table_sel;
- u32 res_dep_mask;
- u32 res_updn_timer;
- u32 res_timer;
- u32 clkstretch;
- u32 pmuwatchdog;
- u32 gpiosel; /* 0x638, rev >= 1 */
- u32 gpioenable; /* 0x63c, rev >= 1 */
- u32 res_req_timer_sel;
- u32 res_req_timer;
- u32 res_req_mask;
- u32 PAD;
- u32 chipcontrol_addr; /* 0x650 */
- u32 chipcontrol_data; /* 0x654 */
- u32 regcontrol_addr;
- u32 regcontrol_data;
- u32 pllcontrol_addr;
- u32 pllcontrol_data;
- u32 pmustrapopt; /* 0x668, corerev >= 28 */
- u32 pmu_xtalfreq; /* 0x66C, pmurev >= 10 */
- u32 PAD[100];
- u16 sromotp[768];
-} chipcregs_t;
-
-#endif /* _LANGUAGE_ASSEMBLY */
-
-#if defined(__BIG_ENDIAN) && defined(BCMHND74K)
-/* Selective swapped defines for those registers we need in
- * big-endian code.
- */
-#define CC_CHIPID 4
-#define CC_CAPABILITIES 0
-#define CC_CHIPST 0x28
-#define CC_EROMPTR 0xf8
-
-#else /* !__BIG_ENDIAN || !BCMHND74K */
-
-#define CC_CHIPID 0
-#define CC_CAPABILITIES 4
-#define CC_CHIPST 0x2c
-#define CC_EROMPTR 0xfc
-
-#endif /* __BIG_ENDIAN && BCMHND74K */
-
-#define CC_OTPST 0x10
-#define CC_JTAGCMD 0x30
-#define CC_JTAGIR 0x34
-#define CC_JTAGDR 0x38
-#define CC_JTAGCTRL 0x3c
-#define CC_GPIOPU 0x58
-#define CC_GPIOPD 0x5c
-#define CC_GPIOIN 0x60
-#define CC_GPIOOUT 0x64
-#define CC_GPIOOUTEN 0x68
-#define CC_GPIOCTRL 0x6c
-#define CC_GPIOPOL 0x70
-#define CC_GPIOINTM 0x74
-#define CC_WATCHDOG 0x80
-#define CC_CLKC_N 0x90
-#define CC_CLKC_M0 0x94
-#define CC_CLKC_M1 0x98
-#define CC_CLKC_M2 0x9c
-#define CC_CLKC_M3 0xa0
-#define CC_CLKDIV 0xa4
-#define CC_SYS_CLK_CTL 0xc0
-#define CC_CLK_CTL_ST SI_CLK_CTL_ST
-#define PMU_CTL 0x600
-#define PMU_CAP 0x604
-#define PMU_ST 0x608
-#define PMU_RES_STATE 0x60c
-#define PMU_TIMER 0x614
-#define PMU_MIN_RES_MASK 0x618
-#define PMU_MAX_RES_MASK 0x61c
-#define CC_CHIPCTL_ADDR 0x650
-#define CC_CHIPCTL_DATA 0x654
-#define PMU_REG_CONTROL_ADDR 0x658
-#define PMU_REG_CONTROL_DATA 0x65C
-#define PMU_PLL_CONTROL_ADDR 0x660
-#define PMU_PLL_CONTROL_DATA 0x664
-#define CC_SROM_OTP 0x800 /* SROM/OTP address space */
-
-/* chipid */
-#define CID_ID_MASK 0x0000ffff /* Chip Id mask */
-#define CID_REV_MASK 0x000f0000 /* Chip Revision mask */
-#define CID_REV_SHIFT 16 /* Chip Revision shift */
-#define CID_PKG_MASK 0x00f00000 /* Package Option mask */
-#define CID_PKG_SHIFT 20 /* Package Option shift */
-#define CID_CC_MASK 0x0f000000 /* CoreCount (corerev >= 4) */
-#define CID_CC_SHIFT 24
-#define CID_TYPE_MASK 0xf0000000 /* Chip Type */
-#define CID_TYPE_SHIFT 28
-
-/* capabilities */
-#define CC_CAP_UARTS_MASK 0x00000003 /* Number of UARTs */
-#define CC_CAP_MIPSEB 0x00000004 /* MIPS is in big-endian mode */
-#define CC_CAP_UCLKSEL 0x00000018 /* UARTs clock select */
-#define CC_CAP_UINTCLK 0x00000008 /* UARTs are driven by internal divided clock */
-#define CC_CAP_UARTGPIO 0x00000020 /* UARTs own GPIOs 15:12 */
-#define CC_CAP_EXTBUS_MASK 0x000000c0 /* External bus mask */
-#define CC_CAP_EXTBUS_NONE 0x00000000 /* No ExtBus present */
-#define CC_CAP_EXTBUS_FULL 0x00000040 /* ExtBus: PCMCIA, IDE & Prog */
-#define CC_CAP_EXTBUS_PROG 0x00000080 /* ExtBus: ProgIf only */
-#define CC_CAP_FLASH_MASK 0x00000700 /* Type of flash */
-#define CC_CAP_PLL_MASK 0x00038000 /* Type of PLL */
-#define CC_CAP_PWR_CTL 0x00040000 /* Power control */
-#define CC_CAP_OTPSIZE 0x00380000 /* OTP Size (0 = none) */
-#define CC_CAP_OTPSIZE_SHIFT 19 /* OTP Size shift */
-#define CC_CAP_OTPSIZE_BASE 5 /* OTP Size base */
-#define CC_CAP_JTAGP 0x00400000 /* JTAG Master Present */
-#define CC_CAP_ROM 0x00800000 /* Internal boot rom active */
-#define CC_CAP_BKPLN64 0x08000000 /* 64-bit backplane */
-#define CC_CAP_PMU 0x10000000 /* PMU Present, rev >= 20 */
-#define CC_CAP_SROM 0x40000000 /* Srom Present, rev >= 32 */
-#define CC_CAP_NFLASH 0x80000000 /* Nand flash present, rev >= 35 */
-
-#define CC_CAP2_SECI 0x00000001 /* SECI Present, rev >= 36 */
-#define CC_CAP2_GSIO 0x00000002 /* GSIO (spi/i2c) present, rev >= 37 */
-
-/* PLL type */
-#define PLL_NONE 0x00000000
-#define PLL_TYPE1 0x00010000 /* 48MHz base, 3 dividers */
-#define PLL_TYPE2 0x00020000 /* 48MHz, 4 dividers */
-#define PLL_TYPE3 0x00030000 /* 25MHz, 2 dividers */
-#define PLL_TYPE4 0x00008000 /* 48MHz, 4 dividers */
-#define PLL_TYPE5 0x00018000 /* 25MHz, 4 dividers */
-#define PLL_TYPE6 0x00028000 /* 100/200 or 120/240 only */
-#define PLL_TYPE7 0x00038000 /* 25MHz, 4 dividers */
-
-/* ILP clock */
-#define ILP_CLOCK 32000
-
-/* ALP clock on pre-PMU chips */
-#define ALP_CLOCK 20000000
-
-/* HT clock */
-#define HT_CLOCK 80000000
-
-/* corecontrol */
-#define CC_UARTCLKO 0x00000001 /* Drive UART with internal clock */
-#define CC_SE 0x00000002 /* sync clk out enable (corerev >= 3) */
-#define CC_UARTCLKEN 0x00000008 /* enable UART Clock (corerev > = 21 */
-
-/* chipcontrol */
-#define CHIPCTRL_4321A0_DEFAULT 0x3a4
-#define CHIPCTRL_4321A1_DEFAULT 0x0a4
-#define CHIPCTRL_4321_PLL_DOWN 0x800000 /* serdes PLL down override */
-
-/* Fields in the otpstatus register in rev >= 21 */
-#define OTPS_OL_MASK 0x000000ff
-#define OTPS_OL_MFG 0x00000001 /* manuf row is locked */
-#define OTPS_OL_OR1 0x00000002 /* otp redundancy row 1 is locked */
-#define OTPS_OL_OR2 0x00000004 /* otp redundancy row 2 is locked */
-#define OTPS_OL_GU 0x00000008 /* general use region is locked */
-#define OTPS_GUP_MASK 0x00000f00
-#define OTPS_GUP_SHIFT 8
-#define OTPS_GUP_HW 0x00000100 /* h/w subregion is programmed */
-#define OTPS_GUP_SW 0x00000200 /* s/w subregion is programmed */
-#define OTPS_GUP_CI 0x00000400 /* chipid/pkgopt subregion is programmed */
-#define OTPS_GUP_FUSE 0x00000800 /* fuse subregion is programmed */
-#define OTPS_READY 0x00001000
-#define OTPS_RV(x) (1 << (16 + (x))) /* redundancy entry valid */
-#define OTPS_RV_MASK 0x0fff0000
-
-/* Fields in the otpcontrol register in rev >= 21 */
-#define OTPC_PROGSEL 0x00000001
-#define OTPC_PCOUNT_MASK 0x0000000e
-#define OTPC_PCOUNT_SHIFT 1
-#define OTPC_VSEL_MASK 0x000000f0
-#define OTPC_VSEL_SHIFT 4
-#define OTPC_TMM_MASK 0x00000700
-#define OTPC_TMM_SHIFT 8
-#define OTPC_ODM 0x00000800
-#define OTPC_PROGEN 0x80000000
-
-/* Fields in otpprog in rev >= 21 and HND OTP */
-#define OTPP_COL_MASK 0x000000ff
-#define OTPP_COL_SHIFT 0
-#define OTPP_ROW_MASK 0x0000ff00
-#define OTPP_ROW_SHIFT 8
-#define OTPP_OC_MASK 0x0f000000
-#define OTPP_OC_SHIFT 24
-#define OTPP_READERR 0x10000000
-#define OTPP_VALUE_MASK 0x20000000
-#define OTPP_VALUE_SHIFT 29
-#define OTPP_START_BUSY 0x80000000
-#define OTPP_READ 0x40000000 /* HND OTP */
-
-/* otplayout reg corerev >= 36 */
-#define OTP_CISFORMAT_NEW 0x80000000
-
-/* Opcodes for OTPP_OC field */
-#define OTPPOC_READ 0
-#define OTPPOC_BIT_PROG 1
-#define OTPPOC_VERIFY 3
-#define OTPPOC_INIT 4
-#define OTPPOC_SET 5
-#define OTPPOC_RESET 6
-#define OTPPOC_OCST 7
-#define OTPPOC_ROW_LOCK 8
-#define OTPPOC_PRESCN_TEST 9
-
-/* Jtagm characteristics that appeared at a given corerev */
-#define JTAGM_CREV_OLD 10 /* Old command set, 16bit max IR */
-#define JTAGM_CREV_IRP 22 /* Able to do pause-ir */
-#define JTAGM_CREV_RTI 28 /* Able to do return-to-idle */
-
-/* jtagcmd */
-#define JCMD_START 0x80000000
-#define JCMD_BUSY 0x80000000
-#define JCMD_STATE_MASK 0x60000000
-#define JCMD_STATE_TLR 0x00000000 /* Test-logic-reset */
-#define JCMD_STATE_PIR 0x20000000 /* Pause IR */
-#define JCMD_STATE_PDR 0x40000000 /* Pause DR */
-#define JCMD_STATE_RTI 0x60000000 /* Run-test-idle */
-#define JCMD0_ACC_MASK 0x0000f000
-#define JCMD0_ACC_IRDR 0x00000000
-#define JCMD0_ACC_DR 0x00001000
-#define JCMD0_ACC_IR 0x00002000
-#define JCMD0_ACC_RESET 0x00003000
-#define JCMD0_ACC_IRPDR 0x00004000
-#define JCMD0_ACC_PDR 0x00005000
-#define JCMD0_IRW_MASK 0x00000f00
-#define JCMD_ACC_MASK 0x000f0000 /* Changes for corerev 11 */
-#define JCMD_ACC_IRDR 0x00000000
-#define JCMD_ACC_DR 0x00010000
-#define JCMD_ACC_IR 0x00020000
-#define JCMD_ACC_RESET 0x00030000
-#define JCMD_ACC_IRPDR 0x00040000
-#define JCMD_ACC_PDR 0x00050000
-#define JCMD_ACC_PIR 0x00060000
-#define JCMD_ACC_IRDR_I 0x00070000 /* rev 28: return to run-test-idle */
-#define JCMD_ACC_DR_I 0x00080000 /* rev 28: return to run-test-idle */
-#define JCMD_IRW_MASK 0x00001f00
-#define JCMD_IRW_SHIFT 8
-#define JCMD_DRW_MASK 0x0000003f
-
-/* jtagctrl */
-#define JCTRL_FORCE_CLK 4 /* Force clock */
-#define JCTRL_EXT_EN 2 /* Enable external targets */
-#define JCTRL_EN 1 /* Enable Jtag master */
-
-/* Fields in clkdiv */
-#define CLKD_SFLASH 0x0f000000
-#define CLKD_SFLASH_SHIFT 24
-#define CLKD_OTP 0x000f0000
-#define CLKD_OTP_SHIFT 16
-#define CLKD_JTAG 0x00000f00
-#define CLKD_JTAG_SHIFT 8
-#define CLKD_UART 0x000000ff
-
-#define CLKD2_SROM 0x00000003
-
-/* intstatus/intmask */
-#define CI_GPIO 0x00000001 /* gpio intr */
-#define CI_EI 0x00000002 /* extif intr (corerev >= 3) */
-#define CI_TEMP 0x00000004 /* temp. ctrl intr (corerev >= 15) */
-#define CI_SIRQ 0x00000008 /* serial IRQ intr (corerev >= 15) */
-#define CI_PMU 0x00000020 /* pmu intr (corerev >= 21) */
-#define CI_UART 0x00000040 /* uart intr (corerev >= 21) */
-#define CI_WDRESET 0x80000000 /* watchdog reset occurred */
-
-/* slow_clk_ctl */
-#define SCC_SS_MASK 0x00000007 /* slow clock source mask */
-#define SCC_SS_LPO 0x00000000 /* source of slow clock is LPO */
-#define SCC_SS_XTAL 0x00000001 /* source of slow clock is crystal */
-#define SCC_SS_PCI 0x00000002 /* source of slow clock is PCI */
-#define SCC_LF 0x00000200 /* LPOFreqSel, 1: 160Khz, 0: 32KHz */
-#define SCC_LP 0x00000400 /* LPOPowerDown, 1: LPO is disabled,
- * 0: LPO is enabled
- */
-#define SCC_FS 0x00000800 /* ForceSlowClk, 1: sb/cores running on slow clock,
- * 0: power logic control
- */
-#define SCC_IP 0x00001000 /* IgnorePllOffReq, 1/0: power logic ignores/honors
- * PLL clock disable requests from core
- */
-#define SCC_XC 0x00002000 /* XtalControlEn, 1/0: power logic does/doesn't
- * disable crystal when appropriate
- */
-#define SCC_XP 0x00004000 /* XtalPU (RO), 1/0: crystal running/disabled */
-#define SCC_CD_MASK 0xffff0000 /* ClockDivider (SlowClk = 1/(4+divisor)) */
-#define SCC_CD_SHIFT 16
-
-/* system_clk_ctl */
-#define SYCC_IE 0x00000001 /* ILPen: Enable Idle Low Power */
-#define SYCC_AE 0x00000002 /* ALPen: Enable Active Low Power */
-#define SYCC_FP 0x00000004 /* ForcePLLOn */
-#define SYCC_AR 0x00000008 /* Force ALP (or HT if ALPen is not set */
-#define SYCC_HR 0x00000010 /* Force HT */
-#define SYCC_CD_MASK 0xffff0000 /* ClkDiv (ILP = 1/(4 * (divisor + 1)) */
-#define SYCC_CD_SHIFT 16
-
-/* Indirect backplane access */
-#define BPIA_BYTEEN 0x0000000f
-#define BPIA_SZ1 0x00000001
-#define BPIA_SZ2 0x00000003
-#define BPIA_SZ4 0x00000007
-#define BPIA_SZ8 0x0000000f
-#define BPIA_WRITE 0x00000100
-#define BPIA_START 0x00000200
-#define BPIA_BUSY 0x00000200
-#define BPIA_ERROR 0x00000400
-
-/* pcmcia/prog/flash_config */
-#define CF_EN 0x00000001 /* enable */
-#define CF_EM_MASK 0x0000000e /* mode */
-#define CF_EM_SHIFT 1
-#define CF_EM_FLASH 0 /* flash/asynchronous mode */
-#define CF_EM_SYNC 2 /* synchronous mode */
-#define CF_EM_PCMCIA 4 /* pcmcia mode */
-#define CF_DS 0x00000010 /* destsize: 0=8bit, 1=16bit */
-#define CF_BS 0x00000020 /* byteswap */
-#define CF_CD_MASK 0x000000c0 /* clock divider */
-#define CF_CD_SHIFT 6
-#define CF_CD_DIV2 0x00000000 /* backplane/2 */
-#define CF_CD_DIV3 0x00000040 /* backplane/3 */
-#define CF_CD_DIV4 0x00000080 /* backplane/4 */
-#define CF_CE 0x00000100 /* clock enable */
-#define CF_SB 0x00000200 /* size/bytestrobe (synch only) */
-
-/* pcmcia_memwait */
-#define PM_W0_MASK 0x0000003f /* waitcount0 */
-#define PM_W1_MASK 0x00001f00 /* waitcount1 */
-#define PM_W1_SHIFT 8
-#define PM_W2_MASK 0x001f0000 /* waitcount2 */
-#define PM_W2_SHIFT 16
-#define PM_W3_MASK 0x1f000000 /* waitcount3 */
-#define PM_W3_SHIFT 24
-
-/* pcmcia_attrwait */
-#define PA_W0_MASK 0x0000003f /* waitcount0 */
-#define PA_W1_MASK 0x00001f00 /* waitcount1 */
-#define PA_W1_SHIFT 8
-#define PA_W2_MASK 0x001f0000 /* waitcount2 */
-#define PA_W2_SHIFT 16
-#define PA_W3_MASK 0x1f000000 /* waitcount3 */
-#define PA_W3_SHIFT 24
-
-/* pcmcia_iowait */
-#define PI_W0_MASK 0x0000003f /* waitcount0 */
-#define PI_W1_MASK 0x00001f00 /* waitcount1 */
-#define PI_W1_SHIFT 8
-#define PI_W2_MASK 0x001f0000 /* waitcount2 */
-#define PI_W2_SHIFT 16
-#define PI_W3_MASK 0x1f000000 /* waitcount3 */
-#define PI_W3_SHIFT 24
-
-/* prog_waitcount */
-#define PW_W0_MASK 0x0000001f /* waitcount0 */
-#define PW_W1_MASK 0x00001f00 /* waitcount1 */
-#define PW_W1_SHIFT 8
-#define PW_W2_MASK 0x001f0000 /* waitcount2 */
-#define PW_W2_SHIFT 16
-#define PW_W3_MASK 0x1f000000 /* waitcount3 */
-#define PW_W3_SHIFT 24
-
-#define PW_W0 0x0000000c
-#define PW_W1 0x00000a00
-#define PW_W2 0x00020000
-#define PW_W3 0x01000000
-
-/* flash_waitcount */
-#define FW_W0_MASK 0x0000003f /* waitcount0 */
-#define FW_W1_MASK 0x00001f00 /* waitcount1 */
-#define FW_W1_SHIFT 8
-#define FW_W2_MASK 0x001f0000 /* waitcount2 */
-#define FW_W2_SHIFT 16
-#define FW_W3_MASK 0x1f000000 /* waitcount3 */
-#define FW_W3_SHIFT 24
-
-/* When Srom support present, fields in sromcontrol */
-#define SRC_START 0x80000000
-#define SRC_BUSY 0x80000000
-#define SRC_OPCODE 0x60000000
-#define SRC_OP_READ 0x00000000
-#define SRC_OP_WRITE 0x20000000
-#define SRC_OP_WRDIS 0x40000000
-#define SRC_OP_WREN 0x60000000
-#define SRC_OTPSEL 0x00000010
-#define SRC_LOCK 0x00000008
-#define SRC_SIZE_MASK 0x00000006
-#define SRC_SIZE_1K 0x00000000
-#define SRC_SIZE_4K 0x00000002
-#define SRC_SIZE_16K 0x00000004
-#define SRC_SIZE_SHIFT 1
-#define SRC_PRESENT 0x00000001
-
-/* Fields in pmucontrol */
-#define PCTL_ILP_DIV_MASK 0xffff0000
-#define PCTL_ILP_DIV_SHIFT 16
-#define PCTL_PLL_PLLCTL_UPD 0x00000400 /* rev 2 */
-#define PCTL_NOILP_ON_WAIT 0x00000200 /* rev 1 */
-#define PCTL_HT_REQ_EN 0x00000100
-#define PCTL_ALP_REQ_EN 0x00000080
-#define PCTL_XTALFREQ_MASK 0x0000007c
-#define PCTL_XTALFREQ_SHIFT 2
-#define PCTL_ILP_DIV_EN 0x00000002
-#define PCTL_LPO_SEL 0x00000001
-
-/* Fields in clkstretch */
-#define CSTRETCH_HT 0xffff0000
-#define CSTRETCH_ALP 0x0000ffff
-
-/* gpiotimerval */
-#define GPIO_ONTIME_SHIFT 16
-
-/* clockcontrol_n */
-#define CN_N1_MASK 0x3f /* n1 control */
-#define CN_N2_MASK 0x3f00 /* n2 control */
-#define CN_N2_SHIFT 8
-#define CN_PLLC_MASK 0xf0000 /* pll control */
-#define CN_PLLC_SHIFT 16
-
-/* clockcontrol_sb/pci/uart */
-#define CC_M1_MASK 0x3f /* m1 control */
-#define CC_M2_MASK 0x3f00 /* m2 control */
-#define CC_M2_SHIFT 8
-#define CC_M3_MASK 0x3f0000 /* m3 control */
-#define CC_M3_SHIFT 16
-#define CC_MC_MASK 0x1f000000 /* mux control */
-#define CC_MC_SHIFT 24
-
-/* N3M Clock control magic field values */
-#define CC_F6_2 0x02 /* A factor of 2 in */
-#define CC_F6_3 0x03 /* 6-bit fields like */
-#define CC_F6_4 0x05 /* N1, M1 or M3 */
-#define CC_F6_5 0x09
-#define CC_F6_6 0x11
-#define CC_F6_7 0x21
-
-#define CC_F5_BIAS 5 /* 5-bit fields get this added */
-
-#define CC_MC_BYPASS 0x08
-#define CC_MC_M1 0x04
-#define CC_MC_M1M2 0x02
-#define CC_MC_M1M2M3 0x01
-#define CC_MC_M1M3 0x11
-
-/* Type 2 Clock control magic field values */
-#define CC_T2_BIAS 2 /* n1, n2, m1 & m3 bias */
-#define CC_T2M2_BIAS 3 /* m2 bias */
-
-#define CC_T2MC_M1BYP 1
-#define CC_T2MC_M2BYP 2
-#define CC_T2MC_M3BYP 4
-
-/* Type 6 Clock control magic field values */
-#define CC_T6_MMASK 1 /* bits of interest in m */
-#define CC_T6_M0 120000000 /* sb clock for m = 0 */
-#define CC_T6_M1 100000000 /* sb clock for m = 1 */
-#define SB2MIPS_T6(sb) (2 * (sb))
-
-/* Common clock base */
-#define CC_CLOCK_BASE1 24000000 /* Half the clock freq */
-#define CC_CLOCK_BASE2 12500000 /* Alternate crystal on some PLLs */
-
-/* Clock control values for 200MHz in 5350 */
-#define CLKC_5350_N 0x0311
-#define CLKC_5350_M 0x04020009
-
-/* Flash types in the chipcommon capabilities register */
-#define FLASH_NONE 0x000 /* No flash */
-#define SFLASH_ST 0x100 /* ST serial flash */
-#define SFLASH_AT 0x200 /* Atmel serial flash */
-#define PFLASH 0x700 /* Parallel flash */
-
-/* Bits in the ExtBus config registers */
-#define CC_CFG_EN 0x0001 /* Enable */
-#define CC_CFG_EM_MASK 0x000e /* Extif Mode */
-#define CC_CFG_EM_ASYNC 0x0000 /* Async/Parallel flash */
-#define CC_CFG_EM_SYNC 0x0002 /* Synchronous */
-#define CC_CFG_EM_PCMCIA 0x0004 /* PCMCIA */
-#define CC_CFG_EM_IDE 0x0006 /* IDE */
-#define CC_CFG_DS 0x0010 /* Data size, 0=8bit, 1=16bit */
-#define CC_CFG_CD_MASK 0x00e0 /* Sync: Clock divisor, rev >= 20 */
-#define CC_CFG_CE 0x0100 /* Sync: Clock enable, rev >= 20 */
-#define CC_CFG_SB 0x0200 /* Sync: Size/Bytestrobe, rev >= 20 */
-#define CC_CFG_IS 0x0400 /* Extif Sync Clk Select, rev >= 20 */
-
-/* ExtBus address space */
-#define CC_EB_BASE 0x1a000000 /* Chipc ExtBus base address */
-#define CC_EB_PCMCIA_MEM 0x1a000000 /* PCMCIA 0 memory base address */
-#define CC_EB_PCMCIA_IO 0x1a200000 /* PCMCIA 0 I/O base address */
-#define CC_EB_PCMCIA_CFG 0x1a400000 /* PCMCIA 0 config base address */
-#define CC_EB_IDE 0x1a800000 /* IDE memory base */
-#define CC_EB_PCMCIA1_MEM 0x1a800000 /* PCMCIA 1 memory base address */
-#define CC_EB_PCMCIA1_IO 0x1aa00000 /* PCMCIA 1 I/O base address */
-#define CC_EB_PCMCIA1_CFG 0x1ac00000 /* PCMCIA 1 config base address */
-#define CC_EB_PROGIF 0x1b000000 /* ProgIF Async/Sync base address */
-
-/* Start/busy bit in flashcontrol */
-#define SFLASH_OPCODE 0x000000ff
-#define SFLASH_ACTION 0x00000700
-#define SFLASH_CS_ACTIVE 0x00001000 /* Chip Select Active, rev >= 20 */
-#define SFLASH_START 0x80000000
-#define SFLASH_BUSY SFLASH_START
-
-/* flashcontrol action codes */
-#define SFLASH_ACT_OPONLY 0x0000 /* Issue opcode only */
-#define SFLASH_ACT_OP1D 0x0100 /* opcode + 1 data byte */
-#define SFLASH_ACT_OP3A 0x0200 /* opcode + 3 addr bytes */
-#define SFLASH_ACT_OP3A1D 0x0300 /* opcode + 3 addr & 1 data bytes */
-#define SFLASH_ACT_OP3A4D 0x0400 /* opcode + 3 addr & 4 data bytes */
-#define SFLASH_ACT_OP3A4X4D 0x0500 /* opcode + 3 addr, 4 don't care & 4 data bytes */
-#define SFLASH_ACT_OP3A1X4D 0x0700 /* opcode + 3 addr, 1 don't care & 4 data bytes */
-
-/* flashcontrol action+opcodes for ST flashes */
-#define SFLASH_ST_WREN 0x0006 /* Write Enable */
-#define SFLASH_ST_WRDIS 0x0004 /* Write Disable */
-#define SFLASH_ST_RDSR 0x0105 /* Read Status Register */
-#define SFLASH_ST_WRSR 0x0101 /* Write Status Register */
-#define SFLASH_ST_READ 0x0303 /* Read Data Bytes */
-#define SFLASH_ST_PP 0x0302 /* Page Program */
-#define SFLASH_ST_SE 0x02d8 /* Sector Erase */
-#define SFLASH_ST_BE 0x00c7 /* Bulk Erase */
-#define SFLASH_ST_DP 0x00b9 /* Deep Power-down */
-#define SFLASH_ST_RES 0x03ab /* Read Electronic Signature */
-#define SFLASH_ST_CSA 0x1000 /* Keep chip select asserted */
-#define SFLASH_ST_SSE 0x0220 /* Sub-sector Erase */
-
-/* Status register bits for ST flashes */
-#define SFLASH_ST_WIP 0x01 /* Write In Progress */
-#define SFLASH_ST_WEL 0x02 /* Write Enable Latch */
-#define SFLASH_ST_BP_MASK 0x1c /* Block Protect */
-#define SFLASH_ST_BP_SHIFT 2
-#define SFLASH_ST_SRWD 0x80 /* Status Register Write Disable */
-
-/* flashcontrol action+opcodes for Atmel flashes */
-#define SFLASH_AT_READ 0x07e8
-#define SFLASH_AT_PAGE_READ 0x07d2
-#define SFLASH_AT_BUF1_READ
-#define SFLASH_AT_BUF2_READ
-#define SFLASH_AT_STATUS 0x01d7
-#define SFLASH_AT_BUF1_WRITE 0x0384
-#define SFLASH_AT_BUF2_WRITE 0x0387
-#define SFLASH_AT_BUF1_ERASE_PROGRAM 0x0283
-#define SFLASH_AT_BUF2_ERASE_PROGRAM 0x0286
-#define SFLASH_AT_BUF1_PROGRAM 0x0288
-#define SFLASH_AT_BUF2_PROGRAM 0x0289
-#define SFLASH_AT_PAGE_ERASE 0x0281
-#define SFLASH_AT_BLOCK_ERASE 0x0250
-#define SFLASH_AT_BUF1_WRITE_ERASE_PROGRAM 0x0382
-#define SFLASH_AT_BUF2_WRITE_ERASE_PROGRAM 0x0385
-#define SFLASH_AT_BUF1_LOAD 0x0253
-#define SFLASH_AT_BUF2_LOAD 0x0255
-#define SFLASH_AT_BUF1_COMPARE 0x0260
-#define SFLASH_AT_BUF2_COMPARE 0x0261
-#define SFLASH_AT_BUF1_REPROGRAM 0x0258
-#define SFLASH_AT_BUF2_REPROGRAM 0x0259
-
-/* Status register bits for Atmel flashes */
-#define SFLASH_AT_READY 0x80
-#define SFLASH_AT_MISMATCH 0x40
-#define SFLASH_AT_ID_MASK 0x38
-#define SFLASH_AT_ID_SHIFT 3
-
-/*
- * These are the UART port assignments, expressed as offsets from the base
- * register. These assignments should hold for any serial port based on
- * a 8250, 16450, or 16550(A).
- */
-
-#define UART_RX 0 /* In: Receive buffer (DLAB=0) */
-#define UART_TX 0 /* Out: Transmit buffer (DLAB=0) */
-#define UART_DLL 0 /* Out: Divisor Latch Low (DLAB=1) */
-#define UART_IER 1 /* In/Out: Interrupt Enable Register (DLAB=0) */
-#define UART_DLM 1 /* Out: Divisor Latch High (DLAB=1) */
-#define UART_IIR 2 /* In: Interrupt Identity Register */
-#define UART_FCR 2 /* Out: FIFO Control Register */
-#define UART_LCR 3 /* Out: Line Control Register */
-#define UART_MCR 4 /* Out: Modem Control Register */
-#define UART_LSR 5 /* In: Line Status Register */
-#define UART_MSR 6 /* In: Modem Status Register */
-#define UART_SCR 7 /* I/O: Scratch Register */
-#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */
-#define UART_LCR_WLEN8 0x03 /* Word length: 8 bits */
-#define UART_MCR_OUT2 0x08 /* MCR GPIO out 2 */
-#define UART_MCR_LOOP 0x10 /* Enable loopback test mode */
-#define UART_LSR_RX_FIFO 0x80 /* Receive FIFO error */
-#define UART_LSR_TDHR 0x40 /* Data-hold-register empty */
-#define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */
-#define UART_LSR_BREAK 0x10 /* Break interrupt */
-#define UART_LSR_FRAMING 0x08 /* Framing error */
-#define UART_LSR_PARITY 0x04 /* Parity error */
-#define UART_LSR_OVERRUN 0x02 /* Overrun error */
-#define UART_LSR_RXRDY 0x01 /* Receiver ready */
-#define UART_FCR_FIFO_ENABLE 1 /* FIFO control register bit controlling FIFO enable/disable */
-
-/* Interrupt Identity Register (IIR) bits */
-#define UART_IIR_FIFO_MASK 0xc0 /* IIR FIFO disable/enabled mask */
-#define UART_IIR_INT_MASK 0xf /* IIR interrupt ID source */
-#define UART_IIR_MDM_CHG 0x0 /* Modem status changed */
-#define UART_IIR_NOINT 0x1 /* No interrupt pending */
-#define UART_IIR_THRE 0x2 /* THR empty */
-#define UART_IIR_RCVD_DATA 0x4 /* Received data available */
-#define UART_IIR_RCVR_STATUS 0x6 /* Receiver status */
-#define UART_IIR_CHAR_TIME 0xc /* Character time */
-
-/* Interrupt Enable Register (IER) bits */
-#define UART_IER_EDSSI 8 /* enable modem status interrupt */
-#define UART_IER_ELSI 4 /* enable receiver line status interrupt */
-#define UART_IER_ETBEI 2 /* enable transmitter holding register empty interrupt */
-#define UART_IER_ERBFI 1 /* enable data available interrupt */
-
-/* pmustatus */
-#define PST_EXTLPOAVAIL 0x0100
-#define PST_WDRESET 0x0080
-#define PST_INTPEND 0x0040
-#define PST_SBCLKST 0x0030
-#define PST_SBCLKST_ILP 0x0010
-#define PST_SBCLKST_ALP 0x0020
-#define PST_SBCLKST_HT 0x0030
-#define PST_ALPAVAIL 0x0008
-#define PST_HTAVAIL 0x0004
-#define PST_RESINIT 0x0003
-
-/* pmucapabilities */
-#define PCAP_REV_MASK 0x000000ff
-#define PCAP_RC_MASK 0x00001f00
-#define PCAP_RC_SHIFT 8
-#define PCAP_TC_MASK 0x0001e000
-#define PCAP_TC_SHIFT 13
-#define PCAP_PC_MASK 0x001e0000
-#define PCAP_PC_SHIFT 17
-#define PCAP_VC_MASK 0x01e00000
-#define PCAP_VC_SHIFT 21
-#define PCAP_CC_MASK 0x1e000000
-#define PCAP_CC_SHIFT 25
-#define PCAP5_PC_MASK 0x003e0000 /* PMU corerev >= 5 */
-#define PCAP5_PC_SHIFT 17
-#define PCAP5_VC_MASK 0x07c00000
-#define PCAP5_VC_SHIFT 22
-#define PCAP5_CC_MASK 0xf8000000
-#define PCAP5_CC_SHIFT 27
-
-/* PMU Resource Request Timer registers */
-/* This is based on PmuRev0 */
-#define PRRT_TIME_MASK 0x03ff
-#define PRRT_INTEN 0x0400
-#define PRRT_REQ_ACTIVE 0x0800
-#define PRRT_ALP_REQ 0x1000
-#define PRRT_HT_REQ 0x2000
-
-/* PMU resource bit position */
-#define PMURES_BIT(bit) (1 << (bit))
-
-/* PMU resource number limit */
-#define PMURES_MAX_RESNUM 30
-
-/* PMU chip control0 register */
-#define PMU_CHIPCTL0 0
-
-/* PMU chip control1 register */
-#define PMU_CHIPCTL1 1
-#define PMU_CC1_RXC_DLL_BYPASS 0x00010000
-
-#define PMU_CC1_IF_TYPE_MASK 0x00000030
-#define PMU_CC1_IF_TYPE_RMII 0x00000000
-#define PMU_CC1_IF_TYPE_MII 0x00000010
-#define PMU_CC1_IF_TYPE_RGMII 0x00000020
-
-#define PMU_CC1_SW_TYPE_MASK 0x000000c0
-#define PMU_CC1_SW_TYPE_EPHY 0x00000000
-#define PMU_CC1_SW_TYPE_EPHYMII 0x00000040
-#define PMU_CC1_SW_TYPE_EPHYRMII 0x00000080
-#define PMU_CC1_SW_TYPE_RGMII 0x000000c0
-
-/* PMU corerev and chip specific PLL controls.
- * PMU<rev>_PLL<num>_XX where <rev> is PMU corerev and <num> is an arbitrary number
- * to differentiate different PLLs controlled by the same PMU rev.
- */
-/* pllcontrol registers */
-/* PDIV, div_phy, div_arm, div_adc, dith_sel, ioff, kpd_scale, lsb_sel, mash_sel, lf_c & lf_r */
-#define PMU0_PLL0_PLLCTL0 0
-#define PMU0_PLL0_PC0_PDIV_MASK 1
-#define PMU0_PLL0_PC0_PDIV_FREQ 25000
-#define PMU0_PLL0_PC0_DIV_ARM_MASK 0x00000038
-#define PMU0_PLL0_PC0_DIV_ARM_SHIFT 3
-#define PMU0_PLL0_PC0_DIV_ARM_BASE 8
-
-/* PC0_DIV_ARM for PLLOUT_ARM */
-#define PMU0_PLL0_PC0_DIV_ARM_110MHZ 0
-#define PMU0_PLL0_PC0_DIV_ARM_97_7MHZ 1
-#define PMU0_PLL0_PC0_DIV_ARM_88MHZ 2
-#define PMU0_PLL0_PC0_DIV_ARM_80MHZ 3 /* Default */
-#define PMU0_PLL0_PC0_DIV_ARM_73_3MHZ 4
-#define PMU0_PLL0_PC0_DIV_ARM_67_7MHZ 5
-#define PMU0_PLL0_PC0_DIV_ARM_62_9MHZ 6
-#define PMU0_PLL0_PC0_DIV_ARM_58_6MHZ 7
-
-/* Wildcard base, stop_mod, en_lf_tp, en_cal & lf_r2 */
-#define PMU0_PLL0_PLLCTL1 1
-#define PMU0_PLL0_PC1_WILD_INT_MASK 0xf0000000
-#define PMU0_PLL0_PC1_WILD_INT_SHIFT 28
-#define PMU0_PLL0_PC1_WILD_FRAC_MASK 0x0fffff00
-#define PMU0_PLL0_PC1_WILD_FRAC_SHIFT 8
-#define PMU0_PLL0_PC1_STOP_MOD 0x00000040
-
-/* Wildcard base, vco_calvar, vco_swc, vco_var_selref, vso_ical & vco_sel_avdd */
-#define PMU0_PLL0_PLLCTL2 2
-#define PMU0_PLL0_PC2_WILD_INT_MASK 0xf
-#define PMU0_PLL0_PC2_WILD_INT_SHIFT 4
-
-/* pllcontrol registers */
-/* ndiv_pwrdn, pwrdn_ch<x>, refcomp_pwrdn, dly_ch<x>, p1div, p2div, _bypass_sdmod */
-#define PMU1_PLL0_PLLCTL0 0
-#define PMU1_PLL0_PC0_P1DIV_MASK 0x00f00000
-#define PMU1_PLL0_PC0_P1DIV_SHIFT 20
-#define PMU1_PLL0_PC0_P2DIV_MASK 0x0f000000
-#define PMU1_PLL0_PC0_P2DIV_SHIFT 24
-
-/* m<x>div */
-#define PMU1_PLL0_PLLCTL1 1
-#define PMU1_PLL0_PC1_M1DIV_MASK 0x000000ff
-#define PMU1_PLL0_PC1_M1DIV_SHIFT 0
-#define PMU1_PLL0_PC1_M2DIV_MASK 0x0000ff00
-#define PMU1_PLL0_PC1_M2DIV_SHIFT 8
-#define PMU1_PLL0_PC1_M3DIV_MASK 0x00ff0000
-#define PMU1_PLL0_PC1_M3DIV_SHIFT 16
-#define PMU1_PLL0_PC1_M4DIV_MASK 0xff000000
-#define PMU1_PLL0_PC1_M4DIV_SHIFT 24
-
-#define DOT11MAC_880MHZ_CLK_DIVISOR_SHIFT 8
-#define DOT11MAC_880MHZ_CLK_DIVISOR_MASK (0xFF << DOT11MAC_880MHZ_CLK_DIVISOR_SHIFT)
-#define DOT11MAC_880MHZ_CLK_DIVISOR_VAL (0xE << DOT11MAC_880MHZ_CLK_DIVISOR_SHIFT)
-
-/* m<x>div, ndiv_dither_mfb, ndiv_mode, ndiv_int */
-#define PMU1_PLL0_PLLCTL2 2
-#define PMU1_PLL0_PC2_M5DIV_MASK 0x000000ff
-#define PMU1_PLL0_PC2_M5DIV_SHIFT 0
-#define PMU1_PLL0_PC2_M6DIV_MASK 0x0000ff00
-#define PMU1_PLL0_PC2_M6DIV_SHIFT 8
-#define PMU1_PLL0_PC2_NDIV_MODE_MASK 0x000e0000
-#define PMU1_PLL0_PC2_NDIV_MODE_SHIFT 17
-#define PMU1_PLL0_PC2_NDIV_MODE_MASH 1
-#define PMU1_PLL0_PC2_NDIV_MODE_MFB 2 /* recommended for 4319 */
-#define PMU1_PLL0_PC2_NDIV_INT_MASK 0x1ff00000
-#define PMU1_PLL0_PC2_NDIV_INT_SHIFT 20
-
-/* ndiv_frac */
-#define PMU1_PLL0_PLLCTL3 3
-#define PMU1_PLL0_PC3_NDIV_FRAC_MASK 0x00ffffff
-#define PMU1_PLL0_PC3_NDIV_FRAC_SHIFT 0
-
-/* pll_ctrl */
-#define PMU1_PLL0_PLLCTL4 4
-
-/* pll_ctrl, vco_rng, clkdrive_ch<x> */
-#define PMU1_PLL0_PLLCTL5 5
-#define PMU1_PLL0_PC5_CLK_DRV_MASK 0xffffff00
-#define PMU1_PLL0_PC5_CLK_DRV_SHIFT 8
-
-/* PMU rev 2 control words */
-#define PMU2_PHY_PLL_PLLCTL 4
-#define PMU2_SI_PLL_PLLCTL 10
-
-/* PMU rev 2 */
-/* pllcontrol registers */
-/* ndiv_pwrdn, pwrdn_ch<x>, refcomp_pwrdn, dly_ch<x>, p1div, p2div, _bypass_sdmod */
-#define PMU2_PLL_PLLCTL0 0
-#define PMU2_PLL_PC0_P1DIV_MASK 0x00f00000
-#define PMU2_PLL_PC0_P1DIV_SHIFT 20
-#define PMU2_PLL_PC0_P2DIV_MASK 0x0f000000
-#define PMU2_PLL_PC0_P2DIV_SHIFT 24
-
-/* m<x>div */
-#define PMU2_PLL_PLLCTL1 1
-#define PMU2_PLL_PC1_M1DIV_MASK 0x000000ff
-#define PMU2_PLL_PC1_M1DIV_SHIFT 0
-#define PMU2_PLL_PC1_M2DIV_MASK 0x0000ff00
-#define PMU2_PLL_PC1_M2DIV_SHIFT 8
-#define PMU2_PLL_PC1_M3DIV_MASK 0x00ff0000
-#define PMU2_PLL_PC1_M3DIV_SHIFT 16
-#define PMU2_PLL_PC1_M4DIV_MASK 0xff000000
-#define PMU2_PLL_PC1_M4DIV_SHIFT 24
-
-/* m<x>div, ndiv_dither_mfb, ndiv_mode, ndiv_int */
-#define PMU2_PLL_PLLCTL2 2
-#define PMU2_PLL_PC2_M5DIV_MASK 0x000000ff
-#define PMU2_PLL_PC2_M5DIV_SHIFT 0
-#define PMU2_PLL_PC2_M6DIV_MASK 0x0000ff00
-#define PMU2_PLL_PC2_M6DIV_SHIFT 8
-#define PMU2_PLL_PC2_NDIV_MODE_MASK 0x000e0000
-#define PMU2_PLL_PC2_NDIV_MODE_SHIFT 17
-#define PMU2_PLL_PC2_NDIV_INT_MASK 0x1ff00000
-#define PMU2_PLL_PC2_NDIV_INT_SHIFT 20
-
-/* ndiv_frac */
-#define PMU2_PLL_PLLCTL3 3
-#define PMU2_PLL_PC3_NDIV_FRAC_MASK 0x00ffffff
-#define PMU2_PLL_PC3_NDIV_FRAC_SHIFT 0
-
-/* pll_ctrl */
-#define PMU2_PLL_PLLCTL4 4
-
-/* pll_ctrl, vco_rng, clkdrive_ch<x> */
-#define PMU2_PLL_PLLCTL5 5
-#define PMU2_PLL_PC5_CLKDRIVE_CH1_MASK 0x00000f00
-#define PMU2_PLL_PC5_CLKDRIVE_CH1_SHIFT 8
-#define PMU2_PLL_PC5_CLKDRIVE_CH2_MASK 0x0000f000
-#define PMU2_PLL_PC5_CLKDRIVE_CH2_SHIFT 12
-#define PMU2_PLL_PC5_CLKDRIVE_CH3_MASK 0x000f0000
-#define PMU2_PLL_PC5_CLKDRIVE_CH3_SHIFT 16
-#define PMU2_PLL_PC5_CLKDRIVE_CH4_MASK 0x00f00000
-#define PMU2_PLL_PC5_CLKDRIVE_CH4_SHIFT 20
-#define PMU2_PLL_PC5_CLKDRIVE_CH5_MASK 0x0f000000
-#define PMU2_PLL_PC5_CLKDRIVE_CH5_SHIFT 24
-#define PMU2_PLL_PC5_CLKDRIVE_CH6_MASK 0xf0000000
-#define PMU2_PLL_PC5_CLKDRIVE_CH6_SHIFT 28
-
-/* PMU rev 5 (& 6) */
-#define PMU5_PLL_P1P2_OFF 0
-#define PMU5_PLL_P1_MASK 0x0f000000
-#define PMU5_PLL_P1_SHIFT 24
-#define PMU5_PLL_P2_MASK 0x00f00000
-#define PMU5_PLL_P2_SHIFT 20
-#define PMU5_PLL_M14_OFF 1
-#define PMU5_PLL_MDIV_MASK 0x000000ff
-#define PMU5_PLL_MDIV_WIDTH 8
-#define PMU5_PLL_NM5_OFF 2
-#define PMU5_PLL_NDIV_MASK 0xfff00000
-#define PMU5_PLL_NDIV_SHIFT 20
-#define PMU5_PLL_NDIV_MODE_MASK 0x000e0000
-#define PMU5_PLL_NDIV_MODE_SHIFT 17
-#define PMU5_PLL_FMAB_OFF 3
-#define PMU5_PLL_MRAT_MASK 0xf0000000
-#define PMU5_PLL_MRAT_SHIFT 28
-#define PMU5_PLL_ABRAT_MASK 0x08000000
-#define PMU5_PLL_ABRAT_SHIFT 27
-#define PMU5_PLL_FDIV_MASK 0x07ffffff
-#define PMU5_PLL_PLLCTL_OFF 4
-#define PMU5_PLL_PCHI_OFF 5
-#define PMU5_PLL_PCHI_MASK 0x0000003f
-
-/* pmu XtalFreqRatio */
-#define PMU_XTALFREQ_REG_ILPCTR_MASK 0x00001FFF
-#define PMU_XTALFREQ_REG_MEASURE_MASK 0x80000000
-#define PMU_XTALFREQ_REG_MEASURE_SHIFT 31
-
-/* Divider allocation in 4716/47162/5356/5357 */
-#define PMU5_MAINPLL_CPU 1
-#define PMU5_MAINPLL_MEM 2
-#define PMU5_MAINPLL_SI 3
-
-#define PMU7_PLL_PLLCTL7 7
-#define PMU7_PLL_PLLCTL8 8
-#define PMU7_PLL_PLLCTL11 11
-
-/* PLL usage in 4716/47162 */
-#define PMU4716_MAINPLL_PLL0 12
-
-/* PLL usage in 5356/5357 */
-#define PMU5356_MAINPLL_PLL0 0
-#define PMU5357_MAINPLL_PLL0 0
-
-/* 4716/47162 resources */
-#define RES4716_PROC_PLL_ON 0x00000040
-#define RES4716_PROC_HT_AVAIL 0x00000080
-
-/* 4716/4717/4718 Chip specific ChipControl register bits */
-#define CCTRL471X_I2S_PINS_ENABLE 0x0080 /* I2S pins off by default, shared with pflash */
-
-/* 5354 resources */
-#define RES5354_EXT_SWITCHER_PWM 0 /* 0x00001 */
-#define RES5354_BB_SWITCHER_PWM 1 /* 0x00002 */
-#define RES5354_BB_SWITCHER_BURST 2 /* 0x00004 */
-#define RES5354_BB_EXT_SWITCHER_BURST 3 /* 0x00008 */
-#define RES5354_ILP_REQUEST 4 /* 0x00010 */
-#define RES5354_RADIO_SWITCHER_PWM 5 /* 0x00020 */
-#define RES5354_RADIO_SWITCHER_BURST 6 /* 0x00040 */
-#define RES5354_ROM_SWITCH 7 /* 0x00080 */
-#define RES5354_PA_REF_LDO 8 /* 0x00100 */
-#define RES5354_RADIO_LDO 9 /* 0x00200 */
-#define RES5354_AFE_LDO 10 /* 0x00400 */
-#define RES5354_PLL_LDO 11 /* 0x00800 */
-#define RES5354_BG_FILTBYP 12 /* 0x01000 */
-#define RES5354_TX_FILTBYP 13 /* 0x02000 */
-#define RES5354_RX_FILTBYP 14 /* 0x04000 */
-#define RES5354_XTAL_PU 15 /* 0x08000 */
-#define RES5354_XTAL_EN 16 /* 0x10000 */
-#define RES5354_BB_PLL_FILTBYP 17 /* 0x20000 */
-#define RES5354_RF_PLL_FILTBYP 18 /* 0x40000 */
-#define RES5354_BB_PLL_PU 19 /* 0x80000 */
-
-/* 5357 Chip specific ChipControl register bits */
-#define CCTRL5357_EXTPA (1<<14) /* extPA in ChipControl 1, bit 14 */
-#define CCTRL5357_ANT_MUX_2o3 (1<<15) /* 2o3 in ChipControl 1, bit 15 */
-
-/* 4328 resources */
-#define RES4328_EXT_SWITCHER_PWM 0 /* 0x00001 */
-#define RES4328_BB_SWITCHER_PWM 1 /* 0x00002 */
-#define RES4328_BB_SWITCHER_BURST 2 /* 0x00004 */
-#define RES4328_BB_EXT_SWITCHER_BURST 3 /* 0x00008 */
-#define RES4328_ILP_REQUEST 4 /* 0x00010 */
-#define RES4328_RADIO_SWITCHER_PWM 5 /* 0x00020 */
-#define RES4328_RADIO_SWITCHER_BURST 6 /* 0x00040 */
-#define RES4328_ROM_SWITCH 7 /* 0x00080 */
-#define RES4328_PA_REF_LDO 8 /* 0x00100 */
-#define RES4328_RADIO_LDO 9 /* 0x00200 */
-#define RES4328_AFE_LDO 10 /* 0x00400 */
-#define RES4328_PLL_LDO 11 /* 0x00800 */
-#define RES4328_BG_FILTBYP 12 /* 0x01000 */
-#define RES4328_TX_FILTBYP 13 /* 0x02000 */
-#define RES4328_RX_FILTBYP 14 /* 0x04000 */
-#define RES4328_XTAL_PU 15 /* 0x08000 */
-#define RES4328_XTAL_EN 16 /* 0x10000 */
-#define RES4328_BB_PLL_FILTBYP 17 /* 0x20000 */
-#define RES4328_RF_PLL_FILTBYP 18 /* 0x40000 */
-#define RES4328_BB_PLL_PU 19 /* 0x80000 */
-
-/* 4325 A0/A1 resources */
-#define RES4325_BUCK_BOOST_BURST 0 /* 0x00000001 */
-#define RES4325_CBUCK_BURST 1 /* 0x00000002 */
-#define RES4325_CBUCK_PWM 2 /* 0x00000004 */
-#define RES4325_CLDO_CBUCK_BURST 3 /* 0x00000008 */
-#define RES4325_CLDO_CBUCK_PWM 4 /* 0x00000010 */
-#define RES4325_BUCK_BOOST_PWM 5 /* 0x00000020 */
-#define RES4325_ILP_REQUEST 6 /* 0x00000040 */
-#define RES4325_ABUCK_BURST 7 /* 0x00000080 */
-#define RES4325_ABUCK_PWM 8 /* 0x00000100 */
-#define RES4325_LNLDO1_PU 9 /* 0x00000200 */
-#define RES4325_OTP_PU 10 /* 0x00000400 */
-#define RES4325_LNLDO3_PU 11 /* 0x00000800 */
-#define RES4325_LNLDO4_PU 12 /* 0x00001000 */
-#define RES4325_XTAL_PU 13 /* 0x00002000 */
-#define RES4325_ALP_AVAIL 14 /* 0x00004000 */
-#define RES4325_RX_PWRSW_PU 15 /* 0x00008000 */
-#define RES4325_TX_PWRSW_PU 16 /* 0x00010000 */
-#define RES4325_RFPLL_PWRSW_PU 17 /* 0x00020000 */
-#define RES4325_LOGEN_PWRSW_PU 18 /* 0x00040000 */
-#define RES4325_AFE_PWRSW_PU 19 /* 0x00080000 */
-#define RES4325_BBPLL_PWRSW_PU 20 /* 0x00100000 */
-#define RES4325_HT_AVAIL 21 /* 0x00200000 */
-
-/* 4325 B0/C0 resources */
-#define RES4325B0_CBUCK_LPOM 1 /* 0x00000002 */
-#define RES4325B0_CBUCK_BURST 2 /* 0x00000004 */
-#define RES4325B0_CBUCK_PWM 3 /* 0x00000008 */
-#define RES4325B0_CLDO_PU 4 /* 0x00000010 */
-
-/* 4325 C1 resources */
-#define RES4325C1_LNLDO2_PU 12 /* 0x00001000 */
-
-/* 4325 chip-specific ChipStatus register bits */
-#define CST4325_SPROM_OTP_SEL_MASK 0x00000003
-#define CST4325_DEFCIS_SEL 0 /* OTP is powered up, use def. CIS, no SPROM */
-#define CST4325_SPROM_SEL 1 /* OTP is powered up, SPROM is present */
-#define CST4325_OTP_SEL 2 /* OTP is powered up, no SPROM */
-#define CST4325_OTP_PWRDN 3 /* OTP is powered down, SPROM is present */
-#define CST4325_SDIO_USB_MODE_MASK 0x00000004
-#define CST4325_SDIO_USB_MODE_SHIFT 2
-#define CST4325_RCAL_VALID_MASK 0x00000008
-#define CST4325_RCAL_VALID_SHIFT 3
-#define CST4325_RCAL_VALUE_MASK 0x000001f0
-#define CST4325_RCAL_VALUE_SHIFT 4
-#define CST4325_PMUTOP_2B_MASK 0x00000200 /* 1 for 2b, 0 for to 2a */
-#define CST4325_PMUTOP_2B_SHIFT 9
-
-#define RES4329_RESERVED0 0 /* 0x00000001 */
-#define RES4329_CBUCK_LPOM 1 /* 0x00000002 */
-#define RES4329_CBUCK_BURST 2 /* 0x00000004 */
-#define RES4329_CBUCK_PWM 3 /* 0x00000008 */
-#define RES4329_CLDO_PU 4 /* 0x00000010 */
-#define RES4329_PALDO_PU 5 /* 0x00000020 */
-#define RES4329_ILP_REQUEST 6 /* 0x00000040 */
-#define RES4329_RESERVED7 7 /* 0x00000080 */
-#define RES4329_RESERVED8 8 /* 0x00000100 */
-#define RES4329_LNLDO1_PU 9 /* 0x00000200 */
-#define RES4329_OTP_PU 10 /* 0x00000400 */
-#define RES4329_RESERVED11 11 /* 0x00000800 */
-#define RES4329_LNLDO2_PU 12 /* 0x00001000 */
-#define RES4329_XTAL_PU 13 /* 0x00002000 */
-#define RES4329_ALP_AVAIL 14 /* 0x00004000 */
-#define RES4329_RX_PWRSW_PU 15 /* 0x00008000 */
-#define RES4329_TX_PWRSW_PU 16 /* 0x00010000 */
-#define RES4329_RFPLL_PWRSW_PU 17 /* 0x00020000 */
-#define RES4329_LOGEN_PWRSW_PU 18 /* 0x00040000 */
-#define RES4329_AFE_PWRSW_PU 19 /* 0x00080000 */
-#define RES4329_BBPLL_PWRSW_PU 20 /* 0x00100000 */
-#define RES4329_HT_AVAIL 21 /* 0x00200000 */
-
-#define CST4329_SPROM_OTP_SEL_MASK 0x00000003
-#define CST4329_DEFCIS_SEL 0 /* OTP is powered up, use def. CIS, no SPROM */
-#define CST4329_SPROM_SEL 1 /* OTP is powered up, SPROM is present */
-#define CST4329_OTP_SEL 2 /* OTP is powered up, no SPROM */
-#define CST4329_OTP_PWRDN 3 /* OTP is powered down, SPROM is present */
-#define CST4329_SPI_SDIO_MODE_MASK 0x00000004
-#define CST4329_SPI_SDIO_MODE_SHIFT 2
-
-/* 4312 chip-specific ChipStatus register bits */
-#define CST4312_SPROM_OTP_SEL_MASK 0x00000003
-#define CST4312_DEFCIS_SEL 0 /* OTP is powered up, use def. CIS, no SPROM */
-#define CST4312_SPROM_SEL 1 /* OTP is powered up, SPROM is present */
-#define CST4312_OTP_SEL 2 /* OTP is powered up, no SPROM */
-#define CST4312_OTP_BAD 3 /* OTP is broken, SPROM is present */
-
-/* 4312 resources (all PMU chips with little memory constraint) */
-#define RES4312_SWITCHER_BURST 0 /* 0x00000001 */
-#define RES4312_SWITCHER_PWM 1 /* 0x00000002 */
-#define RES4312_PA_REF_LDO 2 /* 0x00000004 */
-#define RES4312_CORE_LDO_BURST 3 /* 0x00000008 */
-#define RES4312_CORE_LDO_PWM 4 /* 0x00000010 */
-#define RES4312_RADIO_LDO 5 /* 0x00000020 */
-#define RES4312_ILP_REQUEST 6 /* 0x00000040 */
-#define RES4312_BG_FILTBYP 7 /* 0x00000080 */
-#define RES4312_TX_FILTBYP 8 /* 0x00000100 */
-#define RES4312_RX_FILTBYP 9 /* 0x00000200 */
-#define RES4312_XTAL_PU 10 /* 0x00000400 */
-#define RES4312_ALP_AVAIL 11 /* 0x00000800 */
-#define RES4312_BB_PLL_FILTBYP 12 /* 0x00001000 */
-#define RES4312_RF_PLL_FILTBYP 13 /* 0x00002000 */
-#define RES4312_HT_AVAIL 14 /* 0x00004000 */
-
-/* 4322 resources */
-#define RES4322_RF_LDO 0
-#define RES4322_ILP_REQUEST 1
-#define RES4322_XTAL_PU 2
-#define RES4322_ALP_AVAIL 3
-#define RES4322_SI_PLL_ON 4
-#define RES4322_HT_SI_AVAIL 5
-#define RES4322_PHY_PLL_ON 6
-#define RES4322_HT_PHY_AVAIL 7
-#define RES4322_OTP_PU 8
-
-/* 4322 chip-specific ChipStatus register bits */
-#define CST4322_XTAL_FREQ_20_40MHZ 0x00000020
-#define CST4322_SPROM_OTP_SEL_MASK 0x000000c0
-#define CST4322_SPROM_OTP_SEL_SHIFT 6
-#define CST4322_NO_SPROM_OTP 0 /* no OTP, no SPROM */
-#define CST4322_SPROM_PRESENT 1 /* SPROM is present */
-#define CST4322_OTP_PRESENT 2 /* OTP is present */
-#define CST4322_PCI_OR_USB 0x00000100
-#define CST4322_BOOT_MASK 0x00000600
-#define CST4322_BOOT_SHIFT 9
-#define CST4322_BOOT_FROM_SRAM 0 /* boot from SRAM, ARM in reset */
-#define CST4322_BOOT_FROM_ROM 1 /* boot from ROM */
-#define CST4322_BOOT_FROM_FLASH 2 /* boot from FLASH */
-#define CST4322_BOOT_FROM_INVALID 3
-#define CST4322_ILP_DIV_EN 0x00000800
-#define CST4322_FLASH_TYPE_MASK 0x00001000
-#define CST4322_FLASH_TYPE_SHIFT 12
-#define CST4322_FLASH_TYPE_SHIFT_ST 0 /* ST serial FLASH */
-#define CST4322_FLASH_TYPE_SHIFT_ATMEL 1 /* ATMEL flash */
-#define CST4322_ARM_TAP_SEL 0x00002000
-#define CST4322_RES_INIT_MODE_MASK 0x0000c000
-#define CST4322_RES_INIT_MODE_SHIFT 14
-#define CST4322_RES_INIT_MODE_ILPAVAIL 0 /* resinitmode: ILP available */
-#define CST4322_RES_INIT_MODE_ILPREQ 1 /* resinitmode: ILP request */
-#define CST4322_RES_INIT_MODE_ALPAVAIL 2 /* resinitmode: ALP available */
-#define CST4322_RES_INIT_MODE_HTAVAIL 3 /* resinitmode: HT available */
-#define CST4322_PCIPLLCLK_GATING 0x00010000
-#define CST4322_CLK_SWITCH_PCI_TO_ALP 0x00020000
-#define CST4322_PCI_CARDBUS_MODE 0x00040000
-
-/* 43224 chip-specific ChipControl register bits */
-#define CCTRL43224_GPIO_TOGGLE 0x8000
-#define CCTRL_43224A0_12MA_LED_DRIVE 0x00F000F0 /* 12 mA drive strength */
-#define CCTRL_43224B0_12MA_LED_DRIVE 0xF0 /* 12 mA drive strength for later 43224s */
-
-/* 43236 resources */
-#define RES43236_REGULATOR 0
-#define RES43236_ILP_REQUEST 1
-#define RES43236_XTAL_PU 2
-#define RES43236_ALP_AVAIL 3
-#define RES43236_SI_PLL_ON 4
-#define RES43236_HT_SI_AVAIL 5
-
-/* 43236 chip-specific ChipControl register bits */
-#define CCTRL43236_BT_COEXIST (1<<0) /* 0 disable */
-#define CCTRL43236_SECI (1<<1) /* 0 SECI is disabled (JATG functional) */
-#define CCTRL43236_EXT_LNA (1<<2) /* 0 disable */
-#define CCTRL43236_ANT_MUX_2o3 (1<<3) /* 2o3 mux, chipcontrol bit 3 */
-#define CCTRL43236_GSIO (1<<4) /* 0 disable */
-
-/* 43236 Chip specific ChipStatus register bits */
-#define CST43236_SFLASH_MASK 0x00000040
-#define CST43236_OTP_MASK 0x00000080
-#define CST43236_HSIC_MASK 0x00000100 /* USB/HSIC */
-#define CST43236_BP_CLK 0x00000200 /* 120/96Mbps */
-#define CST43236_BOOT_MASK 0x00001800
-#define CST43236_BOOT_SHIFT 11
-#define CST43236_BOOT_FROM_SRAM 0 /* boot from SRAM, ARM in reset */
-#define CST43236_BOOT_FROM_ROM 1 /* boot from ROM */
-#define CST43236_BOOT_FROM_FLASH 2 /* boot from FLASH */
-#define CST43236_BOOT_FROM_INVALID 3
-
-/* 4331 resources */
-#define RES4331_REGULATOR 0
-#define RES4331_ILP_REQUEST 1
-#define RES4331_XTAL_PU 2
-#define RES4331_ALP_AVAIL 3
-#define RES4331_SI_PLL_ON 4
-#define RES4331_HT_SI_AVAIL 5
-
-/* 4331 chip-specific ChipControl register bits */
-#define CCTRL4331_BT_COEXIST (1<<0) /* 0 disable */
-#define CCTRL4331_SECI (1<<1) /* 0 SECI is disabled (JATG functional) */
-#define CCTRL4331_EXT_LNA (1<<2) /* 0 disable */
-#define CCTRL4331_SPROM_GPIO13_15 (1<<3) /* sprom/gpio13-15 mux */
-#define CCTRL4331_EXTPA_EN (1<<4) /* 0 ext pa disable, 1 ext pa enabled */
-#define CCTRL4331_GPIOCLK_ON_SPROMCS (1<<5) /* set drive out GPIO_CLK on sprom_cs pin */
-#define CCTRL4331_PCIE_MDIO_ON_SPROMCS (1<<6) /* use sprom_cs pin as PCIE mdio interface */
-#define CCTRL4331_EXTPA_ON_GPIO2_5 (1<<7) /* aband extpa will be at gpio2/5 and sprom_dout */
-#define CCTRL4331_OVR_PIPEAUXCLKEN (1<<8) /* override core control on pipe_AuxClkEnable */
-#define CCTRL4331_OVR_PIPEAUXPWRDOWN (1<<9) /* override core control on pipe_AuxPowerDown */
-#define CCTRL4331_PCIE_AUXCLKEN (1<<10) /* pcie_auxclkenable */
-#define CCTRL4331_PCIE_PIPE_PLLDOWN (1<<11) /* pcie_pipe_pllpowerdown */
-#define CCTRL4331_BT_SHD0_ON_GPIO4 (1<<16) /* enable bt_shd0 at gpio4 */
-#define CCTRL4331_BT_SHD1_ON_GPIO5 (1<<17) /* enable bt_shd1 at gpio5 */
-
-/* 4331 Chip specific ChipStatus register bits */
-#define CST4331_XTAL_FREQ 0x00000001 /* crystal frequency 20/40Mhz */
-#define CST4331_SPROM_PRESENT 0x00000002
-#define CST4331_OTP_PRESENT 0x00000004
-#define CST4331_LDO_RF 0x00000008
-#define CST4331_LDO_PAR 0x00000010
-
-/* 4315 resources */
-#define RES4315_CBUCK_LPOM 1 /* 0x00000002 */
-#define RES4315_CBUCK_BURST 2 /* 0x00000004 */
-#define RES4315_CBUCK_PWM 3 /* 0x00000008 */
-#define RES4315_CLDO_PU 4 /* 0x00000010 */
-#define RES4315_PALDO_PU 5 /* 0x00000020 */
-#define RES4315_ILP_REQUEST 6 /* 0x00000040 */
-#define RES4315_LNLDO1_PU 9 /* 0x00000200 */
-#define RES4315_OTP_PU 10 /* 0x00000400 */
-#define RES4315_LNLDO2_PU 12 /* 0x00001000 */
-#define RES4315_XTAL_PU 13 /* 0x00002000 */
-#define RES4315_ALP_AVAIL 14 /* 0x00004000 */
-#define RES4315_RX_PWRSW_PU 15 /* 0x00008000 */
-#define RES4315_TX_PWRSW_PU 16 /* 0x00010000 */
-#define RES4315_RFPLL_PWRSW_PU 17 /* 0x00020000 */
-#define RES4315_LOGEN_PWRSW_PU 18 /* 0x00040000 */
-#define RES4315_AFE_PWRSW_PU 19 /* 0x00080000 */
-#define RES4315_BBPLL_PWRSW_PU 20 /* 0x00100000 */
-#define RES4315_HT_AVAIL 21 /* 0x00200000 */
-
-/* 4315 chip-specific ChipStatus register bits */
-#define CST4315_SPROM_OTP_SEL_MASK 0x00000003 /* gpio [7:6], SDIO CIS selection */
-#define CST4315_DEFCIS_SEL 0x00000000 /* use default CIS, OTP is powered up */
-#define CST4315_SPROM_SEL 0x00000001 /* use SPROM, OTP is powered up */
-#define CST4315_OTP_SEL 0x00000002 /* use OTP, OTP is powered up */
-#define CST4315_OTP_PWRDN 0x00000003 /* use SPROM, OTP is powered down */
-#define CST4315_SDIO_MODE 0x00000004 /* gpio [8], sdio/usb mode */
-#define CST4315_RCAL_VALID 0x00000008
-#define CST4315_RCAL_VALUE_MASK 0x000001f0
-#define CST4315_RCAL_VALUE_SHIFT 4
-#define CST4315_PALDO_EXTPNP 0x00000200 /* PALDO is configured with external PNP */
-#define CST4315_CBUCK_MODE_MASK 0x00000c00
-#define CST4315_CBUCK_MODE_BURST 0x00000400
-#define CST4315_CBUCK_MODE_LPBURST 0x00000c00
-
-/* 4319 resources */
-#define RES4319_CBUCK_LPOM 1 /* 0x00000002 */
-#define RES4319_CBUCK_BURST 2 /* 0x00000004 */
-#define RES4319_CBUCK_PWM 3 /* 0x00000008 */
-#define RES4319_CLDO_PU 4 /* 0x00000010 */
-#define RES4319_PALDO_PU 5 /* 0x00000020 */
-#define RES4319_ILP_REQUEST 6 /* 0x00000040 */
-#define RES4319_LNLDO1_PU 9 /* 0x00000200 */
-#define RES4319_OTP_PU 10 /* 0x00000400 */
-#define RES4319_LNLDO2_PU 12 /* 0x00001000 */
-#define RES4319_XTAL_PU 13 /* 0x00002000 */
-#define RES4319_ALP_AVAIL 14 /* 0x00004000 */
-#define RES4319_RX_PWRSW_PU 15 /* 0x00008000 */
-#define RES4319_TX_PWRSW_PU 16 /* 0x00010000 */
-#define RES4319_RFPLL_PWRSW_PU 17 /* 0x00020000 */
-#define RES4319_LOGEN_PWRSW_PU 18 /* 0x00040000 */
-#define RES4319_AFE_PWRSW_PU 19 /* 0x00080000 */
-#define RES4319_BBPLL_PWRSW_PU 20 /* 0x00100000 */
-#define RES4319_HT_AVAIL 21 /* 0x00200000 */
-
-/* 4319 chip-specific ChipStatus register bits */
-#define CST4319_SPI_CPULESSUSB 0x00000001
-#define CST4319_SPI_CLK_POL 0x00000002
-#define CST4319_SPI_CLK_PH 0x00000008
-#define CST4319_SPROM_OTP_SEL_MASK 0x000000c0 /* gpio [7:6], SDIO CIS selection */
-#define CST4319_SPROM_OTP_SEL_SHIFT 6
-#define CST4319_DEFCIS_SEL 0x00000000 /* use default CIS, OTP is powered up */
-#define CST4319_SPROM_SEL 0x00000040 /* use SPROM, OTP is powered up */
-#define CST4319_OTP_SEL 0x00000080 /* use OTP, OTP is powered up */
-#define CST4319_OTP_PWRDN 0x000000c0 /* use SPROM, OTP is powered down */
-#define CST4319_SDIO_USB_MODE 0x00000100 /* gpio [8], sdio/usb mode */
-#define CST4319_REMAP_SEL_MASK 0x00000600
-#define CST4319_ILPDIV_EN 0x00000800
-#define CST4319_XTAL_PD_POL 0x00001000
-#define CST4319_LPO_SEL 0x00002000
-#define CST4319_RES_INIT_MODE 0x0000c000
-#define CST4319_PALDO_EXTPNP 0x00010000 /* PALDO is configured with external PNP */
-#define CST4319_CBUCK_MODE_MASK 0x00060000
-#define CST4319_CBUCK_MODE_BURST 0x00020000
-#define CST4319_CBUCK_MODE_LPBURST 0x00060000
-#define CST4319_RCAL_VALID 0x01000000
-#define CST4319_RCAL_VALUE_MASK 0x3e000000
-#define CST4319_RCAL_VALUE_SHIFT 25
-
-#define PMU1_PLL0_CHIPCTL0 0
-#define PMU1_PLL0_CHIPCTL1 1
-#define PMU1_PLL0_CHIPCTL2 2
-#define CCTL_4319USB_XTAL_SEL_MASK 0x00180000
-#define CCTL_4319USB_XTAL_SEL_SHIFT 19
-#define CCTL_4319USB_48MHZ_PLL_SEL 1
-#define CCTL_4319USB_24MHZ_PLL_SEL 2
-
-/* PMU resources for 4336 */
-#define RES4336_CBUCK_LPOM 0
-#define RES4336_CBUCK_BURST 1
-#define RES4336_CBUCK_LP_PWM 2
-#define RES4336_CBUCK_PWM 3
-#define RES4336_CLDO_PU 4
-#define RES4336_DIS_INT_RESET_PD 5
-#define RES4336_ILP_REQUEST 6
-#define RES4336_LNLDO_PU 7
-#define RES4336_LDO3P3_PU 8
-#define RES4336_OTP_PU 9
-#define RES4336_XTAL_PU 10
-#define RES4336_ALP_AVAIL 11
-#define RES4336_RADIO_PU 12
-#define RES4336_BG_PU 13
-#define RES4336_VREG1p4_PU_PU 14
-#define RES4336_AFE_PWRSW_PU 15
-#define RES4336_RX_PWRSW_PU 16
-#define RES4336_TX_PWRSW_PU 17
-#define RES4336_BB_PWRSW_PU 18
-#define RES4336_SYNTH_PWRSW_PU 19
-#define RES4336_MISC_PWRSW_PU 20
-#define RES4336_LOGEN_PWRSW_PU 21
-#define RES4336_BBPLL_PWRSW_PU 22
-#define RES4336_MACPHY_CLKAVAIL 23
-#define RES4336_HT_AVAIL 24
-#define RES4336_RSVD 25
-
-/* 4336 chip-specific ChipStatus register bits */
-#define CST4336_SPI_MODE_MASK 0x00000001
-#define CST4336_SPROM_PRESENT 0x00000002
-#define CST4336_OTP_PRESENT 0x00000004
-#define CST4336_ARMREMAP_0 0x00000008
-#define CST4336_ILPDIV_EN_MASK 0x00000010
-#define CST4336_ILPDIV_EN_SHIFT 4
-#define CST4336_XTAL_PD_POL_MASK 0x00000020
-#define CST4336_XTAL_PD_POL_SHIFT 5
-#define CST4336_LPO_SEL_MASK 0x00000040
-#define CST4336_LPO_SEL_SHIFT 6
-#define CST4336_RES_INIT_MODE_MASK 0x00000180
-#define CST4336_RES_INIT_MODE_SHIFT 7
-#define CST4336_CBUCK_MODE_MASK 0x00000600
-#define CST4336_CBUCK_MODE_SHIFT 9
-
-/* 4330 resources */
-#define RES4330_CBUCK_LPOM 0
-#define RES4330_CBUCK_BURST 1
-#define RES4330_CBUCK_LP_PWM 2
-#define RES4330_CBUCK_PWM 3
-#define RES4330_CLDO_PU 4
-#define RES4330_DIS_INT_RESET_PD 5
-#define RES4330_ILP_REQUEST 6
-#define RES4330_LNLDO_PU 7
-#define RES4330_LDO3P3_PU 8
-#define RES4330_OTP_PU 9
-#define RES4330_XTAL_PU 10
-#define RES4330_ALP_AVAIL 11
-#define RES4330_RADIO_PU 12
-#define RES4330_BG_PU 13
-#define RES4330_VREG1p4_PU_PU 14
-#define RES4330_AFE_PWRSW_PU 15
-#define RES4330_RX_PWRSW_PU 16
-#define RES4330_TX_PWRSW_PU 17
-#define RES4330_BB_PWRSW_PU 18
-#define RES4330_SYNTH_PWRSW_PU 19
-#define RES4330_MISC_PWRSW_PU 20
-#define RES4330_LOGEN_PWRSW_PU 21
-#define RES4330_BBPLL_PWRSW_PU 22
-#define RES4330_MACPHY_CLKAVAIL 23
-#define RES4330_HT_AVAIL 24
-#define RES4330_5gRX_PWRSW_PU 25
-#define RES4330_5gTX_PWRSW_PU 26
-#define RES4330_5g_LOGEN_PWRSW_PU 27
-
-/* 4330 chip-specific ChipStatus register bits */
-#define CST4330_CHIPMODE_SDIOD(cs) (((cs) & 0x7) < 6) /* SDIO || gSPI */
-#define CST4330_CHIPMODE_USB20D(cs) (((cs) & 0x7) >= 6) /* USB || USBDA */
-#define CST4330_CHIPMODE_SDIO(cs) (((cs) & 0x4) == 0) /* SDIO */
-#define CST4330_CHIPMODE_GSPI(cs) (((cs) & 0x6) == 4) /* gSPI */
-#define CST4330_CHIPMODE_USB(cs) (((cs) & 0x7) == 6) /* USB packet-oriented */
-#define CST4330_CHIPMODE_USBDA(cs) (((cs) & 0x7) == 7) /* USB Direct Access */
-#define CST4330_OTP_PRESENT 0x00000010
-#define CST4330_LPO_AUTODET_EN 0x00000020
-#define CST4330_ARMREMAP_0 0x00000040
-#define CST4330_SPROM_PRESENT 0x00000080 /* takes priority over OTP if both set */
-#define CST4330_ILPDIV_EN 0x00000100
-#define CST4330_LPO_SEL 0x00000200
-#define CST4330_RES_INIT_MODE_SHIFT 10
-#define CST4330_RES_INIT_MODE_MASK 0x00000c00
-#define CST4330_CBUCK_MODE_SHIFT 12
-#define CST4330_CBUCK_MODE_MASK 0x00003000
-#define CST4330_CBUCK_POWER_OK 0x00004000
-#define CST4330_BB_PLL_LOCKED 0x00008000
-#define SOCDEVRAM_4330_BP_ADDR 0x1E000000
-#define SOCDEVRAM_4330_ARM_ADDR 0x00800000
-
-/* 4313 resources */
-#define RES4313_BB_PU_RSRC 0
-#define RES4313_ILP_REQ_RSRC 1
-#define RES4313_XTAL_PU_RSRC 2
-#define RES4313_ALP_AVAIL_RSRC 3
-#define RES4313_RADIO_PU_RSRC 4
-#define RES4313_BG_PU_RSRC 5
-#define RES4313_VREG1P4_PU_RSRC 6
-#define RES4313_AFE_PWRSW_RSRC 7
-#define RES4313_RX_PWRSW_RSRC 8
-#define RES4313_TX_PWRSW_RSRC 9
-#define RES4313_BB_PWRSW_RSRC 10
-#define RES4313_SYNTH_PWRSW_RSRC 11
-#define RES4313_MISC_PWRSW_RSRC 12
-#define RES4313_BB_PLL_PWRSW_RSRC 13
-#define RES4313_HT_AVAIL_RSRC 14
-#define RES4313_MACPHY_CLK_AVAIL_RSRC 15
-
-/* 4313 chip-specific ChipStatus register bits */
-#define CST4313_SPROM_PRESENT 1
-#define CST4313_OTP_PRESENT 2
-#define CST4313_SPROM_OTP_SEL_MASK 0x00000002
-#define CST4313_SPROM_OTP_SEL_SHIFT 0
-
-/* 4313 Chip specific ChipControl register bits */
-#define CCTRL_4313_12MA_LED_DRIVE 0x00000007 /* 12 mA drive strengh for later 4313 */
-
-/* 43228 resources */
-#define RES43228_NOT_USED 0
-#define RES43228_ILP_REQUEST 1
-#define RES43228_XTAL_PU 2
-#define RES43228_ALP_AVAIL 3
-#define RES43228_PLL_EN 4
-#define RES43228_HT_PHY_AVAIL 5
-
-/* 43228 chipstatus reg bits */
-#define CST43228_ILP_DIV_EN 0x1
-#define CST43228_OTP_PRESENT 0x2
-#define CST43228_SERDES_REFCLK_PADSEL 0x4
-#define CST43228_SDIO_MODE 0x8
-
-#define CST43228_SDIO_OTP_PRESENT 0x10
-#define CST43228_SDIO_RESET 0x20
-
-/*
-* Maximum delay for the PMU state transition in us.
-* This is an upper bound intended for spinwaits etc.
-*/
-#define PMU_MAX_TRANSITION_DLY 15000
-
-/* PMU resource up transition time in ILP cycles */
-#define PMURES_UP_TRANSITION 2
-
-/*
-* Register eci_inputlo bitfield values.
-* - BT packet type information bits [7:0]
-*/
-/* [3:0] - Task (link) type */
-#define BT_ACL 0x00
-#define BT_SCO 0x01
-#define BT_eSCO 0x02
-#define BT_A2DP 0x03
-#define BT_SNIFF 0x04
-#define BT_PAGE_SCAN 0x05
-#define BT_INQUIRY_SCAN 0x06
-#define BT_PAGE 0x07
-#define BT_INQUIRY 0x08
-#define BT_MSS 0x09
-#define BT_PARK 0x0a
-#define BT_RSSISCAN 0x0b
-#define BT_MD_ACL 0x0c
-#define BT_MD_eSCO 0x0d
-#define BT_SCAN_WITH_SCO_LINK 0x0e
-#define BT_SCAN_WITHOUT_SCO_LINK 0x0f
-/* [7:4] = packet duration code */
-/* [8] - Master / Slave */
-#define BT_MASTER 0
-#define BT_SLAVE 1
-/* [11:9] - multi-level priority */
-#define BT_LOWEST_PRIO 0x0
-#define BT_HIGHEST_PRIO 0x3
-
-/* WLAN - number of antenna */
-#define WLAN_NUM_ANT1 TXANT_0
-#define WLAN_NUM_ANT2 TXANT_1
-
-#endif /* _SBCHIPC_H */
diff --git a/drivers/staging/brcm80211/include/sbconfig.h b/drivers/staging/brcm80211/include/sbconfig.h
deleted file mode 100644
index 5247f01ec3647..0000000000000
--- a/drivers/staging/brcm80211/include/sbconfig.h
+++ /dev/null
@@ -1,272 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _SBCONFIG_H
-#define _SBCONFIG_H
-
-/* cpp contortions to concatenate w/arg prescan */
-#ifndef PAD
-#define _PADLINE(line) pad ## line
-#define _XSTR(line) _PADLINE(line)
-#define PAD _XSTR(__LINE__)
-#endif
-
-/* enumeration in SB is based on the premise that cores are contiguos in the
- * enumeration space.
- */
-#define SB_BUS_SIZE 0x10000 /* Each bus gets 64Kbytes for cores */
-#define SB_BUS_BASE(b) (SI_ENUM_BASE + (b) * SB_BUS_SIZE)
-#define SB_BUS_MAXCORES (SB_BUS_SIZE / SI_CORE_SIZE) /* Max cores per bus */
-
-/*
- * Sonics Configuration Space Registers.
- */
-#define SBCONFIGOFF 0xf00 /* core sbconfig regs are top 256bytes of regs */
-#define SBCONFIGSIZE 256 /* sizeof (sbconfig_t) */
-
-#define SBIPSFLAG 0x08
-#define SBTPSFLAG 0x18
-#define SBTMERRLOGA 0x48 /* sonics >= 2.3 */
-#define SBTMERRLOG 0x50 /* sonics >= 2.3 */
-#define SBADMATCH3 0x60
-#define SBADMATCH2 0x68
-#define SBADMATCH1 0x70
-#define SBIMSTATE 0x90
-#define SBINTVEC 0x94
-#define SBTMSTATELOW 0x98
-#define SBTMSTATEHIGH 0x9c
-#define SBBWA0 0xa0
-#define SBIMCONFIGLOW 0xa8
-#define SBIMCONFIGHIGH 0xac
-#define SBADMATCH0 0xb0
-#define SBTMCONFIGLOW 0xb8
-#define SBTMCONFIGHIGH 0xbc
-#define SBBCONFIG 0xc0
-#define SBBSTATE 0xc8
-#define SBACTCNFG 0xd8
-#define SBFLAGST 0xe8
-#define SBIDLOW 0xf8
-#define SBIDHIGH 0xfc
-
-/* All the previous registers are above SBCONFIGOFF, but with Sonics 2.3, we have
- * a few registers *below* that line. I think it would be very confusing to try
- * and change the value of SBCONFIGOFF, so I'm definig them as absolute offsets here,
- */
-
-#define SBIMERRLOGA 0xea8
-#define SBIMERRLOG 0xeb0
-#define SBTMPORTCONNID0 0xed8
-#define SBTMPORTLOCK0 0xef8
-
-#ifndef _LANGUAGE_ASSEMBLY
-
-typedef volatile struct _sbconfig {
- u32 PAD[2];
- u32 sbipsflag; /* initiator port ocp slave flag */
- u32 PAD[3];
- u32 sbtpsflag; /* target port ocp slave flag */
- u32 PAD[11];
- u32 sbtmerrloga; /* (sonics >= 2.3) */
- u32 PAD;
- u32 sbtmerrlog; /* (sonics >= 2.3) */
- u32 PAD[3];
- u32 sbadmatch3; /* address match3 */
- u32 PAD;
- u32 sbadmatch2; /* address match2 */
- u32 PAD;
- u32 sbadmatch1; /* address match1 */
- u32 PAD[7];
- u32 sbimstate; /* initiator agent state */
- u32 sbintvec; /* interrupt mask */
- u32 sbtmstatelow; /* target state */
- u32 sbtmstatehigh; /* target state */
- u32 sbbwa0; /* bandwidth allocation table0 */
- u32 PAD;
- u32 sbimconfiglow; /* initiator configuration */
- u32 sbimconfighigh; /* initiator configuration */
- u32 sbadmatch0; /* address match0 */
- u32 PAD;
- u32 sbtmconfiglow; /* target configuration */
- u32 sbtmconfighigh; /* target configuration */
- u32 sbbconfig; /* broadcast configuration */
- u32 PAD;
- u32 sbbstate; /* broadcast state */
- u32 PAD[3];
- u32 sbactcnfg; /* activate configuration */
- u32 PAD[3];
- u32 sbflagst; /* current sbflags */
- u32 PAD[3];
- u32 sbidlow; /* identification */
- u32 sbidhigh; /* identification */
-} sbconfig_t;
-
-#endif /* _LANGUAGE_ASSEMBLY */
-
-/* sbipsflag */
-#define SBIPS_INT1_MASK 0x3f /* which sbflags get routed to mips interrupt 1 */
-#define SBIPS_INT1_SHIFT 0
-#define SBIPS_INT2_MASK 0x3f00 /* which sbflags get routed to mips interrupt 2 */
-#define SBIPS_INT2_SHIFT 8
-#define SBIPS_INT3_MASK 0x3f0000 /* which sbflags get routed to mips interrupt 3 */
-#define SBIPS_INT3_SHIFT 16
-#define SBIPS_INT4_MASK 0x3f000000 /* which sbflags get routed to mips interrupt 4 */
-#define SBIPS_INT4_SHIFT 24
-
-/* sbtpsflag */
-#define SBTPS_NUM0_MASK 0x3f /* interrupt sbFlag # generated by this core */
-#define SBTPS_F0EN0 0x40 /* interrupt is always sent on the backplane */
-
-/* sbtmerrlog */
-#define SBTMEL_CM 0x00000007 /* command */
-#define SBTMEL_CI 0x0000ff00 /* connection id */
-#define SBTMEL_EC 0x0f000000 /* error code */
-#define SBTMEL_ME 0x80000000 /* multiple error */
-
-/* sbimstate */
-#define SBIM_PC 0xf /* pipecount */
-#define SBIM_AP_MASK 0x30 /* arbitration policy */
-#define SBIM_AP_BOTH 0x00 /* use both timeslaces and token */
-#define SBIM_AP_TS 0x10 /* use timesliaces only */
-#define SBIM_AP_TK 0x20 /* use token only */
-#define SBIM_AP_RSV 0x30 /* reserved */
-#define SBIM_IBE 0x20000 /* inbanderror */
-#define SBIM_TO 0x40000 /* timeout */
-#define SBIM_BY 0x01800000 /* busy (sonics >= 2.3) */
-#define SBIM_RJ 0x02000000 /* reject (sonics >= 2.3) */
-
-/* sbtmstatelow */
-#define SBTML_RESET 0x0001 /* reset */
-#define SBTML_REJ_MASK 0x0006 /* reject field */
-#define SBTML_REJ 0x0002 /* reject */
-#define SBTML_TMPREJ 0x0004 /* temporary reject, for error recovery */
-
-#define SBTML_SICF_SHIFT 16 /* Shift to locate the SI control flags in sbtml */
-
-/* sbtmstatehigh */
-#define SBTMH_SERR 0x0001 /* serror */
-#define SBTMH_INT 0x0002 /* interrupt */
-#define SBTMH_BUSY 0x0004 /* busy */
-#define SBTMH_TO 0x0020 /* timeout (sonics >= 2.3) */
-
-#define SBTMH_SISF_SHIFT 16 /* Shift to locate the SI status flags in sbtmh */
-
-/* sbbwa0 */
-#define SBBWA_TAB0_MASK 0xffff /* lookup table 0 */
-#define SBBWA_TAB1_MASK 0xffff /* lookup table 1 */
-#define SBBWA_TAB1_SHIFT 16
-
-/* sbimconfiglow */
-#define SBIMCL_STO_MASK 0x7 /* service timeout */
-#define SBIMCL_RTO_MASK 0x70 /* request timeout */
-#define SBIMCL_RTO_SHIFT 4
-#define SBIMCL_CID_MASK 0xff0000 /* connection id */
-#define SBIMCL_CID_SHIFT 16
-
-/* sbimconfighigh */
-#define SBIMCH_IEM_MASK 0xc /* inband error mode */
-#define SBIMCH_TEM_MASK 0x30 /* timeout error mode */
-#define SBIMCH_TEM_SHIFT 4
-#define SBIMCH_BEM_MASK 0xc0 /* bus error mode */
-#define SBIMCH_BEM_SHIFT 6
-
-/* sbadmatch0 */
-#define SBAM_TYPE_MASK 0x3 /* address type */
-#define SBAM_AD64 0x4 /* reserved */
-#define SBAM_ADINT0_MASK 0xf8 /* type0 size */
-#define SBAM_ADINT0_SHIFT 3
-#define SBAM_ADINT1_MASK 0x1f8 /* type1 size */
-#define SBAM_ADINT1_SHIFT 3
-#define SBAM_ADINT2_MASK 0x1f8 /* type2 size */
-#define SBAM_ADINT2_SHIFT 3
-#define SBAM_ADEN 0x400 /* enable */
-#define SBAM_ADNEG 0x800 /* negative decode */
-#define SBAM_BASE0_MASK 0xffffff00 /* type0 base address */
-#define SBAM_BASE0_SHIFT 8
-#define SBAM_BASE1_MASK 0xfffff000 /* type1 base address for the core */
-#define SBAM_BASE1_SHIFT 12
-#define SBAM_BASE2_MASK 0xffff0000 /* type2 base address for the core */
-#define SBAM_BASE2_SHIFT 16
-
-/* sbtmconfiglow */
-#define SBTMCL_CD_MASK 0xff /* clock divide */
-#define SBTMCL_CO_MASK 0xf800 /* clock offset */
-#define SBTMCL_CO_SHIFT 11
-#define SBTMCL_IF_MASK 0xfc0000 /* interrupt flags */
-#define SBTMCL_IF_SHIFT 18
-#define SBTMCL_IM_MASK 0x3000000 /* interrupt mode */
-#define SBTMCL_IM_SHIFT 24
-
-/* sbtmconfighigh */
-#define SBTMCH_BM_MASK 0x3 /* busy mode */
-#define SBTMCH_RM_MASK 0x3 /* retry mode */
-#define SBTMCH_RM_SHIFT 2
-#define SBTMCH_SM_MASK 0x30 /* stop mode */
-#define SBTMCH_SM_SHIFT 4
-#define SBTMCH_EM_MASK 0x300 /* sb error mode */
-#define SBTMCH_EM_SHIFT 8
-#define SBTMCH_IM_MASK 0xc00 /* int mode */
-#define SBTMCH_IM_SHIFT 10
-
-/* sbbconfig */
-#define SBBC_LAT_MASK 0x3 /* sb latency */
-#define SBBC_MAX0_MASK 0xf0000 /* maxccntr0 */
-#define SBBC_MAX0_SHIFT 16
-#define SBBC_MAX1_MASK 0xf00000 /* maxccntr1 */
-#define SBBC_MAX1_SHIFT 20
-
-/* sbbstate */
-#define SBBS_SRD 0x1 /* st reg disable */
-#define SBBS_HRD 0x2 /* hold reg disable */
-
-/* sbidlow */
-#define SBIDL_CS_MASK 0x3 /* config space */
-#define SBIDL_AR_MASK 0x38 /* # address ranges supported */
-#define SBIDL_AR_SHIFT 3
-#define SBIDL_SYNCH 0x40 /* sync */
-#define SBIDL_INIT 0x80 /* initiator */
-#define SBIDL_MINLAT_MASK 0xf00 /* minimum backplane latency */
-#define SBIDL_MINLAT_SHIFT 8
-#define SBIDL_MAXLAT 0xf000 /* maximum backplane latency */
-#define SBIDL_MAXLAT_SHIFT 12
-#define SBIDL_FIRST 0x10000 /* this initiator is first */
-#define SBIDL_CW_MASK 0xc0000 /* cycle counter width */
-#define SBIDL_CW_SHIFT 18
-#define SBIDL_TP_MASK 0xf00000 /* target ports */
-#define SBIDL_TP_SHIFT 20
-#define SBIDL_IP_MASK 0xf000000 /* initiator ports */
-#define SBIDL_IP_SHIFT 24
-#define SBIDL_RV_MASK 0xf0000000 /* sonics backplane revision code */
-#define SBIDL_RV_SHIFT 28
-#define SBIDL_RV_2_2 0x00000000 /* version 2.2 or earlier */
-#define SBIDL_RV_2_3 0x10000000 /* version 2.3 */
-
-/* sbidhigh */
-#define SBIDH_RC_MASK 0x000f /* revision code */
-#define SBIDH_RCE_MASK 0x7000 /* revision code extension field */
-#define SBIDH_RCE_SHIFT 8
-#define SBCOREREV(sbidh) \
- ((((sbidh) & SBIDH_RCE_MASK) >> SBIDH_RCE_SHIFT) | ((sbidh) & SBIDH_RC_MASK))
-#define SBIDH_CC_MASK 0x8ff0 /* core code */
-#define SBIDH_CC_SHIFT 4
-#define SBIDH_VC_MASK 0xffff0000 /* vendor code */
-#define SBIDH_VC_SHIFT 16
-
-#define SB_COMMIT 0xfd8 /* update buffered registers value */
-
-/* vendor codes */
-#define SB_VEND_BCM 0x4243 /* Broadcom's SB vendor code */
-
-#endif /* _SBCONFIG_H */
diff --git a/drivers/staging/brcm80211/include/sbhnddma.h b/drivers/staging/brcm80211/include/sbhnddma.h
deleted file mode 100644
index 08cb7f6e0d856..0000000000000
--- a/drivers/staging/brcm80211/include/sbhnddma.h
+++ /dev/null
@@ -1,315 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _sbhnddma_h_
-#define _sbhnddma_h_
-
-/* DMA structure:
- * support two DMA engines: 32 bits address or 64 bit addressing
- * basic DMA register set is per channel(transmit or receive)
- * a pair of channels is defined for convenience
- */
-
-/* 32 bits addressing */
-
-/* dma registers per channel(xmt or rcv) */
-typedef volatile struct {
- u32 control; /* enable, et al */
- u32 addr; /* descriptor ring base address (4K aligned) */
- u32 ptr; /* last descriptor posted to chip */
- u32 status; /* current active descriptor, et al */
-} dma32regs_t;
-
-typedef volatile struct {
- dma32regs_t xmt; /* dma tx channel */
- dma32regs_t rcv; /* dma rx channel */
-} dma32regp_t;
-
-typedef volatile struct { /* diag access */
- u32 fifoaddr; /* diag address */
- u32 fifodatalow; /* low 32bits of data */
- u32 fifodatahigh; /* high 32bits of data */
- u32 pad; /* reserved */
-} dma32diag_t;
-
-/*
- * DMA Descriptor
- * Descriptors are only read by the hardware, never written back.
- */
-typedef volatile struct {
- u32 ctrl; /* misc control bits & bufcount */
- u32 addr; /* data buffer address */
-} dma32dd_t;
-
-/*
- * Each descriptor ring must be 4096byte aligned, and fit within a single 4096byte page.
- */
-#define D32RINGALIGN_BITS 12
-#define D32MAXRINGSZ (1 << D32RINGALIGN_BITS)
-#define D32RINGALIGN (1 << D32RINGALIGN_BITS)
-
-#define D32MAXDD (D32MAXRINGSZ / sizeof (dma32dd_t))
-
-/* transmit channel control */
-#define XC_XE ((u32)1 << 0) /* transmit enable */
-#define XC_SE ((u32)1 << 1) /* transmit suspend request */
-#define XC_LE ((u32)1 << 2) /* loopback enable */
-#define XC_FL ((u32)1 << 4) /* flush request */
-#define XC_PD ((u32)1 << 11) /* parity check disable */
-#define XC_AE ((u32)3 << 16) /* address extension bits */
-#define XC_AE_SHIFT 16
-
-/* transmit descriptor table pointer */
-#define XP_LD_MASK 0xfff /* last valid descriptor */
-
-/* transmit channel status */
-#define XS_CD_MASK 0x0fff /* current descriptor pointer */
-#define XS_XS_MASK 0xf000 /* transmit state */
-#define XS_XS_SHIFT 12
-#define XS_XS_DISABLED 0x0000 /* disabled */
-#define XS_XS_ACTIVE 0x1000 /* active */
-#define XS_XS_IDLE 0x2000 /* idle wait */
-#define XS_XS_STOPPED 0x3000 /* stopped */
-#define XS_XS_SUSP 0x4000 /* suspend pending */
-#define XS_XE_MASK 0xf0000 /* transmit errors */
-#define XS_XE_SHIFT 16
-#define XS_XE_NOERR 0x00000 /* no error */
-#define XS_XE_DPE 0x10000 /* descriptor protocol error */
-#define XS_XE_DFU 0x20000 /* data fifo underrun */
-#define XS_XE_BEBR 0x30000 /* bus error on buffer read */
-#define XS_XE_BEDA 0x40000 /* bus error on descriptor access */
-#define XS_AD_MASK 0xfff00000 /* active descriptor */
-#define XS_AD_SHIFT 20
-
-/* receive channel control */
-#define RC_RE ((u32)1 << 0) /* receive enable */
-#define RC_RO_MASK 0xfe /* receive frame offset */
-#define RC_RO_SHIFT 1
-#define RC_FM ((u32)1 << 8) /* direct fifo receive (pio) mode */
-#define RC_SH ((u32)1 << 9) /* separate rx header descriptor enable */
-#define RC_OC ((u32)1 << 10) /* overflow continue */
-#define RC_PD ((u32)1 << 11) /* parity check disable */
-#define RC_AE ((u32)3 << 16) /* address extension bits */
-#define RC_AE_SHIFT 16
-
-/* receive descriptor table pointer */
-#define RP_LD_MASK 0xfff /* last valid descriptor */
-
-/* receive channel status */
-#define RS_CD_MASK 0x0fff /* current descriptor pointer */
-#define RS_RS_MASK 0xf000 /* receive state */
-#define RS_RS_SHIFT 12
-#define RS_RS_DISABLED 0x0000 /* disabled */
-#define RS_RS_ACTIVE 0x1000 /* active */
-#define RS_RS_IDLE 0x2000 /* idle wait */
-#define RS_RS_STOPPED 0x3000 /* reserved */
-#define RS_RE_MASK 0xf0000 /* receive errors */
-#define RS_RE_SHIFT 16
-#define RS_RE_NOERR 0x00000 /* no error */
-#define RS_RE_DPE 0x10000 /* descriptor protocol error */
-#define RS_RE_DFO 0x20000 /* data fifo overflow */
-#define RS_RE_BEBW 0x30000 /* bus error on buffer write */
-#define RS_RE_BEDA 0x40000 /* bus error on descriptor access */
-#define RS_AD_MASK 0xfff00000 /* active descriptor */
-#define RS_AD_SHIFT 20
-
-/* fifoaddr */
-#define FA_OFF_MASK 0xffff /* offset */
-#define FA_SEL_MASK 0xf0000 /* select */
-#define FA_SEL_SHIFT 16
-#define FA_SEL_XDD 0x00000 /* transmit dma data */
-#define FA_SEL_XDP 0x10000 /* transmit dma pointers */
-#define FA_SEL_RDD 0x40000 /* receive dma data */
-#define FA_SEL_RDP 0x50000 /* receive dma pointers */
-#define FA_SEL_XFD 0x80000 /* transmit fifo data */
-#define FA_SEL_XFP 0x90000 /* transmit fifo pointers */
-#define FA_SEL_RFD 0xc0000 /* receive fifo data */
-#define FA_SEL_RFP 0xd0000 /* receive fifo pointers */
-#define FA_SEL_RSD 0xe0000 /* receive frame status data */
-#define FA_SEL_RSP 0xf0000 /* receive frame status pointers */
-
-/* descriptor control flags */
-#define CTRL_BC_MASK 0x00001fff /* buffer byte count, real data len must <= 4KB */
-#define CTRL_AE ((u32)3 << 16) /* address extension bits */
-#define CTRL_AE_SHIFT 16
-#define CTRL_PARITY ((u32)3 << 18) /* parity bit */
-#define CTRL_EOT ((u32)1 << 28) /* end of descriptor table */
-#define CTRL_IOC ((u32)1 << 29) /* interrupt on completion */
-#define CTRL_EOF ((u32)1 << 30) /* end of frame */
-#define CTRL_SOF ((u32)1 << 31) /* start of frame */
-
-/* control flags in the range [27:20] are core-specific and not defined here */
-#define CTRL_CORE_MASK 0x0ff00000
-
-/* 64 bits addressing */
-
-/* dma registers per channel(xmt or rcv) */
-typedef volatile struct {
- u32 control; /* enable, et al */
- u32 ptr; /* last descriptor posted to chip */
- u32 addrlow; /* descriptor ring base address low 32-bits (8K aligned) */
- u32 addrhigh; /* descriptor ring base address bits 63:32 (8K aligned) */
- u32 status0; /* current descriptor, xmt state */
- u32 status1; /* active descriptor, xmt error */
-} dma64regs_t;
-
-typedef volatile struct {
- dma64regs_t tx; /* dma64 tx channel */
- dma64regs_t rx; /* dma64 rx channel */
-} dma64regp_t;
-
-typedef volatile struct { /* diag access */
- u32 fifoaddr; /* diag address */
- u32 fifodatalow; /* low 32bits of data */
- u32 fifodatahigh; /* high 32bits of data */
- u32 pad; /* reserved */
-} dma64diag_t;
-
-/*
- * DMA Descriptor
- * Descriptors are only read by the hardware, never written back.
- */
-typedef volatile struct {
- u32 ctrl1; /* misc control bits & bufcount */
- u32 ctrl2; /* buffer count and address extension */
- u32 addrlow; /* memory address of the date buffer, bits 31:0 */
- u32 addrhigh; /* memory address of the date buffer, bits 63:32 */
-} dma64dd_t;
-
-/*
- * Each descriptor ring must be 8kB aligned, and fit within a contiguous 8kB physical address.
- */
-#define D64RINGALIGN_BITS 13
-#define D64MAXRINGSZ (1 << D64RINGALIGN_BITS)
-#define D64RINGALIGN (1 << D64RINGALIGN_BITS)
-
-#define D64MAXDD (D64MAXRINGSZ / sizeof (dma64dd_t))
-
-/* transmit channel control */
-#define D64_XC_XE 0x00000001 /* transmit enable */
-#define D64_XC_SE 0x00000002 /* transmit suspend request */
-#define D64_XC_LE 0x00000004 /* loopback enable */
-#define D64_XC_FL 0x00000010 /* flush request */
-#define D64_XC_PD 0x00000800 /* parity check disable */
-#define D64_XC_AE 0x00030000 /* address extension bits */
-#define D64_XC_AE_SHIFT 16
-
-/* transmit descriptor table pointer */
-#define D64_XP_LD_MASK 0x00000fff /* last valid descriptor */
-
-/* transmit channel status */
-#define D64_XS0_CD_MASK 0x00001fff /* current descriptor pointer */
-#define D64_XS0_XS_MASK 0xf0000000 /* transmit state */
-#define D64_XS0_XS_SHIFT 28
-#define D64_XS0_XS_DISABLED 0x00000000 /* disabled */
-#define D64_XS0_XS_ACTIVE 0x10000000 /* active */
-#define D64_XS0_XS_IDLE 0x20000000 /* idle wait */
-#define D64_XS0_XS_STOPPED 0x30000000 /* stopped */
-#define D64_XS0_XS_SUSP 0x40000000 /* suspend pending */
-
-#define D64_XS1_AD_MASK 0x00001fff /* active descriptor */
-#define D64_XS1_XE_MASK 0xf0000000 /* transmit errors */
-#define D64_XS1_XE_SHIFT 28
-#define D64_XS1_XE_NOERR 0x00000000 /* no error */
-#define D64_XS1_XE_DPE 0x10000000 /* descriptor protocol error */
-#define D64_XS1_XE_DFU 0x20000000 /* data fifo underrun */
-#define D64_XS1_XE_DTE 0x30000000 /* data transfer error */
-#define D64_XS1_XE_DESRE 0x40000000 /* descriptor read error */
-#define D64_XS1_XE_COREE 0x50000000 /* core error */
-
-/* receive channel control */
-#define D64_RC_RE 0x00000001 /* receive enable */
-#define D64_RC_RO_MASK 0x000000fe /* receive frame offset */
-#define D64_RC_RO_SHIFT 1
-#define D64_RC_FM 0x00000100 /* direct fifo receive (pio) mode */
-#define D64_RC_SH 0x00000200 /* separate rx header descriptor enable */
-#define D64_RC_OC 0x00000400 /* overflow continue */
-#define D64_RC_PD 0x00000800 /* parity check disable */
-#define D64_RC_AE 0x00030000 /* address extension bits */
-#define D64_RC_AE_SHIFT 16
-
-/* flags for dma controller */
-#define DMA_CTRL_PEN (1 << 0) /* partity enable */
-#define DMA_CTRL_ROC (1 << 1) /* rx overflow continue */
-#define DMA_CTRL_RXMULTI (1 << 2) /* allow rx scatter to multiple descriptors */
-#define DMA_CTRL_UNFRAMED (1 << 3) /* Unframed Rx/Tx data */
-
-/* receive descriptor table pointer */
-#define D64_RP_LD_MASK 0x00000fff /* last valid descriptor */
-
-/* receive channel status */
-#define D64_RS0_CD_MASK 0x00001fff /* current descriptor pointer */
-#define D64_RS0_RS_MASK 0xf0000000 /* receive state */
-#define D64_RS0_RS_SHIFT 28
-#define D64_RS0_RS_DISABLED 0x00000000 /* disabled */
-#define D64_RS0_RS_ACTIVE 0x10000000 /* active */
-#define D64_RS0_RS_IDLE 0x20000000 /* idle wait */
-#define D64_RS0_RS_STOPPED 0x30000000 /* stopped */
-#define D64_RS0_RS_SUSP 0x40000000 /* suspend pending */
-
-#define D64_RS1_AD_MASK 0x0001ffff /* active descriptor */
-#define D64_RS1_RE_MASK 0xf0000000 /* receive errors */
-#define D64_RS1_RE_SHIFT 28
-#define D64_RS1_RE_NOERR 0x00000000 /* no error */
-#define D64_RS1_RE_DPO 0x10000000 /* descriptor protocol error */
-#define D64_RS1_RE_DFU 0x20000000 /* data fifo overflow */
-#define D64_RS1_RE_DTE 0x30000000 /* data transfer error */
-#define D64_RS1_RE_DESRE 0x40000000 /* descriptor read error */
-#define D64_RS1_RE_COREE 0x50000000 /* core error */
-
-/* fifoaddr */
-#define D64_FA_OFF_MASK 0xffff /* offset */
-#define D64_FA_SEL_MASK 0xf0000 /* select */
-#define D64_FA_SEL_SHIFT 16
-#define D64_FA_SEL_XDD 0x00000 /* transmit dma data */
-#define D64_FA_SEL_XDP 0x10000 /* transmit dma pointers */
-#define D64_FA_SEL_RDD 0x40000 /* receive dma data */
-#define D64_FA_SEL_RDP 0x50000 /* receive dma pointers */
-#define D64_FA_SEL_XFD 0x80000 /* transmit fifo data */
-#define D64_FA_SEL_XFP 0x90000 /* transmit fifo pointers */
-#define D64_FA_SEL_RFD 0xc0000 /* receive fifo data */
-#define D64_FA_SEL_RFP 0xd0000 /* receive fifo pointers */
-#define D64_FA_SEL_RSD 0xe0000 /* receive frame status data */
-#define D64_FA_SEL_RSP 0xf0000 /* receive frame status pointers */
-
-/* descriptor control flags 1 */
-#define D64_CTRL_COREFLAGS 0x0ff00000 /* core specific flags */
-#define D64_CTRL1_EOT ((u32)1 << 28) /* end of descriptor table */
-#define D64_CTRL1_IOC ((u32)1 << 29) /* interrupt on completion */
-#define D64_CTRL1_EOF ((u32)1 << 30) /* end of frame */
-#define D64_CTRL1_SOF ((u32)1 << 31) /* start of frame */
-
-/* descriptor control flags 2 */
-#define D64_CTRL2_BC_MASK 0x00007fff /* buffer byte count. real data len must <= 16KB */
-#define D64_CTRL2_AE 0x00030000 /* address extension bits */
-#define D64_CTRL2_AE_SHIFT 16
-#define D64_CTRL2_PARITY 0x00040000 /* parity bit */
-
-/* control flags in the range [27:20] are core-specific and not defined here */
-#define D64_CTRL_CORE_MASK 0x0ff00000
-
-#define D64_RX_FRM_STS_LEN 0x0000ffff /* frame length mask */
-#define D64_RX_FRM_STS_OVFL 0x00800000 /* RxOverFlow */
-#define D64_RX_FRM_STS_DSCRCNT 0x0f000000 /* no. of descriptors used - 1 */
-#define D64_RX_FRM_STS_DATATYPE 0xf0000000 /* core-dependent data type */
-
-/* receive frame status */
-typedef volatile struct {
- u16 len;
- u16 flags;
-} dma_rxh_t;
-
-#endif /* _sbhnddma_h_ */
diff --git a/drivers/staging/brcm80211/include/sbsdio.h b/drivers/staging/brcm80211/include/sbsdio.h
deleted file mode 100644
index c7facd3795a08..0000000000000
--- a/drivers/staging/brcm80211/include/sbsdio.h
+++ /dev/null
@@ -1,152 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _SBSDIO_H
-#define _SBSDIO_H
-
-#define SBSDIO_NUM_FUNCTION 3 /* as of sdiod rev 0, supports 3 functions */
-
-/* function 1 miscellaneous registers */
-#define SBSDIO_SPROM_CS 0x10000 /* sprom command and status */
-#define SBSDIO_SPROM_INFO 0x10001 /* sprom info register */
-#define SBSDIO_SPROM_DATA_LOW 0x10002 /* sprom indirect access data byte 0 */
-#define SBSDIO_SPROM_DATA_HIGH 0x10003 /* sprom indirect access data byte 1 */
-#define SBSDIO_SPROM_ADDR_LOW 0x10004 /* sprom indirect access addr byte 0 */
-#define SBSDIO_SPROM_ADDR_HIGH 0x10005 /* sprom indirect access addr byte 0 */
-#define SBSDIO_CHIP_CTRL_DATA 0x10006 /* xtal_pu (gpio) output */
-#define SBSDIO_CHIP_CTRL_EN 0x10007 /* xtal_pu (gpio) enable */
-#define SBSDIO_WATERMARK 0x10008 /* rev < 7, watermark for sdio device */
-#define SBSDIO_DEVICE_CTL 0x10009 /* control busy signal generation */
-
-/* registers introduced in rev 8, some content (mask/bits) defs in sbsdpcmdev.h */
-#define SBSDIO_FUNC1_SBADDRLOW 0x1000A /* SB Address Window Low (b15) */
-#define SBSDIO_FUNC1_SBADDRMID 0x1000B /* SB Address Window Mid (b23:b16) */
-#define SBSDIO_FUNC1_SBADDRHIGH 0x1000C /* SB Address Window High (b31:b24) */
-#define SBSDIO_FUNC1_FRAMECTRL 0x1000D /* Frame Control (frame term/abort) */
-#define SBSDIO_FUNC1_CHIPCLKCSR 0x1000E /* ChipClockCSR (ALP/HT ctl/status) */
-#define SBSDIO_FUNC1_SDIOPULLUP 0x1000F /* SdioPullUp (on cmd, d0-d2) */
-#define SBSDIO_FUNC1_WFRAMEBCLO 0x10019 /* Write Frame Byte Count Low */
-#define SBSDIO_FUNC1_WFRAMEBCHI 0x1001A /* Write Frame Byte Count High */
-#define SBSDIO_FUNC1_RFRAMEBCLO 0x1001B /* Read Frame Byte Count Low */
-#define SBSDIO_FUNC1_RFRAMEBCHI 0x1001C /* Read Frame Byte Count High */
-
-#define SBSDIO_FUNC1_MISC_REG_START 0x10000 /* f1 misc register start */
-#define SBSDIO_FUNC1_MISC_REG_LIMIT 0x1001C /* f1 misc register end */
-
-/* SBSDIO_SPROM_CS */
-#define SBSDIO_SPROM_IDLE 0
-#define SBSDIO_SPROM_WRITE 1
-#define SBSDIO_SPROM_READ 2
-#define SBSDIO_SPROM_WEN 4
-#define SBSDIO_SPROM_WDS 7
-#define SBSDIO_SPROM_DONE 8
-
-/* SBSDIO_SPROM_INFO */
-#define SROM_SZ_MASK 0x03 /* SROM size, 1: 4k, 2: 16k */
-#define SROM_BLANK 0x04 /* depreciated in corerev 6 */
-#define SROM_OTP 0x80 /* OTP present */
-
-/* SBSDIO_CHIP_CTRL */
-#define SBSDIO_CHIP_CTRL_XTAL 0x01 /* or'd with onchip xtal_pu,
- * 1: power on oscillator
- * (for 4318 only)
- */
-/* SBSDIO_WATERMARK */
-#define SBSDIO_WATERMARK_MASK 0x7f /* number of words - 1 for sd device
- * to wait before sending data to host
- */
-
-/* SBSDIO_DEVICE_CTL */
-#define SBSDIO_DEVCTL_SETBUSY 0x01 /* 1: device will assert busy signal when
- * receiving CMD53
- */
-#define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02 /* 1: assertion of sdio interrupt is
- * synchronous to the sdio clock
- */
-#define SBSDIO_DEVCTL_CA_INT_ONLY 0x04 /* 1: mask all interrupts to host
- * except the chipActive (rev 8)
- */
-#define SBSDIO_DEVCTL_PADS_ISO 0x08 /* 1: isolate internal sdio signals, put
- * external pads in tri-state; requires
- * sdio bus power cycle to clear (rev 9)
- */
-#define SBSDIO_DEVCTL_SB_RST_CTL 0x30 /* Force SD->SB reset mapping (rev 11) */
-#define SBSDIO_DEVCTL_RST_CORECTL 0x00 /* Determined by CoreControl bit */
-#define SBSDIO_DEVCTL_RST_BPRESET 0x10 /* Force backplane reset */
-#define SBSDIO_DEVCTL_RST_NOBPRESET 0x20 /* Force no backplane reset */
-
-/* SBSDIO_FUNC1_CHIPCLKCSR */
-#define SBSDIO_FORCE_ALP 0x01 /* Force ALP request to backplane */
-#define SBSDIO_FORCE_HT 0x02 /* Force HT request to backplane */
-#define SBSDIO_FORCE_ILP 0x04 /* Force ILP request to backplane */
-#define SBSDIO_ALP_AVAIL_REQ 0x08 /* Make ALP ready (power up xtal) */
-#define SBSDIO_HT_AVAIL_REQ 0x10 /* Make HT ready (power up PLL) */
-#define SBSDIO_FORCE_HW_CLKREQ_OFF 0x20 /* Squelch clock requests from HW */
-#define SBSDIO_ALP_AVAIL 0x40 /* Status: ALP is ready */
-#define SBSDIO_HT_AVAIL 0x80 /* Status: HT is ready */
-/* In rev8, actual avail bits followed original docs */
-#define SBSDIO_Rev8_HT_AVAIL 0x40
-#define SBSDIO_Rev8_ALP_AVAIL 0x80
-
-#define SBSDIO_AVBITS (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL)
-#define SBSDIO_ALPAV(regval) ((regval) & SBSDIO_AVBITS)
-#define SBSDIO_HTAV(regval) (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS)
-#define SBSDIO_ALPONLY(regval) (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval))
-#define SBSDIO_CLKAV(regval, alponly) (SBSDIO_ALPAV(regval) && \
- (alponly ? 1 : SBSDIO_HTAV(regval)))
-
-/* SBSDIO_FUNC1_SDIOPULLUP */
-#define SBSDIO_PULLUP_D0 0x01 /* Enable D0/MISO pullup */
-#define SBSDIO_PULLUP_D1 0x02 /* Enable D1/INT# pullup */
-#define SBSDIO_PULLUP_D2 0x04 /* Enable D2 pullup */
-#define SBSDIO_PULLUP_CMD 0x08 /* Enable CMD/MOSI pullup */
-#define SBSDIO_PULLUP_ALL 0x0f /* All valid bits */
-
-/* function 1 OCP space */
-#define SBSDIO_SB_OFT_ADDR_MASK 0x07FFF /* sb offset addr is <= 15 bits, 32k */
-#define SBSDIO_SB_OFT_ADDR_LIMIT 0x08000
-#define SBSDIO_SB_ACCESS_2_4B_FLAG 0x08000 /* with b15, maps to 32-bit SB access */
-
-/* some duplication with sbsdpcmdev.h here */
-/* valid bits in SBSDIO_FUNC1_SBADDRxxx regs */
-#define SBSDIO_SBADDRLOW_MASK 0x80 /* Valid bits in SBADDRLOW */
-#define SBSDIO_SBADDRMID_MASK 0xff /* Valid bits in SBADDRMID */
-#define SBSDIO_SBADDRHIGH_MASK 0xffU /* Valid bits in SBADDRHIGH */
-#define SBSDIO_SBWINDOW_MASK 0xffff8000 /* Address bits from SBADDR regs */
-
-/* direct(mapped) cis space */
-#define SBSDIO_CIS_BASE_COMMON 0x1000 /* MAPPED common CIS address */
-#define SBSDIO_CIS_SIZE_LIMIT 0x200 /* maximum bytes in one CIS */
-#define SBSDIO_OTP_CIS_SIZE_LIMIT 0x078 /* maximum bytes OTP CIS */
-
-#define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF /* cis offset addr is < 17 bits */
-
-#define SBSDIO_CIS_MANFID_TUPLE_LEN 6 /* manfid tuple length, include tuple,
- * link bytes
- */
-
-/* indirect cis access (in sprom) */
-#define SBSDIO_SPROM_CIS_OFFSET 0x8 /* 8 control bytes first, CIS starts from
- * 8th byte
- */
-
-#define SBSDIO_BYTEMODE_DATALEN_MAX 64 /* sdio byte mode: maximum length of one
- * data command
- */
-
-#define SBSDIO_CORE_ADDR_MASK 0x1FFFF /* sdio core function one address mask */
-
-#endif /* _SBSDIO_H */
diff --git a/drivers/staging/brcm80211/include/sbsdpcmdev.h b/drivers/staging/brcm80211/include/sbsdpcmdev.h
deleted file mode 100644
index afd35811d4a58..0000000000000
--- a/drivers/staging/brcm80211/include/sbsdpcmdev.h
+++ /dev/null
@@ -1,281 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _sbsdpcmdev_h_
-#define _sbsdpcmdev_h_
-
-/* cpp contortions to concatenate w/arg prescan */
-#ifndef PAD
-#define _PADLINE(line) pad ## line
-#define _XSTR(line) _PADLINE(line)
-#define PAD _XSTR(__LINE__)
-#endif /* PAD */
-
-typedef volatile struct {
- dma64regs_t xmt; /* dma tx */
- u32 PAD[2];
- dma64regs_t rcv; /* dma rx */
- u32 PAD[2];
-} dma64p_t;
-
-/* dma64 sdiod corerev >= 1 */
-typedef volatile struct {
- dma64p_t dma64regs[2];
- dma64diag_t dmafifo; /* DMA Diagnostic Regs, 0x280-0x28c */
- u32 PAD[92];
-} sdiodma64_t;
-
-/* dma32 sdiod corerev == 0 */
-typedef volatile struct {
- dma32regp_t dma32regs[2]; /* dma tx & rx, 0x200-0x23c */
- dma32diag_t dmafifo; /* DMA Diagnostic Regs, 0x240-0x24c */
- u32 PAD[108];
-} sdiodma32_t;
-
-/* dma32 regs for pcmcia core */
-typedef volatile struct {
- dma32regp_t dmaregs; /* DMA Regs, 0x200-0x21c, rev8 */
- dma32diag_t dmafifo; /* DMA Diagnostic Regs, 0x220-0x22c */
- u32 PAD[116];
-} pcmdma32_t;
-
-/* core registers */
-typedef volatile struct {
- u32 corecontrol; /* CoreControl, 0x000, rev8 */
- u32 corestatus; /* CoreStatus, 0x004, rev8 */
- u32 PAD[1];
- u32 biststatus; /* BistStatus, 0x00c, rev8 */
-
- /* PCMCIA access */
- u16 pcmciamesportaladdr; /* PcmciaMesPortalAddr, 0x010, rev8 */
- u16 PAD[1];
- u16 pcmciamesportalmask; /* PcmciaMesPortalMask, 0x014, rev8 */
- u16 PAD[1];
- u16 pcmciawrframebc; /* PcmciaWrFrameBC, 0x018, rev8 */
- u16 PAD[1];
- u16 pcmciaunderflowtimer; /* PcmciaUnderflowTimer, 0x01c, rev8 */
- u16 PAD[1];
-
- /* interrupt */
- u32 intstatus; /* IntStatus, 0x020, rev8 */
- u32 hostintmask; /* IntHostMask, 0x024, rev8 */
- u32 intmask; /* IntSbMask, 0x028, rev8 */
- u32 sbintstatus; /* SBIntStatus, 0x02c, rev8 */
- u32 sbintmask; /* SBIntMask, 0x030, rev8 */
- u32 funcintmask; /* SDIO Function Interrupt Mask, SDIO rev4 */
- u32 PAD[2];
- u32 tosbmailbox; /* ToSBMailbox, 0x040, rev8 */
- u32 tohostmailbox; /* ToHostMailbox, 0x044, rev8 */
- u32 tosbmailboxdata; /* ToSbMailboxData, 0x048, rev8 */
- u32 tohostmailboxdata; /* ToHostMailboxData, 0x04c, rev8 */
-
- /* synchronized access to registers in SDIO clock domain */
- u32 sdioaccess; /* SdioAccess, 0x050, rev8 */
- u32 PAD[3];
-
- /* PCMCIA frame control */
- u8 pcmciaframectrl; /* pcmciaFrameCtrl, 0x060, rev8 */
- u8 PAD[3];
- u8 pcmciawatermark; /* pcmciaWaterMark, 0x064, rev8 */
- u8 PAD[155];
-
- /* interrupt batching control */
- u32 intrcvlazy; /* IntRcvLazy, 0x100, rev8 */
- u32 PAD[3];
-
- /* counters */
- u32 cmd52rd; /* Cmd52RdCount, 0x110, rev8, SDIO: cmd52 reads */
- u32 cmd52wr; /* Cmd52WrCount, 0x114, rev8, SDIO: cmd52 writes */
- u32 cmd53rd; /* Cmd53RdCount, 0x118, rev8, SDIO: cmd53 reads */
- u32 cmd53wr; /* Cmd53WrCount, 0x11c, rev8, SDIO: cmd53 writes */
- u32 abort; /* AbortCount, 0x120, rev8, SDIO: aborts */
- u32 datacrcerror; /* DataCrcErrorCount, 0x124, rev8, SDIO: frames w/bad CRC */
- u32 rdoutofsync; /* RdOutOfSyncCount, 0x128, rev8, SDIO/PCMCIA: Rd Frm OOS */
- u32 wroutofsync; /* RdOutOfSyncCount, 0x12c, rev8, SDIO/PCMCIA: Wr Frm OOS */
- u32 writebusy; /* WriteBusyCount, 0x130, rev8, SDIO: dev asserted "busy" */
- u32 readwait; /* ReadWaitCount, 0x134, rev8, SDIO: read: no data avail */
- u32 readterm; /* ReadTermCount, 0x138, rev8, SDIO: rd frm terminates */
- u32 writeterm; /* WriteTermCount, 0x13c, rev8, SDIO: wr frm terminates */
- u32 PAD[40];
- u32 clockctlstatus; /* ClockCtlStatus, 0x1e0, rev8 */
- u32 PAD[7];
-
- /* DMA engines */
- volatile union {
- pcmdma32_t pcm32;
- sdiodma32_t sdiod32;
- sdiodma64_t sdiod64;
- } dma;
-
- /* SDIO/PCMCIA CIS region */
- char cis[512]; /* 512 byte CIS, 0x400-0x5ff, rev6 */
-
- /* PCMCIA function control registers */
- char pcmciafcr[256]; /* PCMCIA FCR, 0x600-6ff, rev6 */
- u16 PAD[55];
-
- /* PCMCIA backplane access */
- u16 backplanecsr; /* BackplaneCSR, 0x76E, rev6 */
- u16 backplaneaddr0; /* BackplaneAddr0, 0x770, rev6 */
- u16 backplaneaddr1; /* BackplaneAddr1, 0x772, rev6 */
- u16 backplaneaddr2; /* BackplaneAddr2, 0x774, rev6 */
- u16 backplaneaddr3; /* BackplaneAddr3, 0x776, rev6 */
- u16 backplanedata0; /* BackplaneData0, 0x778, rev6 */
- u16 backplanedata1; /* BackplaneData1, 0x77a, rev6 */
- u16 backplanedata2; /* BackplaneData2, 0x77c, rev6 */
- u16 backplanedata3; /* BackplaneData3, 0x77e, rev6 */
- u16 PAD[31];
-
- /* sprom "size" & "blank" info */
- u16 spromstatus; /* SPROMStatus, 0x7BE, rev2 */
- u32 PAD[464];
-
- /* Sonics SiliconBackplane registers */
- sbconfig_t sbconfig; /* SbConfig Regs, 0xf00-0xfff, rev8 */
-} sdpcmd_regs_t;
-
-/* corecontrol */
-#define CC_CISRDY (1 << 0) /* CIS Ready */
-#define CC_BPRESEN (1 << 1) /* CCCR RES signal causes backplane reset */
-#define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
-#define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation bit (rev 11) */
-#define CC_XMTDATAAVAIL_MODE (1 << 4) /* data avail generates an interrupt */
-#define CC_XMTDATAAVAIL_CTRL (1 << 5) /* data avail interrupt ctrl */
-
-/* corestatus */
-#define CS_PCMCIAMODE (1 << 0) /* Device Mode; 0=SDIO, 1=PCMCIA */
-#define CS_SMARTDEV (1 << 1) /* 1=smartDev enabled */
-#define CS_F2ENABLED (1 << 2) /* 1=host has enabled the device */
-
-#define PCMCIA_MES_PA_MASK 0x7fff /* PCMCIA Message Portal Address Mask */
-#define PCMCIA_MES_PM_MASK 0x7fff /* PCMCIA Message Portal Mask Mask */
-#define PCMCIA_WFBC_MASK 0xffff /* PCMCIA Write Frame Byte Count Mask */
-#define PCMCIA_UT_MASK 0x07ff /* PCMCIA Underflow Timer Mask */
-
-/* intstatus */
-#define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
-#define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
-#define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
-#define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
-#define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
-#define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
-#define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
-#define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
-#define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
-#define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
-#define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
-#define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
-#define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
-#define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
-#define I_PC (1 << 10) /* descriptor error */
-#define I_PD (1 << 11) /* data error */
-#define I_DE (1 << 12) /* Descriptor protocol Error */
-#define I_RU (1 << 13) /* Receive descriptor Underflow */
-#define I_RO (1 << 14) /* Receive fifo Overflow */
-#define I_XU (1 << 15) /* Transmit fifo Underflow */
-#define I_RI (1 << 16) /* Receive Interrupt */
-#define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
-#define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
-#define I_XI (1 << 24) /* Transmit Interrupt */
-#define I_RF_TERM (1 << 25) /* Read Frame Terminate */
-#define I_WF_TERM (1 << 26) /* Write Frame Terminate */
-#define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
-#define I_SBINT (1 << 28) /* sbintstatus Interrupt */
-#define I_CHIPACTIVE (1 << 29) /* chip transitioned from doze to active state */
-#define I_SRESET (1 << 30) /* CCCR RES interrupt */
-#define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
-#define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU) /* DMA Errors */
-#define I_DMA (I_RI | I_XI | I_ERRORS)
-
-/* sbintstatus */
-#define I_SB_SERR (1 << 8) /* Backplane SError (write) */
-#define I_SB_RESPERR (1 << 9) /* Backplane Response Error (read) */
-#define I_SB_SPROMERR (1 << 10) /* Error accessing the sprom */
-
-/* sdioaccess */
-#define SDA_DATA_MASK 0x000000ff /* Read/Write Data Mask */
-#define SDA_ADDR_MASK 0x000fff00 /* Read/Write Address Mask */
-#define SDA_ADDR_SHIFT 8 /* Read/Write Address Shift */
-#define SDA_WRITE 0x01000000 /* Write bit */
-#define SDA_READ 0x00000000 /* Write bit cleared for Read */
-#define SDA_BUSY 0x80000000 /* Busy bit */
-
-/* sdioaccess-accessible register address spaces */
-#define SDA_CCCR_SPACE 0x000 /* sdioAccess CCCR register space */
-#define SDA_F1_FBR_SPACE 0x100 /* sdioAccess F1 FBR register space */
-#define SDA_F2_FBR_SPACE 0x200 /* sdioAccess F2 FBR register space */
-#define SDA_F1_REG_SPACE 0x300 /* sdioAccess F1 core-specific register space */
-
-/* SDA_F1_REG_SPACE sdioaccess-accessible F1 reg space register offsets */
-#define SDA_CHIPCONTROLDATA 0x006 /* ChipControlData */
-#define SDA_CHIPCONTROLENAB 0x007 /* ChipControlEnable */
-#define SDA_F2WATERMARK 0x008 /* Function 2 Watermark */
-#define SDA_DEVICECONTROL 0x009 /* DeviceControl */
-#define SDA_SBADDRLOW 0x00a /* SbAddrLow */
-#define SDA_SBADDRMID 0x00b /* SbAddrMid */
-#define SDA_SBADDRHIGH 0x00c /* SbAddrHigh */
-#define SDA_FRAMECTRL 0x00d /* FrameCtrl */
-#define SDA_CHIPCLOCKCSR 0x00e /* ChipClockCSR */
-#define SDA_SDIOPULLUP 0x00f /* SdioPullUp */
-#define SDA_SDIOWRFRAMEBCLOW 0x019 /* SdioWrFrameBCLow */
-#define SDA_SDIOWRFRAMEBCHIGH 0x01a /* SdioWrFrameBCHigh */
-#define SDA_SDIORDFRAMEBCLOW 0x01b /* SdioRdFrameBCLow */
-#define SDA_SDIORDFRAMEBCHIGH 0x01c /* SdioRdFrameBCHigh */
-
-/* SDA_F2WATERMARK */
-#define SDA_F2WATERMARK_MASK 0x7f /* F2Watermark Mask */
-
-/* SDA_SBADDRLOW */
-#define SDA_SBADDRLOW_MASK 0x80 /* SbAddrLow Mask */
-
-/* SDA_SBADDRMID */
-#define SDA_SBADDRMID_MASK 0xff /* SbAddrMid Mask */
-
-/* SDA_SBADDRHIGH */
-#define SDA_SBADDRHIGH_MASK 0xff /* SbAddrHigh Mask */
-
-/* SDA_FRAMECTRL */
-#define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
-#define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
-#define SFC_CRC4WOOS (1 << 2) /* HW reports CRC error for write out of sync */
-#define SFC_ABORTALL (1 << 3) /* Abort cancels all in-progress frames */
-
-/* pcmciaframectrl */
-#define PFC_RF_TERM (1 << 0) /* Read Frame Terminate */
-#define PFC_WF_TERM (1 << 1) /* Write Frame Terminate */
-
-/* intrcvlazy */
-#define IRL_TO_MASK 0x00ffffff /* timeout */
-#define IRL_FC_MASK 0xff000000 /* frame count */
-#define IRL_FC_SHIFT 24 /* frame count */
-
-/* rx header */
-typedef volatile struct {
- u16 len;
- u16 flags;
-} sdpcmd_rxh_t;
-
-/* rx header flags */
-#define RXF_CRC 0x0001 /* CRC error detected */
-#define RXF_WOOS 0x0002 /* write frame out of sync */
-#define RXF_WF_TERM 0x0004 /* write frame terminated */
-#define RXF_ABORT 0x0008 /* write frame aborted */
-#define RXF_DISCARD (RXF_CRC | RXF_WOOS | RXF_WF_TERM | RXF_ABORT) /* bad frame */
-
-/* HW frame tag */
-#define SDPCM_FRAMETAG_LEN 4 /* HW frametag: 2 bytes len, 2 bytes check val */
-
-#endif /* _sbsdpcmdev_h_ */
diff --git a/drivers/staging/brcm80211/include/sdio.h b/drivers/staging/brcm80211/include/sdio.h
deleted file mode 100644
index 670e379b9aacb..0000000000000
--- a/drivers/staging/brcm80211/include/sdio.h
+++ /dev/null
@@ -1,552 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _SDIO_H
-#define _SDIO_H
-
-#ifdef BCMSDIO
-
-/* CCCR structure for function 0 */
-typedef volatile struct {
- u8 cccr_sdio_rev; /* RO, cccr and sdio revision */
- u8 sd_rev; /* RO, sd spec revision */
- u8 io_en; /* I/O enable */
- u8 io_rdy; /* I/O ready reg */
- u8 intr_ctl; /* Master and per function interrupt enable control */
- u8 intr_status; /* RO, interrupt pending status */
- u8 io_abort; /* read/write abort or reset all functions */
- u8 bus_inter; /* bus interface control */
- u8 capability; /* RO, card capability */
-
- u8 cis_base_low; /* 0x9 RO, common CIS base address, LSB */
- u8 cis_base_mid;
- u8 cis_base_high; /* 0xB RO, common CIS base address, MSB */
-
- /* suspend/resume registers */
- u8 bus_suspend; /* 0xC */
- u8 func_select; /* 0xD */
- u8 exec_flag; /* 0xE */
- u8 ready_flag; /* 0xF */
-
- u8 fn0_blk_size[2]; /* 0x10(LSB), 0x11(MSB) */
-
- u8 power_control; /* 0x12 (SDIO version 1.10) */
-
- u8 speed_control; /* 0x13 */
-} sdio_regs_t;
-
-/* SDIO Device CCCR offsets */
-#define SDIOD_CCCR_REV 0x00
-#define SDIOD_CCCR_SDREV 0x01
-#define SDIOD_CCCR_IOEN 0x02
-#define SDIOD_CCCR_IORDY 0x03
-#define SDIOD_CCCR_INTEN 0x04
-#define SDIOD_CCCR_INTPEND 0x05
-#define SDIOD_CCCR_IOABORT 0x06
-#define SDIOD_CCCR_BICTRL 0x07
-#define SDIOD_CCCR_CAPABLITIES 0x08
-#define SDIOD_CCCR_CISPTR_0 0x09
-#define SDIOD_CCCR_CISPTR_1 0x0A
-#define SDIOD_CCCR_CISPTR_2 0x0B
-#define SDIOD_CCCR_BUSSUSP 0x0C
-#define SDIOD_CCCR_FUNCSEL 0x0D
-#define SDIOD_CCCR_EXECFLAGS 0x0E
-#define SDIOD_CCCR_RDYFLAGS 0x0F
-#define SDIOD_CCCR_BLKSIZE_0 0x10
-#define SDIOD_CCCR_BLKSIZE_1 0x11
-#define SDIOD_CCCR_POWER_CONTROL 0x12
-#define SDIOD_CCCR_SPEED_CONTROL 0x13
-
-/* Broadcom extensions (corerev >= 1) */
-#define SDIOD_CCCR_BRCM_SEPINT 0xf2
-
-/* cccr_sdio_rev */
-#define SDIO_REV_SDIOID_MASK 0xf0 /* SDIO spec revision number */
-#define SDIO_REV_CCCRID_MASK 0x0f /* CCCR format version number */
-
-/* sd_rev */
-#define SD_REV_PHY_MASK 0x0f /* SD format version number */
-
-/* io_en */
-#define SDIO_FUNC_ENABLE_1 0x02 /* function 1 I/O enable */
-#define SDIO_FUNC_ENABLE_2 0x04 /* function 2 I/O enable */
-
-/* io_rdys */
-#define SDIO_FUNC_READY_1 0x02 /* function 1 I/O ready */
-#define SDIO_FUNC_READY_2 0x04 /* function 2 I/O ready */
-
-/* intr_ctl */
-#define INTR_CTL_MASTER_EN 0x1 /* interrupt enable master */
-#define INTR_CTL_FUNC1_EN 0x2 /* interrupt enable for function 1 */
-#define INTR_CTL_FUNC2_EN 0x4 /* interrupt enable for function 2 */
-
-/* intr_status */
-#define INTR_STATUS_FUNC1 0x2 /* interrupt pending for function 1 */
-#define INTR_STATUS_FUNC2 0x4 /* interrupt pending for function 2 */
-
-/* io_abort */
-#define IO_ABORT_RESET_ALL 0x08 /* I/O card reset */
-#define IO_ABORT_FUNC_MASK 0x07 /* abort selction: function x */
-
-/* bus_inter */
-#define BUS_CARD_DETECT_DIS 0x80 /* Card Detect disable */
-#define BUS_SPI_CONT_INTR_CAP 0x40 /* support continuous SPI interrupt */
-#define BUS_SPI_CONT_INTR_EN 0x20 /* continuous SPI interrupt enable */
-#define BUS_SD_DATA_WIDTH_MASK 0x03 /* bus width mask */
-#define BUS_SD_DATA_WIDTH_4BIT 0x02 /* bus width 4-bit mode */
-#define BUS_SD_DATA_WIDTH_1BIT 0x00 /* bus width 1-bit mode */
-
-/* capability */
-#define SDIO_CAP_4BLS 0x80 /* 4-bit support for low speed card */
-#define SDIO_CAP_LSC 0x40 /* low speed card */
-#define SDIO_CAP_E4MI 0x20 /* enable interrupt between block of data in 4-bit mode */
-#define SDIO_CAP_S4MI 0x10 /* support interrupt between block of data in 4-bit mode */
-#define SDIO_CAP_SBS 0x08 /* support suspend/resume */
-#define SDIO_CAP_SRW 0x04 /* support read wait */
-#define SDIO_CAP_SMB 0x02 /* support multi-block transfer */
-#define SDIO_CAP_SDC 0x01 /* Support Direct commands during multi-byte transfer */
-
-/* power_control */
-#define SDIO_POWER_SMPC 0x01 /* supports master power control (RO) */
-#define SDIO_POWER_EMPC 0x02 /* enable master power control (allow > 200mA) (RW) */
-
-/* speed_control (control device entry into high-speed clocking mode) */
-#define SDIO_SPEED_SHS 0x01 /* supports high-speed [clocking] mode (RO) */
-#define SDIO_SPEED_EHS 0x02 /* enable high-speed [clocking] mode (RW) */
-
-/* brcm sepint */
-#define SDIO_SEPINT_MASK 0x01 /* route sdpcmdev intr onto separate pad (chip-specific) */
-#define SDIO_SEPINT_OE 0x02 /* 1 asserts output enable for above pad */
-#define SDIO_SEPINT_ACT_HI 0x04 /* use active high interrupt level instead of active low */
-
-/* FBR structure for function 1-7, FBR addresses and register offsets */
-typedef volatile struct {
- u8 devctr; /* device interface, CSA control */
- u8 ext_dev; /* extended standard I/O device type code */
- u8 pwr_sel; /* power selection support */
- u8 PAD[6]; /* reserved */
-
- u8 cis_low; /* CIS LSB */
- u8 cis_mid;
- u8 cis_high; /* CIS MSB */
- u8 csa_low; /* code storage area, LSB */
- u8 csa_mid;
- u8 csa_high; /* code storage area, MSB */
- u8 csa_dat_win; /* data access window to function */
-
- u8 fnx_blk_size[2]; /* block size, little endian */
-} sdio_fbr_t;
-
-/* Maximum number of I/O funcs */
-#define SDIOD_MAX_IOFUNCS 7
-
-/* SDIO Device FBR Start Address */
-#define SDIOD_FBR_STARTADDR 0x100
-
-/* SDIO Device FBR Size */
-#define SDIOD_FBR_SIZE 0x100
-
-/* Macro to calculate FBR register base */
-#define SDIOD_FBR_BASE(n) ((n) * 0x100)
-
-/* Function register offsets */
-#define SDIOD_FBR_DEVCTR 0x00 /* basic info for function */
-#define SDIOD_FBR_EXT_DEV 0x01 /* extended I/O device code */
-#define SDIOD_FBR_PWR_SEL 0x02 /* power selection bits */
-
-/* SDIO Function CIS ptr offset */
-#define SDIOD_FBR_CISPTR_0 0x09
-#define SDIOD_FBR_CISPTR_1 0x0A
-#define SDIOD_FBR_CISPTR_2 0x0B
-
-/* Code Storage Area pointer */
-#define SDIOD_FBR_CSA_ADDR_0 0x0C
-#define SDIOD_FBR_CSA_ADDR_1 0x0D
-#define SDIOD_FBR_CSA_ADDR_2 0x0E
-#define SDIOD_FBR_CSA_DATA 0x0F
-
-/* SDIO Function I/O Block Size */
-#define SDIOD_FBR_BLKSIZE_0 0x10
-#define SDIOD_FBR_BLKSIZE_1 0x11
-
-/* devctr */
-#define SDIOD_FBR_DEVCTR_DIC 0x0f /* device interface code */
-#define SDIOD_FBR_DECVTR_CSA 0x40 /* CSA support flag */
-#define SDIOD_FBR_DEVCTR_CSA_EN 0x80 /* CSA enabled */
-/* interface codes */
-#define SDIOD_DIC_NONE 0 /* SDIO standard interface is not supported */
-#define SDIOD_DIC_UART 1
-#define SDIOD_DIC_BLUETOOTH_A 2
-#define SDIOD_DIC_BLUETOOTH_B 3
-#define SDIOD_DIC_GPS 4
-#define SDIOD_DIC_CAMERA 5
-#define SDIOD_DIC_PHS 6
-#define SDIOD_DIC_WLAN 7
-#define SDIOD_DIC_EXT 0xf /* extended device interface, read ext_dev register */
-
-/* pwr_sel */
-#define SDIOD_PWR_SEL_SPS 0x01 /* supports power selection */
-#define SDIOD_PWR_SEL_EPS 0x02 /* enable power selection (low-current mode) */
-
-/* misc defines */
-#define SDIO_FUNC_0 0
-#define SDIO_FUNC_1 1
-#define SDIO_FUNC_2 2
-#define SDIO_FUNC_3 3
-#define SDIO_FUNC_4 4
-#define SDIO_FUNC_5 5
-#define SDIO_FUNC_6 6
-#define SDIO_FUNC_7 7
-
-#define SD_CARD_TYPE_UNKNOWN 0 /* bad type or unrecognized */
-#define SD_CARD_TYPE_IO 1 /* IO only card */
-#define SD_CARD_TYPE_MEMORY 2 /* memory only card */
-#define SD_CARD_TYPE_COMBO 3 /* IO and memory combo card */
-
-#define SDIO_MAX_BLOCK_SIZE 2048 /* maximum block size for block mode operation */
-#define SDIO_MIN_BLOCK_SIZE 1 /* minimum block size for block mode operation */
-
-/* Card registers: status bit position */
-#define CARDREG_STATUS_BIT_OUTOFRANGE 31
-#define CARDREG_STATUS_BIT_COMCRCERROR 23
-#define CARDREG_STATUS_BIT_ILLEGALCOMMAND 22
-#define CARDREG_STATUS_BIT_ERROR 19
-#define CARDREG_STATUS_BIT_IOCURRENTSTATE3 12
-#define CARDREG_STATUS_BIT_IOCURRENTSTATE2 11
-#define CARDREG_STATUS_BIT_IOCURRENTSTATE1 10
-#define CARDREG_STATUS_BIT_IOCURRENTSTATE0 9
-#define CARDREG_STATUS_BIT_FUN_NUM_ERROR 4
-
-#define SD_CMD_GO_IDLE_STATE 0 /* mandatory for SDIO */
-#define SD_CMD_SEND_OPCOND 1
-#define SD_CMD_MMC_SET_RCA 3
-#define SD_CMD_IO_SEND_OP_COND 5 /* mandatory for SDIO */
-#define SD_CMD_SELECT_DESELECT_CARD 7
-#define SD_CMD_SEND_CSD 9
-#define SD_CMD_SEND_CID 10
-#define SD_CMD_STOP_TRANSMISSION 12
-#define SD_CMD_SEND_STATUS 13
-#define SD_CMD_GO_INACTIVE_STATE 15
-#define SD_CMD_SET_BLOCKLEN 16
-#define SD_CMD_READ_SINGLE_BLOCK 17
-#define SD_CMD_READ_MULTIPLE_BLOCK 18
-#define SD_CMD_WRITE_BLOCK 24
-#define SD_CMD_WRITE_MULTIPLE_BLOCK 25
-#define SD_CMD_PROGRAM_CSD 27
-#define SD_CMD_SET_WRITE_PROT 28
-#define SD_CMD_CLR_WRITE_PROT 29
-#define SD_CMD_SEND_WRITE_PROT 30
-#define SD_CMD_ERASE_WR_BLK_START 32
-#define SD_CMD_ERASE_WR_BLK_END 33
-#define SD_CMD_ERASE 38
-#define SD_CMD_LOCK_UNLOCK 42
-#define SD_CMD_IO_RW_DIRECT 52 /* mandatory for SDIO */
-#define SD_CMD_IO_RW_EXTENDED 53 /* mandatory for SDIO */
-#define SD_CMD_APP_CMD 55
-#define SD_CMD_GEN_CMD 56
-#define SD_CMD_READ_OCR 58
-#define SD_CMD_CRC_ON_OFF 59 /* mandatory for SDIO */
-#define SD_ACMD_SD_STATUS 13
-#define SD_ACMD_SEND_NUM_WR_BLOCKS 22
-#define SD_ACMD_SET_WR_BLOCK_ERASE_CNT 23
-#define SD_ACMD_SD_SEND_OP_COND 41
-#define SD_ACMD_SET_CLR_CARD_DETECT 42
-#define SD_ACMD_SEND_SCR 51
-
-/* argument for SD_CMD_IO_RW_DIRECT and SD_CMD_IO_RW_EXTENDED */
-#define SD_IO_OP_READ 0 /* Read_Write: Read */
-#define SD_IO_OP_WRITE 1 /* Read_Write: Write */
-#define SD_IO_RW_NORMAL 0 /* no RAW */
-#define SD_IO_RW_RAW 1 /* RAW */
-#define SD_IO_BYTE_MODE 0 /* Byte Mode */
-#define SD_IO_BLOCK_MODE 1 /* BlockMode */
-#define SD_IO_FIXED_ADDRESS 0 /* fix Address */
-#define SD_IO_INCREMENT_ADDRESS 1 /* IncrementAddress */
-
-/* build SD_CMD_IO_RW_DIRECT Argument */
-#define SDIO_IO_RW_DIRECT_ARG(rw, raw, func, addr, data) \
- ((((rw) & 1) << 31) | (((func) & 0x7) << 28) | (((raw) & 1) << 27) | \
- (((addr) & 0x1FFFF) << 9) | ((data) & 0xFF))
-
-/* build SD_CMD_IO_RW_EXTENDED Argument */
-#define SDIO_IO_RW_EXTENDED_ARG(rw, blk, func, addr, inc_addr, count) \
- ((((rw) & 1) << 31) | (((func) & 0x7) << 28) | (((blk) & 1) << 27) | \
- (((inc_addr) & 1) << 26) | (((addr) & 0x1FFFF) << 9) | ((count) & 0x1FF))
-
-/* SDIO response parameters */
-#define SD_RSP_NO_NONE 0
-#define SD_RSP_NO_1 1
-#define SD_RSP_NO_2 2
-#define SD_RSP_NO_3 3
-#define SD_RSP_NO_4 4
-#define SD_RSP_NO_5 5
-#define SD_RSP_NO_6 6
-
- /* Modified R6 response (to CMD3) */
-#define SD_RSP_MR6_COM_CRC_ERROR 0x8000
-#define SD_RSP_MR6_ILLEGAL_COMMAND 0x4000
-#define SD_RSP_MR6_ERROR 0x2000
-
- /* Modified R1 in R4 Response (to CMD5) */
-#define SD_RSP_MR1_SBIT 0x80
-#define SD_RSP_MR1_PARAMETER_ERROR 0x40
-#define SD_RSP_MR1_RFU5 0x20
-#define SD_RSP_MR1_FUNC_NUM_ERROR 0x10
-#define SD_RSP_MR1_COM_CRC_ERROR 0x08
-#define SD_RSP_MR1_ILLEGAL_COMMAND 0x04
-#define SD_RSP_MR1_RFU1 0x02
-#define SD_RSP_MR1_IDLE_STATE 0x01
-
- /* R5 response (to CMD52 and CMD53) */
-#define SD_RSP_R5_COM_CRC_ERROR 0x80
-#define SD_RSP_R5_ILLEGAL_COMMAND 0x40
-#define SD_RSP_R5_IO_CURRENTSTATE1 0x20
-#define SD_RSP_R5_IO_CURRENTSTATE0 0x10
-#define SD_RSP_R5_ERROR 0x08
-#define SD_RSP_R5_RFU 0x04
-#define SD_RSP_R5_FUNC_NUM_ERROR 0x02
-#define SD_RSP_R5_OUT_OF_RANGE 0x01
-
-#define SD_RSP_R5_ERRBITS 0xCB
-
-/* ------------------------------------------------
- * SDIO Commands and responses
- *
- * I/O only commands are:
- * CMD0, CMD3, CMD5, CMD7, CMD15, CMD52, CMD53
- * ------------------------------------------------
- */
-
-/* SDIO Commands */
-#define SDIOH_CMD_0 0
-#define SDIOH_CMD_3 3
-#define SDIOH_CMD_5 5
-#define SDIOH_CMD_7 7
-#define SDIOH_CMD_15 15
-#define SDIOH_CMD_52 52
-#define SDIOH_CMD_53 53
-#define SDIOH_CMD_59 59
-
-/* SDIO Command Responses */
-#define SDIOH_RSP_NONE 0
-#define SDIOH_RSP_R1 1
-#define SDIOH_RSP_R2 2
-#define SDIOH_RSP_R3 3
-#define SDIOH_RSP_R4 4
-#define SDIOH_RSP_R5 5
-#define SDIOH_RSP_R6 6
-
-/*
- * SDIO Response Error flags
- */
-#define SDIOH_RSP5_ERROR_FLAGS 0xCB
-
-/* ------------------------------------------------
- * SDIO Command structures. I/O only commands are:
- *
- * CMD0, CMD3, CMD5, CMD7, CMD15, CMD52, CMD53
- * ------------------------------------------------
- */
-
-#define CMD5_OCR_M BITFIELD_MASK(24)
-#define CMD5_OCR_S 0
-
-#define CMD7_RCA_M BITFIELD_MASK(16)
-#define CMD7_RCA_S 16
-
-#define CMD_15_RCA_M BITFIELD_MASK(16)
-#define CMD_15_RCA_S 16
-
-#define CMD52_DATA_M BITFIELD_MASK(8) /* Bits [7:0] - Write Data/Stuff bits of CMD52
- */
-#define CMD52_DATA_S 0
-#define CMD52_REG_ADDR_M BITFIELD_MASK(17) /* Bits [25:9] - register address */
-#define CMD52_REG_ADDR_S 9
-#define CMD52_RAW_M BITFIELD_MASK(1) /* Bit 27 - Read after Write flag */
-#define CMD52_RAW_S 27
-#define CMD52_FUNCTION_M BITFIELD_MASK(3) /* Bits [30:28] - Function number */
-#define CMD52_FUNCTION_S 28
-#define CMD52_RW_FLAG_M BITFIELD_MASK(1) /* Bit 31 - R/W flag */
-#define CMD52_RW_FLAG_S 31
-
-#define CMD53_BYTE_BLK_CNT_M BITFIELD_MASK(9) /* Bits [8:0] - Byte/Block Count of CMD53 */
-#define CMD53_BYTE_BLK_CNT_S 0
-#define CMD53_REG_ADDR_M BITFIELD_MASK(17) /* Bits [25:9] - register address */
-#define CMD53_REG_ADDR_S 9
-#define CMD53_OP_CODE_M BITFIELD_MASK(1) /* Bit 26 - R/W Operation Code */
-#define CMD53_OP_CODE_S 26
-#define CMD53_BLK_MODE_M BITFIELD_MASK(1) /* Bit 27 - Block Mode */
-#define CMD53_BLK_MODE_S 27
-#define CMD53_FUNCTION_M BITFIELD_MASK(3) /* Bits [30:28] - Function number */
-#define CMD53_FUNCTION_S 28
-#define CMD53_RW_FLAG_M BITFIELD_MASK(1) /* Bit 31 - R/W flag */
-#define CMD53_RW_FLAG_S 31
-
-/* ------------------------------------------------------
- * SDIO Command Response structures for SD1 and SD4 modes
- * -----------------------------------------------------
- */
-#define RSP4_IO_OCR_M BITFIELD_MASK(24) /* Bits [23:0] - Card's OCR Bits [23:0] */
-#define RSP4_IO_OCR_S 0
-#define RSP4_STUFF_M BITFIELD_MASK(3) /* Bits [26:24] - Stuff bits */
-#define RSP4_STUFF_S 24
-#define RSP4_MEM_PRESENT_M BITFIELD_MASK(1) /* Bit 27 - Memory present */
-#define RSP4_MEM_PRESENT_S 27
-#define RSP4_NUM_FUNCS_M BITFIELD_MASK(3) /* Bits [30:28] - Number of I/O funcs */
-#define RSP4_NUM_FUNCS_S 28
-#define RSP4_CARD_READY_M BITFIELD_MASK(1) /* Bit 31 - SDIO card ready */
-#define RSP4_CARD_READY_S 31
-
-#define RSP6_STATUS_M BITFIELD_MASK(16) /* Bits [15:0] - Card status bits [19,22,23,12:0]
- */
-#define RSP6_STATUS_S 0
-#define RSP6_IO_RCA_M BITFIELD_MASK(16) /* Bits [31:16] - RCA bits[31-16] */
-#define RSP6_IO_RCA_S 16
-
-#define RSP1_AKE_SEQ_ERROR_M BITFIELD_MASK(1) /* Bit 3 - Authentication seq error */
-#define RSP1_AKE_SEQ_ERROR_S 3
-#define RSP1_APP_CMD_M BITFIELD_MASK(1) /* Bit 5 - Card expects ACMD */
-#define RSP1_APP_CMD_S 5
-#define RSP1_READY_FOR_DATA_M BITFIELD_MASK(1) /* Bit 8 - Ready for data (buff empty) */
-#define RSP1_READY_FOR_DATA_S 8
-#define RSP1_CURR_STATE_M BITFIELD_MASK(4) /* Bits [12:9] - State of card
- * when Cmd was received
- */
-#define RSP1_CURR_STATE_S 9
-#define RSP1_EARSE_RESET_M BITFIELD_MASK(1) /* Bit 13 - Erase seq cleared */
-#define RSP1_EARSE_RESET_S 13
-#define RSP1_CARD_ECC_DISABLE_M BITFIELD_MASK(1) /* Bit 14 - Card ECC disabled */
-#define RSP1_CARD_ECC_DISABLE_S 14
-#define RSP1_WP_ERASE_SKIP_M BITFIELD_MASK(1) /* Bit 15 - Partial blocks erased due to W/P */
-#define RSP1_WP_ERASE_SKIP_S 15
-#define RSP1_CID_CSD_OVERW_M BITFIELD_MASK(1) /* Bit 16 - Illegal write to CID or R/O bits
- * of CSD
- */
-#define RSP1_CID_CSD_OVERW_S 16
-#define RSP1_ERROR_M BITFIELD_MASK(1) /* Bit 19 - General/Unknown error */
-#define RSP1_ERROR_S 19
-#define RSP1_CC_ERROR_M BITFIELD_MASK(1) /* Bit 20 - Internal Card Control error */
-#define RSP1_CC_ERROR_S 20
-#define RSP1_CARD_ECC_FAILED_M BITFIELD_MASK(1) /* Bit 21 - Card internal ECC failed
- * to correct data
- */
-#define RSP1_CARD_ECC_FAILED_S 21
-#define RSP1_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 22 - Cmd not legal for the card state */
-#define RSP1_ILLEGAL_CMD_S 22
-#define RSP1_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 23 - CRC check of previous command failed
- */
-#define RSP1_COM_CRC_ERROR_S 23
-#define RSP1_LOCK_UNLOCK_FAIL_M BITFIELD_MASK(1) /* Bit 24 - Card lock-unlock Cmd Seq error */
-#define RSP1_LOCK_UNLOCK_FAIL_S 24
-#define RSP1_CARD_LOCKED_M BITFIELD_MASK(1) /* Bit 25 - Card locked by the host */
-#define RSP1_CARD_LOCKED_S 25
-#define RSP1_WP_VIOLATION_M BITFIELD_MASK(1) /* Bit 26 - Attempt to program
- * write-protected blocks
- */
-#define RSP1_WP_VIOLATION_S 26
-#define RSP1_ERASE_PARAM_M BITFIELD_MASK(1) /* Bit 27 - Invalid erase blocks */
-#define RSP1_ERASE_PARAM_S 27
-#define RSP1_ERASE_SEQ_ERR_M BITFIELD_MASK(1) /* Bit 28 - Erase Cmd seq error */
-#define RSP1_ERASE_SEQ_ERR_S 28
-#define RSP1_BLK_LEN_ERR_M BITFIELD_MASK(1) /* Bit 29 - Block length error */
-#define RSP1_BLK_LEN_ERR_S 29
-#define RSP1_ADDR_ERR_M BITFIELD_MASK(1) /* Bit 30 - Misaligned address */
-#define RSP1_ADDR_ERR_S 30
-#define RSP1_OUT_OF_RANGE_M BITFIELD_MASK(1) /* Bit 31 - Cmd arg was out of range */
-#define RSP1_OUT_OF_RANGE_S 31
-
-#define RSP5_DATA_M BITFIELD_MASK(8) /* Bits [0:7] - data */
-#define RSP5_DATA_S 0
-#define RSP5_FLAGS_M BITFIELD_MASK(8) /* Bit [15:8] - Rsp flags */
-#define RSP5_FLAGS_S 8
-#define RSP5_STUFF_M BITFIELD_MASK(16) /* Bits [31:16] - Stuff bits */
-#define RSP5_STUFF_S 16
-
-/* ----------------------------------------------
- * SDIO Command Response structures for SPI mode
- * ----------------------------------------------
- */
-#define SPIRSP4_IO_OCR_M BITFIELD_MASK(16) /* Bits [15:0] - Card's OCR Bits [23:8] */
-#define SPIRSP4_IO_OCR_S 0
-#define SPIRSP4_STUFF_M BITFIELD_MASK(3) /* Bits [18:16] - Stuff bits */
-#define SPIRSP4_STUFF_S 16
-#define SPIRSP4_MEM_PRESENT_M BITFIELD_MASK(1) /* Bit 19 - Memory present */
-#define SPIRSP4_MEM_PRESENT_S 19
-#define SPIRSP4_NUM_FUNCS_M BITFIELD_MASK(3) /* Bits [22:20] - Number of I/O funcs */
-#define SPIRSP4_NUM_FUNCS_S 20
-#define SPIRSP4_CARD_READY_M BITFIELD_MASK(1) /* Bit 23 - SDIO card ready */
-#define SPIRSP4_CARD_READY_S 23
-#define SPIRSP4_IDLE_STATE_M BITFIELD_MASK(1) /* Bit 24 - idle state */
-#define SPIRSP4_IDLE_STATE_S 24
-#define SPIRSP4_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 26 - Illegal Cmd error */
-#define SPIRSP4_ILLEGAL_CMD_S 26
-#define SPIRSP4_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 27 - COM CRC error */
-#define SPIRSP4_COM_CRC_ERROR_S 27
-#define SPIRSP4_FUNC_NUM_ERROR_M BITFIELD_MASK(1) /* Bit 28 - Function number error
- */
-#define SPIRSP4_FUNC_NUM_ERROR_S 28
-#define SPIRSP4_PARAM_ERROR_M BITFIELD_MASK(1) /* Bit 30 - Parameter Error Bit */
-#define SPIRSP4_PARAM_ERROR_S 30
-#define SPIRSP4_START_BIT_M BITFIELD_MASK(1) /* Bit 31 - Start Bit */
-#define SPIRSP4_START_BIT_S 31
-
-#define SPIRSP5_DATA_M BITFIELD_MASK(8) /* Bits [23:16] - R/W Data */
-#define SPIRSP5_DATA_S 16
-#define SPIRSP5_IDLE_STATE_M BITFIELD_MASK(1) /* Bit 24 - Idle state */
-#define SPIRSP5_IDLE_STATE_S 24
-#define SPIRSP5_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 26 - Illegal Cmd error */
-#define SPIRSP5_ILLEGAL_CMD_S 26
-#define SPIRSP5_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 27 - COM CRC error */
-#define SPIRSP5_COM_CRC_ERROR_S 27
-#define SPIRSP5_FUNC_NUM_ERROR_M BITFIELD_MASK(1) /* Bit 28 - Function number error
- */
-#define SPIRSP5_FUNC_NUM_ERROR_S 28
-#define SPIRSP5_PARAM_ERROR_M BITFIELD_MASK(1) /* Bit 30 - Parameter Error Bit */
-#define SPIRSP5_PARAM_ERROR_S 30
-#define SPIRSP5_START_BIT_M BITFIELD_MASK(1) /* Bit 31 - Start Bit */
-#define SPIRSP5_START_BIT_S 31
-
-/* RSP6 card status format; Pg 68 Physical Layer spec v 1.10 */
-#define RSP6STAT_AKE_SEQ_ERROR_M BITFIELD_MASK(1) /* Bit 3 - Authentication seq error
- */
-#define RSP6STAT_AKE_SEQ_ERROR_S 3
-#define RSP6STAT_APP_CMD_M BITFIELD_MASK(1) /* Bit 5 - Card expects ACMD */
-#define RSP6STAT_APP_CMD_S 5
-#define RSP6STAT_READY_FOR_DATA_M BITFIELD_MASK(1) /* Bit 8 - Ready for data
- * (buff empty)
- */
-#define RSP6STAT_READY_FOR_DATA_S 8
-#define RSP6STAT_CURR_STATE_M BITFIELD_MASK(4) /* Bits [12:9] - Card state at
- * Cmd reception
- */
-#define RSP6STAT_CURR_STATE_S 9
-#define RSP6STAT_ERROR_M BITFIELD_MASK(1) /* Bit 13 - General/Unknown error Bit 19
- */
-#define RSP6STAT_ERROR_S 13
-#define RSP6STAT_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 14 - Illegal cmd for
- * card state Bit 22
- */
-#define RSP6STAT_ILLEGAL_CMD_S 14
-#define RSP6STAT_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 15 - CRC previous command
- * failed Bit 23
- */
-#define RSP6STAT_COM_CRC_ERROR_S 15
-
-#define SDIOH_XFER_TYPE_READ SD_IO_OP_READ
-#define SDIOH_XFER_TYPE_WRITE SD_IO_OP_WRITE
-
-#endif /* def BCMSDIO */
-#endif /* _SDIO_H */
diff --git a/drivers/staging/brcm80211/include/soc.h b/drivers/staging/brcm80211/include/soc.h
new file mode 100644
index 0000000000000..3e593778b831b
--- /dev/null
+++ b/drivers/staging/brcm80211/include/soc.h
@@ -0,0 +1,95 @@
+/*
+ * Copyright (c) 2010 Broadcom Corporation
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _BRCM_SOC_H
+#define _BRCM_SOC_H
+
+#ifdef SI_ENUM_BASE_VARIABLE
+#define SI_ENUM_BASE (sii->pub.si_enum_base)
+#else
+#define SI_ENUM_BASE 0x18000000 /* Enumeration space base */
+#endif /* SI_ENUM_BASE_VARIABLE */
+
+/* core codes */
+#define NODEV_CORE_ID 0x700 /* Invalid coreid */
+#define CC_CORE_ID 0x800 /* chipcommon core */
+#define ILINE20_CORE_ID 0x801 /* iline20 core */
+#define SRAM_CORE_ID 0x802 /* sram core */
+#define SDRAM_CORE_ID 0x803 /* sdram core */
+#define PCI_CORE_ID 0x804 /* pci core */
+#define MIPS_CORE_ID 0x805 /* mips core */
+#define ENET_CORE_ID 0x806 /* enet mac core */
+#define CODEC_CORE_ID 0x807 /* v90 codec core */
+#define USB_CORE_ID 0x808 /* usb 1.1 host/device core */
+#define ADSL_CORE_ID 0x809 /* ADSL core */
+#define ILINE100_CORE_ID 0x80a /* iline100 core */
+#define IPSEC_CORE_ID 0x80b /* ipsec core */
+#define UTOPIA_CORE_ID 0x80c /* utopia core */
+#define PCMCIA_CORE_ID 0x80d /* pcmcia core */
+#define SOCRAM_CORE_ID 0x80e /* internal memory core */
+#define MEMC_CORE_ID 0x80f /* memc sdram core */
+#define OFDM_CORE_ID 0x810 /* OFDM phy core */
+#define EXTIF_CORE_ID 0x811 /* external interface core */
+#define D11_CORE_ID 0x812 /* 802.11 MAC core */
+#define APHY_CORE_ID 0x813 /* 802.11a phy core */
+#define BPHY_CORE_ID 0x814 /* 802.11b phy core */
+#define GPHY_CORE_ID 0x815 /* 802.11g phy core */
+#define MIPS33_CORE_ID 0x816 /* mips3302 core */
+#define USB11H_CORE_ID 0x817 /* usb 1.1 host core */
+#define USB11D_CORE_ID 0x818 /* usb 1.1 device core */
+#define USB20H_CORE_ID 0x819 /* usb 2.0 host core */
+#define USB20D_CORE_ID 0x81a /* usb 2.0 device core */
+#define SDIOH_CORE_ID 0x81b /* sdio host core */
+#define ROBO_CORE_ID 0x81c /* roboswitch core */
+#define ATA100_CORE_ID 0x81d /* parallel ATA core */
+#define SATAXOR_CORE_ID 0x81e /* serial ATA & XOR DMA core */
+#define GIGETH_CORE_ID 0x81f /* gigabit ethernet core */
+#define PCIE_CORE_ID 0x820 /* pci express core */
+#define NPHY_CORE_ID 0x821 /* 802.11n 2x2 phy core */
+#define SRAMC_CORE_ID 0x822 /* SRAM controller core */
+#define MINIMAC_CORE_ID 0x823 /* MINI MAC/phy core */
+#define ARM11_CORE_ID 0x824 /* ARM 1176 core */
+#define ARM7S_CORE_ID 0x825 /* ARM7tdmi-s core */
+#define LPPHY_CORE_ID 0x826 /* 802.11a/b/g phy core */
+#define PMU_CORE_ID 0x827 /* PMU core */
+#define SSNPHY_CORE_ID 0x828 /* 802.11n single-stream phy core */
+#define SDIOD_CORE_ID 0x829 /* SDIO device core */
+#define ARMCM3_CORE_ID 0x82a /* ARM Cortex M3 core */
+#define HTPHY_CORE_ID 0x82b /* 802.11n 4x4 phy core */
+#define MIPS74K_CORE_ID 0x82c /* mips 74k core */
+#define GMAC_CORE_ID 0x82d /* Gigabit MAC core */
+#define DMEMC_CORE_ID 0x82e /* DDR1/2 memory controller core */
+#define PCIERC_CORE_ID 0x82f /* PCIE Root Complex core */
+#define OCP_CORE_ID 0x830 /* OCP2OCP bridge core */
+#define SC_CORE_ID 0x831 /* shared common core */
+#define AHB_CORE_ID 0x832 /* OCP2AHB bridge core */
+#define SPIH_CORE_ID 0x833 /* SPI host core */
+#define I2S_CORE_ID 0x834 /* I2S core */
+#define DMEMS_CORE_ID 0x835 /* SDR/DDR1 memory controller core */
+#define DEF_SHIM_COMP 0x837 /* SHIM component in ubus/6362 */
+#define OOB_ROUTER_CORE_ID 0x367 /* OOB router core ID */
+#define DEF_AI_COMP 0xfff /* Default component, in ai chips it maps all
+ * unused address ranges
+ */
+
+/* Common core control flags */
+#define SICF_BIST_EN 0x8000
+#define SICF_PME_EN 0x4000
+#define SICF_CORE_BITS 0x3ffc
+#define SICF_FGC 0x0002
+#define SICF_CLOCK_EN 0x0001
+
+#endif /* _BRCM_SOC_H */
diff --git a/drivers/staging/brcm80211/include/wlioctl.h b/drivers/staging/brcm80211/include/wlioctl.h
deleted file mode 100644
index 2876bd9eff851..0000000000000
--- a/drivers/staging/brcm80211/include/wlioctl.h
+++ /dev/null
@@ -1,1365 +0,0 @@
-/*
- * Copyright (c) 2010 Broadcom Corporation
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _wlioctl_h_
-#define _wlioctl_h_
-
-#include <linux/ieee80211.h>
-#ifdef BRCM_FULLMAC
-#include <proto/bcmeth.h>
-#endif
-#include <proto/bcmevent.h>
-#include <proto/802.11.h>
-#include <bcmwifi.h>
-
-#ifndef INTF_NAME_SIZ
-#define INTF_NAME_SIZ 16
-#endif
-
-#ifdef BRCM_FULLMAC
-
-#define WL_BSS_INFO_VERSION 108 /* current ver of wl_bss_info struct */
-
-/* BSS info structure
- * Applications MUST CHECK ie_offset field and length field to access IEs and
- * next bss_info structure in a vector (in wl_scan_results_t)
- */
-typedef struct wl_bss_info {
- u32 version; /* version field */
- u32 length; /* byte length of data in this record,
- * starting at version and including IEs
- */
- u8 BSSID[ETH_ALEN];
- u16 beacon_period; /* units are Kusec */
- u16 capability; /* Capability information */
- u8 SSID_len;
- u8 SSID[32];
- struct {
- uint count; /* # rates in this set */
- u8 rates[16]; /* rates in 500kbps units w/hi bit set if basic */
- } rateset; /* supported rates */
- chanspec_t chanspec; /* chanspec for bss */
- u16 atim_window; /* units are Kusec */
- u8 dtim_period; /* DTIM period */
- s16 RSSI; /* receive signal strength (in dBm) */
- s8 phy_noise; /* noise (in dBm) */
-
- u8 n_cap; /* BSS is 802.11N Capable */
- u32 nbss_cap; /* 802.11N BSS Capabilities (based on HT_CAP_*) */
- u8 ctl_ch; /* 802.11N BSS control channel number */
- u32 reserved32[1]; /* Reserved for expansion of BSS properties */
- u8 flags; /* flags */
- u8 reserved[3]; /* Reserved for expansion of BSS properties */
- u8 basic_mcs[MCSSET_LEN]; /* 802.11N BSS required MCS set */
-
- u16 ie_offset; /* offset at which IEs start, from beginning */
- u32 ie_length; /* byte length of Information Elements */
- s16 SNR; /* average SNR of during frame reception */
- /* Add new fields here */
- /* variable length Information Elements */
-} wl_bss_info_t;
-#endif /* BRCM_FULLMAC */
-
-typedef struct wlc_ssid {
- u32 SSID_len;
- unsigned char SSID[32];
-} wlc_ssid_t;
-
-#ifdef BRCM_FULLMAC
-typedef struct chan_scandata {
- u8 txpower;
- u8 pad;
- chanspec_t channel; /* Channel num, bw, ctrl_sb and band */
- u32 channel_mintime;
- u32 channel_maxtime;
-} chan_scandata_t;
-
-typedef enum wl_scan_type {
- EXTDSCAN_FOREGROUND_SCAN,
- EXTDSCAN_BACKGROUND_SCAN,
- EXTDSCAN_FORCEDBACKGROUND_SCAN
-} wl_scan_type_t;
-
-#define WLC_EXTDSCAN_MAX_SSID 5
-
-#define WL_BSS_FLAGS_FROM_BEACON 0x01 /* bss_info derived from beacon */
-#define WL_BSS_FLAGS_FROM_CACHE 0x02 /* bss_info collected from cache */
-#define WL_BSS_FLAGS_RSSI_ONCHANNEL 0x04 /* rssi info was received on channel (vs offchannel) */
-
-typedef struct wl_extdscan_params {
- s8 nprobes; /* 0, passive, otherwise active */
- s8 split_scan; /* split scan */
- s8 band; /* band */
- s8 pad;
- wlc_ssid_t ssid[WLC_EXTDSCAN_MAX_SSID]; /* ssid list */
- u32 tx_rate; /* in 500ksec units */
- wl_scan_type_t scan_type; /* enum */
- s32 channel_num;
- chan_scandata_t channel_list[1]; /* list of chandata structs */
-} wl_extdscan_params_t;
-
-#define WL_EXTDSCAN_PARAMS_FIXED_SIZE (sizeof(wl_extdscan_params_t) - sizeof(chan_scandata_t))
-
-#define WL_BSSTYPE_INFRA 1
-#define WL_BSSTYPE_INDEP 0
-#define WL_BSSTYPE_ANY 2
-
-/* Bitmask for scan_type */
-#define WL_SCANFLAGS_PASSIVE 0x01 /* force passive scan */
-#define WL_SCANFLAGS_RESERVED 0x02 /* Reserved */
-#define WL_SCANFLAGS_PROHIBITED 0x04 /* allow scanning prohibited channels */
-
-typedef struct wl_scan_params {
- wlc_ssid_t ssid; /* default: {0, ""} */
- u8 bssid[ETH_ALEN]; /* default: bcast */
- s8 bss_type; /* default: any,
- * DOT11_BSSTYPE_ANY/INFRASTRUCTURE/INDEPENDENT
- */
- u8 scan_type; /* flags, 0 use default */
- s32 nprobes; /* -1 use default, number of probes per channel */
- s32 active_time; /* -1 use default, dwell time per channel for
- * active scanning
- */
- s32 passive_time; /* -1 use default, dwell time per channel
- * for passive scanning
- */
- s32 home_time; /* -1 use default, dwell time for the home channel
- * between channel scans
- */
- s32 channel_num; /* count of channels and ssids that follow
- *
- * low half is count of channels in channel_list, 0
- * means default (use all available channels)
- *
- * high half is entries in wlc_ssid_t array that
- * follows channel_list, aligned for s32 (4 bytes)
- * meaning an odd channel count implies a 2-byte pad
- * between end of channel_list and first ssid
- *
- * if ssid count is zero, single ssid in the fixed
- * parameter portion is assumed, otherwise ssid in
- * the fixed portion is ignored
- */
- u16 channel_list[1]; /* list of chanspecs */
-} wl_scan_params_t;
-
-/* size of wl_scan_params not including variable length array */
-#define WL_SCAN_PARAMS_FIXED_SIZE 64
-
-/* masks for channel and ssid count */
-#define WL_SCAN_PARAMS_COUNT_MASK 0x0000ffff
-#define WL_SCAN_PARAMS_NSSID_SHIFT 16
-
-#define WL_SCAN_ACTION_START 1
-#define WL_SCAN_ACTION_CONTINUE 2
-#define WL_SCAN_ACTION_ABORT 3
-
-#define ISCAN_REQ_VERSION 1
-
-/* incremental scan struct */
-typedef struct wl_iscan_params {
- u32 version;
- u16 action;
- u16 scan_duration;
- wl_scan_params_t params;
-} wl_iscan_params_t;
-
-/* 3 fields + size of wl_scan_params, not including variable length array */
-#define WL_ISCAN_PARAMS_FIXED_SIZE (offsetof(wl_iscan_params_t, params) + sizeof(wlc_ssid_t))
-
-typedef struct wl_scan_results {
- u32 buflen;
- u32 version;
- u32 count;
- wl_bss_info_t bss_info[1];
-} wl_scan_results_t;
-
-/* size of wl_scan_results not including variable length array */
-#define WL_SCAN_RESULTS_FIXED_SIZE (sizeof(wl_scan_results_t) - sizeof(wl_bss_info_t))
-
-/* wl_iscan_results status values */
-#define WL_SCAN_RESULTS_SUCCESS 0
-#define WL_SCAN_RESULTS_PARTIAL 1
-#define WL_SCAN_RESULTS_PENDING 2
-#define WL_SCAN_RESULTS_ABORTED 3
-#define WL_SCAN_RESULTS_NO_MEM 4
-
-#define ESCAN_REQ_VERSION 1
-
-typedef struct wl_escan_params {
- u32 version;
- u16 action;
- u16 sync_id;
- wl_scan_params_t params;
-} wl_escan_params_t;
-
-#define WL_ESCAN_PARAMS_FIXED_SIZE (offsetof(wl_escan_params_t, params) + sizeof(wlc_ssid_t))
-
-typedef struct wl_escan_result {
- u32 buflen;
- u32 version;
- u16 sync_id;
- u16 bss_count;
- wl_bss_info_t bss_info[1];
-} wl_escan_result_t;
-
-#define WL_ESCAN_RESULTS_FIXED_SIZE (sizeof(wl_escan_result_t) - sizeof(wl_bss_info_t))
-
-/* incremental scan results struct */
-typedef struct wl_iscan_results {
- u32 status;
- wl_scan_results_t results;
-} wl_iscan_results_t;
-
-/* size of wl_iscan_results not including variable length array */
-#define WL_ISCAN_RESULTS_FIXED_SIZE \
- (WL_SCAN_RESULTS_FIXED_SIZE + offsetof(wl_iscan_results_t, results))
-
-typedef struct wl_probe_params {
- wlc_ssid_t ssid;
- u8 bssid[ETH_ALEN];
- u8 mac[ETH_ALEN];
-} wl_probe_params_t;
-#endif /* BRCM_FULLMAC */
-
-#define WL_NUMRATES 16 /* max # of rates in a rateset */
-typedef struct wl_rateset {
- u32 count; /* # rates in this set */
- u8 rates[WL_NUMRATES]; /* rates in 500kbps units w/hi bit set if basic */
-} wl_rateset_t;
-
-#ifdef BRCM_FULLMAC
-typedef struct wl_rateset_args {
- u32 count; /* # rates in this set */
- u8 rates[WL_NUMRATES]; /* rates in 500kbps units w/hi bit set if basic */
- u8 mcs[MCSSET_LEN]; /* supported mcs index bit map */
-} wl_rateset_args_t;
-
-/* u32 list */
-typedef struct wl_u32_list {
- /* in - # of elements, out - # of entries */
- u32 count;
- /* variable length u32 list */
- u32 element[1];
-} wl_u32_list_t;
-
-/* used for association with a specific BSSID and chanspec list */
-typedef struct wl_assoc_params {
- u8 bssid[ETH_ALEN]; /* 00:00:00:00:00:00: broadcast scan */
- u16 bssid_cnt;
- s32 chanspec_num; /* 0: all available channels,
- * otherwise count of chanspecs in chanspec_list
- */
- chanspec_t chanspec_list[1]; /* list of chanspecs */
-} wl_assoc_params_t;
-#define WL_ASSOC_PARAMS_FIXED_SIZE (sizeof(wl_assoc_params_t) - sizeof(chanspec_t))
-
-/* used for reassociation/roam to a specific BSSID and channel */
-typedef wl_assoc_params_t wl_reassoc_params_t;
-#define WL_REASSOC_PARAMS_FIXED_SIZE WL_ASSOC_PARAMS_FIXED_SIZE
-
-/* used for join with or without a specific bssid and channel list */
-typedef struct wl_join_params {
- wlc_ssid_t ssid;
- wl_assoc_params_t params; /* optional field, but it must include the fixed portion
- * of the wl_assoc_params_t struct when it does present.
- */
-} wl_join_params_t;
-#define WL_JOIN_PARAMS_FIXED_SIZE (sizeof(wl_join_params_t) - sizeof(chanspec_t))
-
-#endif /* BRCM_FULLMAC */
-
-/* defines used by the nrate iovar */
-#define NRATE_MCS_INUSE 0x00000080 /* MSC in use,indicates b0-6 holds an mcs */
-#define NRATE_RATE_MASK 0x0000007f /* rate/mcs value */
-#define NRATE_STF_MASK 0x0000ff00 /* stf mode mask: siso, cdd, stbc, sdm */
-#define NRATE_STF_SHIFT 8 /* stf mode shift */
-#define NRATE_OVERRIDE 0x80000000 /* bit indicates override both rate & mode */
-#define NRATE_OVERRIDE_MCS_ONLY 0x40000000 /* bit indicate to override mcs only */
-#define NRATE_SGI_MASK 0x00800000 /* sgi mode */
-#define NRATE_SGI_SHIFT 23 /* sgi mode */
-#define NRATE_LDPC_CODING 0x00400000 /* bit indicates adv coding in use */
-#define NRATE_LDPC_SHIFT 22 /* ldpc shift */
-
-#define NRATE_STF_SISO 0 /* stf mode SISO */
-#define NRATE_STF_CDD 1 /* stf mode CDD */
-#define NRATE_STF_STBC 2 /* stf mode STBC */
-#define NRATE_STF_SDM 3 /* stf mode SDM */
-
-#define ANTENNA_NUM_1 1 /* total number of antennas to be used */
-#define ANTENNA_NUM_2 2
-#define ANTENNA_NUM_3 3
-#define ANTENNA_NUM_4 4
-
-#define ANT_SELCFG_AUTO 0x80 /* bit indicates antenna sel AUTO */
-#define ANT_SELCFG_MASK 0x33 /* antenna configuration mask */
-#define ANT_SELCFG_MAX 4 /* max number of antenna configurations */
-#define ANT_SELCFG_TX_UNICAST 0 /* unicast tx antenna configuration */
-#define ANT_SELCFG_RX_UNICAST 1 /* unicast rx antenna configuration */
-#define ANT_SELCFG_TX_DEF 2 /* default tx antenna configuration */
-#define ANT_SELCFG_RX_DEF 3 /* default rx antenna configuration */
-
-#define MAX_STREAMS_SUPPORTED 4 /* max number of streams supported */
-
-typedef struct {
- u8 ant_config[ANT_SELCFG_MAX]; /* antenna configuration */
- u8 num_antcfg; /* number of available antenna configurations */
-} wlc_antselcfg_t;
-
-#define HIGHEST_SINGLE_STREAM_MCS 7 /* MCS values greater than this enable multiple streams */
-
-#ifdef BRCM_FULLMAC
-#define MAX_CCA_CHANNELS 38 /* Max number of 20 Mhz wide channels */
-#define MAX_CCA_SECS 60 /* CCA keeps this many seconds history */
-
-#define IBSS_MED 15 /* Mediom in-bss congestion percentage */
-#define IBSS_HI 25 /* Hi in-bss congestion percentage */
-#define OBSS_MED 12
-#define OBSS_HI 25
-#define INTERFER_MED 5
-#define INTERFER_HI 10
-
-#define CCA_FLAG_2G_ONLY 0x01 /* Return a channel from 2.4 Ghz band */
-#define CCA_FLAG_5G_ONLY 0x02 /* Return a channel from 2.4 Ghz band */
-#define CCA_FLAG_IGNORE_DURATION 0x04 /* Ignore dwell time for each channel */
-#define CCA_FLAGS_PREFER_1_6_11 0x10
-#define CCA_FLAG_IGNORE_INTERFER 0x20 /* do not exlude channel based on interfer level */
-
-#define CCA_ERRNO_BAND 1 /* After filtering for band pref, no choices left */
-#define CCA_ERRNO_DURATION 2 /* After filtering for duration, no choices left */
-#define CCA_ERRNO_PREF_CHAN 3 /* After filtering for chan pref, no choices left */
-#define CCA_ERRNO_INTERFER 4 /* After filtering for interference, no choices left */
-#define CCA_ERRNO_TOO_FEW 5 /* Only 1 channel was input */
-
-typedef struct {
- u32 duration; /* millisecs spent sampling this channel */
- u32 congest_ibss; /* millisecs in our bss (presumably this traffic will */
- /* move if cur bss moves channels) */
- u32 congest_obss; /* traffic not in our bss */
- u32 interference; /* millisecs detecting a non 802.11 interferer. */
- u32 timestamp; /* second timestamp */
-} cca_congest_t;
-
-typedef struct {
- chanspec_t chanspec; /* Which channel? */
- u8 num_secs; /* How many secs worth of data */
- cca_congest_t secs[1]; /* Data */
-} cca_congest_channel_req_t;
-
-#endif /* BRCM_FULLMAC */
-
-#define WLC_CNTRY_BUF_SZ 4 /* Country string is 3 bytes + NUL */
-
-#ifdef BRCM_FULLMAC
-typedef struct wl_country {
- char country_abbrev[WLC_CNTRY_BUF_SZ]; /* nul-terminated country code used in
- * the Country IE
- */
- s32 rev; /* revision specifier for ccode
- * on set, -1 indicates unspecified.
- * on get, rev >= 0
- */
- char ccode[WLC_CNTRY_BUF_SZ]; /* nul-terminated built-in country code.
- * variable length, but fixed size in
- * struct allows simple allocation for
- * expected country strings <= 3 chars.
- */
-} wl_country_t;
-
-typedef struct wl_channels_in_country {
- u32 buflen;
- u32 band;
- char country_abbrev[WLC_CNTRY_BUF_SZ];
- u32 count;
- u32 channel[1];
-} wl_channels_in_country_t;
-
-typedef struct wl_country_list {
- u32 buflen;
- u32 band_set;
- u32 band;
- u32 count;
- char country_abbrev[1];
-} wl_country_list_t;
-
-#define WL_NUM_RPI_BINS 8
-#define WL_RM_TYPE_BASIC 1
-#define WL_RM_TYPE_CCA 2
-#define WL_RM_TYPE_RPI 3
-
-#define WL_RM_FLAG_PARALLEL (1<<0)
-
-#define WL_RM_FLAG_LATE (1<<1)
-#define WL_RM_FLAG_INCAPABLE (1<<2)
-#define WL_RM_FLAG_REFUSED (1<<3)
-
-typedef struct wl_rm_req_elt {
- s8 type;
- s8 flags;
- chanspec_t chanspec;
- u32 token; /* token for this measurement */
- u32 tsf_h; /* TSF high 32-bits of Measurement start time */
- u32 tsf_l; /* TSF low 32-bits */
- u32 dur; /* TUs */
-} wl_rm_req_elt_t;
-
-typedef struct wl_rm_req {
- u32 token; /* overall measurement set token */
- u32 count; /* number of measurement requests */
- void *cb; /* completion callback function: may be NULL */
- void *cb_arg; /* arg to completion callback function */
- wl_rm_req_elt_t req[1]; /* variable length block of requests */
-} wl_rm_req_t;
-#define WL_RM_REQ_FIXED_LEN offsetof(wl_rm_req_t, req)
-
-typedef struct wl_rm_rep_elt {
- s8 type;
- s8 flags;
- chanspec_t chanspec;
- u32 token; /* token for this measurement */
- u32 tsf_h; /* TSF high 32-bits of Measurement start time */
- u32 tsf_l; /* TSF low 32-bits */
- u32 dur; /* TUs */
- u32 len; /* byte length of data block */
- u8 data[1]; /* variable length data block */
-} wl_rm_rep_elt_t;
-#define WL_RM_REP_ELT_FIXED_LEN 24 /* length excluding data block */
-
-#define WL_RPI_REP_BIN_NUM 8
-typedef struct wl_rm_rpi_rep {
- u8 rpi[WL_RPI_REP_BIN_NUM];
- s8 rpi_max[WL_RPI_REP_BIN_NUM];
-} wl_rm_rpi_rep_t;
-
-typedef struct wl_rm_rep {
- u32 token; /* overall measurement set token */
- u32 len; /* length of measurement report block */
- wl_rm_rep_elt_t rep[1]; /* variable length block of reports */
-} wl_rm_rep_t;
-#define WL_RM_REP_FIXED_LEN 8
-#endif /* BRCM_FULLMAC */
-
-/* Enumerate crypto algorithms */
-#define CRYPTO_ALGO_OFF 0
-#define CRYPTO_ALGO_WEP1 1
-#define CRYPTO_ALGO_TKIP 2
-#define CRYPTO_ALGO_WEP128 3
-#define CRYPTO_ALGO_AES_CCM 4
-#define CRYPTO_ALGO_AES_RESERVED1 5
-#define CRYPTO_ALGO_AES_RESERVED2 6
-#define CRYPTO_ALGO_NALG 7
-
-#define WSEC_GEN_MIC_ERROR 0x0001
-#define WSEC_GEN_REPLAY 0x0002
-#define WSEC_GEN_ICV_ERROR 0x0004
-
-#define WL_SOFT_KEY (1 << 0) /* Indicates this key is using soft encrypt */
-#define WL_PRIMARY_KEY (1 << 1) /* Indicates this key is the primary (ie tx) key */
-#define WL_KF_RES_4 (1 << 4) /* Reserved for backward compat */
-#define WL_KF_RES_5 (1 << 5) /* Reserved for backward compat */
-#define WL_IBSS_PEER_GROUP_KEY (1 << 6) /* Indicates a group key for a IBSS PEER */
-
-typedef struct wl_wsec_key {
- u32 index; /* key index */
- u32 len; /* key length */
- u8 data[WLAN_MAX_KEY_LEN]; /* key data */
- u32 pad_1[18];
- u32 algo; /* CRYPTO_ALGO_AES_CCM, CRYPTO_ALGO_WEP128, etc */
- u32 flags; /* misc flags */
- u32 pad_2[2];
- int pad_3;
- int iv_initialized; /* has IV been initialized already? */
- int pad_4;
- /* Rx IV */
- struct {
- u32 hi; /* upper 32 bits of IV */
- u16 lo; /* lower 16 bits of IV */
- } rxiv;
- u32 pad_5[2];
- u8 ea[ETH_ALEN]; /* per station */
-} wl_wsec_key_t;
-
-#define WSEC_MIN_PSK_LEN 8
-#define WSEC_MAX_PSK_LEN 64
-
-/* Flag for key material needing passhash'ing */
-#define WSEC_PASSPHRASE (1<<0)
-
-/* receptacle for WLC_SET_WSEC_PMK parameter */
-typedef struct {
- unsigned short key_len; /* octets in key material */
- unsigned short flags; /* key handling qualification */
- u8 key[WSEC_MAX_PSK_LEN]; /* PMK material */
-} wsec_pmk_t;
-
-/* wireless security bitvec */
-#define WEP_ENABLED 0x0001
-#define TKIP_ENABLED 0x0002
-#define AES_ENABLED 0x0004
-#define WSEC_SWFLAG 0x0008
-#define SES_OW_ENABLED 0x0040 /* to go into transition mode without setting wep */
-
-/* WPA authentication mode bitvec */
-#define WPA_AUTH_DISABLED 0x0000 /* Legacy (i.e., non-WPA) */
-#define WPA_AUTH_NONE 0x0001 /* none (IBSS) */
-#define WPA_AUTH_UNSPECIFIED 0x0002 /* over 802.1x */
-#define WPA_AUTH_PSK 0x0004 /* Pre-shared key */
-#define WPA_AUTH_RESERVED1 0x0008
-#define WPA_AUTH_RESERVED2 0x0010
- /* #define WPA_AUTH_8021X 0x0020 *//* 802.1x, reserved */
-#define WPA2_AUTH_RESERVED1 0x0020
-#define WPA2_AUTH_UNSPECIFIED 0x0040 /* over 802.1x */
-#define WPA2_AUTH_PSK 0x0080 /* Pre-shared key */
-#define WPA2_AUTH_RESERVED3 0x0200
-#define WPA2_AUTH_RESERVED4 0x0400
-#define WPA2_AUTH_RESERVED5 0x0800
-
-/* pmkid */
-#define MAXPMKID 16
-
-typedef struct _pmkid {
- u8 BSSID[ETH_ALEN];
- u8 PMKID[WLAN_PMKID_LEN];
-} pmkid_t;
-
-typedef struct _pmkid_list {
- u32 npmkid;
- pmkid_t pmkid[1];
-} pmkid_list_t;
-
-typedef struct _pmkid_cand {
- u8 BSSID[ETH_ALEN];
- u8 preauth;
-} pmkid_cand_t;
-
-typedef struct _pmkid_cand_list {
- u32 npmkid_cand;
- pmkid_cand_t pmkid_cand[1];
-} pmkid_cand_list_t;
-
-typedef struct wl_led_info {
- u32 index; /* led index */
- u32 behavior;
- u8 activehi;
-} wl_led_info_t;
-
-/* R_REG and W_REG struct passed through ioctl */
-typedef struct {
- u32 byteoff; /* byte offset of the field in d11regs_t */
- u32 val; /* read/write value of the field */
- u32 size; /* sizeof the field */
- uint band; /* band (optional) */
-} rw_reg_t;
-
-
-#ifdef BRCM_FULLMAC
-/* Used to get specific STA parameters */
-typedef struct {
- u32 val;
- u8 ea[ETH_ALEN];
-} scb_val_t;
-#endif /* BRCM_FULLMAC */
-
-/* channel encoding */
-typedef struct channel_info {
- int hw_channel;
- int target_channel;
- int scan_channel;
-} channel_info_t;
-
-/* For ioctls that take a list of MAC addresses */
-struct maclist {
- uint count; /* number of MAC addresses */
- u8 ea[1][ETH_ALEN]; /* variable length array of MAC addresses */
-};
-
-#ifdef BRCM_FULLMAC
-/* Linux network driver ioctl encoding */
-typedef struct wl_ioctl {
- uint cmd; /* common ioctl definition */
- void *buf; /* pointer to user buffer */
- uint len; /* length of user buffer */
- u8 set; /* get or set request (optional) */
- uint used; /* bytes read or written (optional) */
- uint needed; /* bytes needed (optional) */
-} wl_ioctl_t;
-#endif /* BRCM_FULLMAC */
-
-
-/*
- * Structure for passing hardware and software
- * revision info up from the driver.
- */
-typedef struct wlc_rev_info {
- uint vendorid; /* PCI vendor id */
- uint deviceid; /* device id of chip */
- uint radiorev; /* radio revision */
- uint chiprev; /* chip revision */
- uint corerev; /* core revision */
- uint boardid; /* board identifier (usu. PCI sub-device id) */
- uint boardvendor; /* board vendor (usu. PCI sub-vendor id) */
- uint boardrev; /* board revision */
- uint driverrev; /* driver version */
- uint ucoderev; /* microcode version */
- uint bus; /* bus type */
- uint chipnum; /* chip number */
- uint phytype; /* phy type */
- uint phyrev; /* phy revision */
- uint anarev; /* anacore rev */
- uint chippkg; /* chip package info */
-} wlc_rev_info_t;
-
-#define WL_REV_INFO_LEGACY_LENGTH 48
-
-#ifdef BRCM_FULLMAC
-#define WLC_IOCTL_SMLEN 256 /* "small" length ioctl buffer required */
-#define WLC_IOCTL_MEDLEN 1536 /* "med" length ioctl buffer required */
-#define WLC_IOCTL_MAXLEN 8192
-#endif
-
-/* common ioctl definitions */
-#define WLC_GET_MAGIC 0
-#define WLC_GET_VERSION 1
-#define WLC_UP 2
-#define WLC_DOWN 3
-#define WLC_GET_LOOP 4
-#define WLC_SET_LOOP 5
-#define WLC_DUMP 6
-#define WLC_GET_MSGLEVEL 7
-#define WLC_SET_MSGLEVEL 8
-#define WLC_GET_PROMISC 9
-#define WLC_SET_PROMISC 10
-#define WLC_OVERLAY_IOCTL 11
-#define WLC_GET_RATE 12
- /* #define WLC_SET_RATE 13 *//* no longer supported */
-#define WLC_GET_INSTANCE 14
- /* #define WLC_GET_FRAG 15 *//* no longer supported */
- /* #define WLC_SET_FRAG 16 *//* no longer supported */
- /* #define WLC_GET_RTS 17 *//* no longer supported */
- /* #define WLC_SET_RTS 18 *//* no longer supported */
-#define WLC_GET_INFRA 19
-#define WLC_SET_INFRA 20
-#define WLC_GET_AUTH 21
-#define WLC_SET_AUTH 22
-#define WLC_GET_BSSID 23
-#define WLC_SET_BSSID 24
-#define WLC_GET_SSID 25
-#define WLC_SET_SSID 26
-#define WLC_RESTART 27
- /* #define WLC_DUMP_SCB 28 *//* no longer supported */
-#define WLC_GET_CHANNEL 29
-#define WLC_SET_CHANNEL 30
-#define WLC_GET_SRL 31
-#define WLC_SET_SRL 32
-#define WLC_GET_LRL 33
-#define WLC_SET_LRL 34
-#define WLC_GET_PLCPHDR 35
-#define WLC_SET_PLCPHDR 36
-#define WLC_GET_RADIO 37
-#define WLC_SET_RADIO 38
-#define WLC_GET_PHYTYPE 39
-#define WLC_DUMP_RATE 40
-#define WLC_SET_RATE_PARAMS 41
-#define WLC_GET_FIXRATE 42
-#define WLC_SET_FIXRATE 43
- /* #define WLC_GET_WEP 42 *//* no longer supported */
- /* #define WLC_SET_WEP 43 *//* no longer supported */
-#define WLC_GET_KEY 44
-#define WLC_SET_KEY 45
-#define WLC_GET_REGULATORY 46
-#define WLC_SET_REGULATORY 47
-#define WLC_GET_PASSIVE_SCAN 48
-#define WLC_SET_PASSIVE_SCAN 49
-#define WLC_SCAN 50
-#define WLC_SCAN_RESULTS 51
-#define WLC_DISASSOC 52
-#define WLC_REASSOC 53
-#define WLC_GET_ROAM_TRIGGER 54
-#define WLC_SET_ROAM_TRIGGER 55
-#define WLC_GET_ROAM_DELTA 56
-#define WLC_SET_ROAM_DELTA 57
-#define WLC_GET_ROAM_SCAN_PERIOD 58
-#define WLC_SET_ROAM_SCAN_PERIOD 59
-#define WLC_EVM 60 /* diag */
-#define WLC_GET_TXANT 61
-#define WLC_SET_TXANT 62
-#define WLC_GET_ANTDIV 63
-#define WLC_SET_ANTDIV 64
- /* #define WLC_GET_TXPWR 65 *//* no longer supported */
- /* #define WLC_SET_TXPWR 66 *//* no longer supported */
-#define WLC_GET_CLOSED 67
-#define WLC_SET_CLOSED 68
-#define WLC_GET_MACLIST 69
-#define WLC_SET_MACLIST 70
-#define WLC_GET_RATESET 71
-#define WLC_SET_RATESET 72
- /* #define WLC_GET_LOCALE 73 *//* no longer supported */
-#define WLC_LONGTRAIN 74
-#define WLC_GET_BCNPRD 75
-#define WLC_SET_BCNPRD 76
-#define WLC_GET_DTIMPRD 77
-#define WLC_SET_DTIMPRD 78
-#define WLC_GET_SROM 79
-#define WLC_SET_SROM 80
-#define WLC_GET_WEP_RESTRICT 81
-#define WLC_SET_WEP_RESTRICT 82
-#define WLC_GET_COUNTRY 83
-#define WLC_SET_COUNTRY 84
-#define WLC_GET_PM 85
-#define WLC_SET_PM 86
-#define WLC_GET_WAKE 87
-#define WLC_SET_WAKE 88
- /* #define WLC_GET_D11CNTS 89 *//* -> "counters" iovar */
-#define WLC_GET_FORCELINK 90 /* ndis only */
-#define WLC_SET_FORCELINK 91 /* ndis only */
-#define WLC_FREQ_ACCURACY 92 /* diag */
-#define WLC_CARRIER_SUPPRESS 93 /* diag */
-#define WLC_GET_PHYREG 94
-#define WLC_SET_PHYREG 95
-#define WLC_GET_RADIOREG 96
-#define WLC_SET_RADIOREG 97
-#define WLC_GET_REVINFO 98
-#define WLC_GET_UCANTDIV 99
-#define WLC_SET_UCANTDIV 100
-#define WLC_R_REG 101
-#define WLC_W_REG 102
-/* #define WLC_DIAG_LOOPBACK 103 old tray diag */
- /* #define WLC_RESET_D11CNTS 104 *//* -> "reset_d11cnts" iovar */
-#define WLC_GET_MACMODE 105
-#define WLC_SET_MACMODE 106
-#define WLC_GET_MONITOR 107
-#define WLC_SET_MONITOR 108
-#define WLC_GET_GMODE 109
-#define WLC_SET_GMODE 110
-#define WLC_GET_LEGACY_ERP 111
-#define WLC_SET_LEGACY_ERP 112
-#define WLC_GET_RX_ANT 113
-#define WLC_GET_CURR_RATESET 114 /* current rateset */
-#define WLC_GET_SCANSUPPRESS 115
-#define WLC_SET_SCANSUPPRESS 116
-#define WLC_GET_AP 117
-#define WLC_SET_AP 118
-#define WLC_GET_EAP_RESTRICT 119
-#define WLC_SET_EAP_RESTRICT 120
-#define WLC_SCB_AUTHORIZE 121
-#define WLC_SCB_DEAUTHORIZE 122
-#define WLC_GET_WDSLIST 123
-#define WLC_SET_WDSLIST 124
-#define WLC_GET_ATIM 125
-#define WLC_SET_ATIM 126
-#define WLC_GET_RSSI 127
-#define WLC_GET_PHYANTDIV 128
-#define WLC_SET_PHYANTDIV 129
-#define WLC_AP_RX_ONLY 130
-#define WLC_GET_TX_PATH_PWR 131
-#define WLC_SET_TX_PATH_PWR 132
-#define WLC_GET_WSEC 133
-#define WLC_SET_WSEC 134
-#define WLC_GET_PHY_NOISE 135
-#define WLC_GET_BSS_INFO 136
-#define WLC_GET_PKTCNTS 137
-#define WLC_GET_LAZYWDS 138
-#define WLC_SET_LAZYWDS 139
-#define WLC_GET_BANDLIST 140
-#define WLC_GET_BAND 141
-#define WLC_SET_BAND 142
-#define WLC_SCB_DEAUTHENTICATE 143
-#define WLC_GET_SHORTSLOT 144
-#define WLC_GET_SHORTSLOT_OVERRIDE 145
-#define WLC_SET_SHORTSLOT_OVERRIDE 146
-#define WLC_GET_SHORTSLOT_RESTRICT 147
-#define WLC_SET_SHORTSLOT_RESTRICT 148
-#define WLC_GET_GMODE_PROTECTION 149
-#define WLC_GET_GMODE_PROTECTION_OVERRIDE 150
-#define WLC_SET_GMODE_PROTECTION_OVERRIDE 151
-#define WLC_UPGRADE 152
- /* #define WLC_GET_MRATE 153 *//* no longer supported */
- /* #define WLC_SET_MRATE 154 *//* no longer supported */
-#define WLC_GET_IGNORE_BCNS 155
-#define WLC_SET_IGNORE_BCNS 156
-#define WLC_GET_SCB_TIMEOUT 157
-#define WLC_SET_SCB_TIMEOUT 158
-#define WLC_GET_ASSOCLIST 159
-#define WLC_GET_CLK 160
-#define WLC_SET_CLK 161
-#define WLC_GET_UP 162
-#define WLC_OUT 163
-#define WLC_GET_WPA_AUTH 164
-#define WLC_SET_WPA_AUTH 165
-#define WLC_GET_UCFLAGS 166
-#define WLC_SET_UCFLAGS 167
-#define WLC_GET_PWRIDX 168
-#define WLC_SET_PWRIDX 169
-#define WLC_GET_TSSI 170
-#define WLC_GET_SUP_RATESET_OVERRIDE 171
-#define WLC_SET_SUP_RATESET_OVERRIDE 172
- /* #define WLC_SET_FAST_TIMER 173 *//* no longer supported */
- /* #define WLC_GET_FAST_TIMER 174 *//* no longer supported */
- /* #define WLC_SET_SLOW_TIMER 175 *//* no longer supported */
- /* #define WLC_GET_SLOW_TIMER 176 *//* no longer supported */
- /* #define WLC_DUMP_PHYREGS 177 *//* no longer supported */
-#define WLC_GET_PROTECTION_CONTROL 178
-#define WLC_SET_PROTECTION_CONTROL 179
-#define WLC_GET_PHYLIST 180
-#define WLC_ENCRYPT_STRENGTH 181 /* ndis only */
-#define WLC_DECRYPT_STATUS 182 /* ndis only */
-#define WLC_GET_KEY_SEQ 183
-#define WLC_GET_SCAN_CHANNEL_TIME 184
-#define WLC_SET_SCAN_CHANNEL_TIME 185
-#define WLC_GET_SCAN_UNASSOC_TIME 186
-#define WLC_SET_SCAN_UNASSOC_TIME 187
-#define WLC_GET_SCAN_HOME_TIME 188
-#define WLC_SET_SCAN_HOME_TIME 189
-#define WLC_GET_SCAN_NPROBES 190
-#define WLC_SET_SCAN_NPROBES 191
-#define WLC_GET_PRB_RESP_TIMEOUT 192
-#define WLC_SET_PRB_RESP_TIMEOUT 193
-#define WLC_GET_ATTEN 194
-#define WLC_SET_ATTEN 195
-#define WLC_GET_SHMEM 196 /* diag */
-#define WLC_SET_SHMEM 197 /* diag */
- /* #define WLC_GET_GMODE_PROTECTION_CTS 198 *//* no longer supported */
- /* #define WLC_SET_GMODE_PROTECTION_CTS 199 *//* no longer supported */
-#define WLC_SET_WSEC_TEST 200
-#define WLC_SCB_DEAUTHENTICATE_FOR_REASON 201
-#define WLC_TKIP_COUNTERMEASURES 202
-#define WLC_GET_PIOMODE 203
-#define WLC_SET_PIOMODE 204
-#define WLC_SET_ASSOC_PREFER 205
-#define WLC_GET_ASSOC_PREFER 206
-#define WLC_SET_ROAM_PREFER 207
-#define WLC_GET_ROAM_PREFER 208
-#define WLC_SET_LED 209
-#define WLC_GET_LED 210
-#define WLC_RESERVED6 211
-#define WLC_RESERVED7 212
-#define WLC_GET_CHANNEL_QA 213
-#define WLC_START_CHANNEL_QA 214
-#define WLC_GET_CHANNEL_SEL 215
-#define WLC_START_CHANNEL_SEL 216
-#define WLC_GET_VALID_CHANNELS 217
-#define WLC_GET_FAKEFRAG 218
-#define WLC_SET_FAKEFRAG 219
-#define WLC_GET_PWROUT_PERCENTAGE 220
-#define WLC_SET_PWROUT_PERCENTAGE 221
-#define WLC_SET_BAD_FRAME_PREEMPT 222
-#define WLC_GET_BAD_FRAME_PREEMPT 223
-#define WLC_SET_LEAP_LIST 224
-#define WLC_GET_LEAP_LIST 225
-#define WLC_GET_CWMIN 226
-#define WLC_SET_CWMIN 227
-#define WLC_GET_CWMAX 228
-#define WLC_SET_CWMAX 229
-#define WLC_GET_WET 230
-#define WLC_SET_WET 231
-#define WLC_GET_PUB 232
- /* #define WLC_SET_GLACIAL_TIMER 233 *//* no longer supported */
- /* #define WLC_GET_GLACIAL_TIMER 234 *//* no longer supported */
-#define WLC_GET_KEY_PRIMARY 235
-#define WLC_SET_KEY_PRIMARY 236
- /* #define WLC_DUMP_RADIOREGS 237 *//* no longer supported */
-#define WLC_RESERVED4 238
-#define WLC_RESERVED5 239
-#define WLC_UNSET_CALLBACK 240
-#define WLC_SET_CALLBACK 241
-#define WLC_GET_RADAR 242
-#define WLC_SET_RADAR 243
-#define WLC_SET_SPECT_MANAGMENT 244
-#define WLC_GET_SPECT_MANAGMENT 245
-#define WLC_WDS_GET_REMOTE_HWADDR 246 /* handled in wl_linux.c/wl_vx.c */
-#define WLC_WDS_GET_WPA_SUP 247
-#define WLC_SET_CS_SCAN_TIMER 248
-#define WLC_GET_CS_SCAN_TIMER 249
-#define WLC_MEASURE_REQUEST 250
-#define WLC_INIT 251
-#define WLC_SEND_QUIET 252
-#define WLC_KEEPALIVE 253
-#define WLC_SEND_PWR_CONSTRAINT 254
-#define WLC_UPGRADE_STATUS 255
-#define WLC_CURRENT_PWR 256
-#define WLC_GET_SCAN_PASSIVE_TIME 257
-#define WLC_SET_SCAN_PASSIVE_TIME 258
-#define WLC_LEGACY_LINK_BEHAVIOR 259
-#define WLC_GET_CHANNELS_IN_COUNTRY 260
-#define WLC_GET_COUNTRY_LIST 261
-#define WLC_GET_VAR 262 /* get value of named variable */
-#define WLC_SET_VAR 263 /* set named variable to value */
-#define WLC_NVRAM_GET 264 /* deprecated */
-#define WLC_NVRAM_SET 265
-#define WLC_NVRAM_DUMP 266
-#define WLC_REBOOT 267
-#define WLC_SET_WSEC_PMK 268
-#define WLC_GET_AUTH_MODE 269
-#define WLC_SET_AUTH_MODE 270
-#define WLC_GET_WAKEENTRY 271
-#define WLC_SET_WAKEENTRY 272
-#define WLC_NDCONFIG_ITEM 273 /* currently handled in wl_oid.c */
-#define WLC_NVOTPW 274
-#define WLC_OTPW 275
-#define WLC_IOV_BLOCK_GET 276
-#define WLC_IOV_MODULES_GET 277
-#define WLC_SOFT_RESET 278
-#define WLC_GET_ALLOW_MODE 279
-#define WLC_SET_ALLOW_MODE 280
-#define WLC_GET_DESIRED_BSSID 281
-#define WLC_SET_DESIRED_BSSID 282
-#define WLC_DISASSOC_MYAP 283
-#define WLC_GET_RESERVED10 284
-#define WLC_GET_RESERVED11 285
-#define WLC_GET_RESERVED12 286
-#define WLC_GET_RESERVED13 287
-#define WLC_GET_RESERVED14 288
-#define WLC_SET_RESERVED15 289
-#define WLC_SET_RESERVED16 290
-#define WLC_GET_RESERVED17 291
-#define WLC_GET_RESERVED18 292
-#define WLC_GET_RESERVED19 293
-#define WLC_SET_RESERVED1A 294
-#define WLC_GET_RESERVED1B 295
-#define WLC_GET_RESERVED1C 296
-#define WLC_GET_RESERVED1D 297
-#define WLC_SET_RESERVED1E 298
-#define WLC_GET_RESERVED1F 299
-#define WLC_GET_RESERVED20 300
-#define WLC_GET_RESERVED21 301
-#define WLC_GET_RESERVED22 302
-#define WLC_GET_RESERVED23 303
-#define WLC_GET_RESERVED24 304
-#define WLC_SET_RESERVED25 305
-#define WLC_GET_RESERVED26 306
-#define WLC_NPHY_SAMPLE_COLLECT 307 /* Nphy sample collect mode */
-#define WLC_UM_PRIV 308 /* for usermode driver private ioctl */
-#define WLC_GET_CMD 309
- /* #define WLC_LAST 310 *//* Never used - can be reused */
-#define WLC_RESERVED8 311
-#define WLC_RESERVED9 312
-#define WLC_RESERVED1 313
-#define WLC_RESERVED2 314
-#define WLC_RESERVED3 315
-#define WLC_LAST 316
-
-#ifndef EPICTRL_COOKIE
-#define EPICTRL_COOKIE 0xABADCEDE
-#endif
-
-#define WL_DECRYPT_STATUS_SUCCESS 1
-#define WL_DECRYPT_STATUS_FAILURE 2
-#define WL_DECRYPT_STATUS_UNKNOWN 3
-
-/* allows user-mode app to poll the status of USB image upgrade */
-#define WLC_UPGRADE_SUCCESS 0
-#define WLC_UPGRADE_PENDING 1
-
-/* WLC_GET_AUTH, WLC_SET_AUTH values */
-#define WL_AUTH_OPEN_SYSTEM 0 /* d11 open authentication */
-#define WL_AUTH_SHARED_KEY 1 /* d11 shared authentication */
-#define WL_AUTH_OPEN_SHARED 2 /* try open, then shared if open failed w/rc 13 */
-
-/* Bit masks for radio disabled status - returned by WL_GET_RADIO */
-#define WL_RADIO_SW_DISABLE (1<<0)
-#define WL_RADIO_HW_DISABLE (1<<1)
-#define WL_RADIO_MPC_DISABLE (1<<2)
-#define WL_RADIO_COUNTRY_DISABLE (1<<3) /* some countries don't support any channel */
-
-#define WL_SPURAVOID_OFF 0
-#define WL_SPURAVOID_ON1 1
-#define WL_SPURAVOID_ON2 2
-
-/* Override bit for WLC_SET_TXPWR. if set, ignore other level limits */
-#define WL_TXPWR_OVERRIDE (1U<<31)
-
-#define WL_PHY_PAVARS_LEN 6 /* Phy type, Band range, chain, a1, b0, b1 */
-
-typedef struct wl_po {
- u16 phy_type; /* Phy type */
- u16 band;
- u16 cckpo;
- u32 ofdmpo;
- u16 mcspo[8];
-} wl_po_t;
-
-/* a large TX Power as an init value to factor out of min() calculations,
- * keep low enough to fit in an s8, units are .25 dBm
- */
-#define WLC_TXPWR_MAX (127) /* ~32 dBm = 1,500 mW */
-
-/* "diag" iovar argument and error code */
-#define WL_DIAG_INTERRUPT 1 /* d11 loopback interrupt test */
-#define WL_DIAG_LOOPBACK 2 /* d11 loopback data test */
-#define WL_DIAG_MEMORY 3 /* d11 memory test */
-#define WL_DIAG_LED 4 /* LED test */
-#define WL_DIAG_REG 5 /* d11/phy register test */
-#define WL_DIAG_SROM 6 /* srom read/crc test */
-#define WL_DIAG_DMA 7 /* DMA test */
-
-#define WL_DIAGERR_SUCCESS 0
-#define WL_DIAGERR_FAIL_TO_RUN 1 /* unable to run requested diag */
-#define WL_DIAGERR_NOT_SUPPORTED 2 /* diag requested is not supported */
-#define WL_DIAGERR_INTERRUPT_FAIL 3 /* loopback interrupt test failed */
-#define WL_DIAGERR_LOOPBACK_FAIL 4 /* loopback data test failed */
-#define WL_DIAGERR_SROM_FAIL 5 /* srom read failed */
-#define WL_DIAGERR_SROM_BADCRC 6 /* srom crc failed */
-#define WL_DIAGERR_REG_FAIL 7 /* d11/phy register test failed */
-#define WL_DIAGERR_MEMORY_FAIL 8 /* d11 memory test failed */
-#define WL_DIAGERR_NOMEM 9 /* diag test failed due to no memory */
-#define WL_DIAGERR_DMA_FAIL 10 /* DMA test failed */
-
-#define WL_DIAGERR_MEMORY_TIMEOUT 11 /* d11 memory test didn't finish in time */
-#define WL_DIAGERR_MEMORY_BADPATTERN 12 /* d11 memory test result in bad pattern */
-
-/* band types */
-#define WLC_BAND_AUTO 0 /* auto-select */
-#define WLC_BAND_5G 1 /* 5 Ghz */
-#define WLC_BAND_2G 2 /* 2.4 Ghz */
-#define WLC_BAND_ALL 3 /* all bands */
-
-/* band range returned by band_range iovar */
-#define WL_CHAN_FREQ_RANGE_2G 0
-#define WL_CHAN_FREQ_RANGE_5GL 1
-#define WL_CHAN_FREQ_RANGE_5GM 2
-#define WL_CHAN_FREQ_RANGE_5GH 3
-
-/* phy types (returned by WLC_GET_PHYTPE) */
-#define WLC_PHY_TYPE_A 0
-#define WLC_PHY_TYPE_B 1
-#define WLC_PHY_TYPE_G 2
-#define WLC_PHY_TYPE_N 4
-#define WLC_PHY_TYPE_LP 5
-#define WLC_PHY_TYPE_SSN 6
-#define WLC_PHY_TYPE_HT 7
-#define WLC_PHY_TYPE_LCN 8
-#define WLC_PHY_TYPE_NULL 0xf
-
-/* MAC list modes */
-#define WLC_MACMODE_DISABLED 0 /* MAC list disabled */
-#define WLC_MACMODE_DENY 1 /* Deny specified (i.e. allow unspecified) */
-#define WLC_MACMODE_ALLOW 2 /* Allow specified (i.e. deny unspecified) */
-
-/*
- * 54g modes (basic bits may still be overridden)
- *
- * GMODE_LEGACY_B Rateset: 1b, 2b, 5.5, 11
- * Preamble: Long
- * Shortslot: Off
- * GMODE_AUTO Rateset: 1b, 2b, 5.5b, 11b, 18, 24, 36, 54
- * Extended Rateset: 6, 9, 12, 48
- * Preamble: Long
- * Shortslot: Auto
- * GMODE_ONLY Rateset: 1b, 2b, 5.5b, 11b, 18, 24b, 36, 54
- * Extended Rateset: 6b, 9, 12b, 48
- * Preamble: Short required
- * Shortslot: Auto
- * GMODE_B_DEFERRED Rateset: 1b, 2b, 5.5b, 11b, 18, 24, 36, 54
- * Extended Rateset: 6, 9, 12, 48
- * Preamble: Long
- * Shortslot: On
- * GMODE_PERFORMANCE Rateset: 1b, 2b, 5.5b, 6b, 9, 11b, 12b, 18, 24b, 36, 48, 54
- * Preamble: Short required
- * Shortslot: On and required
- * GMODE_LRS Rateset: 1b, 2b, 5.5b, 11b
- * Extended Rateset: 6, 9, 12, 18, 24, 36, 48, 54
- * Preamble: Long
- * Shortslot: Auto
- */
-#define GMODE_LEGACY_B 0
-#define GMODE_AUTO 1
-#define GMODE_ONLY 2
-#define GMODE_B_DEFERRED 3
-#define GMODE_PERFORMANCE 4
-#define GMODE_LRS 5
-#define GMODE_MAX 6
-
-/* values for PLCPHdr_override */
-#define WLC_PLCP_AUTO -1
-#define WLC_PLCP_SHORT 0
-#define WLC_PLCP_LONG 1
-
-/* values for g_protection_override and n_protection_override */
-#define WLC_PROTECTION_AUTO -1
-#define WLC_PROTECTION_OFF 0
-#define WLC_PROTECTION_ON 1
-#define WLC_PROTECTION_MMHDR_ONLY 2
-#define WLC_PROTECTION_CTS_ONLY 3
-
-/* values for g_protection_control and n_protection_control */
-#define WLC_PROTECTION_CTL_OFF 0
-#define WLC_PROTECTION_CTL_LOCAL 1
-#define WLC_PROTECTION_CTL_OVERLAP 2
-
-/* values for n_protection */
-#define WLC_N_PROTECTION_OFF 0
-#define WLC_N_PROTECTION_OPTIONAL 1
-#define WLC_N_PROTECTION_20IN40 2
-#define WLC_N_PROTECTION_MIXEDMODE 3
-
-/* values for n_preamble_type */
-#define WLC_N_PREAMBLE_MIXEDMODE 0
-#define WLC_N_PREAMBLE_GF 1
-#define WLC_N_PREAMBLE_GF_BRCM 2
-
-/* values for band specific 40MHz capabilities */
-#define WLC_N_BW_20ALL 0
-#define WLC_N_BW_40ALL 1
-#define WLC_N_BW_20IN2G_40IN5G 2
-
-/* values to force tx/rx chain */
-#define WLC_N_TXRX_CHAIN0 0
-#define WLC_N_TXRX_CHAIN1 1
-
-/* bitflags for SGI support (sgi_rx iovar) */
-#define WLC_N_SGI_20 0x01
-#define WLC_N_SGI_40 0x02
-
-/* Values for PM */
-#define PM_OFF 0
-#define PM_MAX 1
-
-/* interference mitigation options */
-#define INTERFERE_OVRRIDE_OFF -1 /* interference override off */
-#define INTERFERE_NONE 0 /* off */
-#define NON_WLAN 1 /* foreign/non 802.11 interference, no auto detect */
-#define WLAN_MANUAL 2 /* ACI: no auto detection */
-#define WLAN_AUTO 3 /* ACI: auto detect */
-#define WLAN_AUTO_W_NOISE 4 /* ACI: auto - detect and non 802.11 interference */
-#define AUTO_ACTIVE (1 << 7) /* Auto is currently active */
-
-#define WL_RSSI_ANT_VERSION 1 /* current version of wl_rssi_ant_t */
-#define WL_ANT_RX_MAX 2 /* max 2 receive antennas */
-#define WL_ANT_HT_RX_MAX 3 /* max 3 receive antennas/cores */
-#define WL_ANT_IDX_1 0 /* antenna index 1 */
-#define WL_ANT_IDX_2 1 /* antenna index 2 */
-
-#ifndef WL_RSSI_ANT_MAX
-#define WL_RSSI_ANT_MAX 4 /* max possible rx antennas */
-#elif WL_RSSI_ANT_MAX != 4
-#error "WL_RSSI_ANT_MAX does not match"
-#endif
-
-/* RSSI per antenna */
-typedef struct {
- u32 version; /* version field */
- u32 count; /* number of valid antenna rssi */
- s8 rssi_ant[WL_RSSI_ANT_MAX]; /* rssi per antenna */
-} wl_rssi_ant_t;
-
-#define NUM_PWRCTRL_RATES 12
-
-typedef struct {
- u8 txpwr_band_max[NUM_PWRCTRL_RATES]; /* User set target */
- u8 txpwr_limit[NUM_PWRCTRL_RATES]; /* reg and local power limit */
- u8 txpwr_local_max; /* local max according to the AP */
- u8 txpwr_local_constraint; /* local constraint according to the AP */
- u8 txpwr_chan_reg_max; /* Regulatory max for this channel */
- u8 txpwr_target[2][NUM_PWRCTRL_RATES]; /* Latest target for 2.4 and 5 Ghz */
- u8 txpwr_est_Pout[2]; /* Latest estimate for 2.4 and 5 Ghz */
- u8 txpwr_opo[NUM_PWRCTRL_RATES]; /* On G phy, OFDM power offset */
- u8 txpwr_bphy_cck_max[NUM_PWRCTRL_RATES]; /* Max CCK power for this band (SROM) */
- u8 txpwr_bphy_ofdm_max; /* Max OFDM power for this band (SROM) */
- u8 txpwr_aphy_max[NUM_PWRCTRL_RATES]; /* Max power for A band (SROM) */
- s8 txpwr_antgain[2]; /* Ant gain for each band - from SROM */
- u8 txpwr_est_Pout_gofdm; /* Pwr estimate for 2.4 OFDM */
-} tx_power_legacy_t;
-
-#define WL_TX_POWER_RATES_LEGACY 45
-#define WL_TX_POWER_MCS20_FIRST 12
-#define WL_TX_POWER_MCS20_NUM 16
-#define WL_TX_POWER_MCS40_FIRST 28
-#define WL_TX_POWER_MCS40_NUM 17
-
-
-#define WL_TX_POWER_RATES 101
-#define WL_TX_POWER_CCK_FIRST 0
-#define WL_TX_POWER_CCK_NUM 4
-#define WL_TX_POWER_OFDM_FIRST 4 /* Index for first 20MHz OFDM SISO rate */
-#define WL_TX_POWER_OFDM20_CDD_FIRST 12 /* Index for first 20MHz OFDM CDD rate */
-#define WL_TX_POWER_OFDM40_SISO_FIRST 52 /* Index for first 40MHz OFDM SISO rate */
-#define WL_TX_POWER_OFDM40_CDD_FIRST 60 /* Index for first 40MHz OFDM CDD rate */
-#define WL_TX_POWER_OFDM_NUM 8
-#define WL_TX_POWER_MCS20_SISO_FIRST 20 /* Index for first 20MHz MCS SISO rate */
-#define WL_TX_POWER_MCS20_CDD_FIRST 28 /* Index for first 20MHz MCS CDD rate */
-#define WL_TX_POWER_MCS20_STBC_FIRST 36 /* Index for first 20MHz MCS STBC rate */
-#define WL_TX_POWER_MCS20_SDM_FIRST 44 /* Index for first 20MHz MCS SDM rate */
-#define WL_TX_POWER_MCS40_SISO_FIRST 68 /* Index for first 40MHz MCS SISO rate */
-#define WL_TX_POWER_MCS40_CDD_FIRST 76 /* Index for first 40MHz MCS CDD rate */
-#define WL_TX_POWER_MCS40_STBC_FIRST 84 /* Index for first 40MHz MCS STBC rate */
-#define WL_TX_POWER_MCS40_SDM_FIRST 92 /* Index for first 40MHz MCS SDM rate */
-#define WL_TX_POWER_MCS_1_STREAM_NUM 8
-#define WL_TX_POWER_MCS_2_STREAM_NUM 8
-#define WL_TX_POWER_MCS_32 100 /* Index for 40MHz rate MCS 32 */
-#define WL_TX_POWER_MCS_32_NUM 1
-
-/* sslpnphy specifics */
-#define WL_TX_POWER_MCS20_SISO_FIRST_SSN 12 /* Index for first 20MHz MCS SISO rate */
-
-/* tx_power_t.flags bits */
-#define WL_TX_POWER_F_ENABLED 1
-#define WL_TX_POWER_F_HW 2
-#define WL_TX_POWER_F_MIMO 4
-#define WL_TX_POWER_F_SISO 8
-
-typedef struct {
- u32 flags;
- chanspec_t chanspec; /* txpwr report for this channel */
- chanspec_t local_chanspec; /* channel on which we are associated */
- u8 local_max; /* local max according to the AP */
- u8 local_constraint; /* local constraint according to the AP */
- s8 antgain[2]; /* Ant gain for each band - from SROM */
- u8 rf_cores; /* count of RF Cores being reported */
- u8 est_Pout[4]; /* Latest tx power out estimate per RF chain */
- u8 est_Pout_act[4]; /* Latest tx power out estimate per RF chain
- * without adjustment
- */
- u8 est_Pout_cck; /* Latest CCK tx power out estimate */
- u8 tx_power_max[4]; /* Maximum target power among all rates */
- u8 tx_power_max_rate_ind[4]; /* Index of the rate with the max target power */
- u8 user_limit[WL_TX_POWER_RATES]; /* User limit */
- u8 reg_limit[WL_TX_POWER_RATES]; /* Regulatory power limit */
- u8 board_limit[WL_TX_POWER_RATES]; /* Max power board can support (SROM) */
- u8 target[WL_TX_POWER_RATES]; /* Latest target power */
-} tx_power_t;
-
-typedef struct tx_inst_power {
- u8 txpwr_est_Pout[2]; /* Latest estimate for 2.4 and 5 Ghz */
- u8 txpwr_est_Pout_gofdm; /* Pwr estimate for 2.4 OFDM */
-} tx_inst_power_t;
-
-/* Message levels */
-#define WL_ERROR_VAL 0x00000001
-#define WL_TRACE_VAL 0x00000002
-
-/* maximum channels returned by the get valid channels iovar */
-#define WL_NUMCHANNELS 64
-#define WL_NUMCHANSPECS 100
-
-struct tsinfo_arg {
- u8 octets[3];
-};
-
-#define NFIFO 6 /* # tx/rx fifopairs */
-
-struct wl_msglevel2 {
- u32 low;
- u32 high;
-};
-
-/* structure for per-tid ampdu control */
-struct ampdu_tid_control {
- u8 tid; /* tid */
- u8 enable; /* enable/disable */
-};
-
-/* structure for identifying ea/tid for sending addba/delba */
-struct ampdu_ea_tid {
- u8 ea[ETH_ALEN]; /* Station address */
- u8 tid; /* tid */
-};
-/* structure for identifying retry/tid for retry_limit_tid/rr_retry_limit_tid */
-struct ampdu_retry_tid {
- u8 tid; /* tid */
- u8 retry; /* retry value */
-};
-
-
-/* Software feature flag defines used by wlfeatureflag */
-#define WL_SWFL_NOHWRADIO 0x0004
-#define WL_SWFL_FLOWCONTROL 0x0008 /* Enable backpressure to OS stack */
-#define WL_SWFL_WLBSSSORT 0x0010 /* Per-port supports sorting of BSS */
-
-#define WL_LIFETIME_MAX 0xFFFF /* Max value in ms */
-
-
-/* Pattern matching filter. Specifies an offset within received packets to
- * start matching, the pattern to match, the size of the pattern, and a bitmask
- * that indicates which bits within the pattern should be matched.
- */
-typedef struct wl_pkt_filter_pattern {
- u32 offset; /* Offset within received packet to start pattern matching.
- * Offset '0' is the first byte of the ethernet header.
- */
- u32 size_bytes; /* Size of the pattern. Bitmask must be the same size. */
- u8 mask_and_pattern[1]; /* Variable length mask and pattern data. mask starts
- * at offset 0. Pattern immediately follows mask.
- */
-} wl_pkt_filter_pattern_t;
-
-/* IOVAR "pkt_filter_add" parameter. Used to install packet filters. */
-typedef struct wl_pkt_filter {
- u32 id; /* Unique filter id, specified by app. */
- u32 type; /* Filter type (WL_PKT_FILTER_TYPE_xxx). */
- u32 negate_match; /* Negate the result of filter matches */
- union { /* Filter definitions */
- wl_pkt_filter_pattern_t pattern; /* Pattern matching filter */
- } u;
-} wl_pkt_filter_t;
-
-#define WL_PKT_FILTER_FIXED_LEN offsetof(wl_pkt_filter_t, u)
-#define WL_PKT_FILTER_PATTERN_FIXED_LEN offsetof(wl_pkt_filter_pattern_t, mask_and_pattern)
-
-/* IOVAR "pkt_filter_enable" parameter. */
-typedef struct wl_pkt_filter_enable {
- u32 id; /* Unique filter id */
- u32 enable; /* Enable/disable bool */
-} wl_pkt_filter_enable_t;
-
-
-#define WLC_RSSI_INVALID 0 /* invalid RSSI value */
-
-/* n-mode support capability */
-/* 2x2 includes both 1x1 & 2x2 devices
- * reserved #define 2 for future when we want to separate 1x1 & 2x2 and
- * control it independently
- */
-#define WL_11N_2x2 1
-#define WL_11N_3x3 3
-#define WL_11N_4x4 4
-
-/* define 11n feature disable flags */
-#define WLFEATURE_DISABLE_11N 0x00000001
-#define WLFEATURE_DISABLE_11N_STBC_TX 0x00000002
-#define WLFEATURE_DISABLE_11N_STBC_RX 0x00000004
-#define WLFEATURE_DISABLE_11N_SGI_TX 0x00000008
-#define WLFEATURE_DISABLE_11N_SGI_RX 0x00000010
-#define WLFEATURE_DISABLE_11N_AMPDU_TX 0x00000020
-#define WLFEATURE_DISABLE_11N_AMPDU_RX 0x00000040
-#define WLFEATURE_DISABLE_11N_GF 0x00000080
-
-#define WL_EVENTING_MASK_LEN 16
-
-#define TOE_TX_CSUM_OL 0x00000001
-#define TOE_RX_CSUM_OL 0x00000002
-
-#define PM_OFF 0
-#define PM_MAX 1
-#define PM_FAST 2
-
-typedef enum sup_auth_status {
- WLC_SUP_DISCONNECTED = 0,
- WLC_SUP_CONNECTING,
- WLC_SUP_IDREQUIRED,
- WLC_SUP_AUTHENTICATING,
- WLC_SUP_AUTHENTICATED,
- WLC_SUP_KEYXCHANGE,
- WLC_SUP_KEYED,
- WLC_SUP_TIMEOUT,
- WLC_SUP_LAST_BASIC_STATE,
- WLC_SUP_KEYXCHANGE_WAIT_M1 = WLC_SUP_AUTHENTICATED,
- WLC_SUP_KEYXCHANGE_PREP_M2 = WLC_SUP_KEYXCHANGE,
- WLC_SUP_KEYXCHANGE_WAIT_M3 = WLC_SUP_LAST_BASIC_STATE,
- WLC_SUP_KEYXCHANGE_PREP_M4,
- WLC_SUP_KEYXCHANGE_WAIT_G1,
- WLC_SUP_KEYXCHANGE_PREP_G2
-} sup_auth_status_t;
-#endif /* _wlioctl_h_ */
diff --git a/drivers/staging/comedi/drivers.c b/drivers/staging/comedi/drivers.c
index 6d60e91b3a859..db1fd63aaab38 100644
--- a/drivers/staging/comedi/drivers.c
+++ b/drivers/staging/comedi/drivers.c
@@ -502,7 +502,11 @@ int comedi_buf_alloc(struct comedi_device *dev, struct comedi_subdevice *s,
}
if (i == n_pages) {
async->prealloc_buf =
+#ifdef PAGE_KERNEL_NOCACHE
vmap(pages, n_pages, VM_MAP, PAGE_KERNEL_NOCACHE);
+#else
+ vmap(pages, n_pages, VM_MAP, PAGE_KERNEL);
+#endif
}
vfree(pages);
diff --git a/drivers/staging/comedi/drivers/addi-data/addi_common.c b/drivers/staging/comedi/drivers/addi-data/addi_common.c
index 6cf19ed683a88..6fb7594319c6f 100644
--- a/drivers/staging/comedi/drivers/addi-data/addi_common.c
+++ b/drivers/staging/comedi/drivers/addi-data/addi_common.c
@@ -58,8 +58,8 @@ You should also find the complete GPL in the COPYING file accompanying this sour
#include <linux/timer.h>
#include <linux/pci.h>
#include <linux/gfp.h>
+#include <linux/io.h>
#include "../../comedidev.h"
-#include <asm/io.h>
#if defined(CONFIG_APCI_1710) || defined(CONFIG_APCI_3200) || defined(CONFIG_APCI_3300)
#include <asm/i387.h>
#endif
diff --git a/drivers/staging/comedi/drivers/adl_pci9118.c b/drivers/staging/comedi/drivers/adl_pci9118.c
index 08b71d9974b68..f17654e44aefd 100644
--- a/drivers/staging/comedi/drivers/adl_pci9118.c
+++ b/drivers/staging/comedi/drivers/adl_pci9118.c
@@ -67,6 +67,7 @@ Configuration options:
#include <linux/delay.h>
#include <linux/gfp.h>
#include <linux/interrupt.h>
+#include <linux/io.h>
#include "amcc_s5933.h"
#include "8253.h"
diff --git a/drivers/staging/comedi/drivers/das1800.c b/drivers/staging/comedi/drivers/das1800.c
index 60c2b12d6ffb0..9fc28bfb67272 100644
--- a/drivers/staging/comedi/drivers/das1800.c
+++ b/drivers/staging/comedi/drivers/das1800.c
@@ -102,6 +102,7 @@ TODO:
#include <linux/interrupt.h>
#include <linux/slab.h>
+#include <linux/io.h>
#include "../comedidev.h"
#include <linux/ioport.h>
diff --git a/drivers/staging/comedi/drivers/dt282x.c b/drivers/staging/comedi/drivers/dt282x.c
index 8cea9dca3d7e6..95ebc267bb746 100644
--- a/drivers/staging/comedi/drivers/dt282x.c
+++ b/drivers/staging/comedi/drivers/dt282x.c
@@ -61,6 +61,7 @@ Notes:
#include <linux/gfp.h>
#include <linux/ioport.h>
#include <linux/interrupt.h>
+#include <linux/io.h>
#include <asm/dma.h>
#include "comedi_fc.h"
diff --git a/drivers/staging/comedi/drivers/ni_at_a2150.c b/drivers/staging/comedi/drivers/ni_at_a2150.c
index c192b71ec04f0..32e675e3f0b98 100644
--- a/drivers/staging/comedi/drivers/ni_at_a2150.c
+++ b/drivers/staging/comedi/drivers/ni_at_a2150.c
@@ -69,6 +69,7 @@ TRIG_WAKE_EOS
#include "../comedidev.h"
#include <linux/ioport.h>
+#include <linux/io.h>
#include <asm/dma.h>
#include "8253.h"
diff --git a/drivers/staging/comedi/drivers/ni_labpc.c b/drivers/staging/comedi/drivers/ni_labpc.c
index ab8f37022a3c6..f82e732b16f52 100644
--- a/drivers/staging/comedi/drivers/ni_labpc.c
+++ b/drivers/staging/comedi/drivers/ni_labpc.c
@@ -78,6 +78,7 @@ NI manuals:
#include <linux/interrupt.h>
#include <linux/slab.h>
+#include <linux/io.h>
#include "../comedidev.h"
#include <linux/delay.h>
diff --git a/drivers/staging/comedi/drivers/pcl812.c b/drivers/staging/comedi/drivers/pcl812.c
index 09ff4723b2250..6fc74645af2cc 100644
--- a/drivers/staging/comedi/drivers/pcl812.c
+++ b/drivers/staging/comedi/drivers/pcl812.c
@@ -114,6 +114,7 @@
#include <linux/delay.h>
#include <linux/ioport.h>
+#include <linux/io.h>
#include <asm/dma.h>
#include "8253.h"
diff --git a/drivers/staging/comedi/drivers/pcl816.c b/drivers/staging/comedi/drivers/pcl816.c
index 8f3fc6ee088b5..0b9bee36eb5fa 100644
--- a/drivers/staging/comedi/drivers/pcl816.c
+++ b/drivers/staging/comedi/drivers/pcl816.c
@@ -38,6 +38,7 @@ Configuration Options:
#include <linux/mc146818rtc.h>
#include <linux/gfp.h>
#include <linux/delay.h>
+#include <linux/io.h>
#include <asm/dma.h>
#include "8253.h"
diff --git a/drivers/staging/comedi/drivers/pcl818.c b/drivers/staging/comedi/drivers/pcl818.c
index 8933e5089bd33..b45a9bd8b489a 100644
--- a/drivers/staging/comedi/drivers/pcl818.c
+++ b/drivers/staging/comedi/drivers/pcl818.c
@@ -104,6 +104,7 @@ A word or two about DMA. Driver support DMA operations at two ways:
#include <linux/mc146818rtc.h>
#include <linux/gfp.h>
#include <linux/delay.h>
+#include <linux/io.h>
#include <asm/dma.h>
#include "8253.h"
diff --git a/drivers/staging/hv/blkvsc_drv.c b/drivers/staging/hv/blkvsc_drv.c
index 46daade7a9e2c..3612574ca5208 100644
--- a/drivers/staging/hv/blkvsc_drv.c
+++ b/drivers/staging/hv/blkvsc_drv.c
@@ -518,22 +518,18 @@ static int blkvsc_remove(struct hv_device *dev)
blkvsc_do_operation(blkdev, DO_FLUSH);
- blk_cleanup_queue(blkdev->gd->queue);
+ if (blkdev->users == 0) {
+ del_gendisk(blkdev->gd);
+ put_disk(blkdev->gd);
+ blk_cleanup_queue(blkdev->gd->queue);
- /*
- * Call to the vsc driver to let it know that the device is being
- * removed
- */
- storvsc_dev_remove(dev);
-
- del_gendisk(blkdev->gd);
+ storvsc_dev_remove(blkdev->device_ctx);
- kmem_cache_destroy(blkdev->request_pool);
-
- kfree(blkdev);
+ kmem_cache_destroy(blkdev->request_pool);
+ kfree(blkdev);
+ }
return 0;
-
}
static void blkvsc_shutdown(struct hv_device *dev)
@@ -568,13 +564,23 @@ static int blkvsc_release(struct gendisk *disk, fmode_t mode)
struct block_device_context *blkdev = disk->private_data;
unsigned long flags;
- if (blkdev->users == 1) {
+ spin_lock_irqsave(&blkdev->lock, flags);
+
+ if ((--blkdev->users == 0) && (blkdev->shutting_down)) {
+ blk_stop_queue(blkdev->gd->queue);
+ spin_unlock_irqrestore(&blkdev->lock, flags);
+
blkvsc_do_operation(blkdev, DO_FLUSH);
- }
+ del_gendisk(blkdev->gd);
+ put_disk(blkdev->gd);
+ blk_cleanup_queue(blkdev->gd->queue);
- spin_lock_irqsave(&blkdev->lock, flags);
- blkdev->users--;
- spin_unlock_irqrestore(&blkdev->lock, flags);
+ storvsc_dev_remove(blkdev->device_ctx);
+
+ kmem_cache_destroy(blkdev->request_pool);
+ kfree(blkdev);
+ } else
+ spin_unlock_irqrestore(&blkdev->lock, flags);
return 0;
}
@@ -824,7 +830,6 @@ static int blkvsc_drv_init(void)
BUILD_BUG_ON(sizeof(sector_t) != 8);
memcpy(&drv->dev_type, &dev_type, sizeof(struct hv_guid));
- drv->name = drv_name;
drv->driver.name = drv_name;
/* The driver belongs to vmbus */
@@ -921,7 +926,6 @@ static int blkvsc_probe(struct hv_device *dev)
else
blkdev->gd->first_minor = 0;
blkdev->gd->fops = &block_ops;
- blkdev->gd->events = DISK_EVENT_MEDIA_CHANGE;
blkdev->gd->private_data = blkdev;
blkdev->gd->driverfs_dev = &(blkdev->device_ctx->device);
sprintf(blkdev->gd->disk_name, "hd%c", 'a' + major_info.index);
diff --git a/drivers/staging/hv/channel.c b/drivers/staging/hv/channel.c
index f655e59a9a8fb..cffca7c9143de 100644
--- a/drivers/staging/hv/channel.c
+++ b/drivers/staging/hv/channel.c
@@ -39,7 +39,6 @@ static int create_gpadl_header(
u32 size, /* page-size multiple */
struct vmbus_channel_msginfo **msginfo,
u32 *messagecount);
-static void dump_vmbus_channel(struct vmbus_channel *channel);
static void vmbus_setevent(struct vmbus_channel *channel);
/*
@@ -186,12 +185,12 @@ int vmbus_open(struct vmbus_channel *newchannel, u32 send_ringbuffer_size,
openMsg = (struct vmbus_channel_open_channel *)openInfo->msg;
openMsg->header.msgtype = CHANNELMSG_OPENCHANNEL;
- openMsg->openid = newchannel->offermsg.child_relid; /* FIXME */
+ openMsg->openid = newchannel->offermsg.child_relid;
openMsg->child_relid = newchannel->offermsg.child_relid;
openMsg->ringbuffer_gpadlhandle = newchannel->ringbuffer_gpadlhandle;
openMsg->downstream_ringbuffer_pageoffset = send_ringbuffer_size >>
PAGE_SHIFT;
- openMsg->server_contextarea_gpadlhandle = 0; /* TODO */
+ openMsg->server_contextarea_gpadlhandle = 0;
if (userdatalen > MAX_USER_DEFINED_BYTES) {
err = -EINVAL;
@@ -210,7 +209,7 @@ int vmbus_open(struct vmbus_channel *newchannel, u32 send_ringbuffer_size,
sizeof(struct vmbus_channel_open_channel));
if (ret != 0)
- goto Cleanup;
+ goto cleanup;
t = wait_for_completion_timeout(&openInfo->waitevent, HZ);
if (t == 0) {
@@ -222,7 +221,7 @@ int vmbus_open(struct vmbus_channel *newchannel, u32 send_ringbuffer_size,
if (openInfo->response.open_result.status)
err = openInfo->response.open_result.status;
-Cleanup:
+cleanup:
spin_lock_irqsave(&vmbus_connection.channelmsg_lock, flags);
list_del(&openInfo->msglistentry);
spin_unlock_irqrestore(&vmbus_connection.channelmsg_lock, flags);
@@ -356,20 +355,35 @@ static int create_gpadl_header(void *kbuffer, u32 size,
sizeof(struct vmbus_channel_gpadl_body) +
pfncurr * sizeof(u64);
msgbody = kzalloc(msgsize, GFP_KERNEL);
- /* FIXME: we probably need to more if this fails */
- if (!msgbody)
+
+ if (!msgbody) {
+ struct vmbus_channel_msginfo *pos = NULL;
+ struct vmbus_channel_msginfo *tmp = NULL;
+ /*
+ * Free up all the allocated messages.
+ */
+ list_for_each_entry_safe(pos, tmp,
+ &msgheader->submsglist,
+ msglistentry) {
+
+ list_del(&pos->msglistentry);
+ kfree(pos);
+ }
+
goto nomem;
+ }
+
msgbody->msgsize = msgsize;
(*messagecount)++;
gpadl_body =
(struct vmbus_channel_gpadl_body *)msgbody->msg;
/*
- * FIXME:
* Gpadl is u32 and we are using a pointer which could
* be 64-bit
+ * This is governed by the guest/host protocol and
+ * so the hypervisor gurantees that this is ok.
*/
- /* gpadl_body->Gpadl = kbuffer; */
for (i = 0; i < pfncurr; i++)
gpadl_body->pfn[i] = pfn + pfnsum + i;
@@ -458,12 +472,11 @@ int vmbus_establish_gpadl(struct vmbus_channel *channel, void *kbuffer,
ret = vmbus_post_msg(gpadlmsg, msginfo->msgsize -
sizeof(*msginfo));
if (ret != 0)
- goto Cleanup;
+ goto cleanup;
if (msgcount > 1) {
list_for_each(curr, &msginfo->submsglist) {
- /* FIXME: should this use list_entry() instead ? */
submsginfo = (struct vmbus_channel_msginfo *)curr;
gpadl_body =
(struct vmbus_channel_gpadl_body *)submsginfo->msg;
@@ -478,18 +491,18 @@ int vmbus_establish_gpadl(struct vmbus_channel *channel, void *kbuffer,
submsginfo->msgsize -
sizeof(*submsginfo));
if (ret != 0)
- goto Cleanup;
+ goto cleanup;
}
}
- t = wait_for_completion_timeout(&msginfo->waitevent, HZ);
+ t = wait_for_completion_timeout(&msginfo->waitevent, 5*HZ);
BUG_ON(t == 0);
/* At this point, we received the gpadl created msg */
*gpadl_handle = gpadlmsg->gpadl;
-Cleanup:
+cleanup:
spin_lock_irqsave(&vmbus_connection.channelmsg_lock, flags);
list_del(&msginfo->msglistentry);
spin_unlock_irqrestore(&vmbus_connection.channelmsg_lock, flags);
@@ -532,7 +545,7 @@ int vmbus_teardown_gpadl(struct vmbus_channel *channel, u32 gpadl_handle)
sizeof(struct vmbus_channel_gpadl_teardown));
BUG_ON(ret != 0);
- t = wait_for_completion_timeout(&info->waitevent, HZ);
+ t = wait_for_completion_timeout(&info->waitevent, 5*HZ);
BUG_ON(t == 0);
/* Received a torndown response */
@@ -551,24 +564,15 @@ EXPORT_SYMBOL_GPL(vmbus_teardown_gpadl);
void vmbus_close(struct vmbus_channel *channel)
{
struct vmbus_channel_close_channel *msg;
- struct vmbus_channel_msginfo *info;
- unsigned long flags;
int ret;
/* Stop callback and cancel the timer asap */
channel->onchannel_callback = NULL;
- del_timer_sync(&channel->poll_timer);
/* Send a closing message */
- info = kmalloc(sizeof(*info) +
- sizeof(struct vmbus_channel_close_channel), GFP_KERNEL);
- /* FIXME: can't do anything other than return here because the
- * function is void */
- if (!info)
- return;
+ msg = &channel->close_msg.msg;
- msg = (struct vmbus_channel_close_channel *)info->msg;
msg->header.msgtype = CHANNELMSG_CLOSECHANNEL;
msg->child_relid = channel->offermsg.child_relid;
@@ -580,8 +584,6 @@ void vmbus_close(struct vmbus_channel *channel)
vmbus_teardown_gpadl(channel,
channel->ringbuffer_gpadlhandle);
- /* TODO: Send a msg to release the childRelId */
-
/* Cleanup the ring buffers for this channel */
hv_ringbuffer_cleanup(&channel->outbound);
hv_ringbuffer_cleanup(&channel->inbound);
@@ -589,21 +591,7 @@ void vmbus_close(struct vmbus_channel *channel)
free_pages((unsigned long)channel->ringbuffer_pages,
get_order(channel->ringbuffer_pagecount * PAGE_SIZE));
- kfree(info);
-
- /*
- * If we are closing the channel during an error path in
- * opening the channel, don't free the channel since the
- * caller will free the channel
- */
- if (channel->state == CHANNEL_OPEN_STATE) {
- spin_lock_irqsave(&vmbus_connection.channel_lock, flags);
- list_del(&channel->listentry);
- spin_unlock_irqrestore(&vmbus_connection.channel_lock, flags);
-
- free_channel(channel);
- }
}
EXPORT_SYMBOL_GPL(vmbus_close);
@@ -632,7 +620,6 @@ int vmbus_sendpacket(struct vmbus_channel *channel, const void *buffer,
u64 aligned_data = 0;
int ret;
- dump_vmbus_channel(channel);
/* Setup the descriptor */
desc.type = type; /* VmbusPacketTypeDataInBand; */
@@ -650,7 +637,6 @@ int vmbus_sendpacket(struct vmbus_channel *channel, const void *buffer,
ret = hv_ringbuffer_write(&channel->outbound, bufferlist, 3);
- /* TODO: We should determine if this is optional */
if (ret == 0 && !hv_get_ringbuffer_interrupt_mask(&channel->outbound))
vmbus_setevent(channel);
@@ -679,7 +665,6 @@ int vmbus_sendpacket_pagebuffer(struct vmbus_channel *channel,
if (pagecount > MAX_PAGE_BUFFER_COUNT)
return -EINVAL;
- dump_vmbus_channel(channel);
/*
* Adjust the size down since vmbus_channel_packet_page_buffer is the
@@ -713,7 +698,6 @@ int vmbus_sendpacket_pagebuffer(struct vmbus_channel *channel,
ret = hv_ringbuffer_write(&channel->outbound, bufferlist, 3);
- /* TODO: We should determine if this is optional */
if (ret == 0 && !hv_get_ringbuffer_interrupt_mask(&channel->outbound))
vmbus_setevent(channel);
@@ -739,7 +723,6 @@ int vmbus_sendpacket_multipagebuffer(struct vmbus_channel *channel,
u32 pfncount = NUM_PAGES_SPANNED(multi_pagebuffer->offset,
multi_pagebuffer->len);
- dump_vmbus_channel(channel);
if ((pfncount < 0) || (pfncount > MAX_MULTIPAGE_BUFFER_COUNT))
return -EINVAL;
@@ -777,7 +760,6 @@ int vmbus_sendpacket_multipagebuffer(struct vmbus_channel *channel,
ret = hv_ringbuffer_write(&channel->outbound, bufferlist, 3);
- /* TODO: We should determine if this is optional */
if (ret == 0 && !hv_get_ringbuffer_interrupt_mask(&channel->outbound))
vmbus_setevent(channel);
@@ -829,7 +811,7 @@ int vmbus_recvpacket(struct vmbus_channel *channel, void *buffer,
pr_err("Buffer too small - got %d needs %d\n",
bufferlen, userlen);
- return -1;
+ return -ETOOSMALL;
}
*requestid = desc.trans_id;
@@ -893,36 +875,3 @@ int vmbus_recvpacket_raw(struct vmbus_channel *channel, void *buffer,
return 0;
}
EXPORT_SYMBOL_GPL(vmbus_recvpacket_raw);
-
-/*
- * vmbus_onchannel_event - Channel event callback
- */
-void vmbus_onchannel_event(struct vmbus_channel *channel)
-{
- dump_vmbus_channel(channel);
-
- channel->onchannel_callback(channel->channel_callback_context);
-
- mod_timer(&channel->poll_timer, jiffies + usecs_to_jiffies(100));
-}
-
-/*
- * vmbus_ontimer - Timer event callback
- */
-void vmbus_ontimer(unsigned long data)
-{
- struct vmbus_channel *channel = (struct vmbus_channel *)data;
-
- if (channel->onchannel_callback)
- channel->onchannel_callback(channel->channel_callback_context);
-}
-
-/*
- * dump_vmbus_channel- Dump vmbus channel info to the console
- */
-static void dump_vmbus_channel(struct vmbus_channel *channel)
-{
- DPRINT_DBG(VMBUS, "Channel (%d)", channel->offermsg.child_relid);
- hv_dump_ring_info(&channel->outbound, "Outbound ");
- hv_dump_ring_info(&channel->inbound, "Inbound ");
-}
diff --git a/drivers/staging/hv/channel_mgmt.c b/drivers/staging/hv/channel_mgmt.c
index 957d61ee4cebe..2d270ce376bbf 100644
--- a/drivers/staging/hv/channel_mgmt.c
+++ b/drivers/staging/hv/channel_mgmt.c
@@ -283,10 +283,6 @@ static struct vmbus_channel *alloc_channel(void)
spin_lock_init(&channel->inbound_lock);
- init_timer(&channel->poll_timer);
- channel->poll_timer.data = (unsigned long)channel;
- channel->poll_timer.function = vmbus_ontimer;
-
channel->controlwq = create_workqueue("hv_vmbus_ctl");
if (!channel->controlwq) {
kfree(channel);
@@ -315,7 +311,6 @@ static void release_channel(struct work_struct *work)
*/
void free_channel(struct vmbus_channel *channel)
{
- del_timer_sync(&channel->poll_timer);
/*
* We have to release the channel's workqueue/thread in the vmbus's
@@ -482,7 +477,6 @@ static void vmbus_onoffer(struct vmbus_channel_message_header *hdr)
newchannel->monitor_grp = (u8)offer->monitorid / 32;
newchannel->monitor_bit = (u8)offer->monitorid % 32;
- /* TODO: Make sure the offer comes from our parent partition */
INIT_WORK(&newchannel->work, vmbus_process_offer);
queue_work(newchannel->controlwq, &newchannel->work);
}
diff --git a/drivers/staging/hv/connection.c b/drivers/staging/hv/connection.c
index 37bbf770ef117..7e15392fac9ed 100644
--- a/drivers/staging/hv/connection.c
+++ b/drivers/staging/hv/connection.c
@@ -51,13 +51,13 @@ int vmbus_connect(void)
/* Make sure we are not connecting or connected */
if (vmbus_connection.conn_state != DISCONNECTED)
- return -1;
+ return -EISCONN;
/* Initialize the vmbus connection */
vmbus_connection.conn_state = CONNECTING;
vmbus_connection.work_queue = create_workqueue("hv_vmbus_con");
if (!vmbus_connection.work_queue) {
- ret = -1;
+ ret = -ENOMEM;
goto cleanup;
}
@@ -74,7 +74,7 @@ int vmbus_connect(void)
vmbus_connection.int_page =
(void *)__get_free_pages(GFP_KERNEL|__GFP_ZERO, 0);
if (vmbus_connection.int_page == NULL) {
- ret = -1;
+ ret = -ENOMEM;
goto cleanup;
}
@@ -90,7 +90,7 @@ int vmbus_connect(void)
vmbus_connection.monitor_pages =
(void *)__get_free_pages((GFP_KERNEL|__GFP_ZERO), 1);
if (vmbus_connection.monitor_pages == NULL) {
- ret = -1;
+ ret = -ENOMEM;
goto cleanup;
}
@@ -157,7 +157,7 @@ int vmbus_connect(void)
pr_err("Unable to connect, "
"Version %d not supported by Hyper-V\n",
VMBUS_REVISION_NUMBER);
- ret = -1;
+ ret = -ECONNREFUSED;
goto cleanup;
}
@@ -185,44 +185,6 @@ cleanup:
return ret;
}
-/*
- * vmbus_disconnect -
- * Sends a disconnect request on the partition service connection
- */
-int vmbus_disconnect(void)
-{
- int ret = 0;
- struct vmbus_channel_message_header *msg;
-
- /* Make sure we are connected */
- if (vmbus_connection.conn_state != CONNECTED)
- return -1;
-
- msg = kzalloc(sizeof(struct vmbus_channel_message_header), GFP_KERNEL);
- if (!msg)
- return -ENOMEM;
-
- msg->msgtype = CHANNELMSG_UNLOAD;
-
- ret = vmbus_post_msg(msg,
- sizeof(struct vmbus_channel_message_header));
- if (ret != 0)
- goto cleanup;
-
- free_pages((unsigned long)vmbus_connection.int_page, 0);
- free_pages((unsigned long)vmbus_connection.monitor_pages, 1);
-
- /* TODO: iterate thru the msg list and free up */
- destroy_workqueue(vmbus_connection.work_queue);
-
- vmbus_connection.conn_state = DISCONNECTED;
-
- pr_info("hv_vmbus disconnected\n");
-
-cleanup:
- kfree(msg);
- return ret;
-}
/*
* relid2channel - Get the channel object given its
@@ -262,7 +224,7 @@ static void process_chn_event(u32 relid)
channel = relid2channel(relid);
if (channel) {
- vmbus_onchannel_event(channel);
+ channel->onchannel_callback(channel->channel_callback_context);
} else {
pr_err("channel not found for relid - %u\n", relid);
}
diff --git a/drivers/staging/hv/hv.c b/drivers/staging/hv/hv.c
index a2cc0911de58e..824f81679ae8b 100644
--- a/drivers/staging/hv/hv.c
+++ b/drivers/staging/hv/hv.c
@@ -277,11 +277,11 @@ u16 hv_post_message(union hv_connection_id connection_id,
unsigned long addr;
if (payload_size > HV_MESSAGE_PAYLOAD_BYTE_COUNT)
- return -1;
+ return -EMSGSIZE;
addr = (unsigned long)kmalloc(sizeof(struct aligned_input), GFP_ATOMIC);
if (!addr)
- return -1;
+ return -ENOMEM;
aligned_msg = (struct hv_input_post_message *)
(ALIGN(addr, HV_HYPERCALL_PARAM_ALIGN));
diff --git a/drivers/staging/hv/hv_mouse.c b/drivers/staging/hv/hv_mouse.c
index 359e73741c484..b191810b898d1 100644
--- a/drivers/staging/hv/hv_mouse.c
+++ b/drivers/staging/hv/hv_mouse.c
@@ -936,7 +936,6 @@ static int __init mousevsc_init(void)
sizeof(struct hv_guid));
drv->driver.name = driver_name;
- drv->name = driver_name;
/* The driver belongs to vmbus */
vmbus_child_driver_register(&drv->driver);
diff --git a/drivers/staging/hv/hyperv.h b/drivers/staging/hv/hyperv.h
index 3310e9bdf562b..1747a2404f6c8 100644
--- a/drivers/staging/hv/hyperv.h
+++ b/drivers/staging/hv/hyperv.h
@@ -523,46 +523,6 @@ enum vmbus_channel_state {
CHANNEL_OPEN_STATE,
};
-struct vmbus_channel {
- struct list_head listentry;
-
- struct hv_device *device_obj;
-
- struct timer_list poll_timer; /* SA-111 workaround */
- struct work_struct work;
-
- enum vmbus_channel_state state;
- /*
- * For util channels, stash the
- * the service index for easy access.
- */
- s8 util_index;
-
- struct vmbus_channel_offer_channel offermsg;
- /*
- * These are based on the OfferMsg.MonitorId.
- * Save it here for easy access.
- */
- u8 monitor_grp;
- u8 monitor_bit;
-
- u32 ringbuffer_gpadlhandle;
-
- /* Allocated memory for ring buffer */
- void *ringbuffer_pages;
- u32 ringbuffer_pagecount;
- struct hv_ring_buffer_info outbound; /* send to parent */
- struct hv_ring_buffer_info inbound; /* receive from parent */
- spinlock_t inbound_lock;
- struct workqueue_struct *controlwq;
-
- /* Channel callback are invoked in this workqueue context */
- /* HANDLE dataWorkQueue; */
-
- void (*onchannel_callback)(void *context);
- void *channel_callback_context;
-};
-
struct vmbus_channel_debug_info {
u32 relid;
enum vmbus_channel_state state;
@@ -609,6 +569,51 @@ struct vmbus_channel_msginfo {
unsigned char msg[0];
};
+struct vmbus_close_msg {
+ struct vmbus_channel_msginfo info;
+ struct vmbus_channel_close_channel msg;
+};
+
+struct vmbus_channel {
+ struct list_head listentry;
+
+ struct hv_device *device_obj;
+
+ struct work_struct work;
+
+ enum vmbus_channel_state state;
+ /*
+ * For util channels, stash the
+ * the service index for easy access.
+ */
+ s8 util_index;
+
+ struct vmbus_channel_offer_channel offermsg;
+ /*
+ * These are based on the OfferMsg.MonitorId.
+ * Save it here for easy access.
+ */
+ u8 monitor_grp;
+ u8 monitor_bit;
+
+ u32 ringbuffer_gpadlhandle;
+
+ /* Allocated memory for ring buffer */
+ void *ringbuffer_pages;
+ u32 ringbuffer_pagecount;
+ struct hv_ring_buffer_info outbound; /* send to parent */
+ struct hv_ring_buffer_info inbound; /* receive from parent */
+ spinlock_t inbound_lock;
+ struct workqueue_struct *controlwq;
+
+ struct vmbus_close_msg close_msg;
+
+ /* Channel callback are invoked in this workqueue context */
+ /* HANDLE dataWorkQueue; */
+
+ void (*onchannel_callback)(void *context);
+ void *channel_callback_context;
+};
void free_channel(struct vmbus_channel *channel);
@@ -691,7 +696,6 @@ extern int vmbus_recvpacket_raw(struct vmbus_channel *channel,
u32 *buffer_actual_len,
u64 *requestid);
-extern void vmbus_onchannel_event(struct vmbus_channel *channel);
extern void vmbus_get_debug_info(struct vmbus_channel *channel,
struct vmbus_channel_debug_info *debug);
diff --git a/drivers/staging/hv/hyperv_net.h b/drivers/staging/hv/hyperv_net.h
index 315097df799ad..27f987b48dfea 100644
--- a/drivers/staging/hv/hyperv_net.h
+++ b/drivers/staging/hv/hyperv_net.h
@@ -99,9 +99,9 @@ int netvsc_recv_callback(struct hv_device *device_obj,
int netvsc_initialize(struct hv_driver *drv);
int rndis_filter_open(struct hv_device *dev);
int rndis_filter_close(struct hv_device *dev);
-int rndis_filte_device_add(struct hv_device *dev,
+int rndis_filter_device_add(struct hv_device *dev,
void *additional_info);
-int rndis_filter_device_remove(struct hv_device *dev);
+void rndis_filter_device_remove(struct hv_device *dev);
int rndis_filter_receive(struct hv_device *dev,
struct hv_netvsc_packet *pkt);
@@ -355,10 +355,6 @@ struct nvsp_message {
/* #define NVSC_MIN_PROTOCOL_VERSION 1 */
/* #define NVSC_MAX_PROTOCOL_VERSION 1 */
-#define NETVSC_SEND_BUFFER_SIZE (64*1024) /* 64K */
-#define NETVSC_SEND_BUFFER_ID 0xface
-
-
#define NETVSC_RECEIVE_BUFFER_SIZE (1024*1024) /* 1MB */
#define NETVSC_RECEIVE_BUFFER_ID 0xcafe
@@ -383,12 +379,6 @@ struct netvsc_device {
struct list_head recv_pkt_list;
spinlock_t recv_pkt_list_lock;
- /* Send buffer allocated by us but manages by NetVSP */
- void *send_buf;
- u32 send_buf_size;
- u32 send_buf_gpadl_handle;
- u32 send_section_size;
-
/* Receive buffer allocated by us but manages by NetVSP */
void *recv_buf;
u32 recv_buf_size;
diff --git a/drivers/staging/hv/hyperv_vmbus.h b/drivers/staging/hv/hyperv_vmbus.h
index bf30a425b6432..349ad80ce3284 100644
--- a/drivers/staging/hv/hyperv_vmbus.h
+++ b/drivers/staging/hv/hyperv_vmbus.h
@@ -619,8 +619,6 @@ struct vmbus_channel *relid2channel(u32 relid);
int vmbus_connect(void);
-int vmbus_disconnect(void);
-
int vmbus_post_msg(void *buffer, size_t buflen);
int vmbus_set_event(u32 child_relid);
diff --git a/drivers/staging/hv/netvsc.c b/drivers/staging/hv/netvsc.c
index 41cbb26eccbf8..7b5bf0da81d88 100644
--- a/drivers/staging/hv/netvsc.c
+++ b/drivers/staging/hv/netvsc.c
@@ -323,162 +323,6 @@ exit:
return ret;
}
-static int netvsc_destroy_send_buf(struct netvsc_device *net_device)
-{
- struct nvsp_message *revoke_packet;
- int ret = 0;
-
- /*
- * If we got a section count, it means we received a
- * SendReceiveBufferComplete msg (ie sent
- * NvspMessage1TypeSendReceiveBuffer msg) therefore, we need
- * to send a revoke msg here
- */
- if (net_device->send_section_size) {
- /* Send the revoke send buffer */
- revoke_packet = &net_device->revoke_packet;
- memset(revoke_packet, 0, sizeof(struct nvsp_message));
-
- revoke_packet->hdr.msg_type =
- NVSP_MSG1_TYPE_REVOKE_SEND_BUF;
- revoke_packet->msg.v1_msg.
- revoke_send_buf.id = NETVSC_SEND_BUFFER_ID;
-
- ret = vmbus_sendpacket(net_device->dev->channel,
- revoke_packet,
- sizeof(struct nvsp_message),
- (unsigned long)revoke_packet,
- VM_PKT_DATA_INBAND, 0);
- /*
- * If we failed here, we might as well return and have a leak
- * rather than continue and a bugchk
- */
- if (ret != 0) {
- dev_err(&net_device->dev->device, "unable to send "
- "revoke send buffer to netvsp");
- return -1;
- }
- }
-
- /* Teardown the gpadl on the vsp end */
- if (net_device->send_buf_gpadl_handle) {
- ret = vmbus_teardown_gpadl(net_device->dev->channel,
- net_device->send_buf_gpadl_handle);
-
- /*
- * If we failed here, we might as well return and have a leak
- * rather than continue and a bugchk
- */
- if (ret != 0) {
- dev_err(&net_device->dev->device,
- "unable to teardown send buffer's gpadl");
- return -1;
- }
- net_device->send_buf_gpadl_handle = 0;
- }
-
- if (net_device->send_buf) {
- /* Free up the receive buffer */
- free_pages((unsigned long)net_device->send_buf,
- get_order(net_device->send_buf_size));
- net_device->send_buf = NULL;
- }
-
- return ret;
-}
-
-static int netvsc_init_send_buf(struct hv_device *device)
-{
- int ret = 0;
- int t;
- struct netvsc_device *net_device;
- struct nvsp_message *init_packet;
-
- net_device = get_outbound_net_device(device);
- if (!net_device) {
- dev_err(&device->device, "unable to get net device..."
- "device being destroyed?");
- return -1;
- }
- if (net_device->send_buf_size <= 0) {
- ret = -EINVAL;
- goto cleanup;
- }
-
- net_device->send_buf =
- (void *)__get_free_pages(GFP_KERNEL|__GFP_ZERO,
- get_order(net_device->send_buf_size));
- if (!net_device->send_buf) {
- dev_err(&device->device, "unable to allocate send "
- "buffer of size %d", net_device->send_buf_size);
- ret = -1;
- goto cleanup;
- }
-
- /*
- * Establish the gpadl handle for this buffer on this
- * channel. Note: This call uses the vmbus connection rather
- * than the channel to establish the gpadl handle.
- */
- ret = vmbus_establish_gpadl(device->channel, net_device->send_buf,
- net_device->send_buf_size,
- &net_device->send_buf_gpadl_handle);
- if (ret != 0) {
- dev_err(&device->device, "unable to establish send buffer's gpadl");
- goto cleanup;
- }
-
- /* Notify the NetVsp of the gpadl handle */
- init_packet = &net_device->channel_init_pkt;
-
- memset(init_packet, 0, sizeof(struct nvsp_message));
-
- init_packet->hdr.msg_type = NVSP_MSG1_TYPE_SEND_SEND_BUF;
- init_packet->msg.v1_msg.send_recv_buf.
- gpadl_handle = net_device->send_buf_gpadl_handle;
- init_packet->msg.v1_msg.send_recv_buf.id =
- NETVSC_SEND_BUFFER_ID;
-
- /* Send the gpadl notification request */
- ret = vmbus_sendpacket(device->channel, init_packet,
- sizeof(struct nvsp_message),
- (unsigned long)init_packet,
- VM_PKT_DATA_INBAND,
- VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
- if (ret != 0) {
- dev_err(&device->device,
- "unable to send receive buffer's gpadl to netvsp");
- goto cleanup;
- }
-
- t = wait_for_completion_timeout(&net_device->channel_init_wait, HZ);
-
- BUG_ON(t == 0);
-
- /* Check the response */
- if (init_packet->msg.v1_msg.
- send_send_buf_complete.status != NVSP_STAT_SUCCESS) {
- dev_err(&device->device, "Unable to complete send buffer "
- "initialzation with NetVsp - status %d",
- init_packet->msg.v1_msg.
- send_send_buf_complete.status);
- ret = -1;
- goto cleanup;
- }
-
- net_device->send_section_size = init_packet->
- msg.v1_msg.send_send_buf_complete.section_size;
-
- goto exit;
-
-cleanup:
- netvsc_destroy_send_buf(net_device);
-
-exit:
- put_net_device(device);
- return ret;
-}
-
static int netvsc_connect_vsp(struct hv_device *device)
{
@@ -556,8 +400,6 @@ static int netvsc_connect_vsp(struct hv_device *device)
/* Post the big receive buffer to NetVSP */
ret = netvsc_init_recv_buf(device);
- if (ret == 0)
- ret = netvsc_init_send_buf(device);
cleanup:
put_net_device(device);
@@ -567,7 +409,6 @@ cleanup:
static void netvsc_disconnect_vsp(struct netvsc_device *net_device)
{
netvsc_destroy_recv_buf(net_device);
- netvsc_destroy_send_buf(net_device);
}
/*
@@ -1099,8 +940,6 @@ int netvsc_device_add(struct hv_device *device, void *additional_info)
net_device->recv_buf_size = NETVSC_RECEIVE_BUFFER_SIZE;
spin_lock_init(&net_device->recv_pkt_list_lock);
- net_device->send_buf_size = NETVSC_SEND_BUFFER_SIZE;
-
INIT_LIST_HEAD(&net_device->recv_pkt_list);
for (i = 0; i < NETVSC_RECEIVE_PACKETLIST_COUNT; i++) {
diff --git a/drivers/staging/hv/netvsc_drv.c b/drivers/staging/hv/netvsc_drv.c
index 7b9c229f7295a..33cab9c9949ec 100644
--- a/drivers/staging/hv/netvsc_drv.c
+++ b/drivers/staging/hv/netvsc_drv.c
@@ -46,7 +46,7 @@ struct net_device_context {
/* point back to our device context */
struct hv_device *device_ctx;
unsigned long avail;
- struct work_struct work;
+ struct delayed_work dwork;
};
@@ -156,9 +156,6 @@ static int netvsc_start_xmit(struct sk_buff *skb, struct net_device *net)
/* Setup the rndis header */
packet->page_buf_cnt = num_pages;
- /* TODO: Flush all write buffers/ memory fence ??? */
- /* wmb(); */
-
/* Initialize it from the skb */
packet->total_data_buflen = skb->len;
@@ -220,7 +217,7 @@ void netvsc_linkstatus_callback(struct hv_device *device_obj,
netif_wake_queue(net);
netif_notify_peers(net);
ndev_ctx = netdev_priv(net);
- schedule_work(&ndev_ctx->work);
+ schedule_delayed_work(&ndev_ctx->dwork, msecs_to_jiffies(20));
} else {
netif_carrier_off(net);
netif_stop_queue(net);
@@ -318,7 +315,7 @@ static const struct net_device_ops device_ops = {
* Send GARP packet to network peers after migrations.
* After Quick Migration, the network is not immediately operational in the
* current context when receiving RNDIS_STATUS_MEDIA_CONNECT event. So, add
- * another netif_notify_peers() into a scheduled work, otherwise GARP packet
+ * another netif_notify_peers() into a delayed work, otherwise GARP packet
* will not be sent after quick migration, and cause network disconnection.
*/
static void netvsc_send_garp(struct work_struct *w)
@@ -326,8 +323,7 @@ static void netvsc_send_garp(struct work_struct *w)
struct net_device_context *ndev_ctx;
struct net_device *net;
- msleep(20);
- ndev_ctx = container_of(w, struct net_device_context, work);
+ ndev_ctx = container_of(w, struct net_device_context, dwork.work);
net = dev_get_drvdata(&ndev_ctx->device_ctx->device);
netif_notify_peers(net);
}
@@ -351,11 +347,11 @@ static int netvsc_probe(struct hv_device *dev)
net_device_ctx->device_ctx = dev;
net_device_ctx->avail = ring_size;
dev_set_drvdata(&dev->device, net);
- INIT_WORK(&net_device_ctx->work, netvsc_send_garp);
+ INIT_DELAYED_WORK(&net_device_ctx->dwork, netvsc_send_garp);
/* Notify the netvsc driver of the new device */
device_info.ring_size = ring_size;
- ret = rndis_filte_device_add(dev, &device_info);
+ ret = rndis_filter_device_add(dev, &device_info);
if (ret != 0) {
free_netdev(net);
dev_set_drvdata(&dev->device, NULL);
@@ -364,17 +360,7 @@ static int netvsc_probe(struct hv_device *dev)
return ret;
}
- /*
- * If carrier is still off ie we did not get a link status callback,
- * update it if necessary
- */
- /*
- * FIXME: We should use a atomic or test/set instead to avoid getting
- * out of sync with the device's link status
- */
- if (!netif_carrier_ok(net))
- if (!device_info.link_state)
- netif_carrier_on(net);
+ netif_carrier_on(net);
memcpy(net->dev_addr, device_info.mac_adr, ETH_ALEN);
@@ -400,16 +386,18 @@ static int netvsc_probe(struct hv_device *dev)
static int netvsc_remove(struct hv_device *dev)
{
struct net_device *net = dev_get_drvdata(&dev->device);
- int ret;
+ struct net_device_context *ndev_ctx;
if (net == NULL) {
dev_err(&dev->device, "No net device to remove\n");
return 0;
}
+ ndev_ctx = netdev_priv(net);
+ cancel_delayed_work_sync(&ndev_ctx->dwork);
+
/* Stop outbound asap */
netif_stop_queue(net);
- /* netif_carrier_off(net); */
unregister_netdev(net);
@@ -417,14 +405,10 @@ static int netvsc_remove(struct hv_device *dev)
* Call to the vsc driver to let it know that the device is being
* removed
*/
- ret = rndis_filter_device_remove(dev);
- if (ret != 0) {
- /* TODO: */
- netdev_err(net, "unable to remove vsc device (ret %d)\n", ret);
- }
+ rndis_filter_device_remove(dev);
free_netdev(net);
- return ret;
+ return 0;
}
/* The one and only one */
diff --git a/drivers/staging/hv/ring_buffer.c b/drivers/staging/hv/ring_buffer.c
index 3da333018b5a6..42f76728429a0 100644
--- a/drivers/staging/hv/ring_buffer.c
+++ b/drivers/staging/hv/ring_buffer.c
@@ -50,6 +50,8 @@ hv_get_ringbuffer_availbytes(struct hv_ring_buffer_info *rbi,
{
u32 read_loc, write_loc;
+ smp_read_barrier_depends();
+
/* Capture the read/write indices before they changed */
read_loc = rbi->ring_buffer->read_index;
write_loc = rbi->ring_buffer->write_index;
@@ -411,7 +413,7 @@ int hv_ringbuffer_write(struct hv_ring_buffer_info *outring_info,
sizeof(u64));
/* Make sure we flush all writes before updating the writeIndex */
- mb();
+ smp_wmb();
/* Now, update the write location */
hv_set_next_write_location(outring_info, next_write_location);
@@ -513,7 +515,7 @@ int hv_ringbuffer_read(struct hv_ring_buffer_info *inring_info, void *buffer,
/* Make sure all reads are done before we update the read index since */
/* the writer may start writing to the read area once the read index */
/*is updated */
- mb();
+ smp_mb();
/* Update the read index */
hv_set_next_read_location(inring_info, next_read_location);
diff --git a/drivers/staging/hv/rndis_filter.c b/drivers/staging/hv/rndis_filter.c
index 60ebdb1b6082b..5674a135db98e 100644
--- a/drivers/staging/hv/rndis_filter.c
+++ b/drivers/staging/hv/rndis_filter.c
@@ -139,14 +139,17 @@ static void put_rndis_request(struct rndis_device *dev,
kfree(req);
}
-static void dump_rndis_message(struct rndis_message *rndis_msg)
+static void dump_rndis_message(struct hv_device *hv_dev,
+ struct rndis_message *rndis_msg)
{
+ struct net_device *netdev = dev_get_drvdata(&hv_dev->device);
+
switch (rndis_msg->ndis_msg_type) {
case REMOTE_NDIS_PACKET_MSG:
- DPRINT_DBG(NETVSC, "REMOTE_NDIS_PACKET_MSG (len %u, "
+ netdev_dbg(netdev, "REMOTE_NDIS_PACKET_MSG (len %u, "
"data offset %u data len %u, # oob %u, "
"oob offset %u, oob len %u, pkt offset %u, "
- "pkt len %u",
+ "pkt len %u\n",
rndis_msg->msg_len,
rndis_msg->msg.pkt.data_offset,
rndis_msg->msg.pkt.data_len,
@@ -158,10 +161,10 @@ static void dump_rndis_message(struct rndis_message *rndis_msg)
break;
case REMOTE_NDIS_INITIALIZE_CMPLT:
- DPRINT_DBG(NETVSC, "REMOTE_NDIS_INITIALIZE_CMPLT "
+ netdev_dbg(netdev, "REMOTE_NDIS_INITIALIZE_CMPLT "
"(len %u, id 0x%x, status 0x%x, major %d, minor %d, "
"device flags %d, max xfer size 0x%x, max pkts %u, "
- "pkt aligned %u)",
+ "pkt aligned %u)\n",
rndis_msg->msg_len,
rndis_msg->msg.init_complete.req_id,
rndis_msg->msg.init_complete.status,
@@ -176,9 +179,9 @@ static void dump_rndis_message(struct rndis_message *rndis_msg)
break;
case REMOTE_NDIS_QUERY_CMPLT:
- DPRINT_DBG(NETVSC, "REMOTE_NDIS_QUERY_CMPLT "
+ netdev_dbg(netdev, "REMOTE_NDIS_QUERY_CMPLT "
"(len %u, id 0x%x, status 0x%x, buf len %u, "
- "buf offset %u)",
+ "buf offset %u)\n",
rndis_msg->msg_len,
rndis_msg->msg.query_complete.req_id,
rndis_msg->msg.query_complete.status,
@@ -189,16 +192,16 @@ static void dump_rndis_message(struct rndis_message *rndis_msg)
break;
case REMOTE_NDIS_SET_CMPLT:
- DPRINT_DBG(NETVSC,
- "REMOTE_NDIS_SET_CMPLT (len %u, id 0x%x, status 0x%x)",
+ netdev_dbg(netdev,
+ "REMOTE_NDIS_SET_CMPLT (len %u, id 0x%x, status 0x%x)\n",
rndis_msg->msg_len,
rndis_msg->msg.set_complete.req_id,
rndis_msg->msg.set_complete.status);
break;
case REMOTE_NDIS_INDICATE_STATUS_MSG:
- DPRINT_DBG(NETVSC, "REMOTE_NDIS_INDICATE_STATUS_MSG "
- "(len %u, status 0x%x, buf len %u, buf offset %u)",
+ netdev_dbg(netdev, "REMOTE_NDIS_INDICATE_STATUS_MSG "
+ "(len %u, status 0x%x, buf len %u, buf offset %u)\n",
rndis_msg->msg_len,
rndis_msg->msg.indicate_status.status,
rndis_msg->msg.indicate_status.status_buflen,
@@ -206,7 +209,7 @@ static void dump_rndis_message(struct rndis_message *rndis_msg)
break;
default:
- DPRINT_DBG(NETVSC, "0x%x (len %u)",
+ netdev_dbg(netdev, "0x%x (len %u)\n",
rndis_msg->ndis_msg_type,
rndis_msg->msg_len);
break;
@@ -372,24 +375,6 @@ int rndis_filter_receive(struct hv_device *dev,
pkt->page_buf[0].offset);
/* Make sure we got a valid rndis message */
- /*
- * FIXME: There seems to be a bug in set completion msg where its
- * MessageLength is 16 bytes but the ByteCount field in the xfer page
- * range shows 52 bytes
- * */
-#if 0
- if (pkt->total_data_buflen != rndis_hdr->msg_len) {
- kunmap_atomic(rndis_hdr - pkt->page_buf[0].offset,
- KM_IRQ0);
-
- dev_err(&dev->device, "invalid rndis message? (expected %u "
- "bytes got %u)...dropping this message!\n",
- rndis_hdr->msg_len,
- pkt->total_data_buflen);
- return -1;
- }
-#endif
-
if ((rndis_hdr->ndis_msg_type != REMOTE_NDIS_PACKET_MSG) &&
(rndis_hdr->msg_len > sizeof(struct rndis_message))) {
dev_err(&dev->device, "incoming rndis message buffer overflow "
@@ -405,7 +390,7 @@ int rndis_filter_receive(struct hv_device *dev,
kunmap_atomic(rndis_hdr - pkt->page_buf[0].offset, KM_IRQ0);
- dump_rndis_message(&rndis_msg);
+ dump_rndis_message(dev, &rndis_msg);
switch (rndis_msg.ndis_msg_type) {
case REMOTE_NDIS_PACKET_MSG:
@@ -681,7 +666,7 @@ static int rndis_filter_close_device(struct rndis_device *dev)
return ret;
}
-int rndis_filte_device_add(struct hv_device *dev,
+int rndis_filter_device_add(struct hv_device *dev,
void *additional_info)
{
int ret;
@@ -741,7 +726,7 @@ int rndis_filte_device_add(struct hv_device *dev,
return ret;
}
-int rndis_filter_device_remove(struct hv_device *dev)
+void rndis_filter_device_remove(struct hv_device *dev)
{
struct netvsc_device *net_dev = dev->ext;
struct rndis_device *rndis_dev = net_dev->extension;
@@ -753,8 +738,6 @@ int rndis_filter_device_remove(struct hv_device *dev)
net_dev->extension = NULL;
netvsc_device_remove(dev);
-
- return 0;
}
diff --git a/drivers/staging/hv/storvsc_drv.c b/drivers/staging/hv/storvsc_drv.c
index 942cc5f98db19..2c6d2f24b3c2f 100644
--- a/drivers/staging/hv/storvsc_drv.c
+++ b/drivers/staging/hv/storvsc_drv.c
@@ -24,6 +24,7 @@
#include <linux/module.h>
#include <linux/device.h>
#include <linux/blkdev.h>
+#include <linux/dmi.h>
#include <scsi/scsi.h>
#include <scsi/scsi_cmnd.h>
#include <scsi/scsi_host.h>
@@ -44,7 +45,7 @@ MODULE_PARM_DESC(storvsc_ringbuffer_size, "Ring buffer size (bytes)");
static const char *driver_name = "storvsc";
/* {ba6163d9-04a1-4d29-b605-72e2ffb1dc7f} */
-static const struct hv_guid gStorVscDeviceType = {
+static const struct hv_guid stor_vsci_device_type = {
.data = {
0xd9, 0x63, 0x61, 0xba, 0xa1, 0x04, 0x29, 0x4d,
0xb6, 0x05, 0x72, 0xe2, 0xff, 0xb1, 0xdc, 0x7f
@@ -92,12 +93,8 @@ static int storvsc_device_configure(struct scsi_device *sdevice)
scsi_adjust_queue_depth(sdevice, MSG_SIMPLE_TAG,
STORVSC_MAX_IO_REQUESTS);
- DPRINT_INFO(STORVSC_DRV, "sdev (%p) - setting max segment size to %ld",
- sdevice, PAGE_SIZE);
blk_queue_max_segment_size(sdevice->request_queue, PAGE_SIZE);
- DPRINT_INFO(STORVSC_DRV, "sdev (%p) - adding merge bio vec routine",
- sdevice);
blk_queue_merge_bvec(sdevice->request_queue, storvsc_merge_bvec);
blk_queue_bounce_limit(sdevice->request_queue, BLK_BOUNCE_ANY);
@@ -308,31 +305,21 @@ static unsigned int copy_to_bounce_buffer(struct scatterlist *orig_sgl,
}
-/*
- * storvsc_remove - Callback when our device is removed
- */
static int storvsc_remove(struct hv_device *dev)
{
struct Scsi_Host *host = dev_get_drvdata(&dev->device);
struct hv_host_device *host_dev =
(struct hv_host_device *)host->hostdata;
- /*
- * Call to the vsc driver to let it know that the device is being
- * removed
- */
- storvsc_dev_remove(dev);
+ scsi_remove_host(host);
+
+ scsi_host_put(host);
+ storvsc_dev_remove(dev);
if (host_dev->request_pool) {
kmem_cache_destroy(host_dev->request_pool);
host_dev->request_pool = NULL;
}
-
- DPRINT_INFO(STORVSC, "removing host adapter (%p)...", host);
- scsi_remove_host(host);
-
- DPRINT_INFO(STORVSC, "releasing host adapter (%p)...", host);
- scsi_host_put(host);
return 0;
}
@@ -357,9 +344,6 @@ static int storvsc_get_chs(struct scsi_device *sdev, struct block_device * bdev,
info[1] = sectors_pt;
info[2] = (int)cylinders;
- DPRINT_INFO(STORVSC_DRV, "CHS (%d, %d, %d)", (int)cylinders, heads,
- sectors_pt);
-
return 0;
}
@@ -370,7 +354,6 @@ static int storvsc_host_reset(struct hv_device *device)
struct vstor_packet *vstor_packet;
int ret, t;
- DPRINT_INFO(STORVSC, "resetting host adapter...");
stor_device = get_stor_device(device);
if (!stor_device)
@@ -399,7 +382,6 @@ static int storvsc_host_reset(struct hv_device *device)
goto cleanup;
}
- DPRINT_INFO(STORVSC, "host adapter reset completed");
/*
* At this point, all outstanding requests in the adapter
@@ -422,17 +404,10 @@ static int storvsc_host_reset_handler(struct scsi_cmnd *scmnd)
(struct hv_host_device *)scmnd->device->host->hostdata;
struct hv_device *dev = host_dev->dev;
- DPRINT_INFO(STORVSC_DRV, "sdev (%p) dev obj (%p) - host resetting...",
- scmnd->device, dev);
-
- /* Invokes the vsc to reset the host/bus */
ret = storvsc_host_reset(dev);
if (ret != 0)
return ret;
- DPRINT_INFO(STORVSC_DRV, "sdev (%p) dev obj (%p) - host reseted",
- scmnd->device, dev);
-
return ret;
}
@@ -479,7 +454,6 @@ static void storvsc_commmand_completion(struct hv_storvsc_request *request)
scmnd->host_scribble = NULL;
scmnd->scsi_done = NULL;
- /* !!DO NOT MODIFY the scmnd after this call */
scsi_done_fn(scmnd);
kmem_cache_free(host_dev->request_pool, cmd_request);
@@ -510,8 +484,6 @@ static int storvsc_queuecommand_lck(struct scsi_cmnd *scmnd,
cmd_request =
(struct storvsc_cmd_request *)scmnd->host_scribble;
- DPRINT_INFO(STORVSC_DRV, "retrying scmnd %p cmd_request %p",
- scmnd, cmd_request);
goto retry_request;
}
@@ -752,11 +724,28 @@ static struct hv_driver storvsc_drv = {
.remove = storvsc_remove,
};
-
/*
- * storvsc_drv_init - StorVsc driver initialization.
+ * We use a DMI table to determine if we should autoload this driver This is
+ * needed by distro tools to determine if the hyperv drivers should be
+ * installed and/or configured. We don't do anything else with the table, but
+ * it needs to be present.
*/
-static int storvsc_drv_init(void)
+
+static const struct dmi_system_id __initconst
+hv_stor_dmi_table[] __maybe_unused = {
+ {
+ .ident = "Hyper-V",
+ .matches = {
+ DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
+ DMI_MATCH(DMI_PRODUCT_NAME, "Virtual Machine"),
+ DMI_MATCH(DMI_BOARD_NAME, "Virtual Machine"),
+ },
+ },
+ { },
+};
+MODULE_DEVICE_TABLE(dmi, hv_stor_dmi_table);
+
+static int __init storvsc_drv_init(void)
{
int ret;
struct hv_driver *drv = &storvsc_drv;
@@ -775,14 +764,13 @@ static int storvsc_drv_init(void)
sizeof(struct vstor_packet) + sizeof(u64),
sizeof(u64)));
- memcpy(&drv->dev_type, &gStorVscDeviceType,
+ memcpy(&drv->dev_type, &stor_vsci_device_type,
sizeof(struct hv_guid));
if (max_outstanding_req_per_channel <
STORVSC_MAX_IO_REQUESTS)
return -1;
- drv->name = driver_name;
drv->driver.name = driver_name;
@@ -792,27 +780,13 @@ static int storvsc_drv_init(void)
return ret;
}
-static void storvsc_drv_exit(void)
+static void __exit storvsc_drv_exit(void)
{
vmbus_child_driver_unregister(&storvsc_drv.driver);
}
-static int __init storvsc_init(void)
-{
- int ret;
-
- DPRINT_INFO(STORVSC_DRV, "Storvsc initializing....");
- ret = storvsc_drv_init();
- return ret;
-}
-
-static void __exit storvsc_exit(void)
-{
- storvsc_drv_exit();
-}
-
MODULE_LICENSE("GPL");
MODULE_VERSION(HV_DRV_VERSION);
MODULE_DESCRIPTION("Microsoft Hyper-V virtual storage driver");
-module_init(storvsc_init);
-module_exit(storvsc_exit);
+module_init(storvsc_drv_init);
+module_exit(storvsc_drv_exit);
diff --git a/drivers/staging/hv/vmbus_drv.c b/drivers/staging/hv/vmbus_drv.c
index ec1d38cd481c7..be158be28ee3e 100644
--- a/drivers/staging/hv/vmbus_drv.c
+++ b/drivers/staging/hv/vmbus_drv.c
@@ -39,7 +39,7 @@
#include "hyperv_vmbus.h"
-static struct pci_dev *hv_pci_dev;
+static struct acpi_device *hv_acpi_dev;
static struct tasklet_struct msg_dpc;
static struct tasklet_struct event_dpc;
@@ -49,7 +49,6 @@ EXPORT_SYMBOL(vmbus_loglevel);
/* (ALL_MODULES << 16 | DEBUG_LVL_ENTEREXIT); */
/* (((VMBUS | VMBUS_DRV)<<16) | DEBUG_LVL_ENTEREXIT); */
-static int pci_probe_error;
static struct completion probe_event;
static int irq;
@@ -108,12 +107,12 @@ static ssize_t vmbus_show_device_attr(struct device *dev,
struct device_attribute *dev_attr,
char *buf)
{
- struct hv_device *device_ctx = device_to_hv_device(dev);
+ struct hv_device *hv_dev = device_to_hv_device(dev);
struct hv_device_info device_info;
memset(&device_info, 0, sizeof(struct hv_device_info));
- get_channel_info(device_ctx, &device_info);
+ get_channel_info(hv_dev, &device_info);
if (!strcmp(dev_attr->attr.name, "class_id")) {
return sprintf(buf, "{%02x%02x%02x%02x-%02x%02x-%02x%02x-"
@@ -301,10 +300,10 @@ static int vmbus_match(struct device *device, struct device_driver *driver)
{
int match = 0;
struct hv_driver *drv = drv_to_hv_drv(driver);
- struct hv_device *device_ctx = device_to_hv_device(device);
+ struct hv_device *hv_dev = device_to_hv_device(device);
/* We found our driver ? */
- if (memcmp(&device_ctx->dev_type, &drv->dev_type,
+ if (memcmp(&hv_dev->dev_type, &drv->dev_type,
sizeof(struct hv_guid)) == 0)
match = 1;
@@ -330,7 +329,7 @@ static int vmbus_probe(struct device *child_device)
} else {
pr_err("probe not set for driver %s\n",
dev_name(child_device));
- ret = -1;
+ ret = -ENODEV;
}
return ret;
}
@@ -353,7 +352,7 @@ static int vmbus_remove(struct device *child_device)
} else {
pr_err("remove not set for driver %s\n",
dev_name(child_device));
- ret = -1;
+ ret = -ENODEV;
}
}
@@ -388,9 +387,9 @@ static void vmbus_shutdown(struct device *child_device)
*/
static void vmbus_device_release(struct device *device)
{
- struct hv_device *device_ctx = device_to_hv_device(device);
+ struct hv_device *hv_dev = device_to_hv_device(device);
- kfree(device_ctx);
+ kfree(hv_dev);
}
@@ -456,7 +455,7 @@ static void vmbus_on_msg_dpc(unsigned long data)
* will not deliver any more messages since there is
* no empty slot
*/
- mb();
+ smp_mb();
if (msg->header.message_flags.msg_pending) {
/*
@@ -487,7 +486,6 @@ static int vmbus_on_isr(void)
if (msg->header.message_type != HVMSG_NONE)
ret |= 0x1;
- /* TODO: Check if there are events to be process */
page_addr = hv_context.synic_event_page[cpu];
event = (union hv_synic_event_flags *)page_addr + VMBUS_MESSAGE_SINT;
@@ -528,7 +526,7 @@ static irqreturn_t vmbus_isr(int irq, void *dev_id)
* - get the irq resource
* - retrieve the channel offers
*/
-static int vmbus_bus_init(struct pci_dev *pdev)
+static int vmbus_bus_init(int irq)
{
int ret;
unsigned int vector;
@@ -537,7 +535,7 @@ static int vmbus_bus_init(struct pci_dev *pdev)
ret = hv_init();
if (ret != 0) {
pr_err("Unable to initialize the hypervisor - 0x%x\n", ret);
- goto cleanup;
+ return ret;
}
/* Initialize the bus context */
@@ -546,27 +544,23 @@ static int vmbus_bus_init(struct pci_dev *pdev)
/* Now, register the bus with LDM */
ret = bus_register(&hv_bus);
- if (ret) {
- ret = -1;
- goto cleanup;
- }
+ if (ret)
+ return ret;
/* Get the interrupt resource */
- ret = request_irq(pdev->irq, vmbus_isr,
- IRQF_SHARED | IRQF_SAMPLE_RANDOM,
- driver_name, pdev);
+ ret = request_irq(irq, vmbus_isr, IRQF_SAMPLE_RANDOM,
+ driver_name, hv_acpi_dev);
if (ret != 0) {
pr_err("Unable to request IRQ %d\n",
- pdev->irq);
+ irq);
bus_unregister(&hv_bus);
- ret = -1;
- goto cleanup;
+ return ret;
}
- vector = IRQ0_VECTOR + pdev->irq;
+ vector = IRQ0_VECTOR + irq;
/*
* Notify the hypervisor of our irq and
@@ -575,16 +569,15 @@ static int vmbus_bus_init(struct pci_dev *pdev)
on_each_cpu(hv_synic_init, (void *)&vector, 1);
ret = vmbus_connect();
if (ret) {
- free_irq(pdev->irq, pdev);
+ free_irq(irq, hv_acpi_dev);
bus_unregister(&hv_bus);
- goto cleanup;
+ return ret;
}
vmbus_request_offers();
-cleanup:
- return ret;
+ return 0;
}
/**
@@ -631,7 +624,6 @@ void vmbus_child_driver_unregister(struct device_driver *drv)
driver_unregister(drv);
- drv->bus = NULL;
}
EXPORT_SYMBOL(vmbus_child_driver_unregister);
@@ -676,7 +668,7 @@ int vmbus_child_device_register(struct hv_device *child_device_obj)
/* The new device belongs to this bus */
child_device_obj->device.bus = &hv_bus; /* device->dev.bus; */
- child_device_obj->device.parent = &hv_pci_dev->dev;
+ child_device_obj->device.parent = &hv_acpi_dev->dev;
child_device_obj->device.release = vmbus_device_release;
/*
@@ -733,6 +725,8 @@ static int vmbus_acpi_add(struct acpi_device *device)
{
acpi_status result;
+ hv_acpi_dev = device;
+
result =
acpi_walk_resources(device->handle, METHOD_NAME__CRS,
vmbus_walk_resources, &irq);
@@ -747,6 +741,7 @@ static int vmbus_acpi_add(struct acpi_device *device)
static const struct acpi_device_id vmbus_acpi_device_ids[] = {
{"VMBUS", 0},
+ {"VMBus", 0},
{"", 0},
};
MODULE_DEVICE_TABLE(acpi, vmbus_acpi_device_ids);
@@ -759,53 +754,6 @@ static struct acpi_driver vmbus_acpi_driver = {
},
};
-static int vmbus_acpi_init(void)
-{
- int result;
-
-
- result = acpi_bus_register_driver(&vmbus_acpi_driver);
- if (result < 0)
- return result;
-
- return 0;
-}
-
-static void vmbus_acpi_exit(void)
-{
- acpi_bus_unregister_driver(&vmbus_acpi_driver);
-
- return;
-}
-
-
-static int __devinit hv_pci_probe(struct pci_dev *pdev,
- const struct pci_device_id *ent)
-{
- hv_pci_dev = pdev;
-
- pci_probe_error = pci_enable_device(pdev);
- if (pci_probe_error)
- goto probe_cleanup;
-
- /*
- * If the PCI sub-sytem did not assign us an
- * irq, use the bios provided one.
- */
-
- if (pdev->irq == 0)
- pdev->irq = irq;
-
- pci_probe_error = vmbus_bus_init(pdev);
-
- if (pci_probe_error)
- pci_disable_device(pdev);
-
-probe_cleanup:
- complete(&probe_event);
- return pci_probe_error;
-}
-
/*
* We use a PCI table to determine if we should autoload this driver This is
* needed by distro tools to determine if the hyperv drivers should be
@@ -818,13 +766,7 @@ static const struct pci_device_id microsoft_hv_pci_table[] = {
};
MODULE_DEVICE_TABLE(pci, microsoft_hv_pci_table);
-static struct pci_driver hv_bus_driver = {
- .name = "hv_bus",
- .probe = hv_pci_probe,
- .id_table = microsoft_hv_pci_table,
-};
-
-static int __init hv_pci_init(void)
+static int __init hv_acpi_init(void)
{
int ret;
@@ -834,32 +776,19 @@ static int __init hv_pci_init(void)
* Get irq resources first.
*/
- ret = vmbus_acpi_init();
+ ret = acpi_bus_register_driver(&vmbus_acpi_driver);
+
if (ret)
return ret;
wait_for_completion(&probe_event);
if (irq <= 0) {
- vmbus_acpi_exit();
+ acpi_bus_unregister_driver(&vmbus_acpi_driver);
return -ENODEV;
}
- vmbus_acpi_exit();
- init_completion(&probe_event);
- ret = pci_register_driver(&hv_bus_driver);
- if (ret)
- return ret;
- /*
- * All the vmbus initialization occurs within the
- * hv_pci_probe() function. Wait for hv_pci_probe()
- * to complete.
- */
- wait_for_completion(&probe_event);
-
- if (pci_probe_error)
- pci_unregister_driver(&hv_bus_driver);
- return pci_probe_error;
+ return vmbus_bus_init(irq);
}
@@ -867,4 +796,4 @@ MODULE_LICENSE("GPL");
MODULE_VERSION(HV_DRV_VERSION);
module_param(vmbus_loglevel, int, S_IRUGO|S_IWUSR);
-module_init(hv_pci_init);
+module_init(hv_acpi_init);
diff --git a/drivers/staging/usbip/README b/drivers/staging/usbip/README
index c11be57354851..41a2cf2e77a60 100644
--- a/drivers/staging/usbip/README
+++ b/drivers/staging/usbip/README
@@ -2,5 +2,6 @@ TODO:
- more discussion about the protocol
- testing
- review of the userspace interface
+ - document the protocol
Please send patches for this code to Greg Kroah-Hartman <greg@kroah.com>
diff --git a/drivers/staging/usbip/stub.h b/drivers/staging/usbip/stub.h
index 6592aa2ad15ca..132adc57ebc1a 100644
--- a/drivers/staging/usbip/stub.h
+++ b/drivers/staging/usbip/stub.h
@@ -76,7 +76,9 @@ struct stub_unlink {
__u32 status;
};
-#define BUSID_SIZE 20
+/* same as SYSFS_BUS_ID_SIZE */
+#define BUSID_SIZE 32
+
struct bus_id_priv {
char name[BUSID_SIZE];
char status;
diff --git a/drivers/staging/usbip/stub_dev.c b/drivers/staging/usbip/stub_dev.c
index 8cbea42b69bc7..e26b2eede507f 100644
--- a/drivers/staging/usbip/stub_dev.c
+++ b/drivers/staging/usbip/stub_dev.c
@@ -23,16 +23,10 @@
#include "usbip_common.h"
#include "stub.h"
-static int stub_probe(struct usb_interface *interface,
- const struct usb_device_id *id);
-static void stub_disconnect(struct usb_interface *interface);
-static int stub_pre_reset(struct usb_interface *interface);
-static int stub_post_reset(struct usb_interface *interface);
-
/*
* Define device IDs here if you want to explicitly limit exportable devices.
- * In the most cases, wild card matching will be ok because driver binding can
- * be changed dynamically by a userland program.
+ * In most cases, wildcard matching will be okay because driver binding can be
+ * changed dynamically by a userland program.
*/
static struct usb_device_id stub_table[] = {
#if 0
@@ -56,18 +50,9 @@ static struct usb_device_id stub_table[] = {
};
MODULE_DEVICE_TABLE(usb, stub_table);
-struct usb_driver stub_driver = {
- .name = "usbip",
- .probe = stub_probe,
- .disconnect = stub_disconnect,
- .id_table = stub_table,
- .pre_reset = stub_pre_reset,
- .post_reset = stub_post_reset,
-};
-
/*
- * usbip_status shows status of usbip as long as this driver is bound to the
- * target device.
+ * usbip_status shows the status of usbip-host as long as this driver is bound
+ * to the target device.
*/
static ssize_t show_status(struct device *dev, struct device_attribute *attr,
char *buf)
@@ -211,10 +196,11 @@ static void stub_shutdown_connection(struct usbip_device *ud)
if (ud->tcp_tx && !task_is_dead(ud->tcp_tx))
kthread_stop(ud->tcp_tx);
- /* 2. close the socket */
/*
- * tcp_socket is freed after threads are killed.
- * So usbip_xmit do not touch NULL socket.
+ * 2. close the socket
+ *
+ * tcp_socket is freed after threads are killed so that usbip_xmit does
+ * not touch NULL socket.
*/
if (ud->tcp_socket) {
sock_release(ud->tcp_socket);
@@ -234,8 +220,8 @@ static void stub_shutdown_connection(struct usbip_device *ud)
list_del(&unlink->list);
kfree(unlink);
}
- list_for_each_entry_safe(unlink, tmp,
- &sdev->unlink_free, list) {
+ list_for_each_entry_safe(unlink, tmp, &sdev->unlink_free,
+ list) {
list_del(&unlink->list);
kfree(unlink);
}
@@ -262,22 +248,17 @@ static void stub_device_reset(struct usbip_device *ud)
/* try to reset the device */
ret = usb_reset_device(udev);
-
usb_unlock_device(udev);
spin_lock(&ud->lock);
if (ret) {
dev_err(&udev->dev, "device reset\n");
ud->status = SDEV_ST_ERROR;
-
} else {
dev_info(&udev->dev, "device reset\n");
ud->status = SDEV_ST_AVAILABLE;
-
}
spin_unlock(&ud->lock);
-
- return;
}
static void stub_device_unusable(struct usbip_device *ud)
@@ -379,7 +360,7 @@ static int stub_probe(struct usb_interface *interface,
/* check we should claim or not by busid_table */
busid_priv = get_busid_priv(udev_busid);
- if (!busid_priv || (busid_priv->status == STUB_BUSID_REMOV) ||
+ if (!busid_priv || (busid_priv->status == STUB_BUSID_REMOV) ||
(busid_priv->status == STUB_BUSID_OTHER)) {
dev_info(&interface->dev, "%s is not in match_busid table... "
"skip!\n", udev_busid);
@@ -424,7 +405,6 @@ static int stub_probe(struct usb_interface *interface,
udev_busid);
usb_set_intfdata(interface, NULL);
busid_priv->interf_count--;
-
return err;
}
@@ -432,7 +412,7 @@ static int stub_probe(struct usb_interface *interface,
return 0;
}
- /* ok. this is my device. */
+ /* ok, this is my device */
sdev = stub_device_alloc(udev, interface);
if (!sdev)
return -ENOMEM;
@@ -447,7 +427,6 @@ static int stub_probe(struct usb_interface *interface,
/* set private data to usb_interface */
usb_set_intfdata(interface, sdev);
busid_priv->interf_count++;
-
busid_priv->sdev = sdev;
err = stub_add_files(&interface->dev);
@@ -457,7 +436,6 @@ static int stub_probe(struct usb_interface *interface,
usb_put_intf(interface);
busid_priv->interf_count = 0;
-
busid_priv->sdev = NULL;
stub_device_free(sdev);
return err;
@@ -546,19 +524,9 @@ static void stub_disconnect(struct usb_interface *interface)
}
}
-/*
- * Presence of pre_reset and post_reset prevents the driver from being unbound
- * when the device is being reset
- */
-
-int stub_pre_reset(struct usb_interface *interface)
-{
- dev_dbg(&interface->dev, "pre_reset\n");
- return 0;
-}
-
-int stub_post_reset(struct usb_interface *interface)
-{
- dev_dbg(&interface->dev, "post_reset\n");
- return 0;
-}
+struct usb_driver stub_driver = {
+ .name = "usbip-host",
+ .probe = stub_probe,
+ .disconnect = stub_disconnect,
+ .id_table = stub_table,
+};
diff --git a/drivers/staging/usbip/stub_main.c b/drivers/staging/usbip/stub_main.c
index e9085d6639450..a34249a9cb6e1 100644
--- a/drivers/staging/usbip/stub_main.c
+++ b/drivers/staging/usbip/stub_main.c
@@ -25,9 +25,7 @@
#define DRIVER_AUTHOR "Takahiro Hirofuchi"
#define DRIVER_DESC "USB/IP Host Driver"
-/* stub_priv is allocated from stub_priv_cache */
struct kmem_cache *stub_priv_cache;
-
/*
* busid_tables defines matching busids that usbip can grab. A user can change
* dynamically what device is locally used and what device is exported to a
@@ -37,70 +35,60 @@ struct kmem_cache *stub_priv_cache;
static struct bus_id_priv busid_table[MAX_BUSID];
static spinlock_t busid_table_lock;
-int match_busid(const char *busid)
+static void init_busid_table(void)
{
int i;
- spin_lock(&busid_table_lock);
-
+ memset(busid_table, 0, sizeof(busid_table));
for (i = 0; i < MAX_BUSID; i++)
- if (busid_table[i].name[0])
- if (!strncmp(busid_table[i].name, busid, BUSID_SIZE)) {
- /* already registerd */
- spin_unlock(&busid_table_lock);
- return 0;
- }
-
- spin_unlock(&busid_table_lock);
+ busid_table[i].status = STUB_BUSID_OTHER;
- return 1;
+ spin_lock_init(&busid_table_lock);
}
-struct bus_id_priv *get_busid_priv(const char *busid)
+/*
+ * Find the index of the busid by name.
+ * Must be called with busid_table_lock held.
+ */
+static int get_busid_idx(const char *busid)
{
int i;
-
- spin_lock(&busid_table_lock);
+ int idx = -1;
for (i = 0; i < MAX_BUSID; i++)
if (busid_table[i].name[0])
if (!strncmp(busid_table[i].name, busid, BUSID_SIZE)) {
- /* already registerd */
- spin_unlock(&busid_table_lock);
- return &(busid_table[i]);
+ idx = i;
+ break;
}
-
- spin_unlock(&busid_table_lock);
-
- return NULL;
+ return idx;
}
-static ssize_t show_match_busid(struct device_driver *drv, char *buf)
+struct bus_id_priv *get_busid_priv(const char *busid)
{
- int i;
- char *out = buf;
+ int idx;
+ struct bus_id_priv *bid = NULL;
spin_lock(&busid_table_lock);
-
- for (i = 0; i < MAX_BUSID; i++)
- if (busid_table[i].name[0])
- out += sprintf(out, "%s ", busid_table[i].name);
-
+ idx = get_busid_idx(busid);
+ if (idx >= 0)
+ bid = &(busid_table[idx]);
spin_unlock(&busid_table_lock);
- out += sprintf(out, "\n");
-
- return out - buf;
+ return bid;
}
static int add_match_busid(char *busid)
{
int i;
-
- if (!match_busid(busid))
- return 0;
+ int ret = -1;
spin_lock(&busid_table_lock);
+ /* already registered? */
+ if (get_busid_idx(busid) >= 0) {
+ ret = 0;
+ goto out;
+ }
for (i = 0; i < MAX_BUSID; i++)
if (!busid_table[i].name[0]) {
@@ -108,52 +96,55 @@ static int add_match_busid(char *busid)
if ((busid_table[i].status != STUB_BUSID_ALLOC) &&
(busid_table[i].status != STUB_BUSID_REMOV))
busid_table[i].status = STUB_BUSID_ADDED;
- spin_unlock(&busid_table_lock);
- return 0;
+ ret = 0;
+ break;
}
+out:
spin_unlock(&busid_table_lock);
- return -1;
+ return ret;
}
int del_match_busid(char *busid)
{
- int i;
+ int idx;
+ int ret = -1;
spin_lock(&busid_table_lock);
+ idx = get_busid_idx(busid);
+ if (idx < 0)
+ goto out;
- for (i = 0; i < MAX_BUSID; i++)
- if (!strncmp(busid_table[i].name, busid, BUSID_SIZE)) {
- /* found */
- if (busid_table[i].status == STUB_BUSID_OTHER)
- memset(busid_table[i].name, 0, BUSID_SIZE);
- if ((busid_table[i].status != STUB_BUSID_OTHER) &&
- (busid_table[i].status != STUB_BUSID_ADDED)) {
- busid_table[i].status = STUB_BUSID_REMOV;
- }
- spin_unlock(&busid_table_lock);
- return 0;
- }
+ /* found */
+ ret = 0;
+
+ if (busid_table[idx].status == STUB_BUSID_OTHER)
+ memset(busid_table[idx].name, 0, BUSID_SIZE);
+
+ if ((busid_table[idx].status != STUB_BUSID_OTHER) &&
+ (busid_table[idx].status != STUB_BUSID_ADDED))
+ busid_table[idx].status = STUB_BUSID_REMOV;
+out:
spin_unlock(&busid_table_lock);
- return -1;
+ return ret;
}
-static void init_busid_table(void)
+static ssize_t show_match_busid(struct device_driver *drv, char *buf)
{
int i;
+ char *out = buf;
- for (i = 0; i < MAX_BUSID; i++) {
- memset(busid_table[i].name, 0, BUSID_SIZE);
- busid_table[i].status = STUB_BUSID_OTHER;
- busid_table[i].interf_count = 0;
- busid_table[i].sdev = NULL;
- busid_table[i].shutdown_busid = 0;
- }
+ spin_lock(&busid_table_lock);
+ for (i = 0; i < MAX_BUSID; i++)
+ if (busid_table[i].name[0])
+ out += sprintf(out, "%s ", busid_table[i].name);
+ spin_unlock(&busid_table_lock);
+ out += sprintf(out, "\n");
- spin_lock_init(&busid_table_lock);
+ return out - buf;
}
static ssize_t store_match_busid(struct device_driver *dev, const char *buf,
@@ -175,23 +166,24 @@ static ssize_t store_match_busid(struct device_driver *dev, const char *buf,
strncpy(busid, buf + 4, BUSID_SIZE);
if (!strncmp(buf, "add ", 4)) {
- if (add_match_busid(busid) < 0)
+ if (add_match_busid(busid) < 0) {
return -ENOMEM;
- else {
+ } else {
pr_debug("add busid %s\n", busid);
return count;
}
} else if (!strncmp(buf, "del ", 4)) {
- if (del_match_busid(busid) < 0)
+ if (del_match_busid(busid) < 0) {
return -ENODEV;
- else {
+ } else {
pr_debug("del busid %s\n", busid);
return count;
}
- } else
+ } else {
return -EINVAL;
+ }
}
-static DRIVER_ATTR(match_busid, S_IRUSR|S_IWUSR, show_match_busid,
+static DRIVER_ATTR(match_busid, S_IRUSR | S_IWUSR, show_match_busid,
store_match_busid);
static struct stub_priv *stub_priv_pop_from_listhead(struct list_head *listhead)
@@ -214,36 +206,30 @@ static struct stub_priv *stub_priv_pop(struct stub_device *sdev)
spin_lock_irqsave(&sdev->priv_lock, flags);
priv = stub_priv_pop_from_listhead(&sdev->priv_init);
- if (priv) {
- spin_unlock_irqrestore(&sdev->priv_lock, flags);
- return priv;
- }
+ if (priv)
+ goto done;
priv = stub_priv_pop_from_listhead(&sdev->priv_tx);
- if (priv) {
- spin_unlock_irqrestore(&sdev->priv_lock, flags);
- return priv;
- }
+ if (priv)
+ goto done;
priv = stub_priv_pop_from_listhead(&sdev->priv_free);
- if (priv) {
- spin_unlock_irqrestore(&sdev->priv_lock, flags);
- return priv;
- }
+done:
spin_unlock_irqrestore(&sdev->priv_lock, flags);
- return NULL;
+
+ return priv;
}
void stub_device_cleanup_urbs(struct stub_device *sdev)
{
struct stub_priv *priv;
+ struct urb *urb;
dev_dbg(&sdev->udev->dev, "free sdev %p\n", sdev);
while ((priv = stub_priv_pop(sdev))) {
- struct urb *urb = priv->urb;
-
+ urb = priv->urb;
dev_dbg(&sdev->udev->dev, "free urb %p\n", urb);
usb_kill_urb(urb);
@@ -251,51 +237,46 @@ void stub_device_cleanup_urbs(struct stub_device *sdev)
kfree(urb->transfer_buffer);
kfree(urb->setup_packet);
-
usb_free_urb(urb);
}
}
-static int __init usb_stub_init(void)
+static int __init usbip_host_init(void)
{
int ret;
- stub_priv_cache = kmem_cache_create("stub_priv",
- sizeof(struct stub_priv), 0,
- SLAB_HWCACHE_ALIGN, NULL);
+ stub_priv_cache = KMEM_CACHE(stub_priv, SLAB_HWCACHE_ALIGN);
if (!stub_priv_cache) {
- pr_err("create stub_priv_cache error\n");
+ pr_err("kmem_cache_create failed\n");
return -ENOMEM;
}
ret = usb_register(&stub_driver);
- if (ret) {
+ if (ret < 0) {
pr_err("usb_register failed %d\n", ret);
- goto error_usb_register;
+ goto err_usb_register;
}
- pr_info(DRIVER_DESC " " USBIP_VERSION "\n");
-
- init_busid_table();
-
ret = driver_create_file(&stub_driver.drvwrap.driver,
&driver_attr_match_busid);
-
- if (ret) {
- pr_err("create driver sysfs\n");
- goto error_create_file;
+ if (ret < 0) {
+ pr_err("driver_create_file failed\n");
+ goto err_create_file;
}
+ init_busid_table();
+ pr_info(DRIVER_DESC " v" USBIP_VERSION "\n");
return ret;
-error_create_file:
+
+err_create_file:
usb_deregister(&stub_driver);
-error_usb_register:
+err_usb_register:
kmem_cache_destroy(stub_priv_cache);
return ret;
}
-static void __exit usb_stub_exit(void)
+static void __exit usbip_host_exit(void)
{
driver_remove_file(&stub_driver.drvwrap.driver,
&driver_attr_match_busid);
@@ -309,8 +290,8 @@ static void __exit usb_stub_exit(void)
kmem_cache_destroy(stub_priv_cache);
}
-module_init(usb_stub_init);
-module_exit(usb_stub_exit);
+module_init(usbip_host_init);
+module_exit(usbip_host_exit);
MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
diff --git a/drivers/staging/usbip/stub_rx.c b/drivers/staging/usbip/stub_rx.c
index bc57844600b96..538fb9ee341a6 100644
--- a/drivers/staging/usbip/stub_rx.c
+++ b/drivers/staging/usbip/stub_rx.c
@@ -306,18 +306,18 @@ static int stub_recv_cmd_unlink(struct stub_device *sdev,
static int valid_request(struct stub_device *sdev, struct usbip_header *pdu)
{
struct usbip_device *ud = &sdev->ud;
+ int valid = 0;
if (pdu->base.devid == sdev->devid) {
spin_lock(&ud->lock);
if (ud->status == SDEV_ST_USED) {
/* A request is valid. */
- spin_unlock(&ud->lock);
- return 1;
+ valid = 1;
}
spin_unlock(&ud->lock);
}
- return 0;
+ return valid;
}
static struct stub_priv *stub_priv_alloc(struct stub_device *sdev,
diff --git a/drivers/staging/usbip/stub_tx.c b/drivers/staging/usbip/stub_tx.c
index fda2bc95e8598..1cbae44ba0dcf 100644
--- a/drivers/staging/usbip/stub_tx.c
+++ b/drivers/staging/usbip/stub_tx.c
@@ -97,13 +97,12 @@ void stub_complete(struct urb *urb)
/* link a urb to the queue of tx. */
spin_lock_irqsave(&sdev->priv_lock, flags);
-
if (priv->unlinking) {
stub_enqueue_ret_unlink(sdev, priv->seqnum, urb->status);
stub_free_priv_and_urb(priv);
- } else
+ } else {
list_move_tail(&priv->list, &sdev->priv_tx);
-
+ }
spin_unlock_irqrestore(&sdev->priv_lock, flags);
/* wake up tx_thread */
@@ -113,10 +112,10 @@ void stub_complete(struct urb *urb)
static inline void setup_base_pdu(struct usbip_header_basic *base,
__u32 command, __u32 seqnum)
{
- base->command = command;
- base->seqnum = seqnum;
- base->devid = 0;
- base->ep = 0;
+ base->command = command;
+ base->seqnum = seqnum;
+ base->devid = 0;
+ base->ep = 0;
base->direction = 0;
}
diff --git a/drivers/staging/usbip/usbip_common.c b/drivers/staging/usbip/usbip_common.c
index 433a3b6207d65..f4b53d103c54e 100644
--- a/drivers/staging/usbip/usbip_common.c
+++ b/drivers/staging/usbip/usbip_common.c
@@ -63,9 +63,9 @@ static void usbip_dump_buffer(char *buff, int bufflen)
static void usbip_dump_pipe(unsigned int p)
{
unsigned char type = usb_pipetype(p);
- unsigned char ep = usb_pipeendpoint(p);
- unsigned char dev = usb_pipedevice(p);
- unsigned char dir = usb_pipein(p);
+ unsigned char ep = usb_pipeendpoint(p);
+ unsigned char dev = usb_pipedevice(p);
+ unsigned char dir = usb_pipein(p);
pr_debug("dev(%d) ep(%d) [%s] ", dev, ep, dir ? "IN" : "OUT");
@@ -204,7 +204,7 @@ static void usbip_dump_usb_ctrlrequest(struct usb_ctrlrequest *cmd)
pr_debug("CLEAR_FEAT\n");
break;
case USB_REQ_SET_FEATURE:
- pr_debug("SET_FEAT \n");
+ pr_debug("SET_FEAT\n");
break;
case USB_REQ_SET_ADDRESS:
pr_debug("SET_ADDRRS\n");
@@ -231,14 +231,14 @@ static void usbip_dump_usb_ctrlrequest(struct usb_ctrlrequest *cmd)
pr_debug("SYNC_FRAME\n");
break;
default:
- pr_debug("REQ(%02X) \n", cmd->bRequest);
+ pr_debug("REQ(%02X)\n", cmd->bRequest);
break;
}
usbip_dump_request_type(cmd->bRequestType);
} else if ((cmd->bRequestType & USB_TYPE_MASK) == USB_TYPE_CLASS) {
- pr_debug("CLASS \n");
+ pr_debug("CLASS\n");
} else if ((cmd->bRequestType & USB_TYPE_MASK) == USB_TYPE_VENDOR) {
- pr_debug("VENDOR \n");
+ pr_debug("VENDOR\n");
} else if ((cmd->bRequestType & USB_TYPE_MASK) == USB_TYPE_RESERVED) {
pr_debug("RESERVED\n");
}
@@ -334,8 +334,8 @@ void usbip_dump_header(struct usbip_header *pdu)
EXPORT_SYMBOL_GPL(usbip_dump_header);
/* Send/receive messages over TCP/IP. I refer drivers/block/nbd.c */
-int usbip_xmit(int send, struct socket *sock, char *buf,
- int size, int msg_flags)
+int usbip_xmit(int send, struct socket *sock, char *buf, int size,
+ int msg_flags)
{
int result;
struct msghdr msg;
@@ -627,9 +627,8 @@ void usbip_header_correct_endian(struct usbip_header *pdu, int send)
}
EXPORT_SYMBOL_GPL(usbip_header_correct_endian);
-static void usbip_iso_pakcet_correct_endian(
- struct usbip_iso_packet_descriptor *iso,
- int send)
+static void usbip_iso_packet_correct_endian(
+ struct usbip_iso_packet_descriptor *iso, int send)
{
/* does not need all members. but copy all simply. */
if (send) {
@@ -678,7 +677,7 @@ void *usbip_alloc_iso_desc_pdu(struct urb *urb, ssize_t *bufflen)
iso = buff + (i * sizeof(*iso));
usbip_pack_iso(iso, &urb->iso_frame_desc[i], 1);
- usbip_iso_pakcet_correct_endian(iso, 1);
+ usbip_iso_packet_correct_endian(iso, 1);
}
*bufflen = size;
@@ -729,7 +728,7 @@ int usbip_recv_iso(struct usbip_device *ud, struct urb *urb)
for (i = 0; i < np; i++) {
iso = buff + (i * sizeof(*iso));
- usbip_iso_pakcet_correct_endian(iso, 0);
+ usbip_iso_packet_correct_endian(iso, 0);
usbip_pack_iso(iso, &urb->iso_frame_desc[i], 0);
total_length += urb->iso_frame_desc[i].actual_length;
}
@@ -839,19 +838,19 @@ int usbip_recv_xbuff(struct usbip_device *ud, struct urb *urb)
}
EXPORT_SYMBOL_GPL(usbip_recv_xbuff);
-static int __init usbip_common_init(void)
+static int __init usbip_core_init(void)
{
pr_info(DRIVER_DESC " v" USBIP_VERSION "\n");
return 0;
}
-static void __exit usbip_common_exit(void)
+static void __exit usbip_core_exit(void)
{
return;
}
-module_init(usbip_common_init);
-module_exit(usbip_common_exit);
+module_init(usbip_core_init);
+module_exit(usbip_core_exit);
MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
diff --git a/drivers/staging/usbip/usbip_common.h b/drivers/staging/usbip/usbip_common.h
index 4a641c552b78c..074ac4267d3b5 100644
--- a/drivers/staging/usbip/usbip_common.h
+++ b/drivers/staging/usbip/usbip_common.h
@@ -65,7 +65,7 @@ enum {
#define usbip_dbg_flag_vhci_tx (usbip_debug_flag & usbip_debug_vhci_tx)
#define usbip_dbg_flag_stub_rx (usbip_debug_flag & usbip_debug_stub_rx)
#define usbip_dbg_flag_stub_tx (usbip_debug_flag & usbip_debug_stub_tx)
-#define usbip_dbg_flag_vhci_sysfs (usbip_debug_flag & usbip_debug_vhci_sysfs)
+#define usbip_dbg_flag_vhci_sysfs (usbip_debug_flag & usbip_debug_vhci_sysfs)
extern unsigned long usbip_debug_flag;
extern struct device_attribute dev_attr_usbip_debug;
@@ -104,111 +104,110 @@ extern struct device_attribute dev_attr_usbip_debug;
usbip_dbg_with_flag(usbip_debug_stub_tx, fmt , ##args)
/*
- * USB/IP request headers.
- * Currently, we define 4 request types:
+ * USB/IP request headers
*
- * - CMD_SUBMIT transfers a USB request, corresponding to usb_submit_urb().
- * (client to server)
- * - RET_RETURN transfers the result of CMD_SUBMIT.
- * (server to client)
- * - CMD_UNLINK transfers an unlink request of a pending USB request.
+ * Each request is transferred across the network to its counterpart, which
+ * facilitates the normal USB communication. The values contained in the headers
+ * are basically the same as in a URB. Currently, four request types are
+ * defined:
+ *
+ * - USBIP_CMD_SUBMIT: a USB request block, corresponds to usb_submit_urb()
* (client to server)
- * - RET_UNLINK transfers the result of CMD_UNLINK.
+ *
+ * - USBIP_RET_SUBMIT: the result of USBIP_CMD_SUBMIT
* (server to client)
*
- * Note: The below request formats are based on the USB subsystem of Linux. Its
- * details will be defined when other implementations come.
+ * - USBIP_CMD_UNLINK: an unlink request of a pending USBIP_CMD_SUBMIT,
+ * corresponds to usb_unlink_urb()
+ * (client to server)
*
+ * - USBIP_RET_UNLINK: the result of USBIP_CMD_UNLINK
+ * (server to client)
*
*/
+#define USBIP_CMD_SUBMIT 0x0001
+#define USBIP_RET_SUBMIT 0x0002
+#define USBIP_CMD_UNLINK 0x0003
+#define USBIP_RET_UNLINK 0x0004
-/*
- * A basic header followed by other additional headers.
+#define USBIP_DIR_IN 0x00
+#define USBIP_DIR_OUT 0x01
+
+/**
+ * struct usbip_header_basic - data pertinent to every request
+ * @command: the usbip request type
+ * @seqnum: sequential number that identifies requests; incremented per
+ * connection
+ * @devid: specifies a remote USB device uniquely instead of busnum and devnum;
+ * in the stub driver, this value is ((busnum << 16) | devnum)
+ * @direction: direction of the transfer
+ * @ep: endpoint number
*/
struct usbip_header_basic {
-#define USBIP_CMD_SUBMIT 0x0001
-#define USBIP_CMD_UNLINK 0x0002
-#define USBIP_RET_SUBMIT 0x0003
-#define USBIP_RET_UNLINK 0x0004
__u32 command;
-
- /* sequential number which identifies requests.
- * incremented per connections */
__u32 seqnum;
-
- /* devid is used to specify a remote USB device uniquely instead
- * of busnum and devnum in Linux. In the case of Linux stub_driver,
- * this value is ((busnum << 16) | devnum) */
__u32 devid;
-
-#define USBIP_DIR_OUT 0
-#define USBIP_DIR_IN 1
__u32 direction;
- __u32 ep; /* endpoint number */
+ __u32 ep;
} __packed;
-/*
- * An additional header for a CMD_SUBMIT packet.
+/**
+ * struct usbip_header_cmd_submit - USBIP_CMD_SUBMIT packet header
+ * @transfer_flags: URB flags
+ * @transfer_buffer_length: the data size for (in) or (out) transfer
+ * @start_frame: initial frame for isochronous or interrupt transfers
+ * @number_of_packets: number of isochronous packets
+ * @interval: maximum time for the request on the server-side host controller
+ * @setup: setup data for a control request
*/
struct usbip_header_cmd_submit {
- /* these values are basically the same as in a URB. */
-
- /* the same in a URB. */
__u32 transfer_flags;
-
- /* set the following data size (out),
- * or expected reading data size (in) */
__s32 transfer_buffer_length;
/* it is difficult for usbip to sync frames (reserved only?) */
__s32 start_frame;
-
- /* the number of iso descriptors that follows this header */
__s32 number_of_packets;
-
- /* the maximum time within which this request works in a host
- * controller of a server side */
__s32 interval;
- /* set setup packet data for a CTRL request */
unsigned char setup[8];
} __packed;
-/*
- * An additional header for a RET_SUBMIT packet.
+/**
+ * struct usbip_header_ret_submit - USBIP_RET_SUBMIT packet header
+ * @status: return status of a non-iso request
+ * @actual_length: number of bytes transferred
+ * @start_frame: initial frame for isochronous or interrupt transfers
+ * @number_of_packets: number of isochronous packets
+ * @error_count: number of errors for isochronous transfers
*/
struct usbip_header_ret_submit {
__s32 status;
- __s32 actual_length; /* returned data length */
- __s32 start_frame; /* ISO and INT */
- __s32 number_of_packets; /* ISO only */
- __s32 error_count; /* ISO only */
+ __s32 actual_length;
+ __s32 start_frame;
+ __s32 number_of_packets;
+ __s32 error_count;
} __packed;
-/*
- * An additional header for a CMD_UNLINK packet.
+/**
+ * struct usbip_header_cmd_unlink - USBIP_CMD_UNLINK packet header
+ * @seqnum: the URB seqnum to unlink
*/
struct usbip_header_cmd_unlink {
- __u32 seqnum; /* URB's seqnum that will be unlinked */
+ __u32 seqnum;
} __packed;
-/*
- * An additional header for a RET_UNLINK packet.
+/**
+ * struct usbip_header_ret_unlink - USBIP_RET_UNLINK packet header
+ * @status: return status of the request
*/
struct usbip_header_ret_unlink {
__s32 status;
} __packed;
-/* the same as usb_iso_packet_descriptor but packed for pdu */
-struct usbip_iso_packet_descriptor {
- __u32 offset;
- __u32 length; /* expected length */
- __u32 actual_length;
- __u32 status;
-} __packed;
-
-/*
- * All usbip packets use a common header to keep code simple.
+/**
+ * struct usbip_header - common header for all usbip packets
+ * @base: the basic header
+ * @u: packet type dependent header
*/
struct usbip_header {
struct usbip_header_basic base;
@@ -221,40 +220,15 @@ struct usbip_header {
} u;
} __packed;
-int usbip_xmit(int, struct socket *, char *, int, int);
-int usbip_sendmsg(struct socket *, struct msghdr *, int);
-
-static inline int interface_to_busnum(struct usb_interface *interface)
-{
- struct usb_device *udev = interface_to_usbdev(interface);
- return udev->bus->busnum;
-}
-
-static inline int interface_to_devnum(struct usb_interface *interface)
-{
- struct usb_device *udev = interface_to_usbdev(interface);
- return udev->devnum;
-}
-
-static inline int interface_to_infnum(struct usb_interface *interface)
-{
- return interface->cur_altsetting->desc.bInterfaceNumber;
-}
-
-#if 0
-int setnodelay(struct socket *);
-int setquickack(struct socket *);
-int setkeepalive(struct socket *socket);
-void setreuse(struct socket *);
-#endif
-
-struct socket *sockfd_to_socket(unsigned int);
-int set_sockaddr(struct socket *socket, struct sockaddr_storage *ss);
-
-void usbip_dump_urb(struct urb *purb);
-void usbip_dump_header(struct usbip_header *pdu);
-
-struct usbip_device;
+/*
+ * This is the same as usb_iso_packet_descriptor but packed for pdu.
+ */
+struct usbip_iso_packet_descriptor {
+ __u32 offset;
+ __u32 length; /* expected length */
+ __u32 actual_length;
+ __u32 status;
+} __packed;
enum usbip_side {
USBIP_VHCI,
@@ -277,20 +251,7 @@ enum usbip_status {
VDEV_ST_ERROR
};
-/* a common structure for stub_device and vhci_device */
-struct usbip_device {
- enum usbip_side side;
- enum usbip_status status;
-
- /* lock for status */
- spinlock_t lock;
-
- struct socket *tcp_socket;
-
- struct task_struct *tcp_rx;
- struct task_struct *tcp_tx;
-
- /* event handler */
+/* event handler */
#define USBIP_EH_SHUTDOWN (1 << 0)
#define USBIP_EH_BYE (1 << 1)
#define USBIP_EH_RESET (1 << 2)
@@ -307,6 +268,19 @@ struct usbip_device {
#define VDEV_EVENT_ERROR_TCP (USBIP_EH_SHUTDOWN | USBIP_EH_RESET)
#define VDEV_EVENT_ERROR_MALLOC (USBIP_EH_SHUTDOWN | USBIP_EH_UNUSABLE)
+/* a common structure for stub_device and vhci_device */
+struct usbip_device {
+ enum usbip_side side;
+ enum usbip_status status;
+
+ /* lock for status */
+ spinlock_t lock;
+
+ struct socket *tcp_socket;
+
+ struct task_struct *tcp_rx;
+ struct task_struct *tcp_tx;
+
unsigned long event;
struct task_struct *eh;
wait_queue_head_t eh_waitq;
@@ -318,17 +292,32 @@ struct usbip_device {
} eh_ops;
};
+#if 0
+int usbip_sendmsg(struct socket *, struct msghdr *, int);
+int set_sockaddr(struct socket *socket, struct sockaddr_storage *ss);
+int setnodelay(struct socket *);
+int setquickack(struct socket *);
+int setkeepalive(struct socket *socket);
+void setreuse(struct socket *);
+#endif
+
+/* usbip_common.c */
+void usbip_dump_urb(struct urb *purb);
+void usbip_dump_header(struct usbip_header *pdu);
+
+int usbip_xmit(int send, struct socket *sock, char *buf, int size,
+ int msg_flags);
+struct socket *sockfd_to_socket(unsigned int sockfd);
+
void usbip_pack_pdu(struct usbip_header *pdu, struct urb *urb, int cmd,
int pack);
-
void usbip_header_correct_endian(struct usbip_header *pdu, int send);
-/* some members of urb must be substituted before. */
-int usbip_recv_xbuff(struct usbip_device *ud, struct urb *urb);
+
+void *usbip_alloc_iso_desc_pdu(struct urb *urb, ssize_t *bufflen);
/* some members of urb must be substituted before. */
int usbip_recv_iso(struct usbip_device *ud, struct urb *urb);
-/* some members of urb must be substituted before. */
int usbip_pad_iso(struct usbip_device *ud, struct urb *urb);
-void *usbip_alloc_iso_desc_pdu(struct urb *urb, ssize_t *bufflen);
+int usbip_recv_xbuff(struct usbip_device *ud, struct urb *urb);
/* usbip_event.c */
int usbip_start_eh(struct usbip_device *ud);
@@ -336,4 +325,21 @@ void usbip_stop_eh(struct usbip_device *ud);
void usbip_event_add(struct usbip_device *ud, unsigned long event);
int usbip_event_happened(struct usbip_device *ud);
+static inline int interface_to_busnum(struct usb_interface *interface)
+{
+ struct usb_device *udev = interface_to_usbdev(interface);
+ return udev->bus->busnum;
+}
+
+static inline int interface_to_devnum(struct usb_interface *interface)
+{
+ struct usb_device *udev = interface_to_usbdev(interface);
+ return udev->devnum;
+}
+
+static inline int interface_to_infnum(struct usb_interface *interface)
+{
+ return interface->cur_altsetting->desc.bInterfaceNumber;
+}
+
#endif /* __USBIP_COMMON_H */
diff --git a/drivers/staging/usbip/userspace/configure.ac b/drivers/staging/usbip/userspace/configure.ac
index e3afa159116a6..06fb95d083cf6 100644
--- a/drivers/staging/usbip/userspace/configure.ac
+++ b/drivers/staging/usbip/userspace/configure.ac
@@ -1,8 +1,8 @@
dnl Process this file with autoconf to produce a configure script.
AC_PREREQ(2.59)
-AC_INIT([usbip], [0.1.8], [usbip-devel@lists.sourceforge.net])
-AC_DEFINE([USBIP_VERSION], [0x000106], [numeric version number])
+AC_INIT([usbip], [1.0.0], [usbip-devel@lists.sourceforge.net])
+AC_DEFINE([USBIP_VERSION], [0x00000100], [binary-coded decimal version number])
CURRENT=0
REVISION=1
@@ -29,7 +29,7 @@ AC_PROG_MAKE_SET
AC_HEADER_DIRENT
AC_HEADER_STDC
AC_CHECK_HEADERS([arpa/inet.h fcntl.h netdb.h netinet/in.h stdint.h stdlib.h dnl
- string.h strings.h sys/socket.h syslog.h unistd.h])
+ string.h sys/socket.h syslog.h unistd.h])
# Checks for typedefs, structures, and compiler characteristics.
AC_TYPE_INT32_T
@@ -41,7 +41,7 @@ AC_TYPE_UINT8_T
# Checks for library functions.
AC_FUNC_REALLOC
-AC_CHECK_FUNCS([bzero memset mkdir regcomp socket strchr strerror strstr dnl
+AC_CHECK_FUNCS([memset mkdir regcomp socket strchr strerror strstr dnl
strtoul])
AC_CHECK_HEADER([sysfs/libsysfs.h],
diff --git a/drivers/staging/usbip/userspace/libsrc/stub_driver.c b/drivers/staging/usbip/userspace/libsrc/stub_driver.c
index cc3364345f5fb..4d4d17122ce95 100644
--- a/drivers/staging/usbip/userspace/libsrc/stub_driver.c
+++ b/drivers/staging/usbip/userspace/libsrc/stub_driver.c
@@ -8,10 +8,6 @@
#include "usbip.h"
-/* kernel module name */
-static const char *usbip_stub_driver_name = "usbip-host";
-
-
struct usbip_stub_driver *stub_driver;
static struct sysfs_driver *open_sysfs_stub_driver(void)
@@ -31,11 +27,12 @@ static struct sysfs_driver *open_sysfs_stub_driver(void)
snprintf(stub_driver_path, SYSFS_PATH_MAX, "%s/%s/usb/%s/%s",
sysfs_mntpath, SYSFS_BUS_NAME, SYSFS_DRIVERS_NAME,
- usbip_stub_driver_name);
+ USBIP_HOST_DRV_NAME);
stub_driver = sysfs_open_driver_path(stub_driver_path);
if (!stub_driver) {
- err("usbip-core.ko and usbip-host.ko must be loaded");
+ err(USBIP_CORE_MOD_NAME ".ko and " USBIP_HOST_DRV_NAME
+ ".ko must be loaded");
return NULL;
}
@@ -46,7 +43,7 @@ static struct sysfs_driver *open_sysfs_stub_driver(void)
#define SYSFS_OPEN_RETRIES 100
/* only the first interface value is true! */
-static int32_t read_attr_usbip_status(struct usb_device *udev)
+static int32_t read_attr_usbip_status(struct usbip_usb_device *udev)
{
char attrpath[SYSFS_PATH_MAX];
struct sysfs_attribute *attr;
@@ -148,7 +145,8 @@ static struct usbip_exported_device *usbip_exported_device_new(char *sdevpath)
goto err;
/* reallocate buffer to include usb interface data */
- size_t size = sizeof(*edev) + edev->udev.bNumInterfaces * sizeof(struct usb_interface);
+ size_t size = sizeof(*edev) + edev->udev.bNumInterfaces *
+ sizeof(struct usbip_usb_interface);
edev = (struct usbip_exported_device *) realloc(edev, size);
if (!edev) {
err("alloc device");
@@ -200,7 +198,8 @@ static int refresh_exported_devices(void)
suinf_list = sysfs_get_driver_devices(stub_driver->sysfs_driver);
if (!suinf_list) {
- printf("Bind usbip-host.ko to a usb device to be exportable!\n");
+ info("bind " USBIP_HOST_DRV_NAME ".ko to a usb device to be "
+ "exportable!\n");
goto bye;
}
diff --git a/drivers/staging/usbip/userspace/libsrc/stub_driver.h b/drivers/staging/usbip/userspace/libsrc/stub_driver.h
index 3107d18de65af..332ebc5b3da35 100644
--- a/drivers/staging/usbip/userspace/libsrc/stub_driver.h
+++ b/drivers/staging/usbip/userspace/libsrc/stub_driver.h
@@ -19,8 +19,8 @@ struct usbip_exported_device {
struct sysfs_device *sudev;
int32_t status;
- struct usb_device udev;
- struct usb_interface uinf[];
+ struct usbip_usb_device udev;
+ struct usbip_usb_interface uinf[];
};
diff --git a/drivers/staging/usbip/userspace/libsrc/usbip_common.c b/drivers/staging/usbip/userspace/libsrc/usbip_common.c
index a128a924b27e0..e9d06143141c5 100644
--- a/drivers/staging/usbip/userspace/libsrc/usbip_common.c
+++ b/drivers/staging/usbip/userspace/libsrc/usbip_common.c
@@ -64,7 +64,7 @@ const char *usbip_speed_string(int num)
#define DBG_UINF_INTEGER(name)\
dbg("%-20s = %x", to_string(name), (int) uinf->name)
-void dump_usb_interface(struct usb_interface *uinf)
+void dump_usb_interface(struct usbip_usb_interface *uinf)
{
char buff[100];
usbip_names_get_class(buff, sizeof(buff),
@@ -74,7 +74,7 @@ void dump_usb_interface(struct usb_interface *uinf)
dbg("%-20s = %s", "Interface(C/SC/P)", buff);
}
-void dump_usb_device(struct usb_device *udev)
+void dump_usb_device(struct usbip_usb_device *udev)
{
char buff[100];
@@ -181,7 +181,7 @@ err:
do { (object)->name = (type) read_attr_value(dev, to_string(name), format); } while (0)
-int read_usb_device(struct sysfs_device *sdev, struct usb_device *udev)
+int read_usb_device(struct sysfs_device *sdev, struct usbip_usb_device *udev)
{
uint32_t busnum, devnum;
@@ -209,7 +209,8 @@ int read_usb_device(struct sysfs_device *sdev, struct usb_device *udev)
return 0;
}
-int read_usb_interface(struct usb_device *udev, int i, struct usb_interface *uinf)
+int read_usb_interface(struct usbip_usb_device *udev, int i,
+ struct usbip_usb_interface *uinf)
{
char busid[SYSFS_BUS_ID_SIZE];
struct sysfs_device *sif;
diff --git a/drivers/staging/usbip/userspace/libsrc/usbip_common.h b/drivers/staging/usbip/userspace/libsrc/usbip_common.h
index c254b5481f7cf..32b27ed1c8b89 100644
--- a/drivers/staging/usbip/userspace/libsrc/usbip_common.h
+++ b/drivers/staging/usbip/userspace/libsrc/usbip_common.h
@@ -12,7 +12,6 @@
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
-#include <strings.h>
#include <sysfs/libsysfs.h>
#include <netdb.h>
@@ -26,7 +25,11 @@
#define VHCI_STATE_PATH "/var/run/vhci_hcd"
#endif
-//#include <linux/usb_ch9.h>
+/* kernel module names */
+#define USBIP_CORE_MOD_NAME "usbip-core"
+#define USBIP_HOST_DRV_NAME "usbip-host"
+#define USBIP_VHCI_DRV_NAME "vhci_hcd"
+
enum usb_device_speed {
USB_SPEED_UNKNOWN = 0, /* enumerating */
USB_SPEED_LOW, USB_SPEED_FULL, /* usb 1.1 */
@@ -101,7 +104,7 @@ extern int usbip_use_debug ;
#define BUG() do { err("sorry, it's a bug"); abort(); } while (0)
-struct usb_interface {
+struct usbip_usb_interface {
uint8_t bInterfaceClass;
uint8_t bInterfaceSubClass;
uint8_t bInterfaceProtocol;
@@ -110,7 +113,7 @@ struct usb_interface {
-struct usb_device {
+struct usbip_usb_device {
char path[SYSFS_PATH_MAX];
char busid[SYSFS_BUS_ID_SIZE];
@@ -132,11 +135,12 @@ struct usb_device {
#define to_string(s) #s
-void dump_usb_interface(struct usb_interface *);
-void dump_usb_device(struct usb_device *);
-int read_usb_device(struct sysfs_device *sdev, struct usb_device *udev);
+void dump_usb_interface(struct usbip_usb_interface *);
+void dump_usb_device(struct usbip_usb_device *);
+int read_usb_device(struct sysfs_device *sdev, struct usbip_usb_device *udev);
int read_attr_value(struct sysfs_device *dev, const char *name, const char *format);
-int read_usb_interface(struct usb_device *udev, int i, struct usb_interface *uinf);
+int read_usb_interface(struct usbip_usb_device *udev, int i,
+ struct usbip_usb_interface *uinf);
const char *usbip_speed_string(int num);
const char *usbip_status_string(int32_t status);
diff --git a/drivers/staging/usbip/userspace/libsrc/vhci_driver.c b/drivers/staging/usbip/userspace/libsrc/vhci_driver.c
index db43f8d2eb804..386f63b456f5a 100644
--- a/drivers/staging/usbip/userspace/libsrc/vhci_driver.c
+++ b/drivers/staging/usbip/userspace/libsrc/vhci_driver.c
@@ -5,9 +5,6 @@
#include "usbip.h"
-
-static const char vhci_driver_name[] = "vhci_hcd";
-
struct usbip_vhci_driver *vhci_driver;
static struct usbip_imported_device *imported_device_init(struct usbip_imported_device *idev, char *busid)
@@ -23,10 +20,12 @@ static struct usbip_imported_device *imported_device_init(struct usbip_imported_
sysfs_close_device(sudev);
/* add class devices of this imported device */
- struct class_device *cdev;
- dlist_for_each_data(vhci_driver->cdev_list, cdev, struct class_device) {
- if (!strncmp(cdev->devpath, idev->udev.path, strlen(idev->udev.path))) {
- struct class_device *new_cdev;
+ struct usbip_class_device *cdev;
+ dlist_for_each_data(vhci_driver->cdev_list, cdev,
+ struct usbip_class_device) {
+ if (!strncmp(cdev->dev_path, idev->udev.path,
+ strlen(idev->udev.path))) {
+ struct usbip_class_device *new_cdev;
/* alloc and copy because dlist is linked from only one list */
new_cdev = calloc(1, sizeof(*new_cdev));
@@ -53,7 +52,7 @@ static int parse_status(char *value)
for (int i = 0; i < vhci_driver->nports; i++)
- bzero(&vhci_driver->idev[i], sizeof(struct usbip_imported_device));
+ memset(&vhci_driver->idev[i], 0, sizeof(vhci_driver->idev[i]));
/* skip a header line */
@@ -90,7 +89,7 @@ static int parse_status(char *value)
idev->busnum = (devid >> 16);
idev->devnum = (devid & 0x0000ffff);
- idev->cdev_list = dlist_new(sizeof(struct class_device));
+ idev->cdev_list = dlist_new(sizeof(struct usbip_class_device));
if (!idev->cdev_list) {
err("init new device");
return -1;
@@ -118,29 +117,29 @@ static int parse_status(char *value)
static int check_usbip_device(struct sysfs_class_device *cdev)
{
- char clspath[SYSFS_PATH_MAX]; /* /sys/class/video4linux/video0/device */
- char devpath[SYSFS_PATH_MAX]; /* /sys/devices/platform/vhci_hcd/usb6/6-1:1.1 */
-
+ char class_path[SYSFS_PATH_MAX]; /* /sys/class/video4linux/video0/device */
+ char dev_path[SYSFS_PATH_MAX]; /* /sys/devices/platform/vhci_hcd/usb6/6-1:1.1 */
int ret;
+ struct usbip_class_device *usbip_cdev;
- snprintf(clspath, sizeof(clspath), "%s/device", cdev->path);
+ snprintf(class_path, sizeof(class_path), "%s/device", cdev->path);
- ret = sysfs_get_link(clspath, devpath, SYSFS_PATH_MAX);
- if (!ret) {
- if (!strncmp(devpath, vhci_driver->hc_device->path,
- strlen(vhci_driver->hc_device->path))) {
+ ret = sysfs_get_link(class_path, dev_path, sizeof(dev_path));
+ if (ret == 0) {
+ if (!strncmp(dev_path, vhci_driver->hc_device->path,
+ strlen(vhci_driver->hc_device->path))) {
/* found usbip device */
- struct class_device *cdev;
-
- cdev = calloc(1, sizeof(*cdev));
+ usbip_cdev = calloc(1, sizeof(*usbip_cdev));
if (!cdev) {
- err("calloc cdev");
+ err("calloc usbip_cdev");
return -1;
}
- dlist_unshift(vhci_driver->cdev_list, (void*) cdev);
- strncpy(cdev->clspath, clspath, sizeof(cdev->clspath));
- strncpy(cdev->devpath, devpath, sizeof(cdev->clspath));
- dbg(" found %s %s", clspath, devpath);
+ dlist_unshift(vhci_driver->cdev_list, usbip_cdev);
+ strncpy(usbip_cdev->class_path, class_path,
+ sizeof(usbip_cdev->class_path));
+ strncpy(usbip_cdev->dev_path, dev_path,
+ sizeof(usbip_cdev->dev_path));
+ dbg(" found %s %s", class_path, dev_path);
}
}
@@ -187,9 +186,20 @@ static int refresh_class_device_list(void)
int ret;
struct dlist *cname_list;
char *cname;
+ char sysfs_mntpath[SYSFS_PATH_MAX];
+ char class_path[SYSFS_PATH_MAX];
+
+ ret = sysfs_get_mnt_path(sysfs_mntpath, SYSFS_PATH_MAX);
+ if (ret < 0) {
+ err("sysfs must be mounted");
+ return -1;
+ }
+
+ snprintf(class_path, sizeof(class_path), "%s/%s", sysfs_mntpath,
+ SYSFS_CLASS_NAME);
/* search under /sys/class */
- cname_list = sysfs_open_directory_list("/sys/class");
+ cname_list = sysfs_open_directory_list(class_path);
if (!cname_list) {
err("open class directory");
return -1;
@@ -275,14 +285,15 @@ static int get_hc_busid(char *sysfs_mntpath, char *hc_busid)
int found = 0;
- snprintf(sdriver_path, SYSFS_PATH_MAX, "%s/%s/platform/%s/%s",
- sysfs_mntpath, SYSFS_BUS_NAME, SYSFS_DRIVERS_NAME,
- vhci_driver_name);
+ snprintf(sdriver_path, SYSFS_PATH_MAX, "%s/%s/%s/%s/%s", sysfs_mntpath,
+ SYSFS_BUS_NAME, USBIP_VHCI_BUS_TYPE, SYSFS_DRIVERS_NAME,
+ USBIP_VHCI_DRV_NAME);
sdriver = sysfs_open_driver_path(sdriver_path);
if (!sdriver) {
info("%s is not found", sdriver_path);
- info("load usbip-core.ko and vhci-hcd.ko !");
+ info("please load " USBIP_CORE_MOD_NAME ".ko and "
+ USBIP_VHCI_DRV_NAME ".ko!");
return -1;
}
@@ -333,7 +344,8 @@ int usbip_vhci_driver_open(void)
goto err;
/* will be freed in usbip_driver_close() */
- vhci_driver->hc_device = sysfs_open_device("platform", hc_busid);
+ vhci_driver->hc_device = sysfs_open_device(USBIP_VHCI_BUS_TYPE,
+ hc_busid);
if (!vhci_driver->hc_device) {
err("get sysfs vhci_driver");
goto err;
@@ -343,7 +355,7 @@ int usbip_vhci_driver_open(void)
info("%d ports available\n", vhci_driver->nports);
- vhci_driver->cdev_list = dlist_new(sizeof(struct class_device));
+ vhci_driver->cdev_list = dlist_new(sizeof(struct usbip_class_device));
if (!vhci_driver->cdev_list)
goto err;
@@ -402,7 +414,7 @@ int usbip_vhci_refresh_device_list(void)
dlist_destroy(vhci_driver->idev[i].cdev_list);
}
- vhci_driver->cdev_list = dlist_new(sizeof(struct class_device));
+ vhci_driver->cdev_list = dlist_new(sizeof(struct usbip_class_device));
if (!vhci_driver->cdev_list)
goto err;
diff --git a/drivers/staging/usbip/userspace/libsrc/vhci_driver.h b/drivers/staging/usbip/userspace/libsrc/vhci_driver.h
index cad8ad7586d93..a2f7db19cbc61 100644
--- a/drivers/staging/usbip/userspace/libsrc/vhci_driver.h
+++ b/drivers/staging/usbip/userspace/libsrc/vhci_driver.h
@@ -7,13 +7,13 @@
#include "usbip.h"
-
+#define USBIP_VHCI_BUS_TYPE "platform"
#define MAXNPORT 128
-struct class_device {
- char clspath[SYSFS_PATH_MAX];
- char devpath[SYSFS_PATH_MAX];
+struct usbip_class_device {
+ char class_path[SYSFS_PATH_MAX];
+ char dev_path[SYSFS_PATH_MAX];
};
struct usbip_imported_device {
@@ -25,16 +25,19 @@ struct usbip_imported_device {
uint8_t busnum;
uint8_t devnum;
-
- struct dlist *cdev_list; /* list of class device */
- struct usb_device udev;
+ /* usbip_class_device list */
+ struct dlist *cdev_list;
+ struct usbip_usb_device udev;
};
struct usbip_vhci_driver {
char sysfs_mntpath[SYSFS_PATH_MAX];
- struct sysfs_device *hc_device; /* /sys/devices/platform/vhci_hcd */
- struct dlist *cdev_list; /* list of class device */
+ /* /sys/devices/platform/vhci_hcd */
+ struct sysfs_device *hc_device;
+
+ /* usbip_class_device list */
+ struct dlist *cdev_list;
int nports;
struct usbip_imported_device idev[MAXNPORT];
diff --git a/drivers/staging/usbip/userspace/src/Makefile.am b/drivers/staging/usbip/userspace/src/Makefile.am
index 05a7aa50d42f8..52741c8d60d80 100644
--- a/drivers/staging/usbip/userspace/src/Makefile.am
+++ b/drivers/staging/usbip/userspace/src/Makefile.am
@@ -2,9 +2,10 @@ AM_CPPFLAGS := -I$(top_srcdir)/libsrc -DUSBIDS_FILE='"@USBIDS_DIR@/usb.ids"'
AM_CFLAGS := @EXTRA_CFLAGS@ @PACKAGE_CFLAGS@
LDADD := $(top_srcdir)/libsrc/libusbip.la @PACKAGE_LIBS@
-sbin_PROGRAMS := usbip usbipd usbip_bind_driver
+sbin_PROGRAMS := usbip usbipd
-usbip_SOURCES := usbip.c usbip_network.c usbip_network.h
-usbipd_SOURCES := usbipd.c usbip_network.c usbip_network.h
-usbip_bind_driver_SOURCES := bind-driver.c utils.c utils.h \
- usbip_network.h usbip_network.c
+usbip_SOURCES := usbip.c utils.c usbip_network.c \
+ usbip_attach.c usbip_detach.c usbip_list.c \
+ usbip_bind.c usbip_unbind.c
+
+usbipd_SOURCES := usbipd.c usbip_network.c
diff --git a/drivers/staging/usbip/userspace/src/bind-driver.c b/drivers/staging/usbip/userspace/src/bind-driver.c
deleted file mode 100644
index 201ffbbee5476..0000000000000
--- a/drivers/staging/usbip/userspace/src/bind-driver.c
+++ /dev/null
@@ -1,643 +0,0 @@
-/*
- *
- * Copyright (C) 2005-2007 Takahiro Hirofuchi
- */
-
-#include "utils.h"
-
-#define _GNU_SOURCE
-#include <getopt.h>
-#include <glib.h>
-
-
-
-static const struct option longopts[] = {
- {"usbip", required_argument, NULL, 'u'},
- {"other", required_argument, NULL, 'o'},
- {"list", no_argument, NULL, 'l'},
- {"list2", no_argument, NULL, 'L'},
- {"help", no_argument, NULL, 'h'},
-#if 0
- {"allusbip", no_argument, NULL, 'a'},
- {"export-to", required_argument, NULL, 'e'},
- {"unexport", required_argument, NULL, 'x'},
- {"busid", required_argument, NULL, 'b'},
-#endif
-
- {NULL, 0, NULL, 0}
-};
-
-static const char match_busid_path[] = "/sys/bus/usb/drivers/usbip/match_busid";
-
-
-static void show_help(void)
-{
- printf("Usage: usbip_bind_driver [OPTION]\n");
- printf("Change driver binding for USB/IP.\n");
- printf(" --usbip busid make a device exportable\n");
- printf(" --other busid use a device by a local driver\n");
- printf(" --list print usb devices and their drivers\n");
- printf(" --list2 print usb devices and their drivers in parseable mode\n");
-#if 0
- printf(" --allusbip make all devices exportable\n");
- printf(" --export-to host export the device to 'host'\n");
- printf(" --unexport host unexport a device previously exported to 'host'\n");
- printf(" --busid busid the busid used for --export-to\n");
-#endif
-}
-
-static int modify_match_busid(char *busid, int add)
-{
- int fd;
- int ret;
- char buff[BUS_ID_SIZE + 4];
-
- /* BUS_IS_SIZE includes NULL termination? */
- if (strnlen(busid, BUS_ID_SIZE) > BUS_ID_SIZE - 1) {
- g_warning("too long busid");
- return -1;
- }
-
- fd = open(match_busid_path, O_WRONLY);
- if (fd < 0)
- return -1;
-
- if (add)
- snprintf(buff, BUS_ID_SIZE + 4, "add %s", busid);
- else
- snprintf(buff, BUS_ID_SIZE + 4, "del %s", busid);
-
- g_debug("write \"%s\" to %s", buff, match_busid_path);
-
- ret = write(fd, buff, sizeof(buff));
- if (ret < 0) {
- close(fd);
- return -1;
- }
-
- close(fd);
-
- return 0;
-}
-
-static const char unbind_path_format[] = "/sys/bus/usb/devices/%s/driver/unbind";
-
-/* buggy driver may cause dead lock */
-static int unbind_interface_busid(char *busid)
-{
- char unbind_path[PATH_MAX];
- int fd;
- int ret;
-
- snprintf(unbind_path, sizeof(unbind_path), unbind_path_format, busid);
-
- fd = open(unbind_path, O_WRONLY);
- if (fd < 0) {
- g_warning("opening unbind_path failed: %d", fd);
- return -1;
- }
-
- ret = write(fd, busid, strnlen(busid, BUS_ID_SIZE));
- if (ret < 0) {
- g_warning("write to unbind_path failed: %d", ret);
- close(fd);
- return -1;
- }
-
- close(fd);
-
- return 0;
-}
-
-static int unbind_interface(char *busid, int configvalue, int interface)
-{
- char inf_busid[BUS_ID_SIZE];
- g_debug("unbinding interface");
-
- snprintf(inf_busid, BUS_ID_SIZE, "%s:%d.%d", busid, configvalue, interface);
-
- return unbind_interface_busid(inf_busid);
-}
-
-
-static const char bind_path_format[] = "/sys/bus/usb/drivers/%s/bind";
-
-static int bind_interface_busid(char *busid, char *driver)
-{
- char bind_path[PATH_MAX];
- int fd;
- int ret;
-
- snprintf(bind_path, sizeof(bind_path), bind_path_format, driver);
-
- fd = open(bind_path, O_WRONLY);
- if (fd < 0)
- return -1;
-
- ret = write(fd, busid, strnlen(busid, BUS_ID_SIZE));
- if (ret < 0) {
- close(fd);
- return -1;
- }
-
- close(fd);
-
- return 0;
-}
-
-static int bind_interface(char *busid, int configvalue, int interface, char *driver)
-{
- char inf_busid[BUS_ID_SIZE];
-
- snprintf(inf_busid, BUS_ID_SIZE, "%s:%d.%d", busid, configvalue, interface);
-
- return bind_interface_busid(inf_busid, driver);
-}
-
-static int unbind(char *busid)
-{
- int configvalue = 0;
- int ninterface = 0;
- int devclass = 0;
- int i;
- int failed = 0;
-
- configvalue = read_bConfigurationValue(busid);
- ninterface = read_bNumInterfaces(busid);
- devclass = read_bDeviceClass(busid);
-
- if (configvalue < 0 || ninterface < 0 || devclass < 0) {
- g_warning("read config and ninf value, removed?");
- return -1;
- }
-
- if (devclass == 0x09) {
- g_message("skip unbinding of hub");
- return -1;
- }
-
- for (i = 0; i < ninterface; i++) {
- char driver[PATH_MAX];
- int ret;
-
- bzero(&driver, sizeof(driver));
-
- getdriver(busid, configvalue, i, driver, PATH_MAX-1);
-
- g_debug(" %s:%d.%d -> %s ", busid, configvalue, i, driver);
-
- if (!strncmp("none", driver, PATH_MAX))
- continue; /* unbound interface */
-
-#if 0
- if (!strncmp("usbip", driver, PATH_MAX))
- continue; /* already bound to usbip */
-#endif
-
- /* unbinding */
- ret = unbind_interface(busid, configvalue, i);
- if (ret < 0) {
- g_warning("unbind driver at %s:%d.%d failed",
- busid, configvalue, i);
- failed = 1;
- }
- }
-
- if (failed)
- return -1;
- else
- return 0;
-}
-
-/* call at unbound state */
-static int bind_to_usbip(char *busid)
-{
- int configvalue = 0;
- int ninterface = 0;
- int i;
- int failed = 0;
-
- configvalue = read_bConfigurationValue(busid);
- ninterface = read_bNumInterfaces(busid);
-
- if (configvalue < 0 || ninterface < 0) {
- g_warning("read config and ninf value, removed?");
- return -1;
- }
-
- for (i = 0; i < ninterface; i++) {
- int ret;
-
- ret = bind_interface(busid, configvalue, i, "usbip");
- if (ret < 0) {
- g_warning("bind usbip at %s:%d.%d, failed",
- busid, configvalue, i);
- failed = 1;
- /* need to contine binding at other interfaces */
- }
- }
-
- if (failed)
- return -1;
- else
- return 0;
-}
-
-
-static int use_device_by_usbip(char *busid)
-{
- int ret;
-
- ret = unbind(busid);
- if (ret < 0) {
- g_warning("unbind drivers of %s, failed", busid);
- return -1;
- }
-
- ret = modify_match_busid(busid, 1);
- if (ret < 0) {
- g_warning("add %s to match_busid, failed", busid);
- return -1;
- }
-
- ret = bind_to_usbip(busid);
- if (ret < 0) {
- g_warning("bind usbip to %s, failed", busid);
- modify_match_busid(busid, 0);
- return -1;
- }
-
- g_message("bind %s to usbip, complete!", busid);
-
- return 0;
-}
-
-
-
-static int use_device_by_other(char *busid)
-{
- int ret;
- int config;
-
- /* read and write the same config value to kick probing */
- config = read_bConfigurationValue(busid);
- if (config < 0) {
- g_warning("read bConfigurationValue of %s, failed", busid);
- return -1;
- }
-
- ret = modify_match_busid(busid, 0);
- if (ret < 0) {
- g_warning("del %s to match_busid, failed", busid);
- return -1;
- }
-
- ret = write_bConfigurationValue(busid, config);
- if (ret < 0) {
- g_warning("read bConfigurationValue of %s, failed", busid);
- return -1;
- }
-
- g_message("bind %s to other drivers than usbip, complete!", busid);
-
- return 0;
-}
-
-
-#include <sys/types.h>
-#include <regex.h>
-
-#include <errno.h>
-#include <string.h>
-#include <stdio.h>
-
-
-
-static int is_usb_device(char *busid)
-{
- int ret;
-
- regex_t regex;
- regmatch_t pmatch[1];
-
- ret = regcomp(&regex, "^[0-9]+-[0-9]+(\\.[0-9]+)*$", REG_NOSUB|REG_EXTENDED);
- if (ret < 0)
- g_error("regcomp: %s\n", strerror(errno));
-
- ret = regexec(&regex, busid, 0, pmatch, 0);
- if (ret)
- return 0; /* not matched */
-
- return 1;
-}
-
-
-#include <dirent.h>
-static int show_devices(void)
-{
- DIR *dir;
-
- dir = opendir("/sys/bus/usb/devices/");
- if (!dir)
- g_error("opendir: %s", strerror(errno));
-
- printf("List USB devices\n");
- for (;;) {
- struct dirent *dirent;
- char *busid;
-
- dirent = readdir(dir);
- if (!dirent)
- break;
-
- busid = dirent->d_name;
-
- if (is_usb_device(busid)) {
- char name[100] = {'\0'};
- char driver[100] = {'\0'};
- int conf, ninf = 0;
- int i;
-
- conf = read_bConfigurationValue(busid);
- ninf = read_bNumInterfaces(busid);
-
- getdevicename(busid, name, sizeof(name));
-
- printf(" - busid %s (%s)\n", busid, name);
-
- for (i = 0; i < ninf; i++) {
- getdriver(busid, conf, i, driver, sizeof(driver));
- printf(" %s:%d.%d -> %s\n", busid, conf, i, driver);
- }
- printf("\n");
- }
- }
-
- closedir(dir);
-
- return 0;
-}
-
-static int show_devices2(void)
-{
- DIR *dir;
-
- dir = opendir("/sys/bus/usb/devices/");
- if (!dir)
- g_error("opendir: %s", strerror(errno));
-
- for (;;) {
- struct dirent *dirent;
- char *busid;
-
- dirent = readdir(dir);
- if (!dirent)
- break;
-
- busid = dirent->d_name;
-
- if (is_usb_device(busid)) {
- char name[100] = {'\0'};
- char driver[100] = {'\0'};
- int conf, ninf = 0;
- int i;
-
- conf = read_bConfigurationValue(busid);
- ninf = read_bNumInterfaces(busid);
-
- getdevicename(busid, name, sizeof(name));
-
- printf("busid=%s#usbid=%s#", busid, name);
-
- for (i = 0; i < ninf; i++) {
- getdriver(busid, conf, i, driver, sizeof(driver));
- printf("%s:%d.%d=%s#", busid, conf, i, driver);
- }
- printf("\n");
- }
- }
-
- closedir(dir);
-
- return 0;
-}
-
-
-#if 0
-static int export_to(char *host, char *busid) {
-
- int ret;
-
- if( host == NULL ) {
- printf( "no host given\n\n");
- show_help();
- return -1;
- }
- if( busid == NULL ) {
- /* XXX print device list and ask for busnumber, if none is
- * given */
- printf( "no busid given, use --busid switch\n\n");
- show_help();
- return -1;
- }
-
-
- ret = use_device_by_usbip(busid);
- if( ret != 0 ) {
- printf( "could not bind driver to usbip\n");
- return -1;
- }
-
- printf( "DEBUG: exporting device '%s' to '%s'\n", busid, host );
- ret = export_busid_to_host(host, busid); /* usbip_export.[ch] */
- if( ret != 0 ) {
- printf( "could not export device to host\n" );
- printf( " host: %s, device: %s\n", host, busid );
- use_device_by_other(busid);
- return -1;
- }
-
- return 0;
-}
-
-static int unexport_from(char *host, char *busid) {
-
- int ret;
-
- if (!host || !busid)
- g_error("no host or no busid\n");
-
- g_message("unexport_from: host: '%s', busid: '%s'", host, busid);
-
- ret = unexport_busid_from_host(host, busid); /* usbip_export.[ch] */
- if( ret != 0 ) {
- err( "could not unexport device from host\n" );
- err( " host: %s, device: %s\n", host, busid );
- }
-
- ret = use_device_by_other(busid);
- if (ret < 0)
- g_error("could not unbind device from usbip\n");
-
- return 0;
-}
-
-
-static int allusbip(void)
-{
- DIR *dir;
-
- dir = opendir("/sys/bus/usb/devices/");
- if (!dir)
- g_error("opendir: %s", strerror(errno));
-
- for (;;) {
- struct dirent *dirent;
- char *busid;
-
- dirent = readdir(dir);
- if (!dirent)
- break;
-
- busid = dirent->d_name;
-
- if (!is_usb_device(busid))
- continue;
-
- {
- char name[PATH_MAX];
- int conf, ninf = 0;
- int i;
- int be_local = 0;
-
- conf = read_bConfigurationValue(busid);
- ninf = read_bNumInterfaces(busid);
-
- getdevicename(busid, name, sizeof(name));
-
- for (i = 0; i < ninf; i++) {
- char driver[PATH_MAX];
-
- getdriver(busid, conf, i, driver, sizeof(driver));
-#if 0
- if (strncmp(driver, "usbhid", 6) == 0 || strncmp(driver, "usb-storage", 11) == 0) {
- be_local = 1;
- break;
- }
-#endif
- }
-
- if (be_local == 0)
- use_device_by_usbip(busid);
- }
- }
-
- closedir(dir);
-
- return 0;
-}
-#endif
-
-int main(int argc, char **argv)
-{
- char *busid = NULL;
- char *remote_host __attribute__((unused)) = NULL;
-
- enum {
- cmd_unknown = 0,
- cmd_use_by_usbip,
- cmd_use_by_other,
- cmd_list,
- cmd_list2,
- cmd_allusbip,
- cmd_export_to,
- cmd_unexport,
- cmd_help,
- } cmd = cmd_unknown;
-
- if (geteuid() != 0)
- g_warning("running non-root?");
-
- for (;;) {
- int c;
- int index = 0;
-
- c = getopt_long(argc, argv, "u:o:hlLae:x:b:", longopts, &index);
- if (c == -1)
- break;
-
- switch (c) {
- case 'u':
- cmd = cmd_use_by_usbip;
- busid = optarg;
- break;
- case 'o' :
- cmd = cmd_use_by_other;
- busid = optarg;
- break;
- case 'l' :
- cmd = cmd_list;
- break;
- case 'L' :
- cmd = cmd_list2;
- break;
- case 'a' :
- cmd = cmd_allusbip;
- break;
- case 'b':
- busid = optarg;
- break;
- case 'e':
- cmd = cmd_export_to;
- remote_host = optarg;
- break;
- case 'x':
- cmd = cmd_unexport;
- remote_host = optarg;
- break;
- case 'h': /* fallthrough */
- case '?':
- cmd = cmd_help;
- break;
- default:
- g_error("getopt");
- }
-
- //if (cmd)
- // break;
- }
-
- switch (cmd) {
- case cmd_use_by_usbip:
- use_device_by_usbip(busid);
- break;
- case cmd_use_by_other:
- use_device_by_other(busid);
- break;
- case cmd_list:
- show_devices();
- break;
- case cmd_list2:
- show_devices2();
- break;
-#if 0
- case cmd_allusbip:
- allusbip();
- break;
- case cmd_export_to:
- export_to(remote_host, busid);
- break;
- case cmd_unexport:
- unexport_from(remote_host, busid);
- break;
-#endif
- case cmd_help: /* fallthrough */
- case cmd_unknown:
- show_help();
- break;
- default:
- g_error("NOT REACHED");
- }
-
- return 0;
-}
diff --git a/drivers/staging/usbip/userspace/src/usbip.c b/drivers/staging/usbip/userspace/src/usbip.c
index 01a562866b5d5..8940cd0ae6b74 100644
--- a/drivers/staging/usbip/userspace/src/usbip.c
+++ b/drivers/staging/usbip/userspace/src/usbip.c
@@ -1,723 +1,180 @@
/*
+ * command structure borrowed from udev
+ * (git://git.kernel.org/pub/scm/linux/hotplug/udev.git)
*
- * Copyright (C) 2005-2007 Takahiro Hirofuchi
+ * Copyright (C) 2011 matt mooney <mfm@muteddisk.com>
+ * 2005-2007 Takahiro Hirofuchi
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#ifdef HAVE_CONFIG_H
-#include "../config.h"
-#endif
-
-#include "usbip.h"
-#include "usbip_network.h"
-#include <ctype.h>
-#include <sys/types.h>
-#include <sys/stat.h>
+#include <stdio.h>
#include <stdlib.h>
-#include <fcntl.h>
-#include <glib.h>
-
-static const char version[] = PACKAGE_STRING;
-
-
-/* /sys/devices/platform/vhci_hcd/usb6/6-1/6-1:1.1 -> 1 */
-static int get_interface_number(char *path)
-{
- char *c;
-
- c = strstr(path, vhci_driver->hc_device->bus_id);
- if (!c)
- return -1; /* hc exist? */
- c++;
- /* -> usb6/6-1/6-1:1.1 */
-
- c = strchr(c, '/');
- if (!c)
- return -1; /* hc exist? */
- c++;
- /* -> 6-1/6-1:1.1 */
-
- c = strchr(c, '/');
- if (!c)
- return -1; /* no interface path */
- c++;
- /* -> 6-1:1.1 */
-
- c = strchr(c, ':');
- if (!c)
- return -1; /* no configuration? */
- c++;
- /* -> 1.1 */
-
- c = strchr(c, '.');
- if (!c)
- return -1; /* no interface? */
- c++;
- /* -> 1 */
-
-
- return atoi(c);
-}
-
-
-static struct sysfs_device *open_usb_interface(struct usb_device *udev, int i)
-{
- struct sysfs_device *suinf;
- char busid[SYSFS_BUS_ID_SIZE];
-
- snprintf(busid, SYSFS_BUS_ID_SIZE, "%s:%d.%d",
- udev->busid, udev->bConfigurationValue, i);
-
- suinf = sysfs_open_device("usb", busid);
- if (!suinf)
- err("sysfs_open_device %s", busid);
-
- return suinf;
-}
-
-
-#define MAX_BUFF 100
-static int record_connection(char *host, char *port, char *busid, int rhport)
-{
- int fd;
- char path[PATH_MAX+1];
- char buff[MAX_BUFF+1];
- int ret;
-
- mkdir(VHCI_STATE_PATH, 0700);
- snprintf(path, PATH_MAX, VHCI_STATE_PATH"/port%d", rhport);
-
- fd = open(path, O_WRONLY|O_CREAT|O_TRUNC, S_IRWXU);
- if (fd < 0)
- return -1;
-
- snprintf(buff, MAX_BUFF, "%s %s %s\n",
- host, port, busid);
-
- ret = write(fd, buff, strlen(buff));
- if (ret != (ssize_t) strlen(buff)) {
- close(fd);
- return -1;
- }
-
- close(fd);
-
- return 0;
-}
-
-static int read_record(int rhport, char *host, char *port, char *busid)
-{
- FILE *file;
- char path[PATH_MAX+1];
-
- snprintf(path, PATH_MAX, VHCI_STATE_PATH"/port%d", rhport);
-
- file = fopen(path, "r");
- if (!file) {
- err("fopen");
- return -1;
- }
+#include <getopt.h>
- if (fscanf(file, "%s %s %s\n", host, port, busid) != 3) {
- err("fscanf");
- fclose(file);
- return -1;
- }
+#include "usbip_common.h"
+#include "usbip.h"
- fclose(file);
+static int usbip_help(int argc, char *argv[]);
+static int usbip_version(int argc, char *argv[]);
- return 0;
-}
+static const char usbip_version_string[] = PACKAGE_STRING;
+static const char usbip_usage_string[] =
+ "usbip [--debug] [version]\n"
+ " [help] <command> <args>\n";
-int usbip_vhci_imported_device_dump(struct usbip_imported_device *idev)
+static void usbip_usage(void)
{
- char product_name[100];
- char host[NI_MAXHOST] = "unknown host";
- char serv[NI_MAXSERV] = "unknown port";
- char remote_busid[SYSFS_BUS_ID_SIZE];
- int ret;
-
- if (idev->status == VDEV_ST_NULL || idev->status == VDEV_ST_NOTASSIGNED) {
- info("Port %02d: <%s>", idev->port, usbip_status_string(idev->status));
- return 0;
- }
-
- ret = read_record(idev->port, host, serv, remote_busid);
- if (ret) {
- err("read_record");
- return -1;
- }
-
- info("Port %02d: <%s> at %s", idev->port,
- usbip_status_string(idev->status), usbip_speed_string(idev->udev.speed));
-
- usbip_names_get_product(product_name, sizeof(product_name),
- idev->udev.idVendor, idev->udev.idProduct);
-
- info(" %s", product_name);
-
- info("%10s -> usbip://%s:%s/%s (remote devid %08x (bus/dev %03d/%03d))",
- idev->udev.busid, host, serv, remote_busid,
- idev->devid,
- idev->busnum, idev->devnum);
-
- for (int i=0; i < idev->udev.bNumInterfaces; i++) {
- /* show interface information */
- struct sysfs_device *suinf;
-
- suinf = open_usb_interface(&idev->udev, i);
- if (!suinf)
- continue;
-
- info(" %6s used by %-17s", suinf->bus_id, suinf->driver_name);
- sysfs_close_device(suinf);
-
- /* show class device information */
- struct class_device *cdev;
-
- dlist_for_each_data(idev->cdev_list, cdev, struct class_device) {
- int ifnum = get_interface_number(cdev->devpath);
- if (ifnum == i) {
- info(" %s", cdev->clspath);
- }
- }
- }
-
- return 0;
+ printf("usage: %s", usbip_usage_string);
}
+struct command {
+ const char *name;
+ int (*fn)(int argc, char *argv[]);
+ const char *help;
+ void (*usage)(void);
+};
+static const struct command cmds[] = {
+ {
+ .name = "help",
+ .fn = usbip_help,
+ .help = NULL,
+ .usage = NULL
+ },
+ {
+ .name = "version",
+ .fn = usbip_version,
+ .help = NULL,
+ .usage = NULL
+ },
+ {
+ .name = "attach",
+ .fn = usbip_attach,
+ .help = "Attach a remote USB device",
+ .usage = usbip_attach_usage
+ },
+ {
+ .name = "detach",
+ .fn = usbip_detach,
+ .help = "Detach a remote USB device",
+ .usage = usbip_detach_usage
+ },
+ {
+ .name = "list",
+ .fn = usbip_list,
+ .help = "List exported or local USB devices",
+ .usage = usbip_list_usage
+ },
+ {
+ .name = "bind",
+ .fn = usbip_bind,
+ .help = "Bind device to " USBIP_HOST_DRV_NAME ".ko",
+ .usage = usbip_bind_usage
+ },
+ {
+ .name = "unbind",
+ .fn = usbip_unbind,
+ .help = "Unbind device from " USBIP_HOST_DRV_NAME ".ko",
+ .usage = usbip_unbind_usage
+ },
+ { NULL, NULL, NULL, NULL }
+};
-
-static int query_exported_devices(int sockfd)
+static int usbip_help(int argc, char *argv[])
{
- int ret;
- struct op_devlist_reply rep;
- uint16_t code = OP_REP_DEVLIST;
-
- bzero(&rep, sizeof(rep));
-
- ret = usbip_send_op_common(sockfd, OP_REQ_DEVLIST, 0);
- if (ret < 0) {
- err("send op_common");
- return -1;
- }
-
- ret = usbip_recv_op_common(sockfd, &code);
- if (ret < 0) {
- err("recv op_common");
- return -1;
- }
-
- ret = usbip_recv(sockfd, (void *) &rep, sizeof(rep));
- if (ret < 0) {
- err("recv op_devlist");
- return -1;
- }
-
- PACK_OP_DEVLIST_REPLY(0, &rep);
- dbg("exportable %d devices", rep.ndev);
-
- for (unsigned int i=0; i < rep.ndev; i++) {
- char product_name[100];
- char class_name[100];
- struct usb_device udev;
+ const struct command *cmd;
+ int i;
+ int ret = 0;
- bzero(&udev, sizeof(udev));
-
- ret = usbip_recv(sockfd, (void *) &udev, sizeof(udev));
- if (ret < 0) {
- err("recv usb_device[%d]", i);
- return -1;
- }
- pack_usb_device(0, &udev);
-
- usbip_names_get_product(product_name, sizeof(product_name),
- udev.idVendor, udev.idProduct);
- usbip_names_get_class(class_name, sizeof(class_name), udev.bDeviceClass,
- udev.bDeviceSubClass, udev.bDeviceProtocol);
-
- info("%8s: %s", udev.busid, product_name);
- info("%8s: %s", " ", udev.path);
- info("%8s: %s", " ", class_name);
-
- for (int j=0; j < udev.bNumInterfaces; j++) {
- struct usb_interface uinf;
-
- ret = usbip_recv(sockfd, (void *) &uinf, sizeof(uinf));
- if (ret < 0) {
- err("recv usb_interface[%d]", j);
- return -1;
+ if (argc > 1 && argv++) {
+ for (i = 0; cmds[i].name != NULL; i++)
+ if (!strcmp(cmds[i].name, argv[0]) && cmds[i].usage) {
+ cmds[i].usage();
+ goto done;
}
-
- pack_usb_interface(0, &uinf);
- usbip_names_get_class(class_name, sizeof(class_name), uinf.bInterfaceClass,
- uinf.bInterfaceSubClass, uinf.bInterfaceProtocol);
-
- info("%8s: %2d - %s", " ", j, class_name);
- }
-
- info(" ");
- }
-
- return rep.ndev;
-}
-
-static int import_device(int sockfd, struct usb_device *udev)
-{
- int ret;
- int port;
-
- ret = usbip_vhci_driver_open();
- if (ret < 0) {
- err("open vhci_driver");
- return -1;
- }
-
- port = usbip_vhci_get_free_port();
- if (port < 0) {
- err("no free port");
- usbip_vhci_driver_close();
- return -1;
- }
-
- ret = usbip_vhci_attach_device(port, sockfd, udev->busnum,
- udev->devnum, udev->speed);
- if (ret < 0) {
- err("import device");
- usbip_vhci_driver_close();
- return -1;
- }
-
- usbip_vhci_driver_close();
-
- return port;
-}
-
-
-static int query_import_device(int sockfd, char *busid)
-{
- int ret;
- struct op_import_request request;
- struct op_import_reply reply;
- uint16_t code = OP_REP_IMPORT;
-
- bzero(&request, sizeof(request));
- bzero(&reply, sizeof(reply));
-
-
- /* send a request */
- ret = usbip_send_op_common(sockfd, OP_REQ_IMPORT, 0);
- if (ret < 0) {
- err("send op_common");
- return -1;
- }
-
- strncpy(request.busid, busid, SYSFS_BUS_ID_SIZE-1);
-
- PACK_OP_IMPORT_REQUEST(0, &request);
-
- ret = usbip_send(sockfd, (void *) &request, sizeof(request));
- if (ret < 0) {
- err("send op_import_request");
- return -1;
+ ret = -1;
}
-
- /* recieve a reply */
- ret = usbip_recv_op_common(sockfd, &code);
- if (ret < 0) {
- err("recv op_common");
- return -1;
- }
-
- ret = usbip_recv(sockfd, (void *) &reply, sizeof(reply));
- if (ret < 0) {
- err("recv op_import_reply");
- return -1;
- }
-
- PACK_OP_IMPORT_REPLY(0, &reply);
-
-
- /* check the reply */
- if (strncmp(reply.udev.busid, busid, SYSFS_BUS_ID_SIZE)) {
- err("recv different busid %s", reply.udev.busid);
- return -1;
- }
-
-
- /* import a device */
- return import_device(sockfd, &reply.udev);
-}
-
-static int attach_device(char *host, char *busid)
-{
- int sockfd;
- int ret;
- int rhport;
-
- sockfd = tcp_connect(host, USBIP_PORT_STRING);
- if (sockfd < 0) {
- err("tcp connect");
- return -1;
- }
-
- rhport = query_import_device(sockfd, busid);
- if (rhport < 0) {
- err("query");
- return -1;
- }
-
- close(sockfd);
-
- ret = record_connection(host, USBIP_PORT_STRING,
- busid, rhport);
- if (ret < 0) {
- err("record connection");
- return -1;
- }
-
- return 0;
-}
-
-static int detach_port(char *port)
-{
- int ret;
- uint8_t portnum;
-
- for (unsigned int i=0; i < strlen(port); i++)
- if (!isdigit(port[i])) {
- err("invalid port %s", port);
- return -1;
- }
-
- /* check max port */
-
- portnum = atoi(port);
-
- ret = usbip_vhci_driver_open();
- if (ret < 0) {
- err("open vhci_driver");
- return -1;
- }
-
- ret = usbip_vhci_detach_device(portnum);
- if (ret < 0)
- return -1;
-
- usbip_vhci_driver_close();
-
+ usbip_usage();
+ printf("\n");
+ for (cmd = cmds; cmd->name != NULL; cmd++)
+ if (cmd->help != NULL)
+ printf(" %-10s %s\n", cmd->name, cmd->help);
+ printf("\n");
+done:
return ret;
}
-static int show_exported_devices(char *host)
+static int usbip_version(int argc, char *argv[])
{
- int ret;
- int sockfd;
-
- sockfd = tcp_connect(host, USBIP_PORT_STRING);
- if (sockfd < 0) {
- err("- %s failed", host);
- return -1;
- }
-
- info("- %s", host);
-
- ret = query_exported_devices(sockfd);
- if (ret < 0) {
- err("query");
- return -1;
- }
+ (void) argc;
+ (void) argv;
- close(sockfd);
+ printf("%s\n", usbip_version_string);
return 0;
}
-static int attach_exported_devices(char *host, int sockfd)
+static int run_command(const struct command *cmd, int argc, char *argv[])
{
- int ret;
- struct op_devlist_reply rep;
- uint16_t code = OP_REP_DEVLIST;
-
- bzero(&rep, sizeof(rep));
-
- ret = usbip_send_op_common(sockfd, OP_REQ_DEVLIST, 0);
- if(ret < 0) {
- err("send op_common");
- return -1;
- }
-
- ret = usbip_recv_op_common(sockfd, &code);
- if(ret < 0) {
- err("recv op_common");
- return -1;
- }
-
- ret = usbip_recv(sockfd, (void *) &rep, sizeof(rep));
- if(ret < 0) {
- err("recv op_devlist");
- return -1;
- }
-
- PACK_OP_DEVLIST_REPLY(0, &rep);
- dbg("exportable %d devices", rep.ndev);
-
- for(unsigned int i=0; i < rep.ndev; i++) {
- char product_name[100];
- char class_name[100];
- struct usb_device udev;
-
- bzero(&udev, sizeof(udev));
-
- ret = usbip_recv(sockfd, (void *) &udev, sizeof(udev));
- if(ret < 0) {
- err("recv usb_device[%d]", i);
- return -1;
- }
- pack_usb_device(0, &udev);
-
- usbip_names_get_product(product_name, sizeof(product_name),
- udev.idVendor, udev.idProduct);
- usbip_names_get_class(class_name, sizeof(class_name), udev.bDeviceClass,
- udev.bDeviceSubClass, udev.bDeviceProtocol);
-
- dbg("Attaching usb port %s from host %s on usbip, with deviceid: %s", udev.busid, host, product_name);
-
- for (int j=0; j < udev.bNumInterfaces; j++) {
- struct usb_interface uinf;
-
- ret = usbip_recv(sockfd, (void *) &uinf, sizeof(uinf));
- if (ret < 0) {
- err("recv usb_interface[%d]", j);
- return -1;
- }
-
- pack_usb_interface(0, &uinf);
- usbip_names_get_class(class_name, sizeof(class_name), uinf.bInterfaceClass,
- uinf.bInterfaceSubClass, uinf.bInterfaceProtocol);
-
- dbg("interface %2d - %s", j, class_name);
- }
-
- attach_device(host, udev.busid);
- }
-
- return rep.ndev;
-}
-
-static int attach_devices_all(char *host)
-{
- int ret;
- int sockfd;
-
- sockfd = tcp_connect(host, USBIP_PORT_STRING);
- if(sockfd < 0) {
- err("- %s failed", host);
- return -1;
- }
-
- info("- %s", host);
-
- ret = attach_exported_devices(host, sockfd);
- if(ret < 0) {
- err("query");
- return -1;
- }
-
- close(sockfd);
- return 0;
-}
-
-
-const char help_message[] = "\
-Usage: usbip [options] \n\
- -a, --attach [host] [bus_id] \n\
- Attach a remote USB device. \n\
- \n\
- -x, --attachall [host] \n\
- Attach all remote USB devices on the specific host. \n\
- \n\
- -d, --detach [ports] \n\
- Detach an imported USB device. \n\
- \n\
- -l, --list [hosts] \n\
- List exported USB devices. \n\
- \n\
- -p, --port \n\
- List virtual USB port status. \n\
- \n\
- -D, --debug \n\
- Print debugging information. \n\
- \n\
- -v, --version \n\
- Show version. \n\
- \n\
- -h, --help \n\
- Print this help. \n";
-
-static void show_help(void)
-{
- printf("%s", help_message);
-}
-
-static int show_port_status(void)
-{
- int ret;
- struct usbip_imported_device *idev;
-
- ret = usbip_vhci_driver_open();
- if (ret < 0)
- return ret;
-
- for (int i = 0; i < vhci_driver->nports; i++) {
- idev = &vhci_driver->idev[i];
-
- if (usbip_vhci_imported_device_dump(idev) < 0)
- ret = -1;
- }
-
- usbip_vhci_driver_close();
-
- return ret;
+ dbg("running command: `%s'\n", cmd->name);
+ return cmd->fn(argc, argv);
}
-#define _GNU_SOURCE
-#include <getopt.h>
-static const struct option longopts[] = {
- {"attach", no_argument, NULL, 'a'},
- {"attachall", no_argument, NULL, 'x'},
- {"detach", no_argument, NULL, 'd'},
- {"port", no_argument, NULL, 'p'},
- {"list", no_argument, NULL, 'l'},
- {"version", no_argument, NULL, 'v'},
- {"help", no_argument, NULL, 'h'},
- {"debug", no_argument, NULL, 'D'},
- {"syslog", no_argument, NULL, 'S'},
- {NULL, 0, NULL, 0}
-};
-
int main(int argc, char *argv[])
{
- int ret;
-
- enum {
- cmd_attach = 1,
- cmd_attachall,
- cmd_detach,
- cmd_port,
- cmd_list,
- cmd_help,
- cmd_version
- } cmd = 0;
-
- usbip_use_stderr = 1;
-
- if (geteuid() != 0)
- g_warning("running non-root?");
-
- ret = usbip_names_init(USBIDS_FILE);
- if (ret)
- notice("failed to open %s", USBIDS_FILE);
+ static const struct option opts[] = {
+ { "debug", no_argument, NULL, 'd' },
+ { NULL, 0, NULL, 0 }
+ };
+ char *cmd;
+ int opt;
+ int i, rc = -1;
+ opterr = 0;
for (;;) {
- int c;
- int index = 0;
-
- c = getopt_long(argc, argv, "adplvhDSx", longopts, &index);
+ opt = getopt_long(argc, argv, "+d", opts, NULL);
- if (c == -1)
+ if (opt == -1)
break;
- switch(c) {
- case 'a':
- if (!cmd)
- cmd = cmd_attach;
- else
- cmd = cmd_help;
- break;
- case 'd':
- if (!cmd)
- cmd = cmd_detach;
- else
- cmd = cmd_help;
- break;
- case 'p':
- if (!cmd)
- cmd = cmd_port;
- else cmd = cmd_help;
- break;
- case 'l':
- if (!cmd)
- cmd = cmd_list;
- else
- cmd = cmd_help;
- break;
- case 'v':
- if (!cmd)
- cmd = cmd_version;
- else
- cmd = cmd_help;
- break;
- case 'x':
- if(!cmd)
- cmd = cmd_attachall;
- else
- cmd = cmd_help;
- break;
- case 'h':
- cmd = cmd_help;
- break;
- case 'D':
- usbip_use_debug = 1;
- break;
- case 'S':
- usbip_use_syslog = 1;
- break;
- case '?':
- break;
-
- default:
- err("getopt");
- }
- }
-
- ret = 0;
- switch(cmd) {
- case cmd_attach:
- if (optind == argc - 2)
- ret = attach_device(argv[optind], argv[optind+1]);
- else
- show_help();
- break;
- case cmd_detach:
- while (optind < argc)
- ret = detach_port(argv[optind++]);
- break;
- case cmd_port:
- ret = show_port_status();
- break;
- case cmd_list:
- while (optind < argc)
- ret = show_exported_devices(argv[optind++]);
- break;
- case cmd_attachall:
- while(optind < argc)
- ret = attach_devices_all(argv[optind++]);
- break;
- case cmd_version:
- printf("%s\n", version);
- break;
- case cmd_help:
- show_help();
+ switch (opt) {
+ case 'd':
+ usbip_use_debug = 1;
+ usbip_use_stderr = 1;
break;
default:
- show_help();
+ goto err_out;
+ }
}
+ cmd = argv[optind];
+ if (cmd) {
+ for (i = 0; cmds[i].name != NULL; i++)
+ if (!strcmp(cmds[i].name, cmd)) {
+ argc -= optind;
+ argv += optind;
+ optind = 0;
+ rc = run_command(&cmds[i], argc, argv);
+ goto out;
+ }
+ }
- usbip_names_free();
-
- exit((ret == 0) ? EXIT_SUCCESS : EXIT_FAILURE);
+err_out:
+ usbip_usage();
+out:
+ return (rc > -1 ? EXIT_SUCCESS : EXIT_FAILURE);
}
diff --git a/drivers/staging/usbip/userspace/src/usbip.h b/drivers/staging/usbip/userspace/src/usbip.h
new file mode 100644
index 0000000000000..14d4a475b683f
--- /dev/null
+++ b/drivers/staging/usbip/userspace/src/usbip.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright (C) 2011 matt mooney <mfm@muteddisk.com>
+ * 2005-2007 Takahiro Hirofuchi
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __USBIP_H
+#define __USBIP_H
+
+#ifdef HAVE_CONFIG_H
+#include "../config.h"
+#endif
+
+/* usbip commands */
+int usbip_attach(int argc, char *argv[]);
+int usbip_detach(int argc, char *argv[]);
+int usbip_list(int argc, char *argv[]);
+int usbip_bind(int argc, char *argv[]);
+int usbip_unbind(int argc, char *argv[]);
+
+void usbip_attach_usage(void);
+void usbip_detach_usage(void);
+void usbip_list_usage(void);
+void usbip_bind_usage(void);
+void usbip_unbind_usage(void);
+
+#endif /* __USBIP_H */
diff --git a/drivers/staging/usbip/userspace/src/usbip_attach.c b/drivers/staging/usbip/userspace/src/usbip_attach.c
new file mode 100644
index 0000000000000..189238b791b3f
--- /dev/null
+++ b/drivers/staging/usbip/userspace/src/usbip_attach.c
@@ -0,0 +1,228 @@
+/*
+ * Copyright (C) 2011 matt mooney <mfm@muteddisk.com>
+ * 2005-2007 Takahiro Hirofuchi
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <sys/stat.h>
+#include <sysfs/libsysfs.h>
+
+#include <limits.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <string.h>
+
+#include <fcntl.h>
+#include <getopt.h>
+#include <unistd.h>
+
+#include "vhci_driver.h"
+#include "usbip_common.h"
+#include "usbip_network.h"
+#include "usbip.h"
+
+static const char usbip_attach_usage_string[] =
+ "usbip attach <args>\n"
+ " -h, --host=<host> The machine with exported USB devices\n"
+ " -b, --busid=<busid> Busid of the device on <host>\n";
+
+void usbip_attach_usage(void)
+{
+ printf("usage: %s", usbip_attach_usage_string);
+}
+
+#define MAX_BUFF 100
+static int record_connection(char *host, char *port, char *busid, int rhport)
+{
+ int fd;
+ char path[PATH_MAX+1];
+ char buff[MAX_BUFF+1];
+ int ret;
+
+ mkdir(VHCI_STATE_PATH, 0700);
+
+ snprintf(path, PATH_MAX, VHCI_STATE_PATH"/port%d", rhport);
+
+ fd = open(path, O_WRONLY|O_CREAT|O_TRUNC, S_IRWXU);
+ if (fd < 0)
+ return -1;
+
+ snprintf(buff, MAX_BUFF, "%s %s %s\n",
+ host, port, busid);
+
+ ret = write(fd, buff, strlen(buff));
+ if (ret != (ssize_t) strlen(buff)) {
+ close(fd);
+ return -1;
+ }
+
+ close(fd);
+
+ return 0;
+}
+
+static int import_device(int sockfd, struct usbip_usb_device *udev)
+{
+ int rc;
+ int port;
+
+ rc = usbip_vhci_driver_open();
+ if (rc < 0) {
+ err("open vhci_driver");
+ return -1;
+ }
+
+ port = usbip_vhci_get_free_port();
+ if (port < 0) {
+ err("no free port");
+ usbip_vhci_driver_close();
+ return -1;
+ }
+
+ rc = usbip_vhci_attach_device(port, sockfd, udev->busnum,
+ udev->devnum, udev->speed);
+ if (rc < 0) {
+ err("import device");
+ usbip_vhci_driver_close();
+ return -1;
+ }
+
+ usbip_vhci_driver_close();
+
+ return port;
+}
+
+static int query_import_device(int sockfd, char *busid)
+{
+ int rc;
+ struct op_import_request request;
+ struct op_import_reply reply;
+ uint16_t code = OP_REP_IMPORT;
+
+ memset(&request, 0, sizeof(request));
+ memset(&reply, 0, sizeof(reply));
+
+ /* send a request */
+ rc = usbip_send_op_common(sockfd, OP_REQ_IMPORT, 0);
+ if (rc < 0) {
+ err("send op_common");
+ return -1;
+ }
+
+ strncpy(request.busid, busid, SYSFS_BUS_ID_SIZE-1);
+
+ PACK_OP_IMPORT_REQUEST(0, &request);
+
+ rc = usbip_send(sockfd, (void *) &request, sizeof(request));
+ if (rc < 0) {
+ err("send op_import_request");
+ return -1;
+ }
+
+ /* recieve a reply */
+ rc = usbip_recv_op_common(sockfd, &code);
+ if (rc < 0) {
+ err("recv op_common");
+ return -1;
+ }
+
+ rc = usbip_recv(sockfd, (void *) &reply, sizeof(reply));
+ if (rc < 0) {
+ err("recv op_import_reply");
+ return -1;
+ }
+
+ PACK_OP_IMPORT_REPLY(0, &reply);
+
+ /* check the reply */
+ if (strncmp(reply.udev.busid, busid, SYSFS_BUS_ID_SIZE)) {
+ err("recv different busid %s", reply.udev.busid);
+ return -1;
+ }
+
+ /* import a device */
+ return import_device(sockfd, &reply.udev);
+}
+
+static int attach_device(char *host, char *busid)
+{
+ int sockfd;
+ int rc;
+ int rhport;
+
+ sockfd = usbip_net_tcp_connect(host, USBIP_PORT_STRING);
+ if (sockfd < 0) {
+ err("tcp connect");
+ return -1;
+ }
+
+ rhport = query_import_device(sockfd, busid);
+ if (rhport < 0) {
+ err("query");
+ return -1;
+ }
+
+ close(sockfd);
+
+ rc = record_connection(host, USBIP_PORT_STRING, busid, rhport);
+ if (rc < 0) {
+ err("record connection");
+ return -1;
+ }
+
+ return 0;
+}
+
+int usbip_attach(int argc, char *argv[])
+{
+ static const struct option opts[] = {
+ { "host", required_argument, NULL, 'h' },
+ { "busid", required_argument, NULL, 'b' },
+ { NULL, 0, NULL, 0 }
+ };
+ char *host = NULL;
+ char *busid = NULL;
+ int opt;
+ int ret = -1;
+
+ for (;;) {
+ opt = getopt_long(argc, argv, "h:b:", opts, NULL);
+
+ if (opt == -1)
+ break;
+
+ switch (opt) {
+ case 'h':
+ host = optarg;
+ break;
+ case 'b':
+ busid = optarg;
+ break;
+ default:
+ goto err_out;
+ }
+ }
+
+ if (!host || !busid)
+ goto err_out;
+
+ ret = attach_device(host, busid);
+ goto out;
+
+err_out:
+ usbip_attach_usage();
+out:
+ return ret;
+}
diff --git a/drivers/staging/usbip/userspace/src/usbip_bind.c b/drivers/staging/usbip/userspace/src/usbip_bind.c
new file mode 100644
index 0000000000000..978b7aa018528
--- /dev/null
+++ b/drivers/staging/usbip/userspace/src/usbip_bind.c
@@ -0,0 +1,264 @@
+/*
+ * Copyright (C) 2011 matt mooney <mfm@muteddisk.com>
+ * 2005-2007 Takahiro Hirofuchi
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <sysfs/libsysfs.h>
+
+#include <limits.h>
+#include <stdio.h>
+#include <string.h>
+
+#include <fcntl.h>
+#include <getopt.h>
+#include <unistd.h>
+
+#include "usbip_common.h"
+#include "utils.h"
+#include "usbip.h"
+
+static const char usbip_bind_usage_string[] =
+ "usbip bind <args>\n"
+ " -b, --busid=<busid> Bind " USBIP_HOST_DRV_NAME ".ko to device "
+ "on <busid>\n";
+
+void usbip_bind_usage(void)
+{
+ printf("usage: %s", usbip_bind_usage_string);
+}
+
+static const char unbind_path_format[] = "/sys/bus/usb/devices/%s/driver/unbind";
+
+/* buggy driver may cause dead lock */
+static int unbind_interface_busid(char *busid)
+{
+ char unbind_path[SYSFS_PATH_MAX];
+ int fd;
+ int ret;
+
+ snprintf(unbind_path, sizeof(unbind_path), unbind_path_format, busid);
+
+ fd = open(unbind_path, O_WRONLY);
+ if (fd < 0) {
+ dbg("opening unbind_path failed: %d", fd);
+ return -1;
+ }
+
+ ret = write(fd, busid, strnlen(busid, SYSFS_BUS_ID_SIZE));
+ if (ret < 0) {
+ dbg("write to unbind_path failed: %d", ret);
+ close(fd);
+ return -1;
+ }
+
+ close(fd);
+
+ return 0;
+}
+
+static int unbind_interface(char *busid, int configvalue, int interface)
+{
+ char inf_busid[SYSFS_BUS_ID_SIZE];
+ dbg("unbinding interface");
+
+ snprintf(inf_busid, SYSFS_BUS_ID_SIZE, "%s:%d.%d", busid, configvalue,
+ interface);
+
+ return unbind_interface_busid(inf_busid);
+}
+
+static int unbind(char *busid)
+{
+ int configvalue = 0;
+ int ninterface = 0;
+ int devclass = 0;
+ int i;
+ int failed = 0;
+
+ configvalue = read_bConfigurationValue(busid);
+ ninterface = read_bNumInterfaces(busid);
+ devclass = read_bDeviceClass(busid);
+
+ if (configvalue < 0 || ninterface < 0 || devclass < 0) {
+ dbg("read config and ninf value, removed?");
+ return -1;
+ }
+
+ if (devclass == 0x09) {
+ dbg("skip unbinding of hub");
+ return -1;
+ }
+
+ for (i = 0; i < ninterface; i++) {
+ char driver[PATH_MAX];
+ int ret;
+
+ memset(&driver, 0, sizeof(driver));
+
+ getdriver(busid, configvalue, i, driver, PATH_MAX-1);
+
+ dbg(" %s:%d.%d -> %s ", busid, configvalue, i, driver);
+
+ if (!strncmp("none", driver, PATH_MAX))
+ continue; /* unbound interface */
+
+#if 0
+ if (!strncmp("usbip", driver, PATH_MAX))
+ continue; /* already bound to usbip */
+#endif
+
+ /* unbinding */
+ ret = unbind_interface(busid, configvalue, i);
+ if (ret < 0) {
+ dbg("unbind driver at %s:%d.%d failed",
+ busid, configvalue, i);
+ failed = 1;
+ }
+ }
+
+ if (failed)
+ return -1;
+ else
+ return 0;
+}
+
+static const char bind_path_format[] = "/sys/bus/usb/drivers/%s/bind";
+
+static int bind_interface_busid(char *busid, char *driver)
+{
+ char bind_path[PATH_MAX];
+ int fd;
+ int ret;
+
+ snprintf(bind_path, sizeof(bind_path), bind_path_format, driver);
+
+ fd = open(bind_path, O_WRONLY);
+ if (fd < 0)
+ return -1;
+
+ ret = write(fd, busid, strnlen(busid, SYSFS_BUS_ID_SIZE));
+ if (ret < 0) {
+ close(fd);
+ return -1;
+ }
+
+ close(fd);
+
+ return 0;
+}
+
+static int bind_interface(char *busid, int configvalue, int interface, char *driver)
+{
+ char inf_busid[SYSFS_BUS_ID_SIZE];
+
+ snprintf(inf_busid, SYSFS_BUS_ID_SIZE, "%s:%d.%d", busid, configvalue,
+ interface);
+
+ return bind_interface_busid(inf_busid, driver);
+}
+
+/* call at unbound state */
+static int bind_to_usbip(char *busid)
+{
+ int configvalue = 0;
+ int ninterface = 0;
+ int i;
+ int failed = 0;
+
+ configvalue = read_bConfigurationValue(busid);
+ ninterface = read_bNumInterfaces(busid);
+
+ if (configvalue < 0 || ninterface < 0) {
+ dbg("read config and ninf value, removed?");
+ return -1;
+ }
+
+ for (i = 0; i < ninterface; i++) {
+ int ret;
+
+ ret = bind_interface(busid, configvalue, i,
+ USBIP_HOST_DRV_NAME);
+ if (ret < 0) {
+ dbg("bind usbip at %s:%d.%d, failed",
+ busid, configvalue, i);
+ failed = 1;
+ /* need to contine binding at other interfaces */
+ }
+ }
+
+ if (failed)
+ return -1;
+ else
+ return 0;
+}
+
+static int use_device_by_usbip(char *busid)
+{
+ int ret;
+
+ ret = unbind(busid);
+ if (ret < 0) {
+ dbg("unbind drivers of %s, failed", busid);
+ return -1;
+ }
+
+ ret = modify_match_busid(busid, 1);
+ if (ret < 0) {
+ dbg("add %s to match_busid, failed", busid);
+ return -1;
+ }
+
+ ret = bind_to_usbip(busid);
+ if (ret < 0) {
+ dbg("bind usbip to %s, failed", busid);
+ modify_match_busid(busid, 0);
+ return -1;
+ }
+
+ dbg("bind %s complete!", busid);
+
+ return 0;
+}
+
+int usbip_bind(int argc, char *argv[])
+{
+ static const struct option opts[] = {
+ { "busid", required_argument, NULL, 'b' },
+ { NULL, 0, NULL, 0 }
+ };
+ int opt;
+ int ret = -1;
+
+ for (;;) {
+ opt = getopt_long(argc, argv, "b:", opts, NULL);
+
+ if (opt == -1)
+ break;
+
+ switch (opt) {
+ case 'b':
+ ret = use_device_by_usbip(optarg);
+ goto out;
+ default:
+ goto err_out;
+ }
+ }
+
+err_out:
+ usbip_bind_usage();
+out:
+ return ret;
+}
diff --git a/drivers/staging/usbip/userspace/src/usbip_detach.c b/drivers/staging/usbip/userspace/src/usbip_detach.c
new file mode 100644
index 0000000000000..89bf3c195c284
--- /dev/null
+++ b/drivers/staging/usbip/userspace/src/usbip_detach.c
@@ -0,0 +1,103 @@
+/*
+ * Copyright (C) 2011 matt mooney <mfm@muteddisk.com>
+ * 2005-2007 Takahiro Hirofuchi
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <sysfs/libsysfs.h>
+
+#include <ctype.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <getopt.h>
+#include <unistd.h>
+
+#include "vhci_driver.h"
+#include "usbip_common.h"
+#include "usbip_network.h"
+#include "usbip.h"
+
+static const char usbip_detach_usage_string[] =
+ "usbip detach <args>\n"
+ " -p, --port=<port> " USBIP_VHCI_DRV_NAME
+ " port the device is on\n";
+
+void usbip_detach_usage(void)
+{
+ printf("usage: %s", usbip_detach_usage_string);
+}
+
+static int detach_port(char *port)
+{
+ int ret;
+ uint8_t portnum;
+
+ for (unsigned int i=0; i < strlen(port); i++)
+ if (!isdigit(port[i])) {
+ err("invalid port %s", port);
+ return -1;
+ }
+
+ /* check max port */
+
+ portnum = atoi(port);
+
+ ret = usbip_vhci_driver_open();
+ if (ret < 0) {
+ err("open vhci_driver");
+ return -1;
+ }
+
+ ret = usbip_vhci_detach_device(portnum);
+ if (ret < 0)
+ return -1;
+
+ usbip_vhci_driver_close();
+
+ return ret;
+}
+
+int usbip_detach(int argc, char *argv[])
+{
+ static const struct option opts[] = {
+ { "port", required_argument, NULL, 'p' },
+ { NULL, 0, NULL, 0 }
+ };
+ int opt;
+ int ret = -1;
+
+ for (;;) {
+ opt = getopt_long(argc, argv, "p:", opts, NULL);
+
+ if (opt == -1)
+ break;
+
+ switch (opt) {
+ case 'p':
+ ret = detach_port(optarg);
+ goto out;
+ default:
+ goto err_out;
+ }
+ }
+
+err_out:
+ usbip_detach_usage();
+out:
+ return ret;
+}
diff --git a/drivers/staging/usbip/userspace/src/usbip_list.c b/drivers/staging/usbip/userspace/src/usbip_list.c
new file mode 100644
index 0000000000000..03f621046ec6a
--- /dev/null
+++ b/drivers/staging/usbip/userspace/src/usbip_list.c
@@ -0,0 +1,286 @@
+/*
+ * Copyright (C) 2011 matt mooney <mfm@muteddisk.com>
+ * 2005-2007 Takahiro Hirofuchi
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <sys/types.h>
+#include <sysfs/libsysfs.h>
+
+#include <errno.h>
+#include <stdbool.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <getopt.h>
+#include <netdb.h>
+#include <unistd.h>
+
+#include "usbip_common.h"
+#include "usbip_network.h"
+#include "usbip.h"
+
+static const char usbip_list_usage_string[] =
+ "usbip list [-p|--parsable] <args>\n"
+ " -p, --parsable Parsable list format\n"
+ " -r, --remote=<host> List the exported USB devices on <host>\n"
+ " -l, --local List the local USB devices\n";
+
+void usbip_list_usage(void)
+{
+ printf("usage: %s", usbip_list_usage_string);
+}
+
+static int get_exported_devices(int sockfd)
+{
+ char product_name[100];
+ char class_name[100];
+ struct op_devlist_reply rep;
+ uint16_t code = OP_REP_DEVLIST;
+ struct usbip_usb_device udev;
+ struct usbip_usb_interface uintf;
+ unsigned int i;
+ int j, rc;
+
+ rc = usbip_send_op_common(sockfd, OP_REQ_DEVLIST, 0);
+ if (rc < 0) {
+ dbg("usbip_send_op_common");
+ return -1;
+ }
+
+ rc = usbip_recv_op_common(sockfd, &code);
+ if (rc < 0) {
+ dbg("usbip_recv_op_common");
+ return -1;
+ }
+
+ memset(&rep, 0, sizeof(rep));
+ rc = usbip_recv(sockfd, &rep, sizeof(rep));
+ if (rc < 0) {
+ dbg("usbip_recv_op_devlist");
+ return -1;
+ }
+ PACK_OP_DEVLIST_REPLY(0, &rep);
+ dbg("exportable devices: %d", rep.ndev);
+
+ for (i = 0; i < rep.ndev; i++) {
+ memset(&udev, 0, sizeof(udev));
+ rc = usbip_recv(sockfd, &udev, sizeof(udev));
+ if (rc < 0) {
+ dbg("usbip_recv: usbip_usb_device[%d]", i);
+ return -1;
+ }
+ pack_usb_device(0, &udev);
+
+ usbip_names_get_product(product_name, sizeof(product_name),
+ udev.idVendor, udev.idProduct);
+ usbip_names_get_class(class_name, sizeof(class_name),
+ udev.bDeviceClass, udev.bDeviceSubClass,
+ udev.bDeviceProtocol);
+ printf("%8s: %s\n", udev.busid, product_name);
+ printf("%8s: %s\n", "", udev.path);
+ printf("%8s: %s\n", "", class_name);
+
+ for (j = 0; j < udev.bNumInterfaces; j++) {
+ rc = usbip_recv(sockfd, &uintf, sizeof(uintf));
+ if (rc < 0) {
+ dbg("usbip_recv: usbip_usb_interface[%d]", j);
+ return -1;
+ }
+ pack_usb_interface(0, &uintf);
+
+ usbip_names_get_class(class_name, sizeof(class_name),
+ uintf.bInterfaceClass,
+ uintf.bInterfaceSubClass,
+ uintf.bInterfaceProtocol);
+ printf("%8s: %2d - %s\n", "", j, class_name);
+
+ }
+ printf("\n");
+ }
+
+ return 0;
+}
+
+static int list_exported_devices(char *host)
+{
+ int rc;
+ int sockfd;
+
+ sockfd = usbip_net_tcp_connect(host, USBIP_PORT_STRING);
+ if (sockfd < 0) {
+ err("unable to connect to %s port %s: %s\n", host,
+ USBIP_PORT_STRING, gai_strerror(sockfd));
+ return -1;
+ }
+ dbg("connected to %s port %s\n", host, USBIP_PORT_STRING);
+ printf("- %s\n", host);
+
+ rc = get_exported_devices(sockfd);
+ if (rc < 0) {
+ dbg("get_exported_devices failed");
+ return -1;
+ }
+
+ close(sockfd);
+
+ return 0;
+}
+
+static void print_device(char *busid, char *vendor, char *product,
+ bool parsable)
+{
+ if (parsable)
+ printf("busid=%s#usbid=%.4s:%.4s#", busid, vendor, product);
+ else
+ printf(" - busid %s (%.4s:%.4s)\n", busid, vendor, product);
+}
+
+static void print_interface(char *busid, char *driver, bool parsable)
+{
+ if (parsable)
+ printf("%s=%s#", busid, driver);
+ else
+ printf("%9s%s -> %s\n", "", busid, driver);
+}
+
+static int is_device(void *x)
+{
+ struct sysfs_attribute *devpath;
+ struct sysfs_device *dev = x;
+ int ret = 0;
+
+ devpath = sysfs_get_device_attr(dev, "devpath");
+ if (devpath && *devpath->value != '0')
+ ret = 1;
+
+ return ret;
+}
+
+static int devcmp(void *a, void *b)
+{
+ return strcmp(a, b);
+}
+
+static int list_devices(bool parsable)
+{
+ char bus_type[] = "usb";
+ char busid[SYSFS_BUS_ID_SIZE];
+ struct sysfs_bus *ubus;
+ struct sysfs_device *dev;
+ struct sysfs_device *intf;
+ struct sysfs_attribute *idVendor;
+ struct sysfs_attribute *idProduct;
+ struct sysfs_attribute *bConfValue;
+ struct sysfs_attribute *bNumIntfs;
+ struct dlist *devlist;
+ int i;
+ int ret = -1;
+
+ ubus = sysfs_open_bus(bus_type);
+ if (!ubus) {
+ err("sysfs_open_bus: %s", strerror(errno));
+ return -1;
+ }
+
+ devlist = sysfs_get_bus_devices(ubus);
+ if (!devlist) {
+ err("sysfs_get_bus_devices: %s", strerror(errno));
+ goto err_out;
+ }
+
+ /* remove interfaces and root hubs from device list */
+ dlist_filter_sort(devlist, is_device, devcmp);
+
+ if (!parsable) {
+ printf("Local USB devices\n");
+ printf("=================\n");
+ }
+ dlist_for_each_data(devlist, dev, struct sysfs_device) {
+ idVendor = sysfs_get_device_attr(dev, "idVendor");
+ idProduct = sysfs_get_device_attr(dev, "idProduct");
+ bConfValue = sysfs_get_device_attr(dev, "bConfigurationValue");
+ bNumIntfs = sysfs_get_device_attr(dev, "bNumInterfaces");
+ if (!idVendor || !idProduct || !bConfValue || !bNumIntfs)
+ goto err_out;
+
+ print_device(dev->bus_id, idVendor->value, idProduct->value,
+ parsable);
+
+ for (i = 0; i < atoi(bNumIntfs->value); i++) {
+ snprintf(busid, sizeof(busid), "%s:%.1s.%d",
+ dev->bus_id, bConfValue->value, i);
+ intf = sysfs_open_device(bus_type, busid);
+ if (!intf)
+ goto err_out;
+ print_interface(busid, intf->driver_name, parsable);
+ sysfs_close_device(intf);
+ }
+ printf("\n");
+ }
+
+ ret = 0;
+
+err_out:
+ sysfs_close_bus(ubus);
+
+ return ret;
+}
+
+int usbip_list(int argc, char *argv[])
+{
+ static const struct option opts[] = {
+ { "parsable", no_argument, NULL, 'p' },
+ { "remote", required_argument, NULL, 'r' },
+ { "local", no_argument, NULL, 'l' },
+ { NULL, 0, NULL, 0 }
+ };
+ bool parsable = false;
+ int opt;
+ int ret = -1;
+
+ if (usbip_names_init(USBIDS_FILE))
+ err("failed to open %s", USBIDS_FILE);
+
+ for (;;) {
+ opt = getopt_long(argc, argv, "pr:l", opts, NULL);
+
+ if (opt == -1)
+ break;
+
+ switch (opt) {
+ case 'p':
+ parsable = true;
+ break;
+ case 'r':
+ ret = list_exported_devices(optarg);
+ goto out;
+ case 'l':
+ ret = list_devices(parsable);
+ goto out;
+ default:
+ goto err_out;
+ }
+ }
+
+err_out:
+ usbip_list_usage();
+out:
+ usbip_names_free();
+
+ return ret;
+}
diff --git a/drivers/staging/usbip/userspace/src/usbip_network.c b/drivers/staging/usbip/userspace/src/usbip_network.c
index 01be3c7211d5c..26e95bd745320 100644
--- a/drivers/staging/usbip/userspace/src/usbip_network.c
+++ b/drivers/staging/usbip/userspace/src/usbip_network.c
@@ -3,6 +3,16 @@
* Copyright (C) 2005-2007 Takahiro Hirofuchi
*/
+#include <sys/socket.h>
+
+#include <string.h>
+
+#include <arpa/inet.h>
+#include <netdb.h>
+#include <netinet/tcp.h>
+#include <unistd.h>
+
+#include "usbip_common.h"
#include "usbip_network.h"
void pack_uint32_t(int pack, uint32_t *num)
@@ -29,7 +39,7 @@ void pack_uint16_t(int pack, uint16_t *num)
*num = i;
}
-void pack_usb_device(int pack, struct usb_device *udev)
+void pack_usb_device(int pack, struct usbip_usb_device *udev)
{
pack_uint32_t(pack, &udev->busnum);
pack_uint32_t(pack, &udev->devnum);
@@ -41,7 +51,7 @@ void pack_usb_device(int pack, struct usb_device *udev)
}
void pack_usb_interface(int pack __attribute__((unused)),
- struct usb_interface *udev __attribute__((unused)))
+ struct usbip_usb_interface *udev __attribute__((unused)))
{
/* uint8_t members need nothing */
}
@@ -90,17 +100,17 @@ int usbip_send_op_common(int sockfd, uint32_t code, uint32_t status)
int ret;
struct op_common op_common;
- bzero(&op_common, sizeof(op_common));
+ memset(&op_common, 0, sizeof(op_common));
- op_common.version = USBIP_VERSION;
- op_common.code = code;
- op_common.status = status;
+ op_common.version = USBIP_VERSION;
+ op_common.code = code;
+ op_common.status = status;
PACK_OP_COMMON(1, &op_common);
ret = usbip_send(sockfd, (void *) &op_common, sizeof(op_common));
if (ret < 0) {
- err("send op_common");
+ err("usbip_send has failed");
return -1;
}
@@ -112,11 +122,11 @@ int usbip_recv_op_common(int sockfd, uint16_t *code)
int ret;
struct op_common op_common;
- bzero(&op_common, sizeof(op_common));
+ memset(&op_common, 0, sizeof(op_common));
ret = usbip_recv(sockfd, (void *) &op_common, sizeof(op_common));
if (ret < 0) {
- err("recv op_common, %d", ret);
+ err("usbip_recv has failed ret=%d", ret);
goto err;
}
@@ -186,66 +196,49 @@ int usbip_set_keepalive(int sockfd)
return ret;
}
-/* IPv6 Ready */
/*
- * moved here from vhci_attach.c
+ * IPv6 Ready
*/
-int tcp_connect(char *hostname, char *service)
+int usbip_net_tcp_connect(char *hostname, char *port)
{
- struct addrinfo hints, *res, *res0;
+ struct addrinfo hints, *res, *rp;
int sockfd;
- int err;
-
+ int ret;
memset(&hints, 0, sizeof(hints));
+ hints.ai_family = AF_UNSPEC;
hints.ai_socktype = SOCK_STREAM;
/* get all possible addresses */
- err = getaddrinfo(hostname, service, &hints, &res0);
- if (err) {
- err("%s %s: %s", hostname, service, gai_strerror(err));
- return -1;
+ ret = getaddrinfo(hostname, port, &hints, &res);
+ if (ret < 0) {
+ dbg("getaddrinfo: %s port %s: %s", hostname, port,
+ gai_strerror(ret));
+ return ret;
}
- /* try all the addresses */
- for (res = res0; res; res = res->ai_next) {
- char hbuf[NI_MAXHOST], sbuf[NI_MAXSERV];
-
- err = getnameinfo(res->ai_addr, res->ai_addrlen,
- hbuf, sizeof(hbuf), sbuf, sizeof(sbuf), NI_NUMERICHOST | NI_NUMERICSERV);
- if (err) {
- err("%s %s: %s", hostname, service, gai_strerror(err));
- continue;
- }
-
- dbg("trying %s port %s\n", hbuf, sbuf);
-
- sockfd = socket(res->ai_family, res->ai_socktype, res->ai_protocol);
- if (sockfd < 0) {
- err("socket");
+ /* try the addresses */
+ for (rp = res; rp; rp = rp->ai_next) {
+ sockfd = socket(rp->ai_family, rp->ai_socktype,
+ rp->ai_protocol);
+ if (sockfd < 0)
continue;
- }
/* should set TCP_NODELAY for usbip */
usbip_set_nodelay(sockfd);
- /* TODO: write code for heatbeat */
+ /* TODO: write code for heartbeat */
usbip_set_keepalive(sockfd);
- err = connect(sockfd, res->ai_addr, res->ai_addrlen);
- if (err < 0) {
- close(sockfd);
- continue;
- }
+ if (connect(sockfd, rp->ai_addr, rp->ai_addrlen) == 0)
+ break;
- /* connected */
- dbg("connected to %s:%s", hbuf, sbuf);
- freeaddrinfo(res0);
- return sockfd;
+ close(sockfd);
}
+ if (!rp)
+ return EAI_SYSTEM;
- dbg("%s:%s, %s", hostname, service, "no destination to connect to");
- freeaddrinfo(res0);
+ freeaddrinfo(res);
- return -1;
+ return sockfd;
}
diff --git a/drivers/staging/usbip/userspace/src/usbip_network.h b/drivers/staging/usbip/userspace/src/usbip_network.h
index 1225466e1c592..07274df7db153 100644
--- a/drivers/staging/usbip/userspace/src/usbip_network.h
+++ b/drivers/staging/usbip/userspace/src/usbip_network.h
@@ -2,19 +2,20 @@
* Copyright (C) 2005-2007 Takahiro Hirofuchi
*/
-#ifndef _USBIP_NETWORK_H
-#define _USBIP_NETWORK_H
+#ifndef __USBIP_NETWORK_H
+#define __USBIP_NETWORK_H
-#include "usbip.h"
-#include <sys/types.h>
-#include <sys/socket.h>
-#include <netinet/tcp.h>
+#ifdef HAVE_CONFIG_H
+#include "../config.h"
+#endif
+#include <sys/types.h>
+#include <sysfs/libsysfs.h>
-/* -------------------------------------------------- */
-/* Define Protocol Format */
-/* -------------------------------------------------- */
+#include <stdint.h>
+#define USBIP_PORT 3240
+#define USBIP_PORT_STRING "3240"
/* ---------------------------------------------------------------------- */
/* Common header for all the kinds of PDUs. */
@@ -38,7 +39,6 @@ struct op_common {
pack_uint32_t(pack, &(op_common)->status );\
} while (0)
-
/* ---------------------------------------------------------------------- */
/* Dummy Code */
#define OP_UNSPEC 0x00
@@ -56,11 +56,10 @@ struct op_devinfo_request {
} __attribute__((packed));
struct op_devinfo_reply {
- struct usb_device udev;
- struct usb_interface uinf[];
+ struct usbip_usb_device udev;
+ struct usbip_usb_interface uinf[];
} __attribute__((packed));
-
/* ---------------------------------------------------------------------- */
/* Import a remote USB device. */
#define OP_IMPORT 0x03
@@ -72,8 +71,8 @@ struct op_import_request {
} __attribute__((packed));
struct op_import_reply {
- struct usb_device udev;
-// struct usb_interface uinf[];
+ struct usbip_usb_device udev;
+// struct usbip_usb_interface uinf[];
} __attribute__((packed));
#define PACK_OP_IMPORT_REQUEST(pack, request) do {\
@@ -83,8 +82,6 @@ struct op_import_reply {
pack_usb_device(pack, &(reply)->udev);\
} while (0)
-
-
/* ---------------------------------------------------------------------- */
/* Export a USB device to a remote host. */
#define OP_EXPORT 0x06
@@ -92,7 +89,7 @@ struct op_import_reply {
#define OP_REP_EXPORT (OP_REPLY | OP_EXPORT)
struct op_export_request {
- struct usb_device udev;
+ struct usbip_usb_device udev;
} __attribute__((packed));
struct op_export_reply {
@@ -114,7 +111,7 @@ struct op_export_reply {
#define OP_REP_UNEXPORT (OP_REPLY | OP_UNEXPORT)
struct op_unexport_request {
- struct usb_device udev;
+ struct usbip_usb_device udev;
} __attribute__((packed));
struct op_unexport_reply {
@@ -128,8 +125,6 @@ struct op_unexport_reply {
#define PACK_OP_UNEXPORT_REPLY(pack, reply) do {\
} while (0)
-
-
/* ---------------------------------------------------------------------- */
/* Negotiate IPSec encryption key. (still not used) */
#define OP_CRYPKEY 0x04
@@ -161,8 +156,8 @@ struct op_devlist_reply {
} __attribute__((packed));
struct op_devlist_reply_extra {
- struct usb_device udev;
- struct usb_interface uinf[];
+ struct usbip_usb_device udev;
+ struct usbip_usb_interface uinf[];
} __attribute__((packed));
#define PACK_OP_DEVLIST_REQUEST(pack, request) do {\
@@ -172,15 +167,10 @@ struct op_devlist_reply_extra {
pack_uint32_t(pack, &(reply)->ndev);\
} while (0)
-
-/* -------------------------------------------------- */
-/* Declare Prototype Function */
-/* -------------------------------------------------- */
-
void pack_uint32_t(int pack, uint32_t *num);
void pack_uint16_t(int pack, uint16_t *num);
-void pack_usb_device(int pack, struct usb_device *udev);
-void pack_usb_interface(int pack, struct usb_interface *uinf);
+void pack_usb_device(int pack, struct usbip_usb_device *udev);
+void pack_usb_interface(int pack, struct usbip_usb_interface *uinf);
ssize_t usbip_recv(int sockfd, void *buff, size_t bufflen);
ssize_t usbip_send(int sockfd, void *buff, size_t bufflen);
@@ -190,9 +180,6 @@ int usbip_set_reuseaddr(int sockfd);
int usbip_set_nodelay(int sockfd);
int usbip_set_keepalive(int sockfd);
-int tcp_connect(char *hostname, char *service);
+int usbip_net_tcp_connect(char *hostname, char *port);
-#define USBIP_PORT 3240
-#define USBIP_PORT_STRING "3240"
-
-#endif
+#endif /* __USBIP_NETWORK_H */
diff --git a/drivers/staging/usbip/userspace/src/usbip_unbind.c b/drivers/staging/usbip/userspace/src/usbip_unbind.c
new file mode 100644
index 0000000000000..9978d383cbea4
--- /dev/null
+++ b/drivers/staging/usbip/userspace/src/usbip_unbind.c
@@ -0,0 +1,95 @@
+/*
+ * Copyright (C) 2011 matt mooney <mfm@muteddisk.com>
+ * 2005-2007 Takahiro Hirofuchi
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <stdio.h>
+
+#include <getopt.h>
+#include <unistd.h>
+
+#include "usbip_common.h"
+#include "utils.h"
+#include "usbip.h"
+
+static const char usbip_unbind_usage_string[] =
+ "usbip unbind <args>\n"
+ " -b, --busid=<busid> Unbind " USBIP_HOST_DRV_NAME ".ko from "
+ "device on <busid>\n";
+
+void usbip_unbind_usage(void)
+{
+ printf("usage: %s", usbip_unbind_usage_string);
+}
+
+static int use_device_by_other(char *busid)
+{
+ int rc;
+ int config;
+
+ /* read and write the same config value to kick probing */
+ config = read_bConfigurationValue(busid);
+ if (config < 0) {
+ dbg("read bConfigurationValue of %s, failed", busid);
+ return -1;
+ }
+
+ rc = modify_match_busid(busid, 0);
+ if (rc < 0) {
+ dbg("del %s to match_busid, failed", busid);
+ return -1;
+ }
+
+ rc = write_bConfigurationValue(busid, config);
+ if (rc < 0) {
+ dbg("read bConfigurationValue of %s, failed", busid);
+ return -1;
+ }
+
+ info("bind %s to other drivers than usbip, complete!", busid);
+
+ return 0;
+}
+
+int usbip_unbind(int argc, char *argv[])
+{
+ static const struct option opts[] = {
+ { "busid", required_argument, NULL, 'b' },
+ { NULL, 0, NULL, 0 }
+ };
+ int opt;
+ int ret = -1;
+
+ for (;;) {
+ opt = getopt_long(argc, argv, "b:", opts, NULL);
+
+ if (opt == -1)
+ break;
+
+ switch (opt) {
+ case 'b':
+ ret = use_device_by_other(optarg);
+ goto out;
+ default:
+ goto err_out;
+ }
+ }
+
+err_out:
+ usbip_unbind_usage();
+out:
+ return ret;
+}
diff --git a/drivers/staging/usbip/userspace/src/usbipd.c b/drivers/staging/usbip/userspace/src/usbipd.c
index ec9faac5ff8f2..332f9e631fd57 100644
--- a/drivers/staging/usbip/userspace/src/usbipd.c
+++ b/drivers/staging/usbip/userspace/src/usbipd.c
@@ -7,9 +7,10 @@
#include "../config.h"
#endif
+#include <errno.h>
#include <unistd.h>
#include <netdb.h>
-#include <strings.h>
+#include <string.h>
#include <stdlib.h>
#include <sys/types.h>
#include <sys/stat.h>
@@ -23,16 +24,15 @@
#define _GNU_SOURCE
#include <getopt.h>
+#include <glib.h>
#include <signal.h>
-#include "usbip.h"
+#include "stub_driver.h"
+#include "usbip_common.h"
#include "usbip_network.h"
-#include <glib.h>
-
static const char version[] = PACKAGE_STRING;
-
static int send_reply_devlist(int sockfd)
{
int ret;
@@ -64,7 +64,7 @@ static int send_reply_devlist(int sockfd)
}
dlist_for_each_data(stub_driver->edev_list, edev, struct usbip_exported_device) {
- struct usb_device pdu_udev;
+ struct usbip_usb_device pdu_udev;
dump_usb_device(&edev->udev);
memcpy(&pdu_udev, &edev->udev, sizeof(pdu_udev));
@@ -77,7 +77,7 @@ static int send_reply_devlist(int sockfd)
}
for (int i=0; i < edev->udev.bNumInterfaces; i++) {
- struct usb_interface pdu_uinf;
+ struct usbip_usb_interface pdu_uinf;
dump_usb_interface(&edev->uinf[i]);
memcpy(&pdu_uinf, &edev->uinf[i], sizeof(pdu_uinf));
@@ -100,7 +100,7 @@ static int recv_request_devlist(int sockfd)
int ret;
struct op_devlist_request req;
- bzero(&req, sizeof(req));
+ memset(&req, 0, sizeof(req));
ret = usbip_recv(sockfd, (void *) &req, sizeof(req));
if (ret < 0) {
@@ -127,8 +127,8 @@ static int recv_request_import(int sockfd)
int found = 0;
int error = 0;
- bzero(&req, sizeof(req));
- bzero(&reply, sizeof(reply));
+ memset(&req, 0, sizeof(req));
+ memset(&reply, 0, sizeof(reply));
ret = usbip_recv(sockfd, (void *) &req, sizeof(req));
if (ret < 0) {
@@ -167,7 +167,7 @@ static int recv_request_import(int sockfd)
}
if (!error) {
- struct usb_device pdu_udev;
+ struct usbip_usb_device pdu_udev;
memcpy(&pdu_udev, &edev->udev, sizeof(pdu_udev));
pack_usb_device(1, &pdu_udev);
@@ -244,7 +244,7 @@ static struct addrinfo *my_getaddrinfo(char *host, int ai_family)
int ret;
struct addrinfo hints, *ai_head;
- bzero(&hints, sizeof(hints));
+ memset(&hints, 0, sizeof(hints));
hints.ai_family = ai_family;
hints.ai_socktype = SOCK_STREAM;
@@ -337,7 +337,7 @@ static int my_accept(int lsock)
char host[NI_MAXHOST], port[NI_MAXSERV];
int ret;
- bzero(&ss, sizeof(ss));
+ memset(&ss, 0, sizeof(ss));
csock = accept(lsock, (struct sockaddr *) &ss, &len);
if (csock < 0) {
@@ -380,7 +380,7 @@ static void set_signal(void)
{
struct sigaction act;
- bzero(&act, sizeof(act));
+ memset(&act, 0, sizeof(act));
act.sa_handler = signal_handler;
sigemptyset(&act.sa_mask);
sigaction(SIGTERM, &act, NULL);
diff --git a/drivers/staging/usbip/userspace/src/utils.c b/drivers/staging/usbip/userspace/src/utils.c
index 8f441089b6450..1da1109d11d39 100644
--- a/drivers/staging/usbip/userspace/src/utils.c
+++ b/drivers/staging/usbip/userspace/src/utils.c
@@ -3,15 +3,72 @@
* Copyright (C) 2005-2007 Takahiro Hirofuchi
*/
+#include <sysfs/libsysfs.h>
+
+#include <limits.h>
+#include <stdio.h>
+#include <string.h>
+
+#include <fcntl.h>
+#include <libgen.h>
+#include <unistd.h>
+
+#include "usbip_common.h"
#include "utils.h"
+int modify_match_busid(char *busid, int add)
+{
+ int fd;
+ int ret;
+ char buff[SYSFS_BUS_ID_SIZE + 4];
+ char sysfs_mntpath[SYSFS_PATH_MAX];
+ char match_busid_path[SYSFS_PATH_MAX];
+
+ ret = sysfs_get_mnt_path(sysfs_mntpath, SYSFS_PATH_MAX);
+ if (ret < 0) {
+ err("sysfs must be mounted");
+ return -1;
+ }
+
+ snprintf(match_busid_path, sizeof(match_busid_path),
+ "%s/%s/usb/%s/%s/match_busid", sysfs_mntpath, SYSFS_BUS_NAME,
+ SYSFS_DRIVERS_NAME, USBIP_HOST_DRV_NAME);
+
+ /* BUS_IS_SIZE includes NULL termination? */
+ if (strnlen(busid, SYSFS_BUS_ID_SIZE) > SYSFS_BUS_ID_SIZE - 1) {
+ dbg("busid is too long");
+ return -1;
+ }
+
+ fd = open(match_busid_path, O_WRONLY);
+ if (fd < 0)
+ return -1;
+
+ if (add)
+ snprintf(buff, SYSFS_BUS_ID_SIZE + 4, "add %s", busid);
+ else
+ snprintf(buff, SYSFS_BUS_ID_SIZE + 4, "del %s", busid);
+
+ dbg("write \"%s\" to %s", buff, match_busid_path);
+
+ ret = write(fd, buff, sizeof(buff));
+ if (ret < 0) {
+ close(fd);
+ return -1;
+ }
+
+ close(fd);
+
+ return 0;
+}
+
int read_integer(char *path)
{
char buff[100];
int fd;
int ret = 0;
- bzero(buff, sizeof(buff));
+ memset(buff, 0, sizeof(buff));
fd = open(path, O_RDONLY);
if (fd < 0)
@@ -36,7 +93,7 @@ int read_string(char *path, char *string, size_t len)
int ret = 0;
char *p;
- bzero(string, len);
+ memset(string, 0, len);
fd = open(path, O_RDONLY);
if (fd < 0) {
@@ -122,15 +179,16 @@ int getdriver(char *busid, int conf, int infnum, char *driver, size_t len)
{
char path[PATH_MAX];
char linkto[PATH_MAX];
+ const char none[] = "none";
int ret;
snprintf(path, PATH_MAX, "/sys/bus/usb/devices/%s:%d.%d/driver", busid, conf, infnum);
/* readlink does not add NULL */
- bzero(linkto, sizeof(linkto));
+ memset(linkto, 0, sizeof(linkto));
ret = readlink(path, linkto, sizeof(linkto)-1);
if (ret < 0) {
- strncpy(driver, "none", len);
+ strncpy(driver, none, len);
return -1;
} else {
strncpy(driver, basename(linkto), len);
diff --git a/drivers/staging/usbip/userspace/src/utils.h b/drivers/staging/usbip/userspace/src/utils.h
index 6c29ae9452129..b50e95a0a515d 100644
--- a/drivers/staging/usbip/userspace/src/utils.h
+++ b/drivers/staging/usbip/userspace/src/utils.h
@@ -1,30 +1,9 @@
+#ifndef __UTILS_H
+#define __UTILS_H
-#ifdef HAVE_CONFIG_H
-#include "../config.h"
-#endif
-
-#define _GNU_SOURCE
-#include <string.h>
-#include <sys/un.h>
-#include <sys/types.h>
-#include <sys/socket.h>
-
-#include <sysfs/libsysfs.h>
-#include <glib.h>
-#include <unistd.h>
-#include <stdio.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <fcntl.h>
#include <stdlib.h>
-#include <time.h>
-#include <errno.h>
-
-
-
-/* Be sync to kernel header */
-#define BUS_ID_SIZE 20
+int modify_match_busid(char *busid, int add);
int read_string(char *path, char *, size_t len);
int read_integer(char *path);
int getdevicename(char *busid, char *name, size_t len);
@@ -36,3 +15,5 @@ int write_bConfigurationValue(char *busid, int config);
int read_bDeviceClass(char *busid);
int readline(int sockfd, char *str, int strlen);
int writeline(int sockfd, char *buff, int bufflen);
+
+#endif /* __UTILS_H */
diff --git a/drivers/staging/usbip/vhci.h b/drivers/staging/usbip/vhci.h
index d5bc8e7e3d79d..71a586e00fd7a 100644
--- a/drivers/staging/usbip/vhci.h
+++ b/drivers/staging/usbip/vhci.h
@@ -6,15 +6,6 @@
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
- * This is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307,
- * USA.
*/
#include <linux/device.h>
@@ -105,7 +96,7 @@ struct vhci_hcd {
};
extern struct vhci_hcd *the_controller;
-extern struct attribute_group dev_attr_group;
+extern const struct attribute_group dev_attr_group;
#define hardware (&the_controller->pdev.dev)
/* vhci_hcd.c */
diff --git a/drivers/staging/usbip/vhci_hcd.c b/drivers/staging/usbip/vhci_hcd.c
index a76e8fa69b6e3..359b4647b6017 100644
--- a/drivers/staging/usbip/vhci_hcd.c
+++ b/drivers/staging/usbip/vhci_hcd.c
@@ -344,9 +344,9 @@ static int vhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
* */
if (dum->resuming && time_after(jiffies, dum->re_timeout)) {
dum->port_status[rhport] |=
- (1 << USB_PORT_FEAT_C_SUSPEND);
+ (1 << USB_PORT_FEAT_C_SUSPEND);
dum->port_status[rhport] &=
- ~(1 << USB_PORT_FEAT_SUSPEND);
+ ~(1 << USB_PORT_FEAT_SUSPEND);
dum->resuming = 0;
dum->re_timeout = 0;
/* if (dum->driver && dum->driver->resume) {
@@ -639,9 +639,7 @@ no_need_xmit:
usb_hcd_unlink_urb_from_ep(hcd, urb);
no_need_unlink:
spin_unlock_irqrestore(&the_controller->lock, flags);
-
usb_hcd_giveback_urb(vhci_to_hcd(the_controller), urb, urb->status);
-
return ret;
}
@@ -1033,9 +1031,8 @@ static int vhci_bus_resume(struct usb_hcd *hcd)
hcd->state = HC_STATE_RUNNING;
}
spin_unlock_irq(&vhci->lock);
- return rc;
- return 0;
+ return rc;
}
#else
@@ -1212,7 +1209,7 @@ static struct platform_device the_pdev = {
},
};
-static int __init vhci_init(void)
+static int __init vhci_hcd_init(void)
{
int ret;
@@ -1236,14 +1233,14 @@ err_driver_register:
return ret;
}
-static void __exit vhci_cleanup(void)
+static void __exit vhci_hcd_exit(void)
{
platform_device_unregister(&the_pdev);
platform_driver_unregister(&vhci_driver);
}
-module_init(vhci_init);
-module_exit(vhci_cleanup);
+module_init(vhci_hcd_init);
+module_exit(vhci_hcd_exit);
MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
diff --git a/drivers/staging/usbip/vhci_rx.c b/drivers/staging/usbip/vhci_rx.c
index e42ce9dab7ac5..09c44abb89e82 100644
--- a/drivers/staging/usbip/vhci_rx.c
+++ b/drivers/staging/usbip/vhci_rx.c
@@ -179,8 +179,6 @@ static void vhci_recv_ret_unlink(struct vhci_device *vdev,
}
kfree(unlink);
-
- return;
}
static int vhci_priv_tx_empty(struct vhci_device *vdev)
diff --git a/drivers/staging/usbip/vhci_sysfs.c b/drivers/staging/usbip/vhci_sysfs.c
index d9736f9c4028b..0cd039bb5fd65 100644
--- a/drivers/staging/usbip/vhci_sysfs.c
+++ b/drivers/staging/usbip/vhci_sysfs.c
@@ -135,7 +135,7 @@ static DEVICE_ATTR(detach, S_IWUSR, NULL, store_detach);
static int valid_args(__u32 rhport, enum usb_device_speed speed)
{
/* check rhport */
- if ((rhport < 0) || (rhport >= VHCI_NPORTS)) {
+ if (rhport >= VHCI_NPORTS) {
pr_err("port %u\n", rhport);
return -EINVAL;
}
@@ -192,7 +192,7 @@ static ssize_t store_attach(struct device *dev, struct device_attribute *attr,
/* check sockfd */
socket = sockfd_to_socket(sockfd);
if (!socket)
- return -EINVAL;
+ return -EINVAL;
/* now need lock until setting vdev status as used */
@@ -239,6 +239,6 @@ static struct attribute *dev_attrs[] = {
NULL,
};
-struct attribute_group dev_attr_group = {
+const struct attribute_group dev_attr_group = {
.attrs = dev_attrs,
};